Cross Reference: /src/sys/dev/usb/if

Lines Matching defs:mue_csr_write
83 static int	mue_csr_write(struct usbnet *, uint32_t, uint32_t);
124 	mue_csr_write(un, reg, mue_csr_read(un, reg) | (x))
127 	mue_csr_write(un, reg, mue_csr_read(un, reg) & ~(x))
171 mue_csr_write(struct usbnet *un, uint32_t reg, uint32_t aval)
233 	mue_csr_write(un, MUE_MII_ACCESS, MUE_MII_ACCESS_READ |
261 	mue_csr_write(un, MUE_MII_DATA, val);
262 	mue_csr_write(un, MUE_MII_ACCESS, MUE_MII_ACCESS_WRITE |
346 	mue_csr_write(un, (un->un_flags & LAN7500) ?
348 	mue_csr_write(un, MUE_FLOW, flow);
364 	mue_csr_write(un, MUE_E2P_CMD, MUE_E2P_CMD_READ | MUE_E2P_CMD_BUSY |
391 		mue_csr_write(un, MUE_HW_CFG,
403 		mue_csr_write(un, MUE_HW_CFG, val);
435 		mue_csr_write(un, MUE_OTP_PWR_DN, 0);
446 		mue_csr_write(un, MUE_OTP_ADDR1,
448 		mue_csr_write(un, MUE_OTP_ADDR2,
450 		mue_csr_write(un, MUE_OTP_FUNC_CMD, MUE_OTP_FUNC_CMD_READ);
451 		mue_csr_write(un, MUE_OTP_CMD_GO, MUE_OTP_CMD_GO_GO);
502 	mue_csr_write(un, MUE_DP_SEL,
506 		mue_csr_write(un, MUE_DP_ADDR, addr + i);
507 		mue_csr_write(un, MUE_DP_DATA, data[i]);
508 		mue_csr_write(un, MUE_DP_CMD, MUE_DP_CMD_WRITE);
553 		mue_csr_write(un, MUE_LTM_INDEX(i), idx[i]);
586 		mue_csr_write(un, MUE_7500_BURST_CAP, val);
587 		mue_csr_write(un, MUE_7500_BULKIN_DELAY,
594 		mue_csr_write(un, MUE_7500_FCT_RX_FIFO_END, val);
596 		mue_csr_write(un, MUE_7500_FCT_TX_FIFO_END, val);
613 		mue_csr_write(un, MUE_7800_BURST_CAP, val);
614 		mue_csr_write(un, MUE_7800_BULKIN_DELAY,
626 		mue_csr_write(un, MUE_7800_FCT_RX_FIFO_END, val);
628 		mue_csr_write(un, MUE_7800_FCT_TX_FIFO_END, val);
632 	mue_csr_write(un, MUE_INT_STATUS, ~0);
634 	mue_csr_write(un, (un->un_flags & LAN7500) ?
636 	mue_csr_write(un, MUE_FLOW, 0);
689 	mue_csr_write(un, MUE_RX_ADDRL, lo);
690 	mue_csr_write(un, MUE_RX_ADDRH, hi);
1074 		mue_csr_write(un, hireg, 0);
1075 		mue_csr_write(un, loreg, pfiltbl[i][1]);
1076 		mue_csr_write(un, hireg, pfiltbl[i][0]);
1082 	mue_csr_write(un, reg, rxfilt);
1116 	mue_csr_write(un, reg, val);
1132 	mue_csr_write(un, MUE_MAC_RX, val);
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