Cross Reference: /src/sys/dev/usb/motg.c

Lines Matching defs:UWRITE1
182 #define UWRITE1(sc, r, x) \
228 	UWRITE1(sc, MUSB2_REG_POWER, val);
283 	UWRITE1(sc, MUSB2_REG_INTUSBE, 0);
298 	UWRITE1(sc, MUSB2_REG_POWER,
305 		UWRITE1(sc, MUSB2_REG_DEVCTL, val);
310 		UWRITE1(sc, MUSB2_REG_DEVCTL, val);
317 	UWRITE1(sc, MUSB2_REG_TESTMODE, 0);
322 	UWRITE1(sc, MUSB2_REG_MISC, 0);
327 	UWRITE1(sc, MUSB2_REG_EPINDEX, 0);
373 		UWRITE1(sc, MUSB2_REG_EPINDEX, i);
402 					UWRITE1(sc, MUSB2_REG_RXFIFOSZ,
406 					UWRITE1(sc, MUSB2_REG_RXFIFOSZ,
410 					UWRITE1(sc, MUSB2_REG_RXFIFOSZ,
421 					UWRITE1(sc, MUSB2_REG_TXFIFOSZ,
425 					UWRITE1(sc, MUSB2_REG_TXFIFOSZ,
429 					UWRITE1(sc, MUSB2_REG_TXFIFOSZ,
456 		UWRITE1(sc, MUSB2_REG_INTUSBE, 0xff);
460 		UWRITE1(sc, MUSB2_REG_INTUSBE, MUSB2_MASK_IRESET);
640 			UWRITE1(sc, MUSB2_REG_INTUSBE, val);
653 				UWRITE1(sc, MUSB2_REG_INTUSBE, val);
665 				UWRITE1(sc, MUSB2_REG_INTUSBE, val);
740 		UWRITE1(sc, MUSB2_REG_DEVCTL, val);
854 				UWRITE1(sc, MUSB2_REG_POWER, val);
859 				UWRITE1(sc, MUSB2_REG_POWER, val);
951 				UWRITE1(sc, MUSB2_REG_POWER, val);
1084 	UWRITE1(sc, MUSB2_REG_POWER, val);
1090 	UWRITE1(sc, MUSB2_REG_POWER, val);
1174 	UWRITE1(sc, MUSB2_REG_TXFADDR(epnumber), dev->ud_addr);
1176 		UWRITE1(sc, MUSB2_REG_TXHADDR(epnumber),
1178 		UWRITE1(sc, MUSB2_REG_TXHUBPORT(epnumber),
1181 		UWRITE1(sc, MUSB2_REG_TXHADDR(epnumber), 0);
1182 		UWRITE1(sc, MUSB2_REG_TXHUBPORT(epnumber), 0);
1184 	UWRITE1(sc, MUSB2_REG_TXTI,
1191 			UWRITE1(sc, MUSB2_REG_TXNAKLIMIT,
1194 			UWRITE1(sc, MUSB2_REG_TXNAKLIMIT, NAK_TO_CTRL);
1200 				UWRITE1(sc, MUSB2_REG_TXNAKLIMIT,
1203 				UWRITE1(sc, MUSB2_REG_TXNAKLIMIT, NAK_TO_BULK);
1207 				UWRITE1(sc, MUSB2_REG_TXNAKLIMIT, POLL_TO_HIGH);
1209 				UWRITE1(sc, MUSB2_REG_TXNAKLIMIT, POLL_TO);
1223 	UWRITE1(sc, MUSB2_REG_RXFADDR(epnumber), dev->ud_addr);
1225 		UWRITE1(sc, MUSB2_REG_RXHADDR(epnumber),
1227 		UWRITE1(sc, MUSB2_REG_RXHUBPORT(epnumber),
1230 		UWRITE1(sc, MUSB2_REG_RXHADDR(epnumber), 0);
1231 		UWRITE1(sc, MUSB2_REG_RXHUBPORT(epnumber), 0);
1233 	UWRITE1(sc, MUSB2_REG_RXTI,
1240 			UWRITE1(sc, MUSB2_REG_RXNAKLIMIT,
1243 			UWRITE1(sc, MUSB2_REG_RXNAKLIMIT, NAK_TO_CTRL);
1249 				UWRITE1(sc, MUSB2_REG_RXNAKLIMIT,
1252 				UWRITE1(sc, MUSB2_REG_RXNAKLIMIT, NAK_TO_BULK);
1256 				UWRITE1(sc, MUSB2_REG_RXNAKLIMIT, POLL_TO_HIGH);
1258 				UWRITE1(sc, MUSB2_REG_RXNAKLIMIT, POLL_TO);
1358 	UWRITE1(sc, MUSB2_REG_EPINDEX, 0);
1369 	UWRITE1(sc, MUSB2_REG_TXCSRL,
1387 	UWRITE1(sc, MUSB2_REG_TXCSRL, MUSB2_MASK_CSR0L_REQPKT);
1408 	UWRITE1(sc, MUSB2_REG_EPINDEX, 0);
1418 		UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
1421 		UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
1431 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
1442 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
1452 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
1478 	UWRITE1(sc, MUSB2_REG_TXCSRL, csr & ~MUSB2_MASK_CSR0L_RXPKTRDY);
1483 			UWRITE1(sc, MUSB2_REG_TXCSRH,
1487 			UWRITE1(sc, MUSB2_REG_TXCSRL,
1535 	UWRITE1(sc, MUSB2_REG_EPINDEX, 0);
1546 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
1553 			UWRITE1(sc, MUSB2_REG_TXCSRH,
1559 		UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
1565 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
1599 			UWRITE1(sc, MUSB2_REG_RXCSRH,
1603 			UWRITE1(sc, MUSB2_REG_TXCSRL,
1638 	UWRITE1(sc, MUSB2_REG_TXCSRL, MUSB2_MASK_CSR0L_TXPKTRDY);
1799 	UWRITE1(sc, MUSB2_REG_EPINDEX, ep->ep_number);
1840 	UWRITE1(sc, MUSB2_REG_RXCSRH, val);
1846 	UWRITE1(sc, MUSB2_REG_RXCSRL, MUSB2_MASK_CSRL_RXREQPKT);
1902 	UWRITE1(sc, MUSB2_REG_TXCSRH, val);
1905 	UWRITE1(sc, MUSB2_REG_TXCSRL, MUSB2_MASK_CSRL_TXPKTRDY);
1926 	UWRITE1(sc, MUSB2_REG_EPINDEX, epnumber);
1939 		UWRITE1(sc, MUSB2_REG_RXCSRL, csr);
1942 		UWRITE1(sc, MUSB2_REG_RXCSRL, csr);
1952 		UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
1958 		UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
1973 		UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
2000 	UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
2045 	UWRITE1(sc, MUSB2_REG_EPINDEX, epnumber);
2057 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
2063 		UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
2068 			UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
2197 			UWRITE1(sc, MUSB2_REG_EPINDEX,
2203 					UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
2206 				UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
2211 					UWRITE1(sc, MUSB2_REG_RXCSRL, csr);
2214 				UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
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