Lines Matching refs:UINT32
261 UINT32 Interrupt;
273 UINT32 PciFlags;
275 UINT32 UartClkFreq;
276 UINT32 PreciseBaudrate;
311 UINT32 Interrupt;
344 UINT32 TableRevision; /* Must be value '1' */
375 UINT32 Flags;
378 UINT32 ClockDomain;
392 UINT32 ProximityDomain;
396 UINT32 Reserved1;
397 UINT32 Flags;
415 UINT32 ProximityDomain;
416 UINT32 ApicId;
417 UINT32 Flags;
418 UINT32 ClockDomain;
419 UINT32 Reserved2;
433 UINT32 ProximityDomain;
434 UINT32 AcpiProcessorUid;
435 UINT32 Flags;
436 UINT32 ClockDomain;
450 UINT32 ProximityDomain;
452 UINT32 ItsId;
469 UINT32 ProximityDomain;
471 UINT32 Flags;
472 UINT32 Reserved1;
487 UINT32 ProximityDomain;
488 UINT32 AcpiProcessorUid;
489 UINT32 Flags;
490 UINT32 ClockDomain;
550 UINT32 MinimumLogLength; /* Minimum length for the event log area */
565 UINT32 GlobalInterrupt;
567 UINT32 Reserved3;
608 UINT32 Reserved;
610 UINT32 StartMethod;
624 UINT32 Reserved;
637 UINT32 StartMethod;
667 UINT32 MinimumLogLength; /* Minimum length for the event log area */
681 UINT32 GlobalInterrupt;
685 UINT32 FunctionId;
759 UINT32 EndpointStart;
772 UINT32 Endpoint;
809 UINT32 Flags;
832 UINT32 HeaderLength; /* Watchdog Header Length */
838 UINT32 TimerPeriod; /* Period of one timer count (msec) */
839 UINT32 MaxCount; /* Maximum counter value supported */
840 UINT32 MinCount; /* Minimum counter value */
843 UINT32 Entries; /* Number of watchdog entries that follow */
861 UINT32 Value; /* Value used with Read/Write register */
862 UINT32 Mask; /* Bitmask required for this register instruction */
980 UINT32 HandoffSize;
1008 UINT32 ProtectionFlags;
1033 UINT32 EventInterrupt;
Indexes created Sat Oct 25 10:09:55 GMT 2025