Lines Matching defs:ast
45 void ast_set_index_reg_mask(struct ast_private *ast,
50 ast_io_write8(ast, base, index);
51 tmp = (ast_io_read8(ast, base + 1) & mask) | val;
52 ast_set_index_reg(ast, base, index, tmp);
55 uint8_t ast_get_index_reg(struct ast_private *ast,
59 ast_io_write8(ast, base, index);
60 ret = ast_io_read8(ast, base + 1);
64 uint8_t ast_get_index_reg_mask(struct ast_private *ast,
68 ast_io_write8(ast, base, index);
69 ret = ast_io_read8(ast, base + 1) & mask;
76 struct ast_private *ast = dev->dev_private;
80 ast->config_mode = ast_use_defaults;
87 ast->config_mode = ast_use_dt;
101 jregd0 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);
102 jregd1 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
105 data = ast_read32(ast, 0xf004);
108 ast->config_mode = ast_use_p2a;
113 ast_write32(ast, 0xf004, 0x1e6e0000);
114 ast_write32(ast, 0xf000, 0x1);
115 *scu_rev = ast_read32(ast, 0x1207c);
126 struct ast_private *ast = dev->dev_private;
144 ast_open_key(ast);
152 ast->chip = AST1100;
153 DRM_INFO("AST 1180 detected\n");
156 ast->chip = AST2500;
157 DRM_INFO("AST 2500 detected\n");
159 ast->chip = AST2400;
160 DRM_INFO("AST 2400 detected\n");
162 ast->chip = AST2300;
163 DRM_INFO("AST 2300 detected\n");
167 ast->chip = AST1100;
168 DRM_INFO("AST 1100 detected\n");
171 ast->chip = AST2200;
172 DRM_INFO("AST 2200 detected\n");
175 ast->chip = AST2150;
176 DRM_INFO("AST 2150 detected\n");
179 ast->chip = AST2100;
180 DRM_INFO("AST 2100 detected\n");
183 ast->vga2_clone = false;
185 ast->chip = AST2000;
186 DRM_INFO("AST 2000 detected\n");
191 switch (ast->chip) {
193 ast->support_wide_screen = true;
196 ast->support_wide_screen = false;
199 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);
201 ast->support_wide_screen = true;
203 ast->support_wide_screen = true;
205 ast->support_wide_screen = false;
206 if (ast->chip == AST2300 &&
208 ast->support_wide_screen = true;
209 if (ast->chip == AST2400 &&
211 ast->support_wide_screen = true;
212 if (ast->chip == AST2500 &&
214 ast->support_wide_screen = true;
220 ast->tx_chip_type = AST_TX_NONE;
231 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff);
233 ast->tx_chip_type = AST_TX_SIL164;
236 if ((ast->chip == AST2300) || (ast->chip == AST2400)) {
242 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
245 ast->tx_chip_type = AST_TX_SIL164;
248 ast->dp501_fw_addr = kzalloc(32*1024, GFP_KERNEL);
249 if (ast->dp501_fw_addr) {
251 if (ast_backup_fw(dev, ast->dp501_fw_addr, 32*1024)) {
252 kfree(ast->dp501_fw_addr);
253 ast->dp501_fw_addr = NULL;
258 ast->tx_chip_type = AST_TX_DP501;
263 switch(ast->tx_chip_type) {
279 struct ast_private *ast = dev->dev_private;
283 switch (ast->config_mode) {
300 ast_write32(ast, 0xf004, 0x1e6e0000);
301 ast_write32(ast, 0xf000, 0x1);
302 mcr_cfg = ast_read32(ast, 0x10004);
303 mcr_scu_mpll = ast_read32(ast, 0x10120);
304 mcr_scu_strap = ast_read32(ast, 0x10170);
308 ast->dram_bus_width = 16;
309 ast->dram_type = AST_DRAM_1Gx16;
310 if (ast->chip == AST2500)
311 ast->mclk = 800;
313 ast->mclk = 396;
318 ast->dram_bus_width = 16;
320 ast->dram_bus_width = 32;
322 if (ast->chip == AST2500) {
325 ast->dram_type = AST_DRAM_1Gx16;
329 ast->dram_type = AST_DRAM_2Gx16;
332 ast->dram_type = AST_DRAM_4Gx16;
335 ast->dram_type = AST_DRAM_8Gx16;
338 } else if (ast->chip == AST2300 || ast->chip == AST2400) {
341 ast->dram_type = AST_DRAM_512Mx16;
345 ast->dram_type = AST_DRAM_1Gx16;
348 ast->dram_type = AST_DRAM_2Gx16;
351 ast->dram_type = AST_DRAM_4Gx16;
358 ast->dram_type = AST_DRAM_512Mx16;
362 ast->dram_type = AST_DRAM_1Gx16;
364 ast->dram_type = AST_DRAM_512Mx32;
367 ast->dram_type = AST_DRAM_1Gx32;
392 ast->mclk = ref_pll * (num + 2) / ((denum + 2) * (div * 1000));
401 struct ast_private *ast = dev->dev_private;
407 max_fbpages = (ast->vram_size / 2) >> PAGE_SHIFT;
427 struct ast_private *ast = dev->dev_private;
430 ast_open_key(ast);
433 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xaa, 0xff);
441 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x99, 0xff);
459 struct ast_private *ast;
463 ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL);
464 if (!ast)
467 dev->dev_private = ast;
468 ast->dev = dev;
470 ast->regs = pci_iomap(dev->pdev, 1, 0);
471 if (!ast->regs) {
483 ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
487 if (!ast->ioregs) {
488 ast->ioregs = pci_iomap(dev->pdev, 2, 0);
489 if (!ast->ioregs) {
500 if (ast->chip != AST1180) {
504 ast->vram_size = ast_get_vram_info(dev);
506 ast->mclk, ast->dram_type,
507 ast->dram_bus_width, ast->vram_size);
510 ret = ast_mm_init(ast);
521 dev->mode_config.fb_base = pci_resource_start(ast->dev->pdev, 0);
523 if (ast->chip == AST2100 ||
524 ast->chip == AST2200 ||
525 ast->chip == AST2300 ||
526 ast->chip == AST2400 ||
527 ast->chip == AST2500 ||
528 ast->chip == AST1180) {
548 kfree(ast);
555 struct ast_private *ast = dev->dev_private;
558 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x04);
561 kfree(ast->dp501_fw_addr);
565 ast_mm_fini(ast);
566 if (ast->ioregs != ast->regs + AST_IO_MM_OFFSET)
567 pci_iounmap(dev->pdev, ast->ioregs);
568 pci_iounmap(dev->pdev, ast->regs);
569 kfree(ast);
Indexes created Mon Sep 29 03:10:08 GMT 2025