Lines Matching refs:dsc_cfg
64 * @dsc_cfg:
76 const struct drm_dsc_config *dsc_cfg)
88 dsc_cfg->dsc_version_minor |
89 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT;
95 dsc_cfg->line_buf_depth |
96 dsc_cfg->bits_per_component << DSC_PPS_BPC_SHIFT;
100 ((dsc_cfg->bits_per_pixel & DSC_PPS_BPP_HIGH_MASK) >>
102 dsc_cfg->vbr_enable << DSC_PPS_VBR_EN_SHIFT |
103 dsc_cfg->simple_422 << DSC_PPS_SIMPLE422_SHIFT |
104 dsc_cfg->convert_rgb << DSC_PPS_CONVERT_RGB_SHIFT |
105 dsc_cfg->block_pred_enable << DSC_PPS_BLOCK_PRED_EN_SHIFT;
109 (dsc_cfg->bits_per_pixel & DSC_PPS_LSB_MASK);
119 pps_payload->pic_height = cpu_to_be16(dsc_cfg->pic_height);
122 pps_payload->pic_width = cpu_to_be16(dsc_cfg->pic_width);
125 pps_payload->slice_height = cpu_to_be16(dsc_cfg->slice_height);
128 pps_payload->slice_width = cpu_to_be16(dsc_cfg->slice_width);
131 pps_payload->chunk_size = cpu_to_be16(dsc_cfg->slice_chunk_size);
135 ((dsc_cfg->initial_xmit_delay &
141 (dsc_cfg->initial_xmit_delay & DSC_PPS_LSB_MASK);
145 cpu_to_be16(dsc_cfg->initial_dec_delay);
151 dsc_cfg->initial_scale_value;
155 cpu_to_be16(dsc_cfg->scale_increment_interval);
159 ((dsc_cfg->scale_decrement_interval &
165 (dsc_cfg->scale_decrement_interval & DSC_PPS_LSB_MASK);
171 dsc_cfg->first_line_bpg_offset;
175 cpu_to_be16(dsc_cfg->nfl_bpg_offset);
179 cpu_to_be16(dsc_cfg->slice_bpg_offset);
183 cpu_to_be16(dsc_cfg->initial_offset);
186 pps_payload->final_offset = cpu_to_be16(dsc_cfg->final_offset);
189 pps_payload->flatness_min_qp = dsc_cfg->flatness_min_qp;
192 pps_payload->flatness_max_qp = dsc_cfg->flatness_max_qp;
203 dsc_cfg->rc_quant_incr_limit0;
207 dsc_cfg->rc_quant_incr_limit1;
216 dsc_cfg->rc_buf_thresh[i];
225 cpu_to_be16((dsc_cfg->rc_range_params[i].range_min_qp <<
227 (dsc_cfg->rc_range_params[i].range_max_qp <<
229 (dsc_cfg->rc_range_params[i].range_bpg_offset));
233 pps_payload->native_422_420 = dsc_cfg->native_422 |
234 dsc_cfg->native_420 << DSC_PPS_NATIVE_420_SHIFT;
238 dsc_cfg->second_line_bpg_offset;
242 cpu_to_be16(dsc_cfg->nsl_bpg_offset);
246 cpu_to_be16(dsc_cfg->second_line_offset_adj);
Indexes created Wed Oct 22 00:09:40 GMT 2025