Lines Matching defs:vgpu
43 static int get_edp_pipe(struct intel_vgpu *vgpu)
45 u32 data = vgpu_vreg(vgpu, _TRANS_DDI_FUNC_CTL_EDP);
63 static int edp_pipe_is_enabled(struct intel_vgpu *vgpu)
65 struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
67 if (!(vgpu_vreg_t(vgpu, PIPECONF(_PIPE_EDP)) & PIPECONF_ENABLE))
70 if (!(vgpu_vreg(vgpu, _TRANS_DDI_FUNC_CTL_EDP) & TRANS_DDI_FUNC_ENABLE))
75 int pipe_is_enabled(struct intel_vgpu *vgpu, int pipe)
77 struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
82 if (vgpu_vreg_t(vgpu, PIPECONF(pipe)) & PIPECONF_ENABLE)
85 if (edp_pipe_is_enabled(vgpu) &&
86 get_edp_pipe(vgpu) == pipe)
174 static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
176 struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
180 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= ~(BXT_DE_PORT_HP_DDIA |
184 if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) {
185 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=
189 if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) {
190 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=
194 if (intel_vgpu_has_monitor_on_port(vgpu, PORT_C)) {
195 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=
202 vgpu_vreg_t(vgpu, SDEISR) &= ~(SDE_PORTB_HOTPLUG_CPT |
208 vgpu_vreg_t(vgpu, SDEISR) &= ~(SDE_PORTA_HOTPLUG_SPT |
210 vgpu_vreg_t(vgpu, SKL_FUSE_STATUS) |=
215 vgpu_vreg_t(vgpu, LCPLL1_CTL) |=
218 vgpu_vreg_t(vgpu, LCPLL2_CTL) |= LCPLL_PLL_ENABLE;
222 if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) {
223 vgpu_vreg_t(vgpu, SFUSE_STRAP) |= SFUSE_STRAP_DDIB_DETECTED;
224 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) &=
227 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |=
232 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_B)) &=
234 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_B)) |=
237 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |= DDI_BUF_CTL_ENABLE;
238 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &= ~DDI_BUF_IS_IDLE;
239 vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTB_HOTPLUG_CPT;
242 if (intel_vgpu_has_monitor_on_port(vgpu, PORT_C)) {
243 vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTC_HOTPLUG_CPT;
244 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) &=
247 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |=
252 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_C)) &=
254 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_C)) |=
257 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) |= DDI_BUF_CTL_ENABLE;
258 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) &= ~DDI_BUF_IS_IDLE;
259 vgpu_vreg_t(vgpu, SFUSE_STRAP) |= SFUSE_STRAP_DDIC_DETECTED;
262 if (intel_vgpu_has_monitor_on_port(vgpu, PORT_D)) {
263 vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTD_HOTPLUG_CPT;
264 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) &=
267 vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |=
272 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) &=
274 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) |=
277 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) |= DDI_BUF_CTL_ENABLE;
278 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) &= ~DDI_BUF_IS_IDLE;
279 vgpu_vreg_t(vgpu, SFUSE_STRAP) |= SFUSE_STRAP_DDID_DETECTED;
284 intel_vgpu_has_monitor_on_port(vgpu, PORT_E)) {
285 vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTE_HOTPLUG_SPT;
288 if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) {
290 vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=
293 vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTA_HOTPLUG_SPT;
295 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |= DDI_INIT_DISPLAY_DETECTED;
300 vgpu_vreg_t(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK;
304 vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISPLAY_PLANE_ENABLE;
305 vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;
306 vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~MCURSOR_MODE;
307 vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= MCURSOR_MODE_DISABLE;
310 vgpu_vreg_t(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_ENABLE;
313 static void clean_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num)
315 struct intel_vgpu_port *port = intel_vgpu_port(vgpu, port_num);
324 static int setup_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num,
327 struct intel_vgpu_port *port = intel_vgpu_port(vgpu, port_num);
352 emulate_monitor_status_change(vgpu);
369 struct intel_vgpu *vgpu;
374 for_each_active_vgpu(gvt, vgpu, id) {
376 if (pipe_is_enabled(vgpu, pipe)) {
395 static void emulate_vblank_on_pipe(struct intel_vgpu *vgpu, int pipe)
397 struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
398 struct intel_vgpu_irq *irq = &vgpu->irq;
412 if (!pipe_is_enabled(vgpu, pipe))
415 intel_vgpu_trigger_virtual_event(vgpu, event);
418 if (pipe_is_enabled(vgpu, pipe)) {
419 vgpu_vreg_t(vgpu, PIPE_FRMCOUNT_G4X(pipe))++;
420 intel_vgpu_trigger_virtual_event(vgpu, vblank_event[pipe]);
424 static void emulate_vblank(struct intel_vgpu *vgpu)
428 mutex_lock(&vgpu->vgpu_lock);
429 for_each_pipe(vgpu->gvt->dev_priv, pipe)
430 emulate_vblank_on_pipe(vgpu, pipe);
431 mutex_unlock(&vgpu->vgpu_lock);
443 struct intel_vgpu *vgpu;
447 for_each_active_vgpu(gvt, vgpu, id)
448 emulate_vblank(vgpu);
453 * intel_vgpu_emulate_hotplug - trigger hotplug event for vGPU
454 * @vgpu: a vGPU
457 * This function is used to trigger hotplug interrupt for vGPU
460 void intel_vgpu_emulate_hotplug(struct intel_vgpu *vgpu, bool connected)
462 struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
467 vgpu_vreg_t(vgpu, SFUSE_STRAP) |=
469 vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTD_HOTPLUG_CPT;
471 vgpu_vreg_t(vgpu, SFUSE_STRAP) &=
473 vgpu_vreg_t(vgpu, SDEISR) &= ~SDE_PORTD_HOTPLUG_CPT;
475 vgpu_vreg_t(vgpu, SDEIIR) |= SDE_PORTD_HOTPLUG_CPT;
476 vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) |=
478 intel_vgpu_trigger_virtual_event(vgpu, DP_D_HOTPLUG);
483 * intel_vgpu_clean_display - clean vGPU virtual display emulation
484 * @vgpu: a vGPU
486 * This function is used to clean vGPU virtual display emulation stuffs
489 void intel_vgpu_clean_display(struct intel_vgpu *vgpu)
491 struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
495 clean_virtual_dp_monitor(vgpu, PORT_D);
497 clean_virtual_dp_monitor(vgpu, PORT_B);
501 * intel_vgpu_init_display- initialize vGPU virtual display emulation
502 * @vgpu: a vGPU
505 * This function is used to initialize vGPU virtual display emulation stuffs
511 int intel_vgpu_init_display(struct intel_vgpu *vgpu, u64 resolution)
513 struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
515 intel_vgpu_init_i2c_edid(vgpu);
519 return setup_virtual_dp_monitor(vgpu, PORT_D, GVT_DP_D,
522 return setup_virtual_dp_monitor(vgpu, PORT_B, GVT_DP_B,
527 * intel_vgpu_reset_display- reset vGPU virtual display emulation
528 * @vgpu: a vGPU
530 * This function is used to reset vGPU virtual display emulation stuffs
533 void intel_vgpu_reset_display(struct intel_vgpu *vgpu)
535 emulate_monitor_status_change(vgpu);
Indexes created Thu Oct 02 01:09:59 GMT 2025