Cross Reference: /src/sys/external/bsd/drm2/dist/drm/i915/gvt/gtt.c

Lines Matching defs:gfn
666 			spt->guest_page.gfn << I915_GTT_PAGE_SHIFT,
695 			spt->guest_page.gfn << I915_GTT_PAGE_SHIFT,
751 	if (spt->guest_page.gfn) {
755 		intel_vgpu_unregister_page_track(spt->vgpu, spt->guest_page.gfn);
801 /* Find a spt by guest gfn. */
803 		struct intel_vgpu *vgpu, unsigned long gfn)
807 	track = intel_vgpu_find_page_track(vgpu, gfn);
873 /* Allocate shadow page table associated with specific gfn. */
876 		unsigned long gfn, bool guest_pde_ips)
888 	ret = intel_vgpu_register_page_track(vgpu, gfn,
896 	spt->guest_page.gfn = gfn;
899 	trace_spt_alloc(vgpu->id, spt, type, spt->shadow_page.mfn, gfn);
1005 			spt->guest_page.gfn, spt->shadow_page.type);
1041 			 spt->guest_page.gfn, spt->shadow_page.type);
1110 		ret = intel_vgpu_enable_page_track(vgpu, spt->guest_page.gfn);
1118 		trace_spt_change(vgpu->id, "new", spt, spt->guest_page.gfn,
1255 	unsigned long gfn, page_size = PAGE_SIZE;
1262 	gfn = pte_ops->get_pfn(ge);
1293 	ret = intel_gvt_hypervisor_dma_map_guest_page(vgpu, gfn, page_size,
1310 	unsigned long gfn, i;
1314 			 spt->guest_page.gfn, spt->shadow_page.type);
1327 			gfn = ops->get_pfn(&ge);
1328 			if (!intel_gvt_hypervisor_is_valid_gfn(vgpu, gfn)) {
1447 			       spt->guest_page.gfn << PAGE_SHIFT, vgpu);
1495 			spt->guest_page.gfn << I915_GTT_PAGE_SHIFT,
1515 	ret = intel_vgpu_enable_page_track(spt->vgpu, spt->guest_page.gfn);
1561 	return intel_vgpu_disable_page_track(spt->vgpu, spt->guest_page.gfn);
2219 	unsigned long gma, gfn;
2287 		gfn = ops->get_pfn(&e);
2292 		 * first write may not construct a valid gfn
2294 		if (!intel_gvt_hypervisor_is_valid_gfn(vgpu, gfn)) {
2299 		ret = intel_gvt_hypervisor_dma_map_guest_page(vgpu, gfn,
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