Lines Matching defs:gvt
42 #include "gvt.h"
95 if (WARN(!gvt_gmadr_is_valid(vgpu->gvt, h_addr),
99 if (gvt_gmadr_is_aperture(vgpu->gvt, h_addr))
101 + (h_addr - gvt_aperture_gmadr_base(vgpu->gvt));
104 + (h_addr - gvt_hidden_gmadr_base(vgpu->gvt));
310 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
323 e->val64 = read_pte64(vgpu->gvt->dev_priv, index);
335 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
348 write_pte64(vgpu->gvt->dev_priv, index, e->val64);
558 struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
585 gvt->gtt.pte_ops;
607 struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
619 struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
630 struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
640 struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
656 struct intel_gvt *gvt = spt->vgpu->gvt;
657 struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
685 struct intel_gvt *gvt = spt->vgpu->gvt;
686 struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
742 struct device *kdev = &spt->vgpu->gvt->dev_priv->drm.pdev->dev;
821 static int reclaim_one_ppgtt_mm(struct intel_gvt *gvt);
827 struct device *kdev = &vgpu->gvt->dev_priv->drm.pdev->dev;
835 if (reclaim_one_ppgtt_mm(vgpu->gvt))
905 ((spt)->vgpu->gvt->device_info.gtt_entry_size_shift)
914 spt->vgpu->gvt->gtt.pte_ops->test_present(e))
920 spt->vgpu->gvt->gtt.pte_ops->test_present(e))
948 struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
983 struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1024 WARN(1, "GVT doesn't support 1GB page\n");
1052 struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
1071 struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1135 struct intel_gvt_gtt_pte_ops *ops = s->vgpu->gvt->gtt.pte_ops;
1158 struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1161 if (!HAS_PAGE_SIZES(vgpu->gvt->dev_priv, I915_GTT_PAGE_SIZE_2M))
1175 struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1222 struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1253 struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;
1286 gvt_vgpu_err("GVT doesn't support 1GB entry\n");
1306 struct intel_gvt *gvt = vgpu->gvt;
1307 struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
1329 ops->set_pfn(&se, gvt->gtt.scratch_mfn);
1350 struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1429 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
1430 struct intel_gvt *gvt = vgpu->gvt;
1431 struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
1472 struct intel_gvt *gvt = vgpu->gvt;
1483 list_move_tail(&oos_page->list, &gvt->gtt.oos_page_free_list_head);
1491 struct intel_gvt *gvt = spt->vgpu->gvt;
1503 list_move_tail(&oos_page->list, &gvt->gtt.oos_page_use_list_head);
1528 struct intel_gvt *gvt = spt->vgpu->gvt;
1529 struct intel_gvt_gtt *gtt = &gvt->gtt;
1602 struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1719 struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1720 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
1782 struct intel_gvt *gvt = vgpu->gvt;
1783 struct intel_gvt_gtt *gtt = &gvt->gtt;
1812 struct intel_gvt *gvt = vgpu->gvt;
1813 struct intel_gvt_gtt *gtt = &gvt->gtt;
1886 struct intel_gvt *gvt = vgpu->gvt;
1918 mutex_lock(&gvt->gtt.ppgtt_mm_lock);
1919 list_add_tail(&mm->ppgtt_mm.lru_list, &gvt->gtt.ppgtt_mm_lru_list_head);
1920 mutex_unlock(&gvt->gtt.ppgtt_mm_lock);
1936 nr_entries = gvt_ggtt_gm_sz(vgpu->gvt) >> I915_GTT_PAGE_SHIFT;
1939 vgpu->gvt->device_info.gtt_entry_size));
1965 mutex_lock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock);
1967 mutex_unlock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock);
2010 mutex_lock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock);
2012 &mm->vgpu->gvt->gtt.ppgtt_mm_lru_list_head);
2013 mutex_unlock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock);
2019 static int reclaim_one_ppgtt_mm(struct intel_gvt *gvt)
2024 mutex_lock(&gvt->gtt.ppgtt_mm_lock);
2026 list_for_each_safe(pos, n, &gvt->gtt.ppgtt_mm_lru_list_head) {
2033 mutex_unlock(&gvt->gtt.ppgtt_mm_lock);
2037 mutex_unlock(&gvt->gtt.ppgtt_mm_lock);
2048 struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
2076 struct intel_gvt *gvt = vgpu->gvt;
2077 struct intel_gvt_gtt_pte_ops *pte_ops = gvt->gtt.pte_ops;
2078 struct intel_gvt_gtt_gma_ops *gma_ops = gvt->gtt.gma_ops;
2151 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
2188 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
2202 struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;
2206 if (pfn != vgpu->gvt->gtt.scratch_mfn)
2214 struct intel_gvt *gvt = vgpu->gvt;
2215 const struct intel_gvt_device_info *info = &gvt->device_info;
2217 struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
2295 ops->set_pfn(&m, gvt->gtt.scratch_mfn);
2307 ops->set_pfn(&m, gvt->gtt.scratch_mfn);
2311 ops->set_pfn(&m, gvt->gtt.scratch_mfn);
2322 ggtt_invalidate(gvt->dev_priv);
2341 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
2356 struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
2358 vgpu->gvt->device_info.gtt_entry_size_shift;
2361 struct device *dev = &vgpu->gvt->dev_priv->drm.pdev->dev;
2418 struct device *dev = &vgpu->gvt->dev_priv->drm.pdev->dev;
2536 static void clean_spt_oos(struct intel_gvt *gvt)
2538 struct intel_gvt_gtt *gtt = &gvt->gtt;
2553 static int setup_spt_oos(struct intel_gvt *gvt)
2555 struct intel_gvt_gtt *gtt = &gvt->gtt;
2586 clean_spt_oos(gvt);
2677 * intel_gvt_init_gtt - initialize mm components of a GVT device
2678 * @gvt: GVT device
2681 * the mm components of a GVT device.
2686 int intel_gvt_init_gtt(struct intel_gvt *gvt)
2690 struct device *dev = &gvt->dev_priv->drm.pdev->dev;
2695 gvt->gtt.pte_ops = &gen8_gtt_pte_ops;
2696 gvt->gtt.gma_ops = &gen8_gtt_gma_ops;
2712 gvt->gtt.scratch_page = virt_to_page(page);
2713 gvt->gtt.scratch_mfn = (unsigned long)(daddr >> I915_GTT_PAGE_SHIFT);
2716 ret = setup_spt_oos(gvt);
2720 __free_page(gvt->gtt.scratch_page);
2724 INIT_LIST_HEAD(&gvt->gtt.ppgtt_mm_lru_list_head);
2725 mutex_init(&gvt->gtt.ppgtt_mm_lock);
2730 * intel_gvt_clean_gtt - clean up mm components of a GVT device
2731 * @gvt: GVT device
2734 * the mm components of a GVT device.
2737 void intel_gvt_clean_gtt(struct intel_gvt *gvt)
2739 struct device *dev = &gvt->dev_priv->drm.pdev->dev;
2740 dma_addr_t daddr = (dma_addr_t)(gvt->gtt.scratch_mfn <<
2745 __free_page(gvt->gtt.scratch_page);
2748 clean_spt_oos(gvt);
2766 mutex_lock(&vgpu->gvt->gtt.ppgtt_mm_lock);
2768 mutex_unlock(&vgpu->gvt->gtt.ppgtt_mm_lock);
2786 struct intel_gvt *gvt = vgpu->gvt;
2787 struct drm_i915_private *dev_priv = gvt->dev_priv;
2788 struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;
2794 pte_ops->set_pfn(&entry, gvt->gtt.scratch_mfn);
Indexes created Sun Oct 12 09:09:55 GMT 2025