Lines Matching refs:ilk
2646 /* ILK/SNB primary plane watermarks */
2649 /* ILK/SNB sprite plane watermarks */
2690 * refresh FIFO size on ILK/SNB.
2957 /* ILK primary LP0 latency is 700 ns */
2969 /* ILK sprite LP0 latency is 1300 ns */
2977 /* ILK cursor LP0 latency is 1300 ns */
3157 pipe_wm = &crtc_state->wm.ilk.optimal;
3178 /* ILK/SNB: LP2+ watermarks only w/o sprites */
3182 /* ILK/SNB/IVB: LP1+ watermarks only w/o scaling */
3227 struct intel_pipe_wm *a = &newstate->wm.ilk.intermediate;
3232 const struct intel_pipe_wm *b = &oldstate->wm.ilk.optimal;
3240 *a = newstate->wm.ilk.optimal;
3273 if (memcmp(a, &newstate->wm.ilk.optimal, sizeof(*a)) != 0)
3291 const struct intel_pipe_wm *active = &intel_crtc->wm.active.ilk;
3323 /* ILK/SNB/IVB: LP1+ watermarks only w/ single pipe */
3328 /* ILK: FBC WM must be disabled always */
3354 /* ILK: LP2+ must be disabled when FBC WM is disabled but FBC enabled */
3439 &intel_crtc->wm.active.ilk.wm[0];
3444 results->wm_linetime[pipe] = intel_crtc->wm.active.ilk.linetime;
5609 const struct intel_pipe_wm *wm = &crtc->wm.active.ilk;
5660 crtc->wm.active.ilk = crtc_state->wm.ilk.intermediate;
5676 crtc->wm.active.ilk = crtc_state->wm.ilk.optimal;
5757 struct intel_pipe_wm *active = &crtc_state->wm.ilk.optimal;
5799 crtc->wm.active.ilk = *active;
6359 * WaFbcDisableDpfcClockGating:ilk
6394 /* WaFbcAsynchFlipDisableFbcQueue:ilk */
6412 /* WaDisableRenderCachePipelinedFlush:ilk */
6416 /* WaDisable_RenderCache_OperationalFlush:ilk */
Indexes created Wed Oct 22 00:09:40 GMT 2025