Lines Matching refs:rdev
36 uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev);
37 void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
38 uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev);
39 void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
41 uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev);
42 void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
43 uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev);
44 void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock);
45 void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable);
63 int r100_init(struct radeon_device *rdev);
64 void r100_fini(struct radeon_device *rdev);
65 int r100_suspend(struct radeon_device *rdev);
66 int r100_resume(struct radeon_device *rdev);
67 void r100_vga_set_state(struct radeon_device *rdev, bool state);
68 bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp);
69 int r100_asic_reset(struct radeon_device *rdev, bool hard);
70 u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
71 void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
73 void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i,
75 void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);
76 int r100_irq_set(struct radeon_device *rdev);
77 int r100_irq_process(struct radeon_device *rdev);
78 void r100_fence_ring_emit(struct radeon_device *rdev,
80 bool r100_semaphore_ring_emit(struct radeon_device *rdev,
85 void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
86 uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg);
87 struct radeon_fence *r100_copy_blit(struct radeon_device *rdev,
92 int r100_set_surface_reg(struct radeon_device *rdev, int reg,
95 void r100_clear_surface_reg(struct radeon_device *rdev, int reg);
96 void r100_bandwidth_update(struct radeon_device *rdev);
97 void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
98 int r100_ring_test(struct radeon_device *rdev, struct radeon_ring *cp);
99 void r100_hpd_init(struct radeon_device *rdev);
100 void r100_hpd_fini(struct radeon_device *rdev);
101 bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
102 void r100_hpd_set_polarity(struct radeon_device *rdev,
104 int r100_debugfs_rbbm_init(struct radeon_device *rdev);
105 int r100_debugfs_cp_init(struct radeon_device *rdev);
106 void r100_cp_disable(struct radeon_device *rdev);
107 int r100_cp_init(struct radeon_device *rdev, unsigned ring_size);
108 void r100_cp_fini(struct radeon_device *rdev);
109 int r100_pci_gart_init(struct radeon_device *rdev);
110 void r100_pci_gart_fini(struct radeon_device *rdev);
111 int r100_pci_gart_enable(struct radeon_device *rdev);
112 void r100_pci_gart_disable(struct radeon_device *rdev);
113 int r100_debugfs_mc_info_init(struct radeon_device *rdev);
114 int r100_gui_wait_for_idle(struct radeon_device *rdev);
115 int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);
116 void r100_irq_disable(struct radeon_device *rdev);
117 void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save);
118 void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save);
119 void r100_vram_init_sizes(struct radeon_device *rdev);
120 int r100_cp_reset(struct radeon_device *rdev);
121 void r100_vga_render_disable(struct radeon_device *rdev);
122 void r100_restore_sanity(struct radeon_device *rdev);
133 void r100_enable_bm(struct radeon_device *rdev);
134 void r100_set_common_regs(struct radeon_device *rdev);
135 void r100_bm_disable(struct radeon_device *rdev);
136 extern bool r100_gui_idle(struct radeon_device *rdev);
137 extern void r100_pm_misc(struct radeon_device *rdev);
138 extern void r100_pm_prepare(struct radeon_device *rdev);
139 extern void r100_pm_finish(struct radeon_device *rdev);
140 extern void r100_pm_init_profile(struct radeon_device *rdev);
141 extern void r100_pm_get_dynpm_state(struct radeon_device *rdev);
142 extern void r100_page_flip(struct radeon_device *rdev, int crtc,
144 extern bool r100_page_flip_pending(struct radeon_device *rdev, int crtc);
145 extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc);
146 extern int r100_mc_wait_for_idle(struct radeon_device *rdev);
148 u32 r100_gfx_get_rptr(struct radeon_device *rdev,
150 u32 r100_gfx_get_wptr(struct radeon_device *rdev,
152 void r100_gfx_set_wptr(struct radeon_device *rdev,
158 struct radeon_fence *r200_copy_dma(struct radeon_device *rdev,
163 void r200_set_safe_registers(struct radeon_device *rdev);
168 extern int r300_init(struct radeon_device *rdev);
169 extern void r300_fini(struct radeon_device *rdev);
170 extern int r300_suspend(struct radeon_device *rdev);
171 extern int r300_resume(struct radeon_device *rdev);
172 extern int r300_asic_reset(struct radeon_device *rdev, bool hard);
173 extern void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);
174 extern void r300_fence_ring_emit(struct radeon_device *rdev,
177 extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev);
179 extern void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i,
181 extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes);
182 extern int rv370_get_pcie_lanes(struct radeon_device *rdev);
183 extern void r300_set_reg_safe(struct radeon_device *rdev);
184 extern void r300_mc_program(struct radeon_device *rdev);
185 extern void r300_mc_init(struct radeon_device *rdev);
186 extern void r300_clock_startup(struct radeon_device *rdev);
187 extern int r300_mc_wait_for_idle(struct radeon_device *rdev);
188 extern int rv370_pcie_gart_init(struct radeon_device *rdev);
189 extern void rv370_pcie_gart_fini(struct radeon_device *rdev);
190 extern int rv370_pcie_gart_enable(struct radeon_device *rdev);
191 extern void rv370_pcie_gart_disable(struct radeon_device *rdev);
192 extern int r300_mc_wait_for_idle(struct radeon_device *rdev);
197 extern int r420_init(struct radeon_device *rdev);
198 extern void r420_fini(struct radeon_device *rdev);
199 extern int r420_suspend(struct radeon_device *rdev);
200 extern int r420_resume(struct radeon_device *rdev);
201 extern void r420_pm_init_profile(struct radeon_device *rdev);
202 extern u32 r420_mc_rreg(struct radeon_device *rdev, u32 reg);
203 extern void r420_mc_wreg(struct radeon_device *rdev, u32 reg, u32 v);
204 extern int r420_debugfs_pipes_info_init(struct radeon_device *rdev);
205 extern void r420_pipes_init(struct radeon_device *rdev);
210 extern int rs400_init(struct radeon_device *rdev);
211 extern void rs400_fini(struct radeon_device *rdev);
212 extern int rs400_suspend(struct radeon_device *rdev);
213 extern int rs400_resume(struct radeon_device *rdev);
214 void rs400_gart_tlb_flush(struct radeon_device *rdev);
216 void rs400_gart_set_page(struct radeon_device *rdev, unsigned i,
218 uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg);
219 void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
220 int rs400_gart_init(struct radeon_device *rdev);
221 int rs400_gart_enable(struct radeon_device *rdev);
222 void rs400_gart_adjust_size(struct radeon_device *rdev);
223 void rs400_gart_disable(struct radeon_device *rdev);
224 void rs400_gart_fini(struct radeon_device *rdev);
225 extern int rs400_mc_wait_for_idle(struct radeon_device *rdev);
230 extern int rs600_asic_reset(struct radeon_device *rdev, bool hard);
231 extern int rs600_init(struct radeon_device *rdev);
232 extern void rs600_fini(struct radeon_device *rdev);
233 extern int rs600_suspend(struct radeon_device *rdev);
234 extern int rs600_resume(struct radeon_device *rdev);
235 int rs600_irq_set(struct radeon_device *rdev);
236 int rs600_irq_process(struct radeon_device *rdev);
237 void rs600_irq_disable(struct radeon_device *rdev);
238 u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc);
239 void rs600_gart_tlb_flush(struct radeon_device *rdev);
241 void rs600_gart_set_page(struct radeon_device *rdev, unsigned i,
243 uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg);
244 void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
245 void rs600_bandwidth_update(struct radeon_device *rdev);
246 void rs600_hpd_init(struct radeon_device *rdev);
247 void rs600_hpd_fini(struct radeon_device *rdev);
248 bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
249 void rs600_hpd_set_polarity(struct radeon_device *rdev,
251 extern void rs600_pm_misc(struct radeon_device *rdev);
252 extern void rs600_pm_prepare(struct radeon_device *rdev);
253 extern void rs600_pm_finish(struct radeon_device *rdev);
254 extern void rs600_page_flip(struct radeon_device *rdev, int crtc,
256 extern bool rs600_page_flip_pending(struct radeon_device *rdev, int crtc);
257 void rs600_set_safe_registers(struct radeon_device *rdev);
258 extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc);
259 extern int rs600_mc_wait_for_idle(struct radeon_device *rdev);
264 int rs690_init(struct radeon_device *rdev);
265 void rs690_fini(struct radeon_device *rdev);
266 int rs690_resume(struct radeon_device *rdev);
267 int rs690_suspend(struct radeon_device *rdev);
268 uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg);
269 void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
270 void rs690_bandwidth_update(struct radeon_device *rdev);
271 void rs690_line_buffer_adjust(struct radeon_device *rdev,
274 extern int rs690_mc_wait_for_idle(struct radeon_device *rdev);
285 int rv515_init(struct radeon_device *rdev);
286 void rv515_fini(struct radeon_device *rdev);
287 uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg);
288 void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
289 void rv515_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);
290 void rv515_bandwidth_update(struct radeon_device *rdev);
291 int rv515_resume(struct radeon_device *rdev);
292 int rv515_suspend(struct radeon_device *rdev);
293 void rv515_bandwidth_avivo_update(struct radeon_device *rdev);
294 void rv515_vga_render_disable(struct radeon_device *rdev);
295 void rv515_set_safe_registers(struct radeon_device *rdev);
296 void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save);
297 void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save);
298 void rv515_clock_startup(struct radeon_device *rdev);
299 void rv515_debugfs(struct radeon_device *rdev);
300 int rv515_mc_wait_for_idle(struct radeon_device *rdev);
305 int r520_init(struct radeon_device *rdev);
306 int r520_resume(struct radeon_device *rdev);
307 int r520_mc_wait_for_idle(struct radeon_device *rdev);
312 int r600_init(struct radeon_device *rdev);
313 void r600_fini(struct radeon_device *rdev);
314 int r600_suspend(struct radeon_device *rdev);
315 int r600_resume(struct radeon_device *rdev);
316 void r600_vga_set_state(struct radeon_device *rdev, bool state);
317 int r600_wb_init(struct radeon_device *rdev);
318 void r600_wb_fini(struct radeon_device *rdev);
319 void r600_pcie_gart_tlb_flush(struct radeon_device *rdev);
320 uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg);
321 void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
324 void r600_fence_ring_emit(struct radeon_device *rdev,
326 bool r600_semaphore_ring_emit(struct radeon_device *rdev,
330 void r600_dma_fence_ring_emit(struct radeon_device *rdev,
332 bool r600_dma_semaphore_ring_emit(struct radeon_device *rdev,
336 void r600_dma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
337 bool r600_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring);
338 bool r600_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp);
339 int r600_asic_reset(struct radeon_device *rdev, bool hard);
340 int r600_set_surface_reg(struct radeon_device *rdev, int reg,
343 void r600_clear_surface_reg(struct radeon_device *rdev, int reg);
344 int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);
345 int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);
346 void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
347 int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *cp);
348 int r600_dma_ring_test(struct radeon_device *rdev, struct radeon_ring *cp);
349 struct radeon_fence *r600_copy_cpdma(struct radeon_device *rdev,
353 rdev,
357 void r600_hpd_init(struct radeon_device *rdev);
358 void r600_hpd_fini(struct radeon_device *rdev);
359 bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
360 void r600_hpd_set_polarity(struct radeon_device *rdev,
362 extern void r600_mmio_hdp_flush(struct radeon_device *rdev);
363 extern bool r600_gui_idle(struct radeon_device *rdev);
364 extern void r600_pm_misc(struct radeon_device *rdev);
365 extern void r600_pm_init_profile(struct radeon_device *rdev);
366 extern void rs780_pm_init_profile(struct radeon_device *rdev);
367 extern uint32_t rs780_mc_rreg(struct radeon_device *rdev, uint32_t reg);
368 extern void rs780_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
369 extern void r600_pm_get_dynpm_state(struct radeon_device *rdev);
370 extern void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes);
371 extern int r600_get_pcie_lanes(struct radeon_device *rdev);
372 bool r600_card_posted(struct radeon_device *rdev);
373 void r600_cp_stop(struct radeon_device *rdev);
374 int r600_cp_start(struct radeon_device *rdev);
375 void r600_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size);
376 int r600_cp_resume(struct radeon_device *rdev);
377 void r600_cp_fini(struct radeon_device *rdev);
379 int r600_mc_wait_for_idle(struct radeon_device *rdev);
380 int r600_pcie_gart_init(struct radeon_device *rdev);
381 void r600_scratch_init(struct radeon_device *rdev);
382 int r600_init_microcode(struct radeon_device *rdev);
383 u32 r600_gfx_get_rptr(struct radeon_device *rdev,
385 u32 r600_gfx_get_wptr(struct radeon_device *rdev,
387 void r600_gfx_set_wptr(struct radeon_device *rdev,
389 int r600_get_allowed_info_register(struct radeon_device *rdev,
392 int r600_irq_process(struct radeon_device *rdev);
393 int r600_irq_init(struct radeon_device *rdev);
394 void r600_irq_fini(struct radeon_device *rdev);
395 void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size);
396 int r600_irq_set(struct radeon_device *rdev);
397 void r600_irq_suspend(struct radeon_device *rdev);
398 void r600_disable_interrupts(struct radeon_device *rdev);
399 void r600_rlc_stop(struct radeon_device *rdev);
401 void r600_audio_fini(struct radeon_device *rdev);
409 int r600_mc_wait_for_idle(struct radeon_device *rdev);
410 u32 r600_get_xclk(struct radeon_device *rdev);
411 uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev);
412 int rv6xx_get_temp(struct radeon_device *rdev);
413 int r600_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
414 int r600_dpm_pre_set_power_state(struct radeon_device *rdev);
415 void r600_dpm_post_set_power_state(struct radeon_device *rdev);
416 int r600_dpm_late_enable(struct radeon_device *rdev);
418 uint32_t r600_dma_get_rptr(struct radeon_device *rdev,
420 uint32_t r600_dma_get_wptr(struct radeon_device *rdev,
422 void r600_dma_set_wptr(struct radeon_device *rdev,
425 int rv6xx_dpm_init(struct radeon_device *rdev);
426 int rv6xx_dpm_enable(struct radeon_device *rdev);
427 void rv6xx_dpm_disable(struct radeon_device *rdev);
428 int rv6xx_dpm_set_power_state(struct radeon_device *rdev);
429 void rv6xx_setup_asic(struct radeon_device *rdev);
430 void rv6xx_dpm_display_configuration_changed(struct radeon_device *rdev);
431 void rv6xx_dpm_fini(struct radeon_device *rdev);
432 u32 rv6xx_dpm_get_sclk(struct radeon_device *rdev, bool low);
433 u32 rv6xx_dpm_get_mclk(struct radeon_device *rdev, bool low);
434 void rv6xx_dpm_print_power_state(struct radeon_device *rdev,
436 void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
438 int rv6xx_dpm_force_performance_level(struct radeon_device *rdev,
440 u32 rv6xx_dpm_get_current_sclk(struct radeon_device *rdev);
441 u32 rv6xx_dpm_get_current_mclk(struct radeon_device *rdev);
443 int rs780_dpm_init(struct radeon_device *rdev);
444 int rs780_dpm_enable(struct radeon_device *rdev);
445 void rs780_dpm_disable(struct radeon_device *rdev);
446 int rs780_dpm_set_power_state(struct radeon_device *rdev);
447 void rs780_dpm_setup_asic(struct radeon_device *rdev);
448 void rs780_dpm_display_configuration_changed(struct radeon_device *rdev);
449 void rs780_dpm_fini(struct radeon_device *rdev);
450 u32 rs780_dpm_get_sclk(struct radeon_device *rdev, bool low);
451 u32 rs780_dpm_get_mclk(struct radeon_device *rdev, bool low);
452 void rs780_dpm_print_power_state(struct radeon_device *rdev,
454 void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
456 int rs780_dpm_force_performance_level(struct radeon_device *rdev,
458 u32 rs780_dpm_get_current_sclk(struct radeon_device *rdev);
459 u32 rs780_dpm_get_current_mclk(struct radeon_device *rdev);
464 int rv770_init(struct radeon_device *rdev);
465 void rv770_fini(struct radeon_device *rdev);
466 int rv770_suspend(struct radeon_device *rdev);
467 int rv770_resume(struct radeon_device *rdev);
468 void rv770_pm_misc(struct radeon_device *rdev);
469 void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base,
471 bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc);
472 void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);
473 void r700_cp_stop(struct radeon_device *rdev);
474 void r700_cp_fini(struct radeon_device *rdev);
475 struct radeon_fence *rv770_copy_dma(struct radeon_device *rdev,
479 u32 rv770_get_xclk(struct radeon_device *rdev);
480 int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
481 int rv770_get_temp(struct radeon_device *rdev);
483 int rv770_dpm_init(struct radeon_device *rdev);
484 int rv770_dpm_enable(struct radeon_device *rdev);
485 int rv770_dpm_late_enable(struct radeon_device *rdev);
486 void rv770_dpm_disable(struct radeon_device *rdev);
487 int rv770_dpm_set_power_state(struct radeon_device *rdev);
488 void rv770_dpm_setup_asic(struct radeon_device *rdev);
489 void rv770_dpm_display_configuration_changed(struct radeon_device *rdev);
490 void rv770_dpm_fini(struct radeon_device *rdev);
491 u32 rv770_dpm_get_sclk(struct radeon_device *rdev, bool low);
492 u32 rv770_dpm_get_mclk(struct radeon_device *rdev, bool low);
493 void rv770_dpm_print_power_state(struct radeon_device *rdev,
495 void rv770_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
497 int rv770_dpm_force_performance_level(struct radeon_device *rdev,
499 bool rv770_dpm_vblank_too_short(struct radeon_device *rdev);
500 u32 rv770_dpm_get_current_sclk(struct radeon_device *rdev);
501 u32 rv770_dpm_get_current_mclk(struct radeon_device *rdev);
512 void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev);
513 int evergreen_init(struct radeon_device *rdev);
514 void evergreen_fini(struct radeon_device *rdev);
515 int evergreen_suspend(struct radeon_device *rdev);
516 int evergreen_resume(struct radeon_device *rdev);
517 bool evergreen_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp);
518 bool evergreen_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp);
519 int evergreen_asic_reset(struct radeon_device *rdev, bool hard);
520 void evergreen_bandwidth_update(struct radeon_device *rdev);
521 void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
522 void evergreen_hpd_init(struct radeon_device *rdev);
523 void evergreen_hpd_fini(struct radeon_device *rdev);
524 bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
525 void evergreen_hpd_set_polarity(struct radeon_device *rdev,
527 u32 evergreen_get_vblank_counter(struct radeon_device *rdev, int crtc);
528 int evergreen_irq_set(struct radeon_device *rdev);
529 int evergreen_irq_process(struct radeon_device *rdev);
532 extern void evergreen_pm_misc(struct radeon_device *rdev);
533 extern void evergreen_pm_prepare(struct radeon_device *rdev);
534 extern void evergreen_pm_finish(struct radeon_device *rdev);
535 extern void sumo_pm_init_profile(struct radeon_device *rdev);
536 extern void btc_pm_init_profile(struct radeon_device *rdev);
537 int sumo_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
538 int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
539 extern void evergreen_page_flip(struct radeon_device *rdev, int crtc,
541 extern bool evergreen_page_flip_pending(struct radeon_device *rdev, int crtc);
542 extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc);
543 void evergreen_disable_interrupt_state(struct radeon_device *rdev);
544 int evergreen_mc_wait_for_idle(struct radeon_device *rdev);
545 void evergreen_dma_fence_ring_emit(struct radeon_device *rdev,
547 void evergreen_dma_ring_ib_execute(struct radeon_device *rdev,
549 struct radeon_fence *evergreen_copy_dma(struct radeon_device *rdev,
553 int evergreen_get_temp(struct radeon_device *rdev);
554 int evergreen_get_allowed_info_register(struct radeon_device *rdev,
556 int sumo_get_temp(struct radeon_device *rdev);
557 int tn_get_temp(struct radeon_device *rdev);
558 int cypress_dpm_init(struct radeon_device *rdev);
559 void cypress_dpm_setup_asic(struct radeon_device *rdev);
560 int cypress_dpm_enable(struct radeon_device *rdev);
561 void cypress_dpm_disable(struct radeon_device *rdev);
562 int cypress_dpm_set_power_state(struct radeon_device *rdev);
563 void cypress_dpm_display_configuration_changed(struct radeon_device *rdev);
564 void cypress_dpm_fini(struct radeon_device *rdev);
565 bool cypress_dpm_vblank_too_short(struct radeon_device *rdev);
566 int btc_dpm_init(struct radeon_device *rdev);
567 void btc_dpm_setup_asic(struct radeon_device *rdev);
568 int btc_dpm_enable(struct radeon_device *rdev);
569 void btc_dpm_disable(struct radeon_device *rdev);
570 int btc_dpm_pre_set_power_state(struct radeon_device *rdev);
571 int btc_dpm_set_power_state(struct radeon_device *rdev);
572 void btc_dpm_post_set_power_state(struct radeon_device *rdev);
573 void btc_dpm_fini(struct radeon_device *rdev);
574 u32 btc_dpm_get_sclk(struct radeon_device *rdev, bool low);
575 u32 btc_dpm_get_mclk(struct radeon_device *rdev, bool low);
576 bool btc_dpm_vblank_too_short(struct radeon_device *rdev);
577 void btc_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
579 u32 btc_dpm_get_current_sclk(struct radeon_device *rdev);
580 u32 btc_dpm_get_current_mclk(struct radeon_device *rdev);
581 int sumo_dpm_init(struct radeon_device *rdev);
582 int sumo_dpm_enable(struct radeon_device *rdev);
583 int sumo_dpm_late_enable(struct radeon_device *rdev);
584 void sumo_dpm_disable(struct radeon_device *rdev);
585 int sumo_dpm_pre_set_power_state(struct radeon_device *rdev);
586 int sumo_dpm_set_power_state(struct radeon_device *rdev);
587 void sumo_dpm_post_set_power_state(struct radeon_device *rdev);
588 void sumo_dpm_setup_asic(struct radeon_device *rdev);
589 void sumo_dpm_display_configuration_changed(struct radeon_device *rdev);
590 void sumo_dpm_fini(struct radeon_device *rdev);
591 u32 sumo_dpm_get_sclk(struct radeon_device *rdev, bool low);
592 u32 sumo_dpm_get_mclk(struct radeon_device *rdev, bool low);
593 void sumo_dpm_print_power_state(struct radeon_device *rdev,
595 void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
597 int sumo_dpm_force_performance_level(struct radeon_device *rdev,
599 u32 sumo_dpm_get_current_sclk(struct radeon_device *rdev);
600 u32 sumo_dpm_get_current_mclk(struct radeon_device *rdev);
605 void cayman_fence_ring_emit(struct radeon_device *rdev,
607 void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev);
608 int cayman_init(struct radeon_device *rdev);
609 void cayman_fini(struct radeon_device *rdev);
610 int cayman_suspend(struct radeon_device *rdev);
611 int cayman_resume(struct radeon_device *rdev);
612 int cayman_asic_reset(struct radeon_device *rdev, bool hard);
613 void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
614 int cayman_vm_init(struct radeon_device *rdev);
615 void cayman_vm_fini(struct radeon_device *rdev);
616 void cayman_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring,
618 uint32_t cayman_vm_page_flags(struct radeon_device *rdev, uint32_t flags);
619 int evergreen_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);
620 int evergreen_dma_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);
621 void cayman_dma_ring_ib_execute(struct radeon_device *rdev,
623 bool cayman_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring);
624 bool cayman_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring);
626 void cayman_dma_vm_copy_pages(struct radeon_device *rdev,
630 void cayman_dma_vm_write_pages(struct radeon_device *rdev,
635 void cayman_dma_vm_set_pages(struct radeon_device *rdev,
642 void cayman_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring,
645 u32 cayman_gfx_get_rptr(struct radeon_device *rdev,
647 u32 cayman_gfx_get_wptr(struct radeon_device *rdev,
649 void cayman_gfx_set_wptr(struct radeon_device *rdev,
651 uint32_t cayman_dma_get_rptr(struct radeon_device *rdev,
653 uint32_t cayman_dma_get_wptr(struct radeon_device *rdev,
655 void cayman_dma_set_wptr(struct radeon_device *rdev,
657 int cayman_get_allowed_info_register(struct radeon_device *rdev,
660 int ni_dpm_init(struct radeon_device *rdev);
661 void ni_dpm_setup_asic(struct radeon_device *rdev);
662 int ni_dpm_enable(struct radeon_device *rdev);
663 void ni_dpm_disable(struct radeon_device *rdev);
664 int ni_dpm_pre_set_power_state(struct radeon_device *rdev);
665 int ni_dpm_set_power_state(struct radeon_device *rdev);
666 void ni_dpm_post_set_power_state(struct radeon_device *rdev);
667 void ni_dpm_fini(struct radeon_device *rdev);
668 u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low);
669 u32 ni_dpm_get_mclk(struct radeon_device *rdev, bool low);
670 void ni_dpm_print_power_state(struct radeon_device *rdev,
672 void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
674 int ni_dpm_force_performance_level(struct radeon_device *rdev,
676 bool ni_dpm_vblank_too_short(struct radeon_device *rdev);
677 u32 ni_dpm_get_current_sclk(struct radeon_device *rdev);
678 u32 ni_dpm_get_current_mclk(struct radeon_device *rdev);
679 rdev);
680 int trinity_dpm_enable(struct radeon_device *rdev);
681 int trinity_dpm_late_enable(struct radeon_device *rdev);
682 void trinity_dpm_disable(struct radeon_device *rdev);
683 int trinity_dpm_pre_set_power_state(struct radeon_device *rdev);
684 int trinity_dpm_set_power_state(struct radeon_device *rdev);
685 void trinity_dpm_post_set_power_state(struct radeon_device *rdev);
686 void trinity_dpm_setup_asic(struct radeon_device *rdev);
687 void trinity_dpm_display_configuration_changed(struct radeon_device *rdev);
688 void trinity_dpm_fini(struct radeon_device *rdev);
689 u32 trinity_dpm_get_sclk(struct radeon_device *rdev, bool low);
690 u32 trinity_dpm_get_mclk(struct radeon_device *rdev, bool low);
691 void trinity_dpm_print_power_state(struct radeon_device *rdev,
693 void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
695 int trinity_dpm_force_performance_level(struct radeon_device *rdev,
697 void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable);
698 u32 trinity_dpm_get_current_sclk(struct radeon_device *rdev);
699 u32 trinity_dpm_get_current_mclk(struct radeon_device *rdev);
700 int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
703 void dce6_bandwidth_update(struct radeon_device *rdev);
704 void dce6_audio_fini(struct radeon_device *rdev);
709 void si_fence_ring_emit(struct radeon_device *rdev,
711 void si_pcie_gart_tlb_flush(struct radeon_device *rdev);
712 int si_init(struct radeon_device *rdev);
713 void si_fini(struct radeon_device *rdev);
714 int si_suspend(struct radeon_device *rdev);
715 int si_resume(struct radeon_device *rdev);
716 bool si_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp);
717 bool si_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp);
718 int si_asic_reset(struct radeon_device *rdev, bool hard);
719 void si_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
720 int si_irq_set(struct radeon_device *rdev);
721 int si_irq_process(struct radeon_device *rdev);
722 int si_vm_init(struct radeon_device *rdev);
723 void si_vm_fini(struct radeon_device *rdev);
724 void si_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring,
726 int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);
727 struct radeon_fence *si_copy_dma(struct radeon_device *rdev,
732 void si_dma_vm_copy_pages(struct radeon_device *rdev,
736 void si_dma_vm_write_pages(struct radeon_device *rdev,
741 void si_dma_vm_set_pages(struct radeon_device *rdev,
747 void si_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring,
749 u32 si_get_xclk(struct radeon_device *rdev);
750 uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev);
751 int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
752 int si_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
753 int si_get_temp(struct radeon_device *rdev);
754 int si_get_allowed_info_register(struct radeon_device *rdev,
756 int si_dpm_init(struct radeon_device *rdev);
757 void si_dpm_setup_asic(struct radeon_device *rdev);
758 int si_dpm_enable(struct radeon_device *rdev);
759 int si_dpm_late_enable(struct radeon_device *rdev);
760 void si_dpm_disable(struct radeon_device *rdev);
761 int si_dpm_pre_set_power_state(struct radeon_device *rdev);
762 int si_dpm_set_power_state(struct radeon_device *rdev);
763 void si_dpm_post_set_power_state(struct radeon_device *rdev);
764 void si_dpm_fini(struct radeon_device *rdev);
765 void si_dpm_display_configuration_changed(struct radeon_device *rdev);
766 void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
768 int si_dpm_force_performance_level(struct radeon_device *rdev,
770 int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev,
772 int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev,
774 u32 si_fan_ctrl_get_mode(struct radeon_device *rdev);
775 void si_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode);
776 u32 si_dpm_get_current_sclk(struct radeon_device *rdev);
777 u32 si_dpm_get_current_mclk(struct radeon_device *rdev);
780 void dce8_bandwidth_update(struct radeon_device *rdev);
785 uint64_t cik_get_gpu_clock_counter(struct radeon_device *rdev);
786 u32 cik_get_xclk(struct radeon_device *rdev);
787 uint32_t cik_pciep_rreg(struct radeon_device *rdev, uint32_t reg);
788 void cik_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
789 int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
790 int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
791 void cik_sdma_fence_ring_emit(struct radeon_device *rdev,
793 bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev,
797 void cik_sdma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
798 struct radeon_fence *cik_copy_dma(struct radeon_device *rdev,
802 struct radeon_fence *cik_copy_cpdma(struct radeon_device *rdev,
806 int cik_sdma_ring_test(struct radeon_device *rdev, struct radeon_ring *ring);
807 int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);
808 bool cik_sdma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring);
809 void cik_fence_gfx_ring_emit(struct radeon_device *rdev,
811 void cik_fence_compute_ring_emit(struct radeon_device *rdev,
813 bool cik_semaphore_ring_emit(struct radeon_device *rdev,
817 void cik_pcie_gart_tlb_flush(struct radeon_device *rdev);
818 int cik_init(struct radeon_device *rdev);
819 void cik_fini(struct radeon_device *rdev);
820 int cik_suspend(struct radeon_device *rdev);
821 int cik_resume(struct radeon_device *rdev);
822 bool cik_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp);
823 int cik_asic_reset(struct radeon_device *rdev, bool hard);
824 void cik_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
825 int cik_ring_test(struct radeon_device *rdev, struct radeon_ring *ring);
826 int cik_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);
827 int cik_irq_set(struct radeon_device *rdev);
828 int cik_irq_process(struct radeon_device *rdev);
829 int cik_vm_init(struct radeon_device *rdev);
830 void cik_vm_fini(struct radeon_device *rdev);
831 void cik_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring,
834 void cik_sdma_vm_copy_pages(struct radeon_device *rdev,
838 void cik_sdma_vm_write_pages(struct radeon_device *rdev,
843 void cik_sdma_vm_set_pages(struct radeon_device *rdev,
850 void cik_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring,
852 int cik_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);
853 u32 cik_gfx_get_rptr(struct radeon_device *rdev,
855 u32 cik_gfx_get_wptr(struct radeon_device *rdev,
857 void cik_gfx_set_wptr(struct radeon_device *rdev,
859 u32 cik_compute_get_rptr(struct radeon_device *rdev,
861 u32 cik_compute_get_wptr(struct radeon_device *rdev,
863 void cik_compute_set_wptr(struct radeon_device *rdev,
865 u32 cik_sdma_get_rptr(struct radeon_device *rdev,
867 u32 cik_sdma_get_wptr(struct radeon_device *rdev,
869 void cik_sdma_set_wptr(struct radeon_device *rdev,
871 int ci_get_temp(struct radeon_device *rdev);
872 int kv_get_temp(struct radeon_device *rdev);
873 int cik_get_allowed_info_register(struct radeon_device *rdev,
876 int ci_dpm_init(struct radeon_device *rdev);
877 int ci_dpm_enable(struct radeon_device *rdev);
878 int ci_dpm_late_enable(struct radeon_device *rdev);
879 void ci_dpm_disable(struct radeon_device *rdev);
880 int ci_dpm_pre_set_power_state(struct radeon_device *rdev);
881 int ci_dpm_set_power_state(struct radeon_device *rdev);
882 void ci_dpm_post_set_power_state(struct radeon_device *rdev);
883 void ci_dpm_setup_asic(struct radeon_device *rdev);
884 void ci_dpm_display_configuration_changed(struct radeon_device *rdev);
885 void ci_dpm_fini(struct radeon_device *rdev);
886 u32 ci_dpm_get_sclk(struct radeon_device *rdev, bool low);
887 u32 ci_dpm_get_mclk(struct radeon_device *rdev, bool low);
888 void ci_dpm_print_power_state(struct radeon_device *rdev,
890 void ci_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
892 int ci_dpm_force_performance_level(struct radeon_device *rdev,
894 bool ci_dpm_vblank_too_short(struct radeon_device *rdev);
895 void ci_dpm_powergate_uvd(struct radeon_device *rdev, bool gate);
896 u32 ci_dpm_get_current_sclk(struct radeon_device *rdev);
897 u32 ci_dpm_get_current_mclk(struct radeon_device *rdev);
899 int ci_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev,
901 int ci_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev,
903 u32 ci_fan_ctrl_get_mode(struct radeon_device *rdev);
904 void ci_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode);
906 int kv_dpm_init(struct radeon_device *rdev);
907 int kv_dpm_enable(struct radeon_device *rdev);
908 int kv_dpm_late_enable(struct radeon_device *rdev);
909 void kv_dpm_disable(struct radeon_device *rdev);
910 int kv_dpm_pre_set_power_state(struct radeon_device *rdev);
911 int kv_dpm_set_power_state(struct radeon_device *rdev);
912 void kv_dpm_post_set_power_state(struct radeon_device *rdev);
913 void kv_dpm_setup_asic(struct radeon_device *rdev);
914 void kv_dpm_display_configuration_changed(struct radeon_device *rdev);
915 void kv_dpm_fini(struct radeon_device *rdev);
916 u32 kv_dpm_get_sclk(struct radeon_device *rdev, bool low);
917 u32 kv_dpm_get_mclk(struct radeon_device *rdev, bool low);
918 void kv_dpm_print_power_state(struct radeon_device *rdev,
920 void kv_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
922 int kv_dpm_force_performance_level(struct radeon_device *rdev,
924 void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate);
925 void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable);
926 u32 kv_dpm_get_current_sclk(struct radeon_device *rdev);
927 u32 kv_dpm_get_current_mclk(struct radeon_device *rdev);
930 uint32_t uvd_v1_0_get_rptr(struct radeon_device *rdev,
932 uint32_t uvd_v1_0_get_wptr(struct radeon_device *rdev,
934 void uvd_v1_0_set_wptr(struct radeon_device *rdev,
936 int uvd_v1_0_resume(struct radeon_device *rdev);
938 int uvd_v1_0_init(struct radeon_device *rdev);
939 void uvd_v1_0_fini(struct radeon_device *rdev);
940 int uvd_v1_0_start(struct radeon_device *rdev);
941 void uvd_v1_0_stop(struct radeon_device *rdev);
943 int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring);
944 void uvd_v1_0_fence_emit(struct radeon_device *rdev,
946 int uvd_v1_0_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);
947 bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev,
951 void uvd_v1_0_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
954 int uvd_v2_2_resume(struct radeon_device *rdev);
955 void uvd_v2_2_fence_emit(struct radeon_device *rdev,
957 bool uvd_v2_2_semaphore_emit(struct radeon_device *rdev,
963 bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev,
969 int uvd_v4_2_resume(struct radeon_device *rdev);
972 uint32_t vce_v1_0_get_rptr(struct radeon_device *rdev,
974 uint32_t vce_v1_0_get_wptr(struct radeon_device *rdev,
976 void vce_v1_0_set_wptr(struct radeon_device *rdev,
978 int vce_v1_0_load_fw(struct radeon_device *rdev, uint32_t *data);
979 unsigned vce_v1_0_bo_size(struct radeon_device *rdev);
980 int vce_v1_0_resume(struct radeon_device *rdev);
981 int vce_v1_0_init(struct radeon_device *rdev);
982 int vce_v1_0_start(struct radeon_device *rdev);
985 unsigned vce_v2_0_bo_size(struct radeon_device *rdev);
986 int vce_v2_0_resume(struct radeon_device *rdev);
Indexes created Wed Oct 15 16:09:53 GMT 2025