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Lines Matching refs:dcpll

190 	struct radeon_pll *dcpll = &rdev->clock.dcpll;
304 	/* dcpll is DCE4 only */
305 	dcpll->min_post_div = 2;
306 	dcpll->max_post_div = 0x7f;
307 	dcpll->min_frac_feedback_div = 0;
308 	dcpll->max_frac_feedback_div = 9;
309 	dcpll->min_ref_div = 2;
310 	dcpll->max_ref_div = 0x3ff;
311 	dcpll->min_feedback_div = 4;
312 	dcpll->max_feedback_div = 0xfff;
313 	dcpll->best_vco = 0;