Cross Reference: /src/sys/external/bsd/drm2/dist/drm/radeon/radeon

Lines Matching defs:rbo
108 void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
112 	rbo->placement.placement = rbo->placements;
113 	rbo->placement.busy_placement = rbo->placements;
118 		if ((rbo->flags & RADEON_GEM_NO_CPU_ACCESS) &&
119 		    rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size) {
120 			rbo->placements[c].fpfn =
121 				rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
122 			rbo->placements[c++].flags = TTM_PL_FLAG_WC |
127 		rbo->placements[c].fpfn = 0;
128 		rbo->placements[c++].flags = TTM_PL_FLAG_WC |
134 		if (rbo->flags & RADEON_GEM_GTT_UC) {
135 			rbo->placements[c].fpfn = 0;
136 			rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED |
139 		} else if ((rbo->flags & RADEON_GEM_GTT_WC) ||
140 			   (rbo->rdev->flags & RADEON_IS_AGP)) {
141 			rbo->placements[c].fpfn = 0;
142 			rbo->placements[c++].flags = TTM_PL_FLAG_WC |
146 			rbo->placements[c].fpfn = 0;
147 			rbo->placements[c++].flags = TTM_PL_FLAG_CACHED |
153 		if (rbo->flags & RADEON_GEM_GTT_UC) {
154 			rbo->placements[c].fpfn = 0;
155 			rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED |
158 		} else if ((rbo->flags & RADEON_GEM_GTT_WC) ||
159 		    rbo->rdev->flags & RADEON_IS_AGP) {
160 			rbo->placements[c].fpfn = 0;
161 			rbo->placements[c++].flags = TTM_PL_FLAG_WC |
165 			rbo->placements[c].fpfn = 0;
166 			rbo->placements[c++].flags = TTM_PL_FLAG_CACHED |
171 		rbo->placements[c].fpfn = 0;
172 		rbo->placements[c++].flags = TTM_PL_MASK_CACHING |
176 	rbo->placement.num_placement = c;
177 	rbo->placement.num_busy_placement = c;
180 		if ((rbo->flags & RADEON_GEM_CPU_ACCESS) &&
181 		    (rbo->placements[i].flags & TTM_PL_FLAG_VRAM) &&
182 		    !rbo->placements[i].fpfn)
183 			rbo->placements[i].lpfn =
184 				rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
186 			rbo->placements[i].lpfn = 0;
795 	struct radeon_bo *rbo;
800 	rbo = container_of(bo, struct radeon_bo, tbo);
801 	radeon_bo_check_tiling(rbo, 0, 1);
802 	radeon_vm_bo_invalidate(rbo->rdev, rbo);
808 	radeon_update_memory_usage(rbo, bo->mem.mem_type, -1);
809 	radeon_update_memory_usage(rbo, new_mem->mem_type, 1);
816 	struct radeon_bo *rbo;
822 	rbo = container_of(bo, struct radeon_bo, tbo);
823 	radeon_bo_check_tiling(rbo, 0, 0);
824 	rdev = rbo->rdev;
834 	if (rbo->pin_count > 0)
838 	radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM);
840 	for (i = 0; i < rbo->placement.num_placement; i++) {
842 		if ((rbo->placements[i].flags & TTM_PL_FLAG_VRAM) &&
843 		    (!rbo->placements[i].lpfn || rbo->placements[i].lpfn > lpfn))
844 			rbo->placements[i].lpfn = lpfn;
846 	r = ttm_bo_validate(bo, &rbo->placement, &ctx);
848 		radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
849 		return ttm_bo_validate(bo, &rbo->placement, &ctx);
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