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Lines Matching defs:sclk

191 	u32 sclk, mclk;
199 sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index].
200 clock_info[rdev->pm.requested_clock_mode_index].sclk;
201 if (sclk > rdev->pm.default_sclk)
202 sclk = rdev->pm.default_sclk;
223 if (sclk < rdev->pm.current_sclk)
240 if (sclk != rdev->pm.current_sclk) {
242 radeon_set_engine_clock(rdev, sclk);
244 rdev->pm.current_sclk = sclk;
245 DRM_DEBUG_DRIVER("Setting: e: %d\n", sclk);
361 clock_info->sclk * 10);
365 clock_info->sclk * 10,