Cross Reference: /src/sys/external/bsd/drm2/dist/drm/radeon/radeon

Lines Matching refs:wm
2080 static u32 dce6_dram_bandwidth(struct dce6_wm_params *wm)
2088 	yclk.full = dfixed_const(wm->yclk);
2090 	dram_channels.full = dfixed_const(wm->dram_channels * 4);
2100 static u32 dce6_dram_bandwidth_for_display(struct dce6_wm_params *wm)
2108 	yclk.full = dfixed_const(wm->yclk);
2110 	dram_channels.full = dfixed_const(wm->dram_channels * 4);
2120 static u32 dce6_data_return_bandwidth(struct dce6_wm_params *wm)
2128 	sclk.full = dfixed_const(wm->sclk);
2140 static u32 dce6_get_dmif_bytes_per_request(struct dce6_wm_params *wm)
2145 static u32 dce6_dmif_request_bandwidth(struct dce6_wm_params *wm)
2154 	disp_clk.full = dfixed_const(wm->disp_clk);
2156 	a.full = dfixed_const(dce6_get_dmif_bytes_per_request(wm) / 2);
2160 	sclk.full = dfixed_const(wm->sclk);
2162 	a.full = dfixed_const(dce6_get_dmif_bytes_per_request(wm));
2177 static u32 dce6_available_bandwidth(struct dce6_wm_params *wm)
2180 	u32 dram_bandwidth = dce6_dram_bandwidth(wm);
2181 	u32 data_return_bandwidth = dce6_data_return_bandwidth(wm);
2182 	u32 dmif_req_bandwidth = dce6_dmif_request_bandwidth(wm);
2187 static u32 dce6_average_bandwidth(struct dce6_wm_params *wm)
2200 	line_time.full = dfixed_const(wm->active_time + wm->blank_time);
2202 	bpp.full = dfixed_const(wm->bytes_per_pixel);
2203 	src_width.full = dfixed_const(wm->src_width);
2205 	bandwidth.full = dfixed_mul(bandwidth, wm->vsc);
2211 static u32 dce6_latency_watermark(struct dce6_wm_params *wm)
2215 	u32 available_bandwidth = dce6_available_bandwidth(wm);
2218 	u32 dc_latency = 40000000 / wm->disp_clk; /* dc pipe latency */
2219 wm->num_heads + 1) * worst_chunk_return_time) +
2220 		(wm->num_heads * cursor_line_pair_return_time);
2226 	if (wm->num_heads == 0)
2231 	if ((wm->vsc.full > a.full) ||
2232 	    ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) ||
2233 	    (wm->vtaps >= 5) ||
2234 	    ((wm->vsc.full >= a.full) && wm->interlaced))
2240 	b.full = dfixed_const(wm->num_heads);
2242 	tmp = div_u64((u64) dmif_size * (u64) wm->disp_clk, mc_latency + 512);
2245 	lb_fill_bw = min(tmp, wm->disp_clk * wm->bytes_per_pixel / 1000);
2247 	a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel);
2254 	if (line_fill_time < wm->active_time)
2257 		return latency + (line_fill_time - wm->active_time);
2261 static bool dce6_average_bandwidth_vs_dram_bandwidth_for_display(struct dce6_wm_params *wm)
2263 	if (dce6_average_bandwidth(wm) <=
2264 	    (dce6_dram_bandwidth_for_display(wm) / wm->num_heads))
2270 static bool dce6_average_bandwidth_vs_available_bandwidth(struct dce6_wm_params *wm)
2272 	if (dce6_average_bandwidth(wm) <=
2273 	    (dce6_available_bandwidth(wm) / wm->num_heads))
2279 static bool dce6_check_latency_hiding(struct dce6_wm_params *wm)
2281 	u32 lb_partitions = wm->lb_size / wm->src_width;
2282 	u32 line_time = wm->active_time + wm->blank_time;
2288 	if (wm->vsc.full > a.full)
2291 		if (lb_partitions <= (wm->vtaps + 1))
2297 	latency_hiding = (latency_tolerant_lines * line_time + wm->blank_time);
2299 	if (dce6_latency_watermark(wm) <= latency_hiding)
2441 	/* select wm A */
2450 	/* select wm B */
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