Cross Reference: /src/sys/external/bsd/drm2/dist/drm/radeon/radeon

Lines Matching defs:ib
356  * @ib: indirect buffer to fill with commands
367 				struct radeon_ib *ib,
376 		radeon_asic_vm_copy_pages(rdev, ib, pe, src, count);
379 		radeon_asic_vm_write_pages(rdev, ib, pe, addr,
383 		radeon_asic_vm_set_pages(rdev, ib, pe, addr,
398 	struct radeon_ib ib;
414 	r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, 256);
418 	ib.length_dw = 0;
420 	radeon_vm_set_pages(rdev, &ib, addr, 0, entries, 0, 0);
421 	radeon_asic_vm_pad_ib(rdev, &ib);
422 	WARN_ON(ib.length_dw > 64);
424 	r = radeon_ib_schedule(rdev, &ib, NULL, false);
428 	ib.fence->is_vm_update = true;
429 	radeon_bo_fence(bo, ib.fence, false);
432 	radeon_ib_free(rdev, &ib);
656 	struct radeon_ib ib;
665 	/* update too big for an IB */
669 	r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4);
672 	ib.length_dw = 0;
692 				radeon_vm_set_pages(rdev, &ib, last_pde,
706 		radeon_vm_set_pages(rdev, &ib, last_pde, last_pt, count,
709 	if (ib.length_dw != 0) {
710 		radeon_asic_vm_pad_ib(rdev, &ib);
712 		radeon_sync_resv(rdev, &ib.sync, pd->tbo.base.resv, true);
713 		WARN_ON(ib.length_dw > ndw);
714 		r = radeon_ib_schedule(rdev, &ib, NULL, false);
716 			radeon_ib_free(rdev, &ib);
719 		ib.fence->is_vm_update = true;
720 		radeon_bo_fence(pd, ib.fence, false);
722 	radeon_ib_free(rdev, &ib);
731  * @ib: IB for the update
740 				struct radeon_ib *ib,
780 		radeon_vm_set_pages(rdev, ib, pe_start, addr, count,
788 		radeon_vm_set_pages(rdev, ib, pe_start, addr, count,
795 	radeon_vm_set_pages(rdev, ib, frag_start, addr, count,
802 		radeon_vm_set_pages(rdev, ib, frag_end, addr, count,
823 				 struct radeon_ib *ib,
840 		radeon_sync_resv(rdev, &ib->sync, pt->tbo.base.resv, true);
856 				radeon_vm_frag_ptes(rdev, ib, last_pte,
873 		radeon_vm_frag_ptes(rdev, ib, last_pte,
924 	struct radeon_ib ib;
1003 	/* update too big for an IB */
1007 	r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4);
1010 	ib.length_dw = 0;
1016 			radeon_sync_fence(&ib.sync, vm->ids[i].last_id_use);
1019 	r = radeon_vm_update_ptes(rdev, vm, &ib, bo_va->it.start,
1023 		radeon_ib_free(rdev, &ib);
1027 	radeon_asic_vm_pad_ib(rdev, &ib);
1028 	WARN_ON(ib.length_dw > ndw);
1030 	r = radeon_ib_schedule(rdev, &ib, NULL, false);
1032 		radeon_ib_free(rdev, &ib);
1035 	ib.fence->is_vm_update = true;
1036 	radeon_vm_fence_pts(vm, bo_va->it.start, bo_va->it.last + 1, ib.fence);
1038 	bo_va->last_pt_update = radeon_fence_ref(ib.fence);
1039 	radeon_ib_free(rdev, &ib);
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