Lines Matching defs:srf
50 * @srf: The surface metadata.
56 struct vmw_surface srf;
200 * @srf: Pointer to a struct vmw_surface
203 * restoration of the surface represented by @srf.
205 static inline uint32_t vmw_surface_dma_size(const struct vmw_surface *srf)
207 return srf->num_sizes * sizeof(struct vmw_surface_dma);
214 * @srf: Pointer to a struct vmw_surface
217 * of the surface represented by @srf.
219 static inline uint32_t vmw_surface_define_size(const struct vmw_surface *srf)
221 return sizeof(struct vmw_surface_define) + srf->num_sizes *
257 * @srf: Pointer to a struct vmw_surface object.
260 static void vmw_surface_define_encode(const struct vmw_surface *srf,
270 cmd_len = sizeof(cmd->body) + srf->num_sizes * sizeof(SVGA3dSize);
274 cmd->body.sid = srf->res.id;
280 cmd->body.surfaceFlags = (SVGA3dSurface1Flags)srf->flags;
281 cmd->body.format = srf->format;
283 cmd->body.face[i].numMipLevels = srf->mip_levels[i];
287 src_size = srf->sizes;
289 for (i = 0; i < srf->num_sizes; ++i, cmd_size++, src_size++) {
299 * @srf: Pointer to a struct vmw_surface object.
305 static void vmw_surface_dma_encode(struct vmw_surface *srf,
313 svga3dsurface_get_desc(srf->format);
315 for (i = 0; i < srf->num_sizes; ++i) {
320 const struct vmw_surface_offset *cur_offset = &srf->offsets[i];
321 const struct drm_vmw_size *cur_size = &srf->sizes[i];
330 body->host.sid = srf->res.id;
414 struct vmw_surface *srf;
422 srf = vmw_res_to_srf(res);
446 submit_size = vmw_surface_define_size(srf);
453 vmw_surface_define_encode(srf, cmd);
493 struct vmw_surface *srf = vmw_res_to_srf(res);
498 submit_size = vmw_surface_dma_size(srf);
504 vmw_surface_dma_encode(srf, cmd, &ptr, bind);
613 * @srf: Pointer to the struct vmw_surface to initialize.
618 struct vmw_surface *srf,
622 struct vmw_resource *res = &srf->res;
639 INIT_LIST_HEAD(&srf->view_list);
657 prime.base)->srf.res);
667 struct vmw_surface *srf = vmw_res_to_srf(res);
669 container_of(srf, struct vmw_user_surface, srf);
670 struct vmw_private *dev_priv = srf->res.dev_priv;
676 kfree(srf->offsets);
677 kfree(srf->sizes);
678 kfree(srf->snooper.image);
697 struct vmw_resource *res = &user_srf->srf.res;
735 struct vmw_surface *srf;
800 srf = &user_srf->srf;
801 res = &srf->res;
804 srf->flags = (SVGA3dSurfaceAllFlags)req->flags;
805 srf->format = req->format;
806 srf->scanout = req->scanout;
808 memcpy(srf->mip_levels, req->mip_levels, sizeof(srf->mip_levels));
809 srf->num_sizes = num_sizes;
811 srf->sizes = memdup_user((struct drm_vmw_size __user *)(unsigned long)
813 sizeof(*srf->sizes) * srf->num_sizes);
814 if (IS_ERR(srf->sizes)) {
815 ret = PTR_ERR(srf->sizes);
818 srf->offsets = kmalloc_array(srf->num_sizes,
819 sizeof(*srf->offsets),
821 if (unlikely(!srf->offsets)) {
826 srf->base_size = *srf->sizes;
827 srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
828 srf->multisample_count = 0;
829 srf->multisample_pattern = SVGA3D_MS_PATTERN_NONE;
830 srf->quality_level = SVGA3D_MS_QUALITY_NONE;
833 cur_offset = srf->offsets;
834 cur_size = srf->sizes;
837 for (j = 0; j < srf->mip_levels[i]; ++j) {
851 if (srf->scanout &&
852 srf->num_sizes == 1 &&
853 srf->sizes[0].width == 64 &&
854 srf->sizes[0].height == 64 &&
855 srf->format == SVGA3D_A8R8G8B8) {
857 srf->snooper.image = kzalloc(64 * 64 * 4, GFP_KERNEL);
858 if (!srf->snooper.image) {
864 srf->snooper.image = NULL;
877 ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
900 tmp = vmw_resource_reference(&srf->res);
917 kfree(srf->offsets);
919 kfree(srf->sizes);
1024 struct vmw_surface *srf;
1036 srf = &user_srf->srf;
1039 rep->flags = (uint32_t)srf->flags;
1040 rep->format = srf->format;
1041 memcpy(rep->mip_levels, srf->mip_levels, sizeof(srf->mip_levels));
1046 ret = copy_to_user(user_sizes, &srf->base_size,
1047 sizeof(srf->base_size));
1050 srf->num_sizes);
1063 * @srf: Pointer to a struct vmw_surface object.
1069 struct vmw_surface *srf = vmw_res_to_srf(res);
1100 if (dev_priv->has_sm4_1 && srf->array_size > 0) {
1104 } else if (srf->array_size > 0) {
1123 if (dev_priv->has_sm4_1 && srf->array_size > 0) {
1126 cmd3->body.sid = srf->res.id;
1127 cmd3->body.surfaceFlags = srf->flags;
1128 cmd3->body.format = srf->format;
1129 cmd3->body.numMipLevels = srf->mip_levels[0];
1130 cmd3->body.multisampleCount = srf->multisample_count;
1131 cmd3->body.multisamplePattern = srf->multisample_pattern;
1132 cmd3->body.qualityLevel = srf->quality_level;
1133 cmd3->body.autogenFilter = srf->autogen_filter;
1134 cmd3->body.size.width = srf->base_size.width;
1135 cmd3->body.size.height = srf->base_size.height;
1136 cmd3->body.size.depth = srf->base_size.depth;
1137 cmd3->body.arraySize = srf->array_size;
1138 } else if (srf->array_size > 0) {
1141 cmd2->body.sid = srf
1142 cmd2->body.surfaceFlags = srf->flags;
1143 cmd2->body.format = srf->format;
1144 cmd2->body.numMipLevels = srf->mip_levels[0];
1145 cmd2->body.multisampleCount = srf->multisample_count;
1146 cmd2->body.autogenFilter = srf->autogen_filter;
1147 cmd2->body.size.width = srf->base_size.width;
1148 cmd2->body.size.height = srf->base_size.height;
1149 cmd2->body.size.depth = srf->base_size.depth;
1150 cmd2->body.arraySize = srf->array_size;
1154 cmd->body.sid = srf->res.id;
1155 cmd->body.surfaceFlags = srf->flags;
1156 cmd->body.format = srf->format;
1157 cmd->body.numMipLevels = srf->mip_levels[0];
1158 cmd->body.multisampleCount = srf->multisample_count;
1159 cmd->body.autogenFilter = srf->autogen_filter;
1160 cmd->body.size.width = srf->base_size.width;
1161 cmd->body.size.height = srf->base_size.height;
1162 cmd->body.size.depth = srf->base_size.depth;
1292 struct vmw_surface *srf = vmw_res_to_srf(res);
1302 vmw_view_surface_list_destroy(dev_priv, &srf->view_list);
1419 struct vmw_surface *srf;
1475 *srf_out = &user_srf->srf;
1480 srf = &user_srf->srf;
1481 srf->flags = svga3d_flags;
1482 srf->format = format;
1483 srf->scanout = for_scanout;
1484 srf->mip_levels[0] = num_mip_levels;
1485 srf->num_sizes = 1;
1486 srf->sizes = NULL;
1487 srf->offsets = NULL;
1488 srf->base_size = size;
1489 srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
1490 srf->array_size = array_size;
1491 srf->multisample_count = multisample_count;
1492 srf->multisample_pattern = multisample_pattern;
1493 srf->quality_level = quality_level;
1500 if (srf->flags & SVGA3D_SURFACE_MULTISAMPLE)
1501 sample_count = srf->multisample_count;
1503 srf->res.backup_size =
1504 svga3dsurface_get_serialized_size_extended(srf->format,
1505 srf->base_size,
1506 srf->mip_levels[0],
1510 if (srf->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
1511 srf->res.backup_size += sizeof(SVGA3dDXSOState);
1524 srf->flags |= SVGA3D_SURFACE_SCREENTARGET;
1530 ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
1598 struct vmw_surface *srf;
1653 &srf);
1657 user_srf = container_of(srf, struct vmw_user_surface, srf);
1665 res = &user_srf->srf.res;
1768 struct vmw_surface *srf;
1780 srf = &user_srf->srf;
1781 if (!srf->res.backup) {
1787 ret = vmw_user_bo_reference(tfile, srf->res.backup, &backup_handle);
1798 rep->creq.base.svga3d_flags = SVGA3D_FLAGS_LOWER_32(srf->flags);
1799 rep->creq.base.format = srf->format;
1800 rep->creq.base.mip_levels = srf->mip_levels[0];
1802 rep->creq.base.multisample_count = srf->multisample_count;
1803 rep->creq.base.autogen_filter = srf->autogen_filter;
1804 rep->creq.base.array_size = srf->array_size;
1806 rep->creq.base.base_size = srf->base_size;
1808 rep->crep.backup_size = srf->res.backup_size;
1811 drm_vma_node_offset_addr(&srf->res.backup->base.base.vma_node);
1812 rep->crep.buffer_size = srf->res.backup->base.num_pages * PAGE_SIZE;
1816 SVGA3D_FLAGS_UPPER_32(srf->flags);
1817 rep->creq.multisample_pattern = srf->multisample_pattern;
1818 rep->creq.quality_level = srf->quality_level;
1970 struct vmw_surface *srf = vmw_res_to_srf(res);
1976 if (srf->format == SVGA3D_BUFFER)
2065 struct vmw_surface *srf = vmw_res_to_srf(res);
2078 if (srf->array_size)
2079 num_layers = srf->array_size;
2080 else if (srf->flags & SVGA3D_SURFACE_CUBEMAP)
2083 num_mip = srf->mip_levels[0];
2104 num_samples = max_t(u32, 1, srf->multisample_count);
2105 ret = svga3dsurface_setup_cache(&srf->base_size, srf->format, num_mip,
Indexes created Thu Oct 02 07:10:07 GMT 2025