Lines Matching defs:qh
84 static u16 dwc2_max_desc_num(struct dwc2_qh *qh)
86 return (qh->ep_type == USB_ENDPOINT_XFER_ISOC &&
87 qh->dev_speed == USB_SPEED_HIGH) ?
91 static u16 dwc2_frame_incr_val(struct dwc2_qh *qh)
93 return qh->dev_speed == USB_SPEED_HIGH ?
94 (qh->interval + 8 - 1) / 8 : qh->interval;
97 static int dwc2_desc_list_alloc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
105 qh->desc_list = NULL;
106 qh->desc_list_sz = sizeof(struct dwc2_hcd_dma_desc) *
107 dwc2_max_desc_num(qh);
110 qh->desc_list_sz, 0, USBMALLOC_COHERENT, &qh->desc_list_usbdma);
115 qh->desc_list = KERNADDR(&qh->desc_list_usbdma, 0);
116 qh->desc_list_dma = DMAADDR(&qh->desc_list_usbdma, 0);
118 qh->n_bytes = kmem_zalloc(sizeof(u32) * dwc2_max_desc_num(qh), KM_SLEEP);
119 if (!qh->n_bytes) {
120 usb_freemem(&qh->desc_list_usbdma);
121 qh->desc_list = NULL;
128 static void dwc2_desc_list_free(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
131 if (qh->desc_list) {
132 usb_freemem(&qh->desc_list_usbdma);
133 qh->desc_list = NULL;
136 kmem_free(qh->n_bytes, sizeof(u32) * dwc2_max_desc_num(qh));
137 qh->n_bytes = NULL;
233 static void dwc2_update_frame_list(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
244 if (!qh->channel) {
245 dev_err(hsotg->dev, "qh->channel = %p\n", qh->channel);
255 chan = qh->channel;
256 inc = dwc2_frame_incr_val(qh);
257 if (qh->ep_type == USB_ENDPOINT_XFER_ISOC)
258 i = dwc2_frame_list_idx(qh->sched_frame);
282 if (chan->speed == USB_SPEED_HIGH && qh->interval) {
285 inc = (8 + qh->interval - 1) / qh->interval;
288 j = j << qh->interval;
296 struct dwc2_qh *qh)
298 struct dwc2_host_chan *chan = qh->channel;
300 if (dwc2_qh_is_non_per(qh)) {
306 dwc2_update_frame_list(hsotg, qh, 0);
314 if (chan->qh) {
319 chan->qh = NULL;
322 qh->channel = NULL;
323 qh->ntd = 0;
325 if (qh->desc_list)
326 memset(qh->desc_list, 0, sizeof(struct dwc2_hcd_dma_desc) *
327 dwc2_max_desc_num(qh));
331 * dwc2_hcd_qh_init_ddma() - Initializes a QH structure's Descriptor DMA
335 * @qh: The QH to init
339 * Allocates memory for the descriptor list. For the first periodic QH,
342 int dwc2_hcd_qh_init_ddma(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
347 if (qh->do_split) {
354 retval = dwc2_desc_list_alloc(hsotg, qh, mem_flags);
358 if (qh->ep_type == USB_ENDPOINT_XFER_ISOC ||
359 qh->ep_type == USB_ENDPOINT_XFER_INT) {
364 /* Enable periodic schedule on first periodic QH */
369 qh->ntd = 0;
373 dwc2_desc_list_free(hsotg, qh);
379 * dwc2_hcd_qh_free_ddma() - Frees a QH structure's Descriptor DMA related
383 * @qh: The QH to free
385 * Frees descriptor list memory associated with the QH. If QH is periodic and
388 void dwc2_hcd_qh_free_ddma(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
392 dwc2_desc_list_free(hsotg, qh);
402 if (qh->channel)
403 dwc2_release_channel_ddma(hsotg, qh);
406 if ((qh->ep_type == USB_ENDPOINT_XFER_ISOC ||
407 qh->ep_type == USB_ENDPOINT_XFER_INT) &&
415 static u8 dwc2_frame_to_desc_idx(struct dwc2_qh *qh, u16 frame_idx)
417 if (qh->dev_speed == USB_SPEED_HIGH)
429 struct dwc2_qh *qh, u16 *skip_frames)
451 if (qh->dev_speed == USB_SPEED_HIGH) {
488 struct dwc2_qh *qh)
494 * when no more QTDs in the list (qh->ntd == 0). Thus this function is
495 * called only when qh->ntd == 0 and qh->channel == 0.
497 * So qh->channel != NULL branch is not used and just not removed from
500 * completed, just move QH to inactive schedule until new QTD arrives.
501 * On new QTD, the QH moved back to 'ready' schedule, starting frame and
510 if (qh->channel) {
511 frame = dwc2_calc_starting_frame(hsotg, qh, &skip_frames);
518 dwc2_frame_list_idx(qh->sched_frame) - fr_idx_tmp)
519 % dwc2_frame_incr_val(qh);
522 qh->sched_frame = dwc2_calc_starting_frame(hsotg, qh,
524 fr_idx = dwc2_frame_list_idx(qh->sched_frame);
527 qh->td_first = qh->td_last = dwc2_frame_to_desc_idx(qh, fr_idx);
540 struct dwc2_qh *qh, u32 max_xfer_size,
543 struct dwc2_hcd_dma_desc *dma_desc = &qh->desc_list[idx];
550 qh->n_bytes[idx] = max_xfer_size;
552 qh->n_bytes[idx] = frame_desc->length;
555 dma_desc->status = qh->n_bytes[idx] << HOST_DMA_ISOC_NBYTES_SHIFT &
561 qh->ntd++;
570 usb_syncmem(&qh->desc_list_usbdma,
577 struct dwc2_qh *qh, u16 skip_frames)
585 idx = qh->td_last;
586 inc = qh->interval;
589 next_idx = dwc2_desclist_idx_inc(qh->td_last, inc, qh->dev_speed);
594 * qh->td_last to current frame number + 1.
602 qh->td_last = dwc2_desclist_idx_inc(cur_idx, inc,
603 qh->dev_speed);
604 idx = qh->td_last;
608 if (qh->interval) {
609 ntd_max = (dwc2_max_desc_num(qh) + qh->interval - 1) /
610 qh->interval;
611 if (skip_frames && !qh->channel)
612 ntd_max -= skip_frames / qh->interval;
615 max_xfer_size = qh->dev_speed == USB_SPEED_HIGH ?
618 list_for_each_entry(qtd, &qh->qtd_list, qtd_list_entry) {
625 while (qh->ntd < ntd_max && qtd->isoc_frame_index_last <
627 dwc2_fill_host_isoc_dma_desc(hsotg, qtd, qh,
629 idx = dwc2_desclist_idx_inc(idx, inc, qh->dev_speed);
636 qh->td_last = idx;
640 if (qh->ntd == ntd_max) {
641 idx = dwc2_desclist_idx_dec(qh->td_last, inc, qh->dev_speed);
642 qh->desc_list[idx].status |= HOST_DMA_IOC;
644 usb_syncmem(&qh->desc_list_usbdma,
666 idx = dwc2_desclist_idx_dec(idx, inc * ((qh->ntd + 1) / 2),
667 qh->dev_speed);
674 idx = dwc2_desclist_idx_dec(qh->td_last, inc, qh->dev_speed);
676 qh->desc_list[idx].status |= HOST_DMA_IOC;
677 usb_syncmem(&qh->desc_list_usbdma,
686 struct dwc2_qtd *qtd, struct dwc2_qh *qh,
689 struct dwc2_hcd_dma_desc *dma_desc = &qh->desc_list[n_desc];
710 qh->n_bytes[n_desc] = len;
712 if (qh->ep_type == USB_ENDPOINT_XFER_CONTROL &&
718 usb_syncmem(&qh->desc_list_usbdma,
736 struct dwc2_qh *qh)
739 struct dwc2_host_chan *chan = qh->channel;
742 dev_vdbg(hsotg->dev, "%s(): qh=%p dma=%08lx len=%d\n", __func__, qh,
752 list_for_each_entry(qtd, &qh->qtd_list, qtd_list_entry) {
768 qh->desc_list[n_desc - 1].status |= HOST_DMA_A;
772 &qh->desc_list[n_desc - 1]);
773 usb_syncmem(&qh->desc_list_usbdma,
779 dwc2_fill_host_dma_desc(hsotg, chan, qtd, qh, n_desc);
782 n_desc, &qh->desc_list[n_desc],
783 qh->desc_list[n_desc].buf,
784 qh->desc_list[n_desc].status);
792 if (qh->ep_type == USB_ENDPOINT_XFER_CONTROL)
799 qh->desc_list[n_desc - 1].status |=
802 n_desc - 1, &qh->desc_list[n_desc - 1]);
803 usb_syncmem(&qh->desc_list_usbdma,
808 qh->desc_list[0].status |= HOST_DMA_A;
810 &qh->desc_list[0]);
811 usb_syncmem(&qh->desc_list_usbdma, 0,
823 * @qh: The QH to init
836 * interrupt so remains assigned to the endpoint(QH) until session is done.
838 void dwc2_hcd_start_xfer_ddma(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
841 struct dwc2_host_chan *chan = qh->channel;
847 dwc2_init_non_isoc_dma_desc(hsotg, qh);
851 dwc2_init_non_isoc_dma_desc(hsotg, qh);
852 dwc2_update_frame_list(hsotg, qh, 1);
856 if (!qh->ntd)
857 skip_frames = dwc2_recalc_initial_desc_idx(hsotg, qh);
858 dwc2_init_isoc_dma_desc(hsotg, qh, skip_frames);
861 dwc2_update_frame_list(hsotg, qh, 1);
868 chan->ntd = dwc2_max_desc_num(qh);
886 struct dwc2_qh *qh, u16 idx)
896 usb_syncmem(&qh->desc_list_usbdma,
901 dma_desc = &qh->desc_list[idx];
916 frame_desc->actual_length = qh->n_bytes[idx] - remain;
920 frame_desc->actual_length = qh->n_bytes[idx] - remain;
930 dwc2_hcd_qtd_unlink_and_free(hsotg, qtd, qh);
943 qh->ntd--;
958 struct dwc2_qh *qh;
962 qh = chan->qh;
963 idx = qh->td_first;
966 list_for_each_entry(qtd, &qh->qtd_list, qtd_list_entry)
985 list_for_each_entry_safe(qtd, qtd_tmp, &qh->qtd_list,
997 dwc2_hcd_qtd_unlink_and_free(hsotg, qtd, qh);
1003 list_for_each_entry_safe(qtd, qtd_tmp, &qh->qtd_list, qtd_list_entry) {
1023 rc = dwc2_cmpl_host_isoc_dma_desc(hsotg, chan, qtd, qh,
1027 idx = dwc2_desclist_idx_inc(idx, qh->interval,
1035 if (qh->interval >= 32)
1038 qh->td_first = idx;
1040 qtd_next = list_first_entry(&qh->qtd_list,
1049 } while (idx != qh->td_first);
1053 qh->td_first = idx;
1145 struct dwc2_qh *qh = chan->qh;
1156 usb_syncmem(&qh->desc_list_usbdma,
1161 dma_desc = &qh->desc_list[desc_num];
1162 n_bytes = qh->n_bytes[desc_num];
1174 dwc2_hcd_qtd_unlink_and_free(hsotg, qtd, qh);
1180 if (qh->ep_type == USB_ENDPOINT_XFER_CONTROL) {
1218 struct dwc2_qh *qh = chan->qh;
1224 list_for_each_entry(qtd, &qh->qtd_list, qtd_list_entry)
1229 list_for_each_safe(qtd_item, qtd_tmp, &qh->qtd_list) {
1246 if (qh->ep_type != USB_ENDPOINT_XFER_CONTROL) {
1252 qh->data_toggle = DWC2_HC_PID_DATA0;
1264 qh->ping_state = 1;
1290 struct dwc2_qh *qh = chan->qh;
1299 list_empty(&qh->qtd_list)) {
1307 &qh->qtd_list,
1312 qtd, qh);
1318 dwc2_release_channel_ddma(hsotg, qh);
1319 dwc2_hcd_qh_unlink(hsotg, qh);
1322 list_move(&qh->qh_list_entry,
1342 dwc2_release_channel_ddma(hsotg, qh);
1343 dwc2_hcd_qh_unlink(hsotg, qh);
1345 if (!list_empty(&qh->qtd_list)) {
1350 dwc2_hcd_qh_add(hsotg, qh);
Indexes created Tue Sep 30 20:09:53 GMT 2025