Lines Matching defs:hcfg
256 u32 hcfg;
290 hcfg = DWC2_READ_4(hsotg, HCFG);
291 fslspclksel = (hcfg & HCFG_FSLSPCLKSEL_MASK) >>
299 "FS_PHY programming HCFG to 6 MHz\n");
302 hcfg &= ~HCFG_FSLSPCLKSEL_MASK;
303 hcfg |= fslspclksel << HCFG_FSLSPCLKSEL_SHIFT;
304 DWC2_WRITE_4(hsotg, HCFG, hcfg);
310 "FS_PHY programming HCFG to 48 MHz\n");
313 hcfg &= ~HCFG_FSLSPCLKSEL_MASK;
314 hcfg |= fslspclksel << HCFG_FSLSPCLKSEL_SHIFT;
315 DWC2_WRITE_4(hsotg, HCFG, hcfg);
396 u32 hcfg;
400 hcfg = DWC2_READ_4(hsotg, HCFG);
401 hcfg &= ~HCFG_DESCDMA;
402 DWC2_WRITE_4(hsotg, HCFG, hcfg);
Indexes created Fri Oct 03 02:09:57 GMT 2025