Cross Reference: /src/sys/external/bsd/dwc2/dwc2.c

Lines Matching defs:hsotg
164 dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw,
170 dwc2_free_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw,
323 	struct dwc2_hsotg *hsotg = sc->sc_hsotg;
336 	mutex_spin_enter(&hsotg->lock);
354 	mutex_spin_exit(&hsotg->lock);
437 	struct dwc2_hsotg *hsotg = sc->sc_hsotg;
439 	mutex_spin_enter(&hsotg->lock);
441 	mutex_spin_exit(&hsotg->lock);
464 	struct dwc2_hsotg *hsotg = sc->sc_hsotg;
478 	mutex_spin_enter(&hsotg->lock);
520 	err = dwc2_hcd_urb_dequeue(hsotg, dxfer->urb);
526 	mutex_spin_exit(&hsotg->lock);
894 	struct dwc2_hsotg *hsotg = sc->sc_hsotg;
917 		mutex_spin_enter(&hsotg->lock);
918 		if (!dwc2_hcd_is_bandwidth_allocated(hsotg, xfer))
920 		mutex_spin_exit(&hsotg->lock);
984 	dwc2_hcd_urb_set_pipeinfo(hsotg, dwc2_urb, addr, epnum, xfertype, dir,
1074 		qh = dwc2_hcd_qh_create(hsotg, dwc2_urb, GFP_ATOMIC);
1091 	mutex_spin_enter(&hsotg->lock);
1092 	retval = dwc2_hcd_urb_enqueue(hsotg, dwc2_urb, qh, qtd);
1099 		dwc2_allocate_bus_bandwidth(hsotg,
1100 				dwc2_hcd_get_ep_bandwidth(hsotg, dpipe),
1103 	mutex_spin_exit(&hsotg->lock);
1109 	mutex_spin_exit(&hsotg->lock);
1115 		dwc2_hcd_qh_free(hsotg, qh);
1138 	struct dwc2_hsotg *hsotg;
1144 	hsotg = sc->sc_hsotg;
1145 	mutex_spin_enter(&hsotg->lock);
1153 		intrs = dwc2_read_core_intr(hsotg);
1154 		DWC2_WRITE_4(hsotg, GINTSTS, intrs);
1160 	mutex_spin_exit(&hsotg->lock);
1276 	struct dwc2_hsotg *hsotg = sc->sc_hsotg;
1291 	hsotg->dr_mode = USB_DR_MODE_HOST;
1294 	retval = dwc2_get_hwparams(hsotg);
1299 	hsotg->core_params = kmem_zalloc(sizeof(*hsotg->core_params), KM_SLEEP);
1300 	dwc2_set_all_params(hsotg->core_params, -1);
1303 	dwc2_set_parameters(hsotg, sc->sc_params);
1307 	if (hsotg->dr_mode != USB_DR_MODE_HOST) {
1308 		retval = dwc2_gadget_init(hsotg);
1311 		hsotg->gadget_enabled = 1;
1316 	if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
1317 		retval = dwc2_hcd_init(hsotg);
1319 			if (hsotg->gadget_enabled)
1320 				dwc2_hsotg_remove(hsotg);
1323 	    hsotg->hcd_enabled = 1;
1327 	uint32_t snpsid = hsotg->hw_params.snpsid;
1362 void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, int *hub_addr,
1373 int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context)
1388 void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd,
1397 	KASSERT(mutex_owned(&hsotg->lock));
1400 		dev_dbg(hsotg->dev, "## %s: qtd is NULL ##\n", __func__);
1405 		dev_dbg(hsotg->dev, "## %s: qtd->urb is NULL ##\n", __func__);
1411 		dev_dbg(hsotg->dev, "## %s: urb->priv is NULL ##\n", __func__);
1440 			dev_vdbg(hsotg->dev, " ISO Desc %zu status %d\n",
1491 		dwc2_free_bus_bandwidth(hsotg,
1492 					dwc2_hcd_get_ep_bandwidth(hsotg, dpipe),
1497 	KASSERT(mutex_owned(&hsotg->lock));
1501 	mutex_spin_exit(&hsotg->lock);
1503 	mutex_spin_enter(&hsotg->lock);
1508 _dwc2_hcd_start(struct dwc2_hsotg *hsotg)
1510 	dev_dbg(hsotg->dev, "DWC OTG HCD START\n");
1512 	mutex_spin_enter(&hsotg->lock);
1514 	hsotg->lx_state = DWC2_L0;
1516 	if (dwc2_is_device_mode(hsotg)) {
1517 		mutex_spin_exit(&hsotg->lock);
1521 	dwc2_hcd_reinit(hsotg);
1523 	mutex_spin_exit(&hsotg->lock);
1527 int dwc2_host_is_b_hnp_enabled(struct dwc2_hsotg *hsotg)
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