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Lines Matching refs:io_cq

37 	struct ena_com_io_cq *io_cq)
43 	head_masked = io_cq->head & (io_cq->q_depth - 1);
44 	expected_phase = io_cq->phase;
46 	cdesc = (struct ena_eth_io_rx_cdesc_base *)(io_cq->cdesc_addr.virt_addr
47 			+ (head_masked * io_cq->cdesc_entry_size_in_bytes));
58 static inline void ena_com_cq_inc_head(struct ena_com_io_cq *io_cq)
60 	io_cq->head++;
63 	if (unlikely((io_cq->head & (io_cq->q_depth - 1)) == 0))
64 		io_cq->phase ^= 1;
226 	ena_com_rx_cdesc_idx_to_ptr(struct ena_com_io_cq *io_cq, u16 idx)
228 	idx &= (io_cq->q_depth - 1);
230 		((uintptr_t)io_cq->cdesc_addr.virt_addr +
231 		idx * io_cq->cdesc_entry_size_in_bytes);
234 static inline u16 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,
242 		cdesc = ena_com_get_next_rx_cdesc(io_cq);
246 		ena_com_cq_inc_head(io_cq);
253 		*first_cdesc_idx = io_cq->cur_rx_pkt_cdesc_start_idx;
254 		count += io_cq->cur_rx_pkt_cdesc_count;
256 		head_masked = io_cq->head & (io_cq->q_depth - 1);
258 		io_cq->cur_rx_pkt_cdesc_count = 0;
259 		io_cq->cur_rx_pkt_cdesc_start_idx = head_masked;
262 			    io_cq->qid, *first_cdesc_idx, count);
264 		io_cq->cur_rx_pkt_cdesc_count += count;
508 int ena_com_rx_pkt(struct ena_com_io_cq *io_cq,
518 	ENA_WARN(io_cq->direction != ENA_COM_IO_QUEUE_DIRECTION_RX,
521 	nb_hw_desc = ena_com_cdesc_rx_pkt_get(io_cq, &cdesc_idx);
528 		    io_cq->qid, nb_hw_desc);
537 		cdesc = ena_com_rx_cdesc_idx_to_ptr(io_cq, cdesc_idx + i);
593 int ena_com_tx_comp_req_id_get(struct ena_com_io_cq *io_cq, u16 *req_id)
599 	masked_head = io_cq->head & (io_cq->q_depth - 1);
600 	expected_phase = io_cq->phase;
603 		((uintptr_t)io_cq->cdesc_addr.virt_addr +
604 		(masked_head * io_cq->cdesc_entry_size_in_bytes));
614 	if (unlikely(cdesc->req_id >= io_cq->q_depth)) {
619 	ena_com_cq_inc_head(io_cq);