Lines Matching defs:imm
138 static SLJIT_INLINE sljit_s32 emit_imm64_const(struct sljit_compiler *compiler, sljit_s32 dst, sljit_uw imm)
140 FAIL_IF(push_inst(compiler, MOVZ | RD(dst) | ((imm & 0xffff) << 5)));
141 FAIL_IF(push_inst(compiler, MOVK | RD(dst) | (((imm >> 16) & 0xffff) << 5) | (1 << 21)));
142 FAIL_IF(push_inst(compiler, MOVK | RD(dst) | (((imm >> 32) & 0xffff) << 5) | (2 << 21)));
143 return push_inst(compiler, MOVK | RD(dst) | ((imm >> 48) << 5) | (3 << 21));
361 static sljit_ins logical_imm(sljit_sw imm, sljit_s32 len)
369 if (len == 32 && (imm == 0 || imm == -1))
371 if (len == 16 && ((sljit_s32)imm == 0 || (sljit_s32)imm == -1))
375 SLJIT_ASSERT((len == 32 && imm != 0 && imm != -1)
376 || (len == 16 && (sljit_s32)imm != 0 && (sljit_s32)imm != -1));
377 uimm = (sljit_uw)imm;
404 imm = (sljit_sw)~uimm;
405 SLJIT_ASSERT(imm < 0);
407 COUNT_TRAILING_ZERO(imm, ones);
409 if (~imm)
427 sljit_uw imm = (sljit_uw)simm;
431 if (imm <= 0xffff)
432 return push_inst(compiler, MOVZ | RD(dst) | (imm << 5));
435 return push_inst(compiler, MOVN | RD(dst) | ((~imm & 0xffff) << 5));
437 if (imm <= 0xffffffffl) {
438 if ((imm & 0xffff0000l) == 0xffff0000)
439 return push_inst(compiler, (MOVN ^ W_OP) | RD(dst) | ((~imm & 0xffff) << 5));
440 if ((imm & 0xffff) == 0xffff)
441 return push_inst(compiler, (MOVN ^ W_OP) | RD(dst) | ((~imm & 0xffff0000l) >> (16 - 5)) | (1 << 21));
452 if (imm <= 0xffffffffl) {
453 FAIL_IF(push_inst(compiler, MOVZ | RD(dst) | ((imm & 0xffff) << 5)));
454 return push_inst(compiler, MOVK | RD(dst) | ((imm & 0xffff0000l) >> (16 - 5)) | (1 << 21));
458 FAIL_IF(push_inst(compiler, MOVN | RD(dst) | ((~imm & 0xffff) << 5)));
459 return push_inst(compiler, MOVK | RD(dst) | ((imm & 0xffff0000l) >> (16 - 5)) | (1 << 21));
475 simm = (sljit_sw)imm;
530 arg1 must be register, TMP_REG1, imm
531 arg2 must be register, TMP_REG2, imm */
536 sljit_sw imm, nimm;
551 imm = (flags & ARG2_IMM) ? arg2 : arg1;
559 /* No form with immediate operand (except imm 0, which
564 return load_immediate(compiler, dst, imm);
567 FAIL_IF(load_immediate(compiler, dst, (flags & INT_OP) ? (~imm & 0xffffffff) : ~imm));
572 imm = -imm;
575 if (imm == 0) {
579 if (imm > 0 && imm <= 0xfff) {
581 return push_inst(compiler, (ADDI ^ inv_bits) | RD(dst) | RN(reg) | (imm << 10));
583 nimm = -imm;
588 if (imm > 0 && imm <= 0xffffff && !(imm & 0xfff)) {
590 return push_inst(compiler, (ADDI ^ inv_bits) | RD(dst) | RN(reg) | ((imm >> 12) << 10) | (1 << 22));
596 if (imm > 0 && imm <= 0xffffff && !(flags & SET_FLAGS)) {
597 FAIL_IF(push_inst(compiler, (ADDI ^ inv_bits) | RD(dst) | RN(reg) | ((imm >> 12) << 10) | (1 << 22)));
598 return push_inst(compiler, (ADDI ^ inv_bits) | RD(dst) | RN(dst) | ((imm & 0xfff) << 10));
606 inst_bits = logical_imm(imm, LOGICAL_IMM_CHECK | ((flags & INT_OP) ? 16 : 32));
613 inst_bits = logical_imm(imm, LOGICAL_IMM_CHECK | ((flags & INT_OP) ? 16 : 32));
626 imm &= 0x1f;
627 FAIL_IF(push_inst(compiler, (UBFM ^ inv_bits) | RD(dst) | RN(arg1) | ((-imm & 0x1f) << 16) | ((31 - imm) << 10)));
630 imm &= 0x3f;
631 FAIL_IF(push_inst(compiler, (UBFM ^ inv_bits) | RD(dst) | RN(arg1) | (1 << 22) | ((-imm & 0x3f) << 16) | ((63 - imm) << 10)));
641 imm &= 0x1f;
642 FAIL_IF(push_inst(compiler, (UBFM ^ inv_bits) | RD(dst) | RN(arg1) | (imm << 16) | (31 << 10)));
645 imm &= 0x3f;
646 FAIL_IF(push_inst(compiler, (UBFM ^ inv_bits) | RD(dst) | RN(arg1) | (1 << 22) | (imm << 16) | (63 << 10)));
793 /* u l */ 0x39400000 /* ldrb [reg,imm] */,
794 /* u s */ 0x39000000 /* strb [reg,imm] */,
795 /* s l */ 0x39800000 /* ldrsb [reg,imm] */,
796 /* s s */ 0x39000000 /* strb [reg,imm] */,
800 /* u l */ 0x38400000 /* ldurb [reg,imm] */,
801 /* u s */ 0x38000000 /* sturb [reg,imm] */,
802 /* s l */ 0x38800000 /* ldursb [reg,imm] */,
803 /* s s */ 0x38000000 /* sturb [reg,imm] */,
807 /* u l */ 0x38400c00 /* ldrb [reg,imm]! */,
808 /* u s */ 0x38000c00 /* strb [reg,imm]! */,
809 /* s l */ 0x38800c00 /* ldrsb [reg,imm]! */,
810 /* s s */ 0x38000c00 /* strb [reg,imm]! */,