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Lines Matching defs:qi

116 	HAL_TX_QUEUE_INFO *qi;
139 	qi = &ahp->ah_txq[q];
140 	if (qi->tqi_type != HAL_TX_QUEUE_INACTIVE) {
145 	OS_MEMZERO(qi, sizeof(HAL_TX_QUEUE_INFO));
146 	qi->tqi_type = type;
149 		qi->tqi_qflags =
155 		qi->tqi_aifs = INIT_AIFS;
156 		qi->tqi_cwmin = HAL_TXQ_USEDEFAULT;	/* NB: do at reset */
157 		qi->tqi_cwmax = INIT_CWMAX;
158 		qi->tqi_shretry = INIT_SH_RETRY;
159 		qi->tqi_lgretry = INIT_LG_RETRY;
169 setTxQInterrupts(struct ath_hal *ah, HAL_TX_QUEUE_INFO *qi)
202 	HAL_TX_QUEUE_INFO *qi;
209 	qi = &ahp->ah_txq[q];
210 	if (qi->tqi_type == HAL_TX_QUEUE_INACTIVE) {
218 	qi->tqi_type = HAL_TX_QUEUE_INACTIVE;
224 	setTxQInterrupts(ah, qi);
237 	HAL_TX_QUEUE_INFO *qi;
245 	qi = &ahp->ah_txq[q];
246 	if (qi->tqi_type == HAL_TX_QUEUE_INACTIVE) {
252 	if (qi->tqi_cwmin == HAL_TXQ_USEDEFAULT) {
265 		cwMin = qi->tqi_cwmin;
270 		| SM(qi->tqi_cwmax, AR_D_LCL_IFS_CWMAX)
271 		| SM(qi->tqi_aifs, AR_D_LCL_IFS_AIFS));
277 		 | SM(qi->tqi_lgretry, AR_D_RETRY_LIMIT_FR_LG)
278 		 | SM(qi->tqi_shretry, AR_D_RETRY_LIMIT_FR_SH)
289 	if (qi->tqi_cbrPeriod) {
291 			  SM(qi->tqi_cbrPeriod,AR_Q_CBRCFG_CBR_INTERVAL)
292 			| SM(qi->tqi_cbrOverflowLimit, AR_Q_CBRCFG_CBR_OVF_THRESH));
296 			(qi->tqi_cbrOverflowLimit ?
299 	if (qi->tqi_readyTime) {
301 			SM(qi->tqi_readyTime, AR_Q_RDYTIMECFG_INT) | 
304 	if (qi->tqi_burstTime) {
306 			SM(qi->tqi_burstTime, AR_D_CHNTIME_DUR) |
308 		if (qi->tqi_qflags & HAL_TXQ_RDYTIME_EXP_POLICY_ENABLE) {
315 	if (qi->tqi_qflags & HAL_TXQ_BACKOFF_DISABLE) {
320 	if (qi->tqi_qflags & HAL_TXQ_FRAG_BURST_BACKOFF_ENABLE) {
325 	switch (qi->tqi_type) {
373 	if (qi->tqi_qflags & HAL_TXQ_TXOKINT_ENABLE)
377 	if (qi->tqi_qflags & HAL_TXQ_TXERRINT_ENABLE)
381 	if (qi->tqi_qflags & HAL_TXQ_TXDESCINT_ENABLE)
385 	if (qi->tqi_qflags & HAL_TXQ_TXEOLINT_ENABLE)
389 	if (qi->tqi_qflags & HAL_TXQ_TXURNINT_ENABLE)
393 	setTxQInterrupts(ah, qi);