Lines Matching defs:ah
21 #include "ah.h"
32 static void ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
33 static void ar5212DisablePCIE(struct ath_hal *ah);
169 ar5212GetRadioRev(struct ath_hal *ah)
175 OS_REG_WRITE(ah, AR_PHY(0x34), 0x00001c16);
177 OS_REG_WRITE(ah, AR_PHY(0x20), 0x00010000);
178 val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
184 ar5212AniSetup(struct ath_hal *ah)
204 if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_GRIFFIN) {
208 ar5212AniAttach(ah, &tmp, &tmp, AH_TRUE);
210 ar5212AniAttach(ah, &aniparams, &aniparams, AH_TRUE);
223 struct ath_hal *ah;
225 ah = &ahp->ah_priv.h;
228 ah->ah_sc = sc;
229 ah->ah_st = st;
230 ah->ah_sh = sh;
232 ah->ah_devid = devid; /* NB: for alq */
233 AH_PRIVATE(ah)->ah_devid = devid;
234 AH_PRIVATE(ah)->ah_subvendorid = 0; /* XXX */
236 AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER;
237 AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX; /* no scaling */
306 #define AH_EEPROM_PROTECT(ah) \
307 (AH_PRIVATE(ah)->ah_ispcie)? AR_EEPROM_PROTECT_PCIE : AR_EEPROM_PROTECT)
309 struct ath_hal *ah;
327 ah = &ahp->ah_priv.h;
329 if (!ar5212SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) {
330 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n",
336 val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID;
337 AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
338 AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION;
339 AH_PRIVATE(ah)->ah_ispcie = IS_5424(ah) || IS_2425(ah);
341 if (!ar5212IsMacSupported(AH_PRIVATE(ah)->ah_macVersion, AH_PRIVATE(ah)->ah_macRev)) {
342 HALDEBUG(ah, HAL_DEBUG_ANY,
344 __func__, AH_PRIVATE(ah)->ah_macVersion,
345 AH_PRIVATE(ah)->ah_macRev);
354 if (!ar5212ChipReset(ah, AH_NULL)) { /* reset chip */
355 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
360 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
362 if (AH_PRIVATE(ah)->ah_ispcie) {
364 ath_hal_configPCIE(ah, AH_FALSE);
367 if (!ar5212ChipTest(ah)) {
368 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
375 if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_VENICE)
376 OS_REG_SET_BIT(ah, AR_PCICFG, AR_PCICFG_RETRYFIXEN);
382 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
385 AH_PRIVATE(ah)->ah_analog5GhzRev = ar5212GetRadioRev(ah);
387 rf = ath_hal_rfprobe(ah, &ecode);
392 switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) {
402 if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) {
411 if (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE &&
412 AH_PRIVATE(ah)->ah_macRev == AR_SREV_HAINAN &&
413 AH_PRIVATE(ah)->ah_phyRev == AR_PHYREV_HAINAN) {
414 AH_PRIVATE(ah)->ah_analog5GhzRev = AR_ANALOG5REV_HAINAN;
417 if (IS_2413(ah)) { /* Griffin */
418 AH_PRIVATE(ah)->ah_analog5GhzRev =
422 if (IS_5413(ah)) { /* Eagle */
423 AH_PRIVATE(ah)->ah_analog5GhzRev =
427 if (IS_2425(ah) || IS_2417(ah)) {/* Swan or Nala */
428 AH_PRIVATE(ah)->ah_analog5GhzRev =
434 HALDEBUG(ah, HAL_DEBUG_ANY,
437 __func__, AH_PRIVATE(ah)->ah_analog5GhzRev);
442 if (IS_RAD5112_REV1(ah)) {
443 HALDEBUG(ah, HAL_DEBUG_ANY,
446 AH_PRIVATE(ah)->ah_analog5GhzRev);
451 val = OS_REG_READ(ah, AR_PCICFG);
454 if (!AH_PRIVATE(ah)->ah_ispcie) {
455 HALDEBUG(ah, HAL_DEBUG_ANY,
461 /* XXX AH_PRIVATE(ah)->ah_isPciExpress = AH_TRUE; */
464 HALDEBUG(ah, HAL_DEBUG_ANY,
470 HALDEBUG(ah, HAL_DEBUG_ANY,
476 ecode = ath_hal_legacyEepromAttach(ah);
480 ahp->ah_isHb63 = IS_2425(ah) && ath_hal_eepromGetFlag(ah, AR_EEP_ISTALON);
485 if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE) &&
486 (AH_PRIVATE(ah)->ah_analog5GhzRev & 0xF0) == AR_RAD5111_SREV_MAJOR) {
491 OS_REG_WRITE(ah, AR_PHY(0), 0x00004007);
493 AH_PRIVATE(ah)->ah_analog2GhzRev = ar5212GetRadioRev(ah);
496 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
498 if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != AR_RAD2111_SREV_MAJOR) {
499 HALDEBUG(ah, HAL_DEBUG_ANY,
502 AH_PRIVATE(ah)->ah_analog2GhzRev);
508 ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval);
510 HALDEBUG(ah, HAL_DEBUG_ANY,
515 AH_PRIVATE(ah)->ah_currentRD = eeval;
521 if (!ar5212FillCapabilityInfo(ah)) {
522 HALDEBUG(ah, HAL_DEBUG_ANY,
528 if (!rf->attach(ah, &ecode)) {
529 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n",
537 AH_PRIVATE(ah)->ah_getNfAdjust = ahp->ah_rfHal->getNfAdjust;
540 ar5212InitializeGainValues(ah);
542 ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
544 HALDEBUG(ah, HAL_DEBUG_ANY,
549 ar5212AniSetup(ah);
551 ar5212InitNfCalHistBuffer(ah);
555 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
557 return ah;
569 ar5212Detach(struct ath_hal *ah)
571 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__);
573 HALASSERT(ah != AH_NULL);
574 HALASSERT(ah->ah_magic == AR5212_MAGIC);
576 ar5212AniDetach(ah);
577 ar5212RfDetach(ah);
578 ar5212Disable(ah);
579 ar5212SetPowerMode(ah, HAL_PM_FULL_SLEEP, AH_TRUE);
581 ath_hal_eepromDetach(ah);
582 ath_hal_free(ah);
586 ar5212ChipTest(struct ath_hal *ah)
599 regHold[i] = OS_REG_READ(ah, addr);
602 OS_REG_WRITE(ah, addr, wrData);
603 rdData = OS_REG_READ(ah, addr);
605 HALDEBUG(ah, HAL_DEBUG_ANY,
613 OS_REG_WRITE(ah, addr, wrData);
614 rdData = OS_REG_READ(ah, addr);
616 HALDEBUG(ah, HAL_DEBUG_ANY,
622 OS_REG_WRITE(ah, regAddr[i], regHold[i]);
632 ar5212GetChannelEdges(struct ath_hal *ah,
641 (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE) ||
642 ath_hal_eepromGetFlag(ah, AR_EEP_GMODE))) {
660 ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
662 OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
663 OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
666 OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x28000039);
667 OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x53160824);
668 OS_REG_WRITE(ah, AR_PCIE_SERDES, 0xe5980579);
671 OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x001defff);
672 OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40);
673 OS_REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554);
674 OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x000e3007);
677 OS_REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
681 ar5212DisablePCIE(struct ath_hal *ah)
692 ar5212FillCapabilityInfo(struct ath_hal *ah)
695 #define IS_GRIFFIN_LITE(ah) \
696 (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_GRIFFIN && \
697 AH_PRIVATE(ah)->ah_macRev == AR_SREV_GRIFFIN_LITE)
698 #define IS_COBRA(ah) \
699 (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_COBRA)
700 #define IS_2112(ah) \
701 ((AH_PRIVATE(ah)->ah_analog5GhzRev & 0xF0) == AR_RAD2112_SREV_MAJOR)
703 struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
708 if (ath_hal_eepromGet(ah, AR_EEP_OPCAP, &capField) != HAL_OK) {
709 HALDEBUG(ah, HAL_DEBUG_ANY,
713 if (IS_2112(ah))
714 ath_hal_eepromSet(ah, AR_EEP_AMODE, AH_FALSE);
715 if (capField == 0 && IS_GRIFFIN_LITE(ah)) {
719 ath_hal_eepromSet(ah, AR_EEP_COMPRESS, AH_FALSE);
720 ath_hal_eepromSet(ah, AR_EEP_FASTFRAME, AH_FALSE);
721 ath_hal_eepromSet(ah, AR_EEP_TURBO5DISABLE, AH_TRUE);
722 ath_hal_eepromSet(ah, AR_EEP_TURBO2DISABLE, AH_TRUE);
723 HALDEBUG(ah, HAL_DEBUG_ATTACH,
736 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: regdomain mapped to 0x%x\n",
740 if (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_2417 ||
741 AH_PRIVATE(ah)->ah_macVersion == AR_SREV_2425) {
742 HALDEBUG(ah, HAL_DEBUG_ATTACH,
745 ath_hal_eepromSet(ah, AR_EEP_BMODE, AH_TRUE);
746 ath_hal_eepromSet(ah, AR_EEP_COMPRESS, AH_FALSE);
747 ath_hal_eepromSet(ah, AR_EEP_FASTFRAME, AH_FALSE);
748 ath_hal_eepromSet(ah, AR_EEP_TURBO5DISABLE, AH_TRUE);
749 ath_hal_eepromSet(ah, AR_EEP_TURBO2DISABLE, AH_TRUE);
754 if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) {
756 if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE))
759 if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE))
761 if (ath_hal_eepromGetFlag(ah, AR_EEP_GMODE) &&
764 if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO2DISABLE))
770 if (IS_RAD5112_ANY(ah) || IS_5413(ah) || IS_2425(ah) || IS_2417(ah))
781 (ath_hal_eepromGetFlag(ah, AR_EEP_AES) &&
782 ((AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_VENICE) ||
783 ((AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE) &&
784 (AH_PRIVATE(ah)->ah_macRev >= AR_SREV_VERSION_OAHU))));
788 pCap->halMicAesCcmSupport = ath_hal_eepromGetFlag(ah, AR_EEP_AES);
793 if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_GRIFFIN)
800 if (ahpriv->ah_macRev > 1 || IS_COBRA(ah)) {
802 ath_hal_eepromGetFlag(ah, AR_EEP_COMPRESS) &&
804 pCap->halBurstSupport = ath_hal_eepromGetFlag(ah, AR_EEP_BURST);
806 ath_hal_eepromGetFlag(ah, AR_EEP_FASTFRAME) &&
822 if (ath_hal_eepromGet(ah, AR_EEP_MAXQCU, &val) == HAL_OK)
827 if (ath_hal_eepromGet(ah, AR_EEP_KCENTRIES, &val) == HAL_OK)
835 if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) &&
836 ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) {
844 (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_VENICE);
847 if ((AH_PRIVATE(ah)->ah_macVersion == AR_SREV_VERSION_VENICE &&
848 AH_PRIVATE(ah)->ah_macRev == AR_SREV_HAINAN) ||
849 AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_VENICE) {
865 if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_GRIFFIN)
Indexes created Thu Oct 23 22:10:10 GMT 2025