Lines Matching refs:ahp
88 struct ath_hal_5212 *ahp = AH5212(ah);
141 HALASSERT(ahp->ah_eeversion >= AR_EEPROM_VER3);
252 regWrites = ath_hal_ini_write(ah, &ahp->ah_ini_modes, modesIndex, 0);
253 regWrites = write_common(ah, &ahp->ah_ini_common, bChannelChange,
255 ahp->ah_rfHal->writeRegs(ah, modesIndex, freqIndex, regWrites);
344 if (!ahp->ah_rfHal->setRfRegs(ah, ichan, modesIndex, rfXpdGain)) {
371 OS_REG_WRITE(ah, AR_STA_ID0, LE_READ_4(ahp->ah_macaddr));
372 OS_REG_WRITE(ah, AR_STA_ID1, LE_READ_2(ahp->ah_macaddr + 4)
375 | ahp->ah_staId1Defaults
380 OS_REG_WRITE(ah, AR_BSSMSKL, LE_READ_4(ahp->ah_bssidmask));
381 OS_REG_WRITE(ah, AR_BSSMSKU, LE_READ_2(ahp->ah_bssidmask + 4));
391 OS_REG_WRITE(ah, AR_BSS_ID0, LE_READ_4(ahp->ah_bssid));
392 OS_REG_WRITE(ah, AR_BSS_ID1, LE_READ_2(ahp->ah_bssid + 4));
395 OS_REG_WRITE(ah, AR_RSSI_THR, ahp->ah_rssiThr);
490 if (!IS_CHAN_B(chan) && ahp->ah_bIQCalibration != IQ_CAL_DONE) {
497 ahp->ah_bIQCalibration = IQ_CAL_RUNNING;
499 ahp->ah_bIQCalibration = IQ_CAL_INACTIVE;
508 ahp->ah_intrTxqs = 0;
518 ahp->ah_maskReg = AR_IMR_TXOK | AR_IMR_TXERR | AR_IMR_TXURN
523 ahp->ah_maskReg |= AR_IMR_MIB;
524 OS_REG_WRITE(ah, AR_IMR, ahp->ah_maskReg);
571 if (ahp->ah_miscMode != 0)
572 OS_REG_WRITE(ah, AR_MISC_MODE, ahp->ah_miscMode);
573 if (ahp->ah_slottime != (u_int) -1)
574 ar5212SetSlotTime(ah, ahp->ah_slottime);
575 if (ahp->ah_acktimeout != (u_int) -1)
576 ar5212SetAckTimeout(ah, ahp->ah_acktimeout);
577 if (ahp->ah_ctstimeout != (u_int) -1)
578 ar5212SetCTSTimeout(ah, ahp->ah_ctstimeout);
579 if (ahp->ah_sifstime != (u_int) -1)
580 ar5212SetSifsTime(ah, ahp->ah_sifstime);
Indexes created Wed Oct 29 05:09:45 GMT 2025