Lines Matching refs:ads
172 struct ar5416_desc *ads = AR5416DESC(ds);
187 ads->ds_ctl0 = (pktLen & AR_FrameLen)
193 ads->ds_ctl1 = (type << AR_FrameType_S)
196 ads->ds_ctl2 = SM(txTries0, AR_XmitDataTries0)
199 ads->ds_ctl3 = (txRate0 << AR_XmitRate0_S)
201 ads->ds_ctl4 = 0;
202 ads->ds_ctl5 = 0;
203 ads->ds_ctl6 = 0;
204 ads->ds_ctl7 = SM(ahp->ah_tx_chainmask, AR_ChainSel0)
209 ads->ds_ctl8 = 0;
210 ads->ds_ctl9 = (txPower << 24); /* XXX? */
211 ads->ds_ctl10 = (txPower << 24); /* XXX? */
212 ads->ds_ctl11 = (txPower << 24); /* XXX? */
215 ads->ds_ctl1 |= SM(keyIx, AR_DestIdx);
216 ads->ds_ctl0 |= AR_DestIdxValid;
217 ads->ds_ctl6 |= SM(ahp->ah_keytype[keyIx], AR_EncrType);
227 ads->ds_ctl0 |= (flags & HAL_TXDESC_CTSENA ? AR_CTSEnable : 0)
230 ads->ds_ctl2 |= SM(rtsctsDuration, AR_BurstDur);
231 ads->ds_ctl7 |= (rtsctsRate << AR_RTSCTSRate_S);
243 struct ar5416_desc *ads = AR5416DESC(ds);
247 ads->ds_ctl2 |= SM(txTries1, AR_XmitDataTries1);
248 ads->ds_ctl3 |= (txRate1 << AR_XmitRate1_S);
252 ads->ds_ctl2 |= SM(txTries2, AR_XmitDataTries2);
253 ads->ds_ctl3 |= (txRate2 << AR_XmitRate2_S);
257 ads->ds_ctl2 |= SM(txTries3, AR_XmitDataTries3);
258 ads->ds_ctl3 |= (txRate3 << AR_XmitRate3_S);
268 struct ar5416_desc *ads = AR5416DESC(ds);
277 ads->ds_ctl1 |= segLen | (lastSeg ? 0 : AR_TxMore);
284 ads->ds_ctl0 = 0;
285 ads->ds_ctl1 = segLen;
287 ads->ds_ctl2 = __bswap32(AR5416DESC_CONST(ds0)->ds_ctl2);
288 ads->ds_ctl3 = __bswap32(AR5416DESC_CONST(ds0)->ds_ctl3);
290 ads->ds_ctl2 = AR5416DESC_CONST(ds0)->ds_ctl2;
291 ads->ds_ctl3 = AR5416DESC_CONST(ds0)->ds_ctl3;
297 ads->ds_ctl0 = 0;
298 ads->ds_ctl1 = segLen | AR_TxMore;
299 ads->ds_ctl2 = 0;
300 ads->ds_ctl3 = 0;
303 OS_MEMZERO(ads->u.tx.status, sizeof(ads->u.tx.status));
321 struct ar5416_desc *ads = AR5416DESC(ds);
322 uint32_t *ds_txstatus = AR5416_DS_TXSTATUS(ah,ads);
341 ads->ds_ctl0 = (pktLen & AR_FrameLen);
342 ads->ds_ctl1 = (type << AR_FrameType_S)
344 ads->ds_ctl2 = 0;
345 ads->ds_ctl3 = 0;
348 ads->ds_ctl1 |= SM(keyIx, AR_DestIdx);
349 ads->ds_ctl0 |= AR_DestIdxValid;
352 ads->ds_ctl6 = SM(keyType[cipher], AR_EncrType);
354 ads->ds_ctl6 |= SM(delims, AR_PadDelim);
358 ads->ds_ctl1 |= segLen | (lastSeg ? 0 : AR_TxMore);
360 ads->ds_ctl0 = 0;
361 ads->ds_ctl1 |= segLen;
366 ads->ds_ctl0 = 0;
367 ads->ds_ctl1 |= segLen | AR_TxMore;
382 struct ar5416_desc *ads = AR5416DESC(ds);
393 ads->ds_ctl0 |= (txPower << AR_XmitPower_S)
397 ads->ds_ctl1 |= (flags & HAL_TXDESC_NOACK ? AR_NoAck : 0);
398 ads->ds_ctl2 |= SM(txTries0, AR_XmitDataTries0);
399 ads->ds_ctl3 |= (txRate0 << AR_XmitRate0_S);
400 ads->ds_ctl7 = SM(AH5416(ah)->ah_tx_chainmask, AR_ChainSel0)
406 ads->ds_ctl8 = 0;
407 ads->ds_ctl9 = (txPower << 24);
408 ads->ds_ctl10 = (txPower << 24);
409 ads->ds_ctl11 = (txPower << 24);
411 ads->ds_ctl6 &= ~(0xffff);
412 ads->ds_ctl6 |= SM(aggrLen, AR_AggrLen);
416 ads->ds_ctl0 |= (flags & HAL_TXDESC_CTSENA ? AR_CTSEnable : 0)
418 ads->ds_ctl2 |= SM(rtsctsDuration, AR_BurstDur);
429 struct ar5416_desc *ads = AR5416DESC(ds);
431 ads->ds_ctl1 &= ~AR_MoreAggr;
432 ads->ds_ctl6 &= ~AR_PadDelim;
436 ads->ds_ctl2 = __bswap32(AR5416DESC_CONST(ds0)->ds_ctl2);
437 ads->ds_ctl3 = __bswap32(AR5416DESC_CONST(ds0)->ds_ctl3);
439 ads->ds_ctl2 = AR5416DESC_CONST(ds0)->ds_ctl2;
440 ads->ds_ctl3 = AR5416DESC_CONST(ds0)->ds_ctl3;
469 struct ar5416_desc *ads = AR5416DESC(ds);
470 uint32_t *ds_txstatus = AR5416_DS_TXSTATUS(ah,ads);
519 ts->ts_rate = MS(ads->ds_ctl3, AR_XmitRate0);
522 ts->ts_rate = MS(ads->ds_ctl3, AR_XmitRate1) |
526 ts->ts_rate = MS(ads->ds_ctl3, AR_XmitRate2) |
530 ts->ts_rate = MS(ads->ds_ctl3, AR_XmitRate3) |
560 case 3: ts->ts_longretry += MS(ads->ds_ctl2, AR_XmitDataTries2);
561 case 2: ts->ts_longretry += MS(ads->ds_ctl2, AR_XmitDataTries1);
562 case 1: ts->ts_longretry += MS(ads->ds_ctl2, AR_XmitDataTries0);
569 ts->ts_virtcol = MS(ads->ds_ctl1, AR_VirtRetryCnt);
609 struct ar5416_desc *ads = AR5416DESC(ds);
615 ads->ds_ctl2 = set11nTries(series, 0)
621 ads->ds_ctl3 = set11nRate(series, 0)
626 ads->ds_ctl4 = set11nPktDurRTSCTS(series, 0)
629 ads->ds_ctl5 = set11nPktDurRTSCTS(series, 2)
632 ads->ds_ctl7 = set11nRateFlags(series, 0)
654 (ads->ds_ctl0 & AR_CTSEnable) == 0) {
655 ads->ds_ctl0 |= AR_RTSEnable;
656 ads->ds_ctl0 &= ~AR_CTSEnable;
663 struct ar5416_desc *ads = AR5416DESC(ds);
664 uint32_t *ds_txstatus = AR5416_DS_TXSTATUS(ah,ads);
666 ads->ds_ctl1 |= (AR_IsAggr | AR_MoreAggr);
668 ads->ds_ctl6 &= ~AR_PadDelim;
669 ads->ds_ctl6 |= SM(numDelims, AR_PadDelim);
670 ads->ds_ctl6 &= ~AR_AggrLen;
682 struct ar5416_desc *ads = AR5416DESC(ds);
684 ads->ds_ctl1 &= (~AR_IsAggr & ~AR_MoreAggr);
685 ads->ds_ctl6 &= ~AR_PadDelim;
686 ads->ds_ctl6 &= ~AR_AggrLen;
693 struct ar5416_desc *ads = AR5416DESC(ds);
695 ads->ds_ctl2 &= ~AR_BurstDur;
696 ads->ds_ctl2 |= SM(burstDuration, AR_BurstDur);
Indexes created Sun Oct 26 21:10:03 GMT 2025