Lines Matching defs:ah
21 #include "ah.h"
65 static void ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
66 static HAL_BOOL ar9285FillCapabilityInfo(struct ath_hal *ah);
67 static void ar9285WriteIni(struct ath_hal *ah,
71 ar9285AniSetup(struct ath_hal *ah)
74 ar5212AniAttach(ah, AH_NULL, AH_NULL, AH_FALSE);
86 struct ath_hal *ah;
103 ah = &ahp->ah_priv.h;
105 ar5416InitState(AH5416(ah), devid, sc, st, sh, status);
109 ah->ah_setAntennaSwitch = ar9285SetAntennaSwitch;
110 ah->ah_configPCIE = ar9285ConfigPCIE;
111 ah->ah_setTxPower = ar9285SetTransmitPower;
112 ah->ah_setBoardValues = ar9285SetBoardValues;
114 AH5416(ah)->ah_cal.iqCalData.calData = &ar9280_iq_cal;
115 AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9280_adc_gain_cal;
116 AH5416(ah)->ah_cal.adcDcCalData.calData = &ar9280_adc_dc_cal;
117 AH5416(ah)->ah_cal.adcDcCalInitData.calData = &ar9280_adc_init_dc_cal;
118 AH5416(ah)->ah_cal.suppCals = ADC_GAIN_CAL | ADC_DC_CAL | IQ_MISMATCH_CAL;
120 AH5416(ah)->ah_spurMitigate = ar9280SpurMitigate;
121 AH5416(ah)->ah_writeIni = ar9285WriteIni;
122 AH5416(ah)->ah_rx_chainmask = AR9285_DEFAULT_RXCHAINMASK;
123 AH5416(ah)->ah_tx_chainmask = AR9285_DEFAULT_TXCHAINMASK;
127 if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) {
129 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't reset chip\n",
135 if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) {
136 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n",
142 val = OS_REG_READ(ah, AR_SREV);
143 HALDEBUG(ah, HAL_DEBUG_ATTACH,
148 AH_PRIVATE(ah)->ah_macVersion =
150 AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);
151 AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;
154 if (AR_SREV_KITE_12_OR_LATER(ah)) {
157 HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes,
162 HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes,
165 ar5416AttachPCIE(ah);
167 ecode = ath_hal_v4kEepromAttach(ah);
171 if (!ar5416ChipReset(ah, AH_NULL)) { /* reset chip */
172 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n",
178 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
180 if (!ar5212ChipTest(ah)) {
181 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
191 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
194 AH_PRIVATE(ah)->ah_analog5GhzRev = ar5416GetRadioRev(ah);
195 switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) {
200 if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) {
201 AH_PRIVATE(ah)->ah_analog5GhzRev =
206 HALDEBUG(ah, HAL_DEBUG_ANY,
209 AH_PRIVATE(ah)->ah_analog5GhzRev);
214 rfStatus = ar9285RfAttach(ah, &ecode);
216 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n",
224 switch (ath_hal_eepromGet(ah, AR_EEP_TXGAIN_TYPE, AH_NULL)) {
241 if (!ar9285FillCapabilityInfo(ah)) {
246 ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
248 HALDEBUG(ah, HAL_DEBUG_ANY,
254 AH_PRIVATE(ah)->ah_currentRD =
255 ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, AH_NULL);
264 OS_REG_WRITE(ah, AR_MISC_MODE, ahp->ah_miscMode);
266 ar9285AniSetup(ah); /* Anti Noise Immunity */
267 ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist);
269 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
271 return ah;
273 if (ah != AH_NULL)
274 ah->ah_detach(ah);
281 ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
283 if (AH_PRIVATE(ah)->ah_ispcie && !restore) {
284 ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0);
286 OS_REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);
287 OS_REG_WRITE(ah, AR_WA, AR9285_WA_DEFAULT);
292 ar9285WriteIni(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan)
307 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
308 OS_REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_INTERNAL_ADDAC);
309 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_modes,
311 if (AR_SREV_KITE_12_OR_LATER(ah)) {
312 regWrites = ath_hal_ini_write(ah, &AH9285(ah)->ah_ini_txgain,
315 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_common,
318 OS_REG_SET_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
320 if (AR_SREV_MERLIN_10_OR_LATER(ah)) {
322 val = OS_REG_READ(ah, AR_PCU_MISC_MODE2) &
324 OS_REG_WRITE(ah, AR_PCU_MISC_MODE2, val);
325 OS_REG_WRITE(ah, 0x9800 + (651 << 2), 0x11);
336 ar9285FillCapabilityInfo(struct ath_hal *ah)
338 HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps;
340 if (!ar5416FillCapabilityInfo(ah))
368 ar9285SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings)
372 struct ath_hal_5416 *ahp = AH5416(ah);
383 if (AH_PRIVATE(ah)->ah_caps.halTxChainMask > ANTENNA1_CHAINMASK)
Indexes created Wed Oct 22 13:09:56 GMT 2025