Home | History | Annotate | Download | only in hppa

Lines Matching defs:arg0

295 arg0: .equ	r26	; argument
338 add,>= r0,arg0,ret1
412 remI300: add,>= arg0,r0,r0
483 add arg0,arg0,retreg ; shift msb bit into carry
559 copy arg0,retreg
561 extru arg0,30,31,retreg
565 extru arg0,29,30,retreg
573 extru arg0,28,29,retreg
594 sub arg0,arg1,r0
602 ; x2 .EQU arg0 ; r26
617 COMCLR,>= arg0,0,0
618 ADDI 1,arg0,arg0
620 EXTRS arg0,30,31,ret1
624 COMCLR,>= arg0,0,0
625 ADDI 3,arg0,arg0
627 EXTRS arg0,29,30,ret1
631 COMCLR,>= arg0,0,0
632 ADDI 7,arg0,arg0
634 EXTRS arg0,28,29,ret1
638 COMCLR,>= arg0,0,0
639 ADDI 15,arg0,arg0
641 EXTRS arg0,27,28,ret1
645 COMB,<,N arg0,0,$neg3
647 ADDI 1,arg0,arg0
648 EXTRU arg0,1,2,ret1
649 SH2ADD arg0,arg0,arg0
654 SUBI 1,arg0,arg0
655 EXTRU arg0,1,2,ret1
656 SH2ADD arg0,arg0,arg0
662 ADDI 1,arg0,arg0
664 SHD ret1,arg0,30,t1
665 SH2ADD arg0,arg0,arg0
671 COMB,<,N arg0,0,$neg5
672 ADDI 3,arg0,t1
673 SH1ADD arg0,t1,arg0
678 SUB 0,arg0,arg0
679 ADDI 1,arg0,arg0
680 SHD 0,arg0,31,ret1
681 SH1ADD arg0,arg0,arg0
687 ADDI 1,arg0,arg0
689 SHD ret1,arg0,31,t1
690 SH1ADD arg0,arg0,arg0
696 COMB,<,N arg0,0,$neg6
697 EXTRU arg0,30,31,arg0
698 ADDI 5,arg0,t1
699 SH2ADD arg0,t1,arg0
704 SUBI 2,arg0,arg0
705 EXTRU arg0,30,31,arg0
706 SHD 0,arg0,30,ret1
707 SH2ADD arg0,arg0,arg0
713 EXTRU arg0,30,31,arg0
714 ADDI 1,arg0,arg0
715 SHD 0,arg0,30,ret1
716 SH2ADD arg0,arg0,arg0
722 EXTRU arg0,30,31,arg0
723 ADDI 3,arg0,t1
724 SH1ADD arg0,t1,arg0
727 SHD ret1,arg0,28,t1
728 SHD arg0,0,28,t2
729 ADD arg0,t2,arg0
732 SHD ret1,arg0,24,t1
733 SHD arg0,0,24,t2
734 ADD arg0,t2,arg0
737 SHD ret1,arg0,16,t1
738 SHD arg0,0,16,t2
739 ADD arg0,t2,arg0
745 COMB,< arg0,0,$neg10
747 EXTRU arg0,30,31,arg0
748 ADDIB,TR 1,arg0,$pos
749 SH1ADD arg0,arg0,arg0
752 SUBI 2,arg0,arg0
753 EXTRU arg0,30,31,arg0
754 SH1ADD arg0,arg0,arg0
756 SHD ret1,arg0,28,t1
757 SHD arg0,0,28,t2
758 ADD arg0,t2,arg0
761 SHD ret1,arg0,24,t1
762 SHD arg0,0,24,t2
763 ADD arg0,t2,arg0
766 SHD ret1,arg0,16,t1
767 SHD arg0,0,16,t2
768 ADD arg0,t2,arg0
775 COMB,< arg0,0,$neg12
777 EXTRU arg0,29,30,arg0
778 ADDIB,TR 1,arg0,$pos
779 SH2ADD arg0,arg0,arg0
782 SUBI 4,arg0,arg0
783 EXTRU arg0,29,30,arg0
785 SH2ADD arg0,arg0,arg0
789 EXTRU arg0,29,30,arg0
790 ADDI 5,arg0,t1
791 SH2ADD arg0,t1,arg0
797 COMB,< arg0,0,$neg15
799 ADDIB,TR 1,arg0,$pos+4
800 SHD ret1,arg0,28,t1
804 SUBI 1,arg0,arg0
808 ADDI 1,arg0,arg0
814 COMB,<,N arg0,0,$neg17
815 ADDI 1,arg0,arg0
816 SHD 0,arg0,28,t1
817 SHD arg0,0,28,t2
818 SUB t2,arg0,arg0
823 SUBI 1,arg0,arg0
824 SHD 0,arg0,28,t1
825 SHD arg0,0,28,t2
826 SUB t2,arg0,arg0
832 ADDI 1,arg0,arg0
834 SHD ret1,arg0,28,t1
836 SHD arg0,0,28,t2
837 SUB t2,arg0,arg0
843 COMB,<,N arg0,0,$neg7
845 ADDI 1,arg0,arg0
846 SHD 0,arg0,29,ret1
847 SH3ADD arg0,arg0,arg0
850 SHD ret1,arg0,26,t1
851 SHD arg0,0,26,t2
852 ADD arg0,t2,arg0
855 SHD ret1,arg0,20,t1
856 SHD arg0,0,20,t2
857 ADD arg0,t2,arg0
861 SHD,= t1,arg0,24,t1
864 EXTRU arg0,31,24,arg0
869 ADDB,TR t1,arg0,$1
870 EXTRU,= arg0,7,8,t1
873 SUBI 1,arg0,arg0
875 SHD 0,arg0,29,ret1
876 SH3ADD arg0,arg0,arg0
880 SHD ret1,arg0,26,t1
881 SHD arg0,0,26,t2
882 ADD arg0,t2,arg0
885 SHD ret1,arg0,20,t1
886 SHD arg0,0,20,t2
887 ADD arg0,t2,arg0
891 SHD,= t1,arg0,24,t1
894 EXTRU arg0,31,24,arg0
900 ADDB,TR t1,arg0,$3
901 EXTRU,= arg0,7,8,t1
905 ADDI 1,arg0,arg0
907 SHD ret1,arg0,29,t1
908 SH3ADD arg0,arg0,arg0
914 COMB,<,N arg0,0,$neg9
915 ADDI 1,arg0,arg0
916 SHD 0,arg0,29,t1
917 SHD arg0,0,29,t2
918 SUB t2,arg0,arg0
923 SUBI 1,arg0,arg0
924 SHD 0,arg0,29,t1
925 SHD arg0,0,29,t2
926 SUB t2,arg0,arg0
932 ADDI 1,arg0,arg0
934 SHD ret1,arg0,29,t1
935 SHD arg0,0,29,t2
936 SUB t2,arg0,arg0
942 COMB,<,N arg0,0,$neg14
946 EXTRU arg0,30,31,arg0
949 SUBI 2,arg0,arg0
951 EXTRU arg0,30,31,arg0
967 add arg0,arg0,temp ; shift msb bit into carry
1040 sub,>>= arg0,arg1,rmndr
1041 copy arg0,rmndr
1695 add,>= 0,arg0,retreg ; move dividend, if retreg < 0,
1767 xor,>= arg0,arg1,0 ; get correct sign of quotient
1779 copy arg0,retreg
1799 add,>= 0,arg0,retreg
1803 add,>= 0,arg0,retreg
1810 sub 0,arg0,retreg ; result is negation of dividend
1812 addo arg0,arg1,r0 ; trap iff dividend==0x80000000 && divisor==-1