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Lines Matching defs:vestige

277 			struct vestigial_inpcb vestige;
281 sin6->sin6_port, wild, &vestige);
285 && vestige.valid
286 && !(reuseport && vestige.reuse_port))
295 struct vestigial_inpcb vestige;
298 sin6->sin6_port, wild, &vestige);
302 && vestige.valid
303 && !(reuseport && vestige.reuse_port))
398 struct vestigial_inpcb vestige;
510 inp->inp_lport, 0, &vestige)
511 || vestige.valid)
913 if (vp && table->vestige && table->vestige->init_ports6) {
918 state = (*table->vestige->init_ports6)(laddr6,
921 while (table->vestige
922 && (*table->vestige->next_port6)(state, vp)) {
1079 if (vp && table->vestige) {
1080 if ((*table->vestige->lookup6)(faddr6, fport_arg,