Lines Matching defs:AddrSurfInfoOut
294 ADDR_COMPUTE_SURFACE_INFO_OUTPUT *AddrSurfInfoOut,
341 AddrSurfInfoOut);
347 surf_level->offset = align64(surf->surf_size, AddrSurfInfoOut->baseAlign);
348 surf_level->slice_size_dw = AddrSurfInfoOut->sliceSize / 4;
349 surf_level->nblk_x = AddrSurfInfoOut->pitch;
350 surf_level->nblk_y = AddrSurfInfoOut->height;
352 switch (AddrSurfInfoOut->tileMode) {
367 surf->u.legacy.stencil_tiling_index[level] = AddrSurfInfoOut->tileIndex;
369 surf->u.legacy.tiling_index[level] = AddrSurfInfoOut->tileIndex;
371 surf->surf_size = surf_level->offset + AddrSurfInfoOut->surfSize;
382 AddrDccIn->colorSurfSize = AddrSurfInfoOut->surfSize;
383 AddrDccIn->tileMode = AddrSurfInfoOut->tileMode;
384 AddrDccIn->tileInfo = *AddrSurfInfoOut->pTileInfo;
385 AddrDccIn->tileIndex = AddrSurfInfoOut->tileIndex;
386 AddrDccIn->macroModeIndex = AddrSurfInfoOut->macroModeIndex;
423 AddrHtileIn->pitch = AddrSurfInfoOut->pitch;
424 AddrHtileIn->height = AddrSurfInfoOut->height;
425 AddrHtileIn->numSlices = AddrSurfInfoOut->depth;
428 AddrHtileIn->pTileInfo = AddrSurfInfoOut->pTileInfo;
429 AddrHtileIn->tileIndex = AddrSurfInfoOut->tileIndex;
430 AddrHtileIn->macroModeIndex = AddrSurfInfoOut->macroModeIndex;
634 ADDR_COMPUTE_SURFACE_INFO_OUTPUT AddrSurfInfoOut = {0};
644 AddrSurfInfoOut.size = sizeof(ADDR_COMPUTE_SURFACE_INFO_OUTPUT);
649 AddrSurfInfoOut.pTileInfo = &AddrTileInfoOut;
826 AddrSurfInfoOut.macroModeIndex = cik_get_macro_tile_index(surf);
846 &AddrSurfInfoIn, &AddrSurfInfoOut,
857 assert(AddrSurfInfoOut.tcCompatible ||
862 if (!AddrSurfInfoOut.tcCompatible) {
868 AddrSurfInfoIn.tileIndex = AddrSurfInfoOut.tileIndex;
869 stencil_tile_idx = AddrSurfInfoOut.stencilTileIdx;
875 &AddrSurfInfoOut, surf);
893 &AddrSurfInfoIn, &AddrSurfInfoOut,
912 &AddrSurfInfoOut, surf);
918 if (AddrSurfInfoOut.tileMode >= ADDR_TM_2D_TILED_THIN1) {
920 AddrSurfInfoOut.pTileInfo->tileSplitBytes;
935 fin.tileMode = AddrSurfInfoOut.tileMode;
936 fin.pitch = AddrSurfInfoOut.pitch;