Lines Matching defs:csio
509 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* csio,
512 surf->surf_alignment = csio->baseAlign;
513 surf->u.legacy.pipe_config = csio->pTileInfo->pipeConfig - 1;
517 if (csio->tileMode >= ADDR_TM_2D_TILED_THIN1) {
518 surf->u.legacy.bankw = csio->pTileInfo->bankWidth;
519 surf->u.legacy.bankh = csio->pTileInfo->bankHeight;
520 surf->u.legacy.mtilea = csio->pTileInfo->macroAspectRatio;
521 surf->u.legacy.tile_split = csio->pTileInfo->tileSplitBytes;
522 surf->u.legacy.num_banks = csio->pTileInfo->banks;
523 surf->u.legacy.macro_tile_index = csio->macroModeIndex;
542 AddrBaseSwizzleIn.tileIndex = csio->tileIndex;
543 AddrBaseSwizzleIn.macroModeIndex = csio->macroModeIndex;
544 AddrBaseSwizzleIn.pTileInfo = csio->pTileInfo;
545 AddrBaseSwizzleIn.tileMode = csio->tileMode;