Cross Reference: /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/radv

Lines Matching defs:gfx9
360 			va += plane->surface.u.gfx9.stencil_offset;
362 			va += plane->surface.u.gfx9.surf_offset;
397 			state[3] |= S_008F1C_SW_MODE(plane->surface.u.gfx9.stencil.swizzle_mode);
398 			state[4] |= S_008F20_PITCH_GFX9(plane->surface.u.gfx9.stencil.epitch);
400 			state[3] |= S_008F1C_SW_MODE(plane->surface.u.gfx9.surf.swizzle_mode);
401 			state[4] |= S_008F20_PITCH_GFX9(plane->surface.u.gfx9.surf.epitch);
411 				meta = plane->surface.u.gfx9.dcc;
413 				meta = plane->surface.u.gfx9.htile;
432 			     unsigned nr_layers, unsigned nr_samples, bool is_storage_image, bool gfx9)
438 	if (gfx9 && image_type == VK_IMAGE_TYPE_1D)
668 			fmask_state[3] |= S_008F1C_SW_MODE(image->planes[0].surface.u.gfx9.fmask.swizzle_mode);
670 					  S_008F20_PITCH_GFX9(image->planes[0].surface.u.gfx9.fmask.epitch);
671 			fmask_state[5] |= S_008F24_META_PIPE_ALIGNED(image->planes[0].surface.u.gfx9.cmask.pipe_aligned) |
672 					  S_008F24_META_RB_ALIGNED(image->planes[0].surface.u.gfx9.cmask.rb_aligned);
746 		metadata->u.gfx9.swizzle_mode = surface->u.gfx9.surf.swizzle_mode;
1298 			 iview->extent.width = CLAMP(lvl_width, iview->extent.width, iview->image->planes[0].surface.u.gfx9.surf_pitch);
1299 			 iview->extent.height = CLAMP(lvl_height, iview->extent.height, iview->image->planes[0].surface.u.gfx9.surf_height);
1436 		pLayout->offset = plane->offset + surface->u.gfx9.offset[level] + surface->u.gfx9.surf_slice_size * layer;
1437 		pLayout->rowPitch = surface->u.gfx9.surf_pitch * surface->bpe;
1438 		pLayout->arrayPitch = surface->u.gfx9.surf_slice_size;
1439 		pLayout->depthPitch = surface->u.gfx9.surf_slice_size;
1440 		pLayout->size = surface->u.gfx9.surf_slice_size;