Lines Matching refs:qpu

30         switch (inst->qpu.type) {
34 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP)
35 return v3d_qpu_add_op_num_src(inst->qpu.alu.add.op);
37 return v3d_qpu_mul_op_num_src(inst->qpu.alu.mul.op);
50 switch (inst->qpu.type) {
54 switch (inst->qpu.alu.add.op) {
68 switch (inst->qpu.alu.mul.op) {
76 if (inst->qpu.sig.ldtmu ||
77 inst->qpu.sig.ldvary ||
78 inst->qpu.sig.wrtmuc ||
79 inst->qpu.sig.thrsw) {
89 if (inst->qpu.type != V3D_QPU_INSTR_TYPE_ALU ||
90 (inst->qpu.alu.mul.op != V3D_QPU_M_FMOV &&
91 inst->qpu.alu.mul.op != V3D_QPU_M_MOV)) {
95 if (inst->qpu.alu.add.output_pack != V3D_QPU_PACK_NONE ||
96 inst->qpu.alu.mul.output_pack != V3D_QPU_PACK_NONE) {
100 if (inst->qpu.alu.add.a_unpack != V3D_QPU_UNPACK_NONE ||
101 inst->qpu.alu.add.b_unpack != V3D_QPU_UNPACK_NONE ||
102 inst->qpu.alu.mul.a_unpack != V3D_QPU_UNPACK_NONE ||
103 inst->qpu.alu.mul.b_unpack != V3D_QPU_UNPACK_NONE) {
107 if (inst->qpu.flags.ac != V3D_QPU_COND_NONE ||
108 inst->qpu.flags.mc != V3D_QPU_COND_NONE)
117 return (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU &&
118 inst->qpu.alu.add.op != V3D_QPU_A_NOP);
124 return (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU &&
125 inst->qpu.alu.mul.op != V3D_QPU_M_NOP);
134 if (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU &&
135 inst->qpu.alu.add.op == V3D_QPU_A_TMUWT) {
154 if (devinfo->ver < 41 && (inst->qpu.sig.ldvary ||
155 inst->qpu.sig.ldtlb ||
156 inst->qpu.sig.ldtlbu ||
157 inst->qpu.sig.ldvpm)) {
182 if (devinfo->ver < 41 && inst->qpu.sig.ldtmu)
196 inst->qpu.alu.add.a_unpack = unpack;
198 inst->qpu.alu.add.b_unpack = unpack;
202 inst->qpu.alu.mul.a_unpack = unpack;
204 inst->qpu.alu.mul.b_unpack = unpack;
212 inst->qpu.flags.ac = cond;
215 inst->qpu.flags.mc = cond;
223 inst->qpu.flags.apf = pf;
226 inst->qpu.flags.mpf = pf;
234 inst->qpu.flags.auf = uf;
237 inst->qpu.flags.muf = uf;
322 inst->qpu = v3d_qpu_nop();
323 inst->qpu.alu.add.op = op;
338 inst->qpu = v3d_qpu_nop();
339 inst->qpu.alu.mul.op = op;
354 inst->qpu = v3d_qpu_nop();
355 inst->qpu.type = V3D_QPU_INSTR_TYPE_BRANCH;
356 inst->qpu.branch.cond = cond;
357 inst->qpu.branch.msfign = V3D_QPU_MSFIGN_NONE;
358 inst->qpu.branch.bdi = V3D_QPU_BRANCH_DEST_REL;
359 inst->qpu.branch.ub = true;
360 inst->qpu.branch.bdu = V3D_QPU_BRANCH_DEST_REL;
393 if (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU) {
394 assert(inst->qpu.alu.add.op == V3D_QPU_A_NOP ||
395 v3d_qpu_add_op_has_dst(inst->qpu.alu.add.op));
396 assert(inst->qpu.alu.mul.op == V3D_QPU_M_NOP ||
397 v3d_qpu_mul_op_has_dst(inst->qpu.alu.mul.op));
1051 inst->qpu.sig.ldunif = true;