Lines Matching refs:mul
636 if (inst->alu.mul.magic_write &&
637 v3d_qpu_magic_waddr_is_tlb(inst->alu.mul.waddr)) {
666 if (inst->alu.mul.magic_write &&
667 v3d_qpu_magic_waddr_is_sfu(inst->alu.mul.waddr)) {
681 (inst->alu.mul.magic_write &&
682 v3d_qpu_magic_waddr_is_tmu(inst->alu.mul.waddr))));
711 if (inst->alu.mul.magic_write &&
712 v3d_qpu_magic_waddr_is_vpm(inst->alu.mul.waddr)) {
736 if (inst->alu.mul.magic_write &&
737 inst->alu.mul.waddr == V3D_QPU_WADDR_R3) {
761 if (inst->alu.mul.magic_write &&
762 (inst->alu.mul.waddr == V3D_QPU_WADDR_R4 ||
763 v3d_qpu_magic_waddr_is_sfu(inst->alu.mul.waddr))) {
788 if (inst->alu.mul.magic_write &&
789 inst->alu.mul.waddr == V3D_QPU_WADDR_R5) {
806 int mul_nsrc = v3d_qpu_mul_op_num_src(inst->alu.mul.op);
810 (mul_nsrc > 0 && inst->alu.mul.a == mux) ||
811 (mul_nsrc > 1 && inst->alu.mul.b == mux));
900 switch (inst->alu.mul.op) {
926 switch (inst->alu.mul.op) {