Cross Reference: /xsrc/external/mit/MesaLib.old/dist/src/intel/isl/isl.c

Lines Matching refs:tile_info
214                     struct isl_tile_info *tile_info)
227       isl_tiling_get_info(tiling, format_bpb / 3, tile_info);
317    *tile_info = (struct isl_tile_info) {
861       const struct isl_tile_info *tile_info,
943        tile_info->tiling != ISL_TILING_LINEAR) {
949       pitch_el_rows = isl_align(pitch_el_rows, tile_info->logical_extent_el.height);
1032       const struct isl_tile_info *tile_info,
1047       isl_calc_array_pitch_el_rows_gen4_2d(dev, info, tile_info,
1130       const struct isl_tile_info *tile_info,
1139       .w = tile_info->logical_extent_el.w * fmtl->bw,
1140       .h = tile_info->logical_extent_el.h * fmtl->bh,
1227                               const struct isl_tile_info *tile_info,
1245       isl_calc_phys_total_extent_el_gen4_2d(dev, info, tile_info, msaa_layout,
1253       isl_calc_phys_total_extent_el_gen6_stencil_hiz(dev, info, tile_info,
1271                              const struct isl_tile_info *tile_info)
1273    if (tile_info->tiling != ISL_TILING_LINEAR)
1274       return tile_info->phys_extent_B.width;
1319                              const struct isl_tile_info *tile_info,
1325    assert(fmtl->bpb % tile_info->format_bpb == 0);
1327    const uint32_t tile_el_scale = fmtl->bpb / tile_info->format_bpb;
1330                     tile_info->logical_extent_el.width);
1332    assert(alignment_B == tile_info->phys_extent_B.width);
1333    return total_w_tl * tile_info->phys_extent_B.width;
1339                        const struct isl_tile_info *tile_info,
1343    if (tile_info->tiling == ISL_TILING_LINEAR) {
1347       return isl_calc_tiled_min_row_pitch(dev, surf_info, tile_info,
1371                    const struct isl_tile_info *tile_info,
1377       isl_calc_row_pitch_alignment(surf_info, tile_info);
1380       isl_calc_min_row_pitch(dev, surf_info, tile_info, phys_total_el,
1395    const uint32_t row_pitch_tl = row_pitch_B / tile_info->phys_extent_B.width;
1455    struct isl_tile_info tile_info;
1456    isl_tiling_get_info(tiling, fmtl->bpb, &tile_info);
1481    isl_calc_phys_total_extent_el(dev, info, &tile_info,
1488    if (!isl_calc_row_pitch(dev, info, &tile_info, dim_layout,
1525          isl_align_div(phys_total_el.h, tile_info.logical_extent_el.height);
1527       size_B = (uint64_t) total_h_tl * tile_info.phys_extent_B.height * row_pitch_B;
1529       const uint32_t tile_size_B = tile_info.phys_extent_B.width *
1530                                    tile_info.phys_extent_B.height;
1589                        struct isl_tile_info *tile_info)
1592    isl_tiling_get_info(surf->tiling, fmtl->bpb, tile_info);
2042    struct isl_tile_info tile_info;
2043    isl_tiling_get_info(surf->tiling, fmtl->bpb, &tile_info);
2045       .w = tile_info.logical_extent_el.w * fmtl->bw,
2046       .h = tile_info.logical_extent_el.h * fmtl->bh,
2290    struct isl_tile_info tile_info;
2291    isl_tiling_get_info(tiling, bpb, &tile_info);
2293    assert(row_pitch_B % tile_info.phys_extent_B.width == 0);
2300     * integer number of tile_info.format_bpb size elements.  To scale the
2304    const uint32_t tile_el_scale = bpb / tile_info.format_bpb;
2305    tile_info.phys_extent_B.width *= tile_el_scale;
2308    *x_offset_el = total_x_offset_el % tile_info.logical_extent_el.w;
2309    *y_offset_el = total_y_offset_el % tile_info.logical_extent_el.h;
2312    uint32_t x_offset_tl = total_x_offset_el / tile_info.logical_extent_el.w;
2313    uint32_t y_offset_tl = total_y_offset_el / tile_info.logical_extent_el.h;
2316       y_offset_tl * tile_info.phys_extent_B.h * row_pitch_B +
2317       x_offset_tl * tile_info.phys_extent_B.h * tile_info.phys_extent_B.w;