Lines Matching refs:devinfo

58 _3DPRIMITIVE_length(const struct gen_device_info *devinfo)
60    switch (devinfo->gen) {
66       if (devinfo->is_haswell) {
74       if (devinfo->is_g4x) {
101 _3DPRIMITIVE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
103    switch (devinfo->gen) {
109       if (devinfo->is_haswell) {
117       if (devinfo->is_g4x) {
141 _3DPRIMITIVE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
143    switch (devinfo->gen) {
149       if (devinfo->is_haswell) {
157       if (devinfo->is_g4x) {
184 _3DPRIMITIVE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
186    switch (devinfo->gen) {
192       if (devinfo->is_haswell) {
200       if (devinfo->is_g4x) {
224 _3DPRIMITIVE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
226    switch (devinfo->gen) {
232       if (devinfo->is_haswell) {
240       if (devinfo->is_g4x) {
267 _3DPRIMITIVE_BaseVertexLocation_bits(const struct gen_device_info *devinfo)
269    switch (devinfo->gen) {
275       if (devinfo->is_haswell) {
283       if (devinfo->is_g4x) {
307 _3DPRIMITIVE_BaseVertexLocation_start(const struct gen_device_info *devinfo)
309    switch (devinfo->gen) {
315       if (devinfo->is_haswell) {
323       if (devinfo->is_g4x) {
350 _3DPRIMITIVE_CommandSubType_bits(const struct gen_device_info *devinfo)
352    switch (devinfo->gen) {
358       if (devinfo->is_haswell) {
366       if (devinfo->is_g4x) {
390 _3DPRIMITIVE_CommandSubType_start(const struct gen_device_info *devinfo)
392    switch (devinfo->gen) {
398       if (devinfo->is_haswell) {
406       if (devinfo->is_g4x) {
433 _3DPRIMITIVE_CommandType_bits(const struct gen_device_info *devinfo)
435    switch (devinfo->gen) {
441       if (devinfo->is_haswell) {
449       if (devinfo->is_g4x) {
473 _3DPRIMITIVE_CommandType_start(const struct gen_device_info *devinfo)
475    switch (devinfo->gen) {
481       if (devinfo->is_haswell) {
489       if (devinfo->is_g4x) {
516 _3DPRIMITIVE_DWordLength_bits(const struct gen_device_info *devinfo)
518    switch (devinfo->gen) {
524       if (devinfo->is_haswell) {
532       if (devinfo->is_g4x) {
556 _3DPRIMITIVE_DWordLength_start(const struct gen_device_info *devinfo)
558    switch (devinfo->gen) {
564       if (devinfo->is_haswell) {
572       if (devinfo->is_g4x) {
595 _3DPRIMITIVE_EndOffsetEnable_bits(const struct gen_device_info *devinfo)
597    switch (devinfo->gen) {
603       if (devinfo->is_haswell) {
611       if (devinfo->is_g4x) {
631 _3DPRIMITIVE_EndOffsetEnable_start(const struct gen_device_info *devinfo)
633    switch (devinfo->gen) {
639       if (devinfo->is_haswell) {
647       if (devinfo->is_g4x) {
666 _3DPRIMITIVE_ExtendedParameter0_bits(const struct gen_device_info *devinfo)
668    switch (devinfo->gen) {
674       if (devinfo->is_haswell) {
682       if (devinfo->is_g4x) {
698 _3DPRIMITIVE_ExtendedParameter0_start(const struct gen_device_info *devinfo)
700    switch (devinfo->gen) {
706       if (devinfo->is_haswell) {
714       if (devinfo->is_g4x) {
733 _3DPRIMITIVE_ExtendedParameter1_bits(const struct gen_device_info *devinfo)
735    switch (devinfo->gen) {
741       if (devinfo->is_haswell) {
749       if (devinfo->is_g4x) {
765 _3DPRIMITIVE_ExtendedParameter1_start(const struct gen_device_info *devinfo)
767    switch (devinfo->gen) {
773       if (devinfo->is_haswell) {
781       if (devinfo->is_g4x) {
800 _3DPRIMITIVE_ExtendedParameter2_bits(const struct gen_device_info *devinfo)
802    switch (devinfo->gen) {
808       if (devinfo->is_haswell) {
816       if (devinfo->is_g4x) {
832 _3DPRIMITIVE_ExtendedParameter2_start(const struct gen_device_info *devinfo)
834    switch (devinfo->gen) {
840       if (devinfo->is_haswell) {
848       if (devinfo->is_g4x) {
867 _3DPRIMITIVE_ExtendedParametersPresent_bits(const struct gen_device_info *devinfo)
869    switch (devinfo->gen) {
875       if (devinfo->is_haswell) {
883       if (devinfo->is_g4x) {
899 _3DPRIMITIVE_ExtendedParametersPresent_start(const struct gen_device_info *devinfo)
901    switch (devinfo->gen) {
907       if (devinfo->is_haswell) {
915       if (devinfo->is_g4x) {
938 _3DPRIMITIVE_IndirectParameterEnable_bits(const struct gen_device_info *devinfo)
940    switch (devinfo->gen) {
946       if (devinfo->is_haswell) {
954       if (devinfo->is_g4x) {
974 _3DPRIMITIVE_IndirectParameterEnable_start(const struct gen_device_info *devinfo)
976    switch (devinfo->gen) {
982       if (devinfo->is_haswell) {
990       if (devinfo->is_g4x) {
1009 _3DPRIMITIVE_IndirectVertexCount_bits(const struct gen_device_info *devinfo)
1011    switch (devinfo->gen) {
1017       if (devinfo->is_haswell) {
1025       if (devinfo->is_g4x) {
1041 _3DPRIMITIVE_IndirectVertexCount_start(const struct gen_device_info *devinfo)
1043    switch (devinfo->gen) {
1049       if (devinfo->is_haswell) {
1057       if (devinfo->is_g4x) {
1084 _3DPRIMITIVE_InstanceCount_bits(const struct gen_device_info *devinfo)
1086    switch (devinfo->gen) {
1092       if (devinfo->is_haswell) {
1100       if (devinfo->is_g4x) {
1124 _3DPRIMITIVE_InstanceCount_start(const struct gen_device_info *devinfo)
1126    switch (devinfo->gen) {
1132       if (devinfo->is_haswell) {
1140       if (devinfo->is_g4x) {
1158 _3DPRIMITIVE_InternalVertexCount_bits(const struct gen_device_info *devinfo)
1160    switch (devinfo->gen) {
1166       if (devinfo->is_haswell) {
1174       if (devinfo->is_g4x) {
1189 _3DPRIMITIVE_InternalVertexCount_start(const struct gen_device_info *devinfo)
1191    switch (devinfo->gen) {
1197       if (devinfo->is_haswell) {
1205       if (devinfo->is_g4x) {
1228 _3DPRIMITIVE_PredicateEnable_bits(const struct gen_device_info *devinfo)
1230    switch (devinfo->gen) {
1236       if (devinfo->is_haswell) {
1244       if (devinfo->is_g4x) {
1264 _3DPRIMITIVE_PredicateEnable_start(const struct gen_device_info *devinfo)
1266    switch (devinfo->gen) {
1272       if (devinfo->is_haswell) {
1280       if (devinfo->is_g4x) {
1307 _3DPRIMITIVE_PrimitiveTopologyType_bits(const struct gen_device_info *devinfo)
1309    switch (devinfo->gen) {
1315       if (devinfo->is_haswell) {
1323       if (devinfo->is_g4x) {
1347 _3DPRIMITIVE_PrimitiveTopologyType_start(const struct gen_device_info *devinfo)
1349    switch (devinfo->gen) {
1355       if (devinfo->is_haswell) {
1363       if (devinfo->is_g4x) {
1389 _3DPRIMITIVE_StartInstanceLocation_bits(const struct gen_device_info *devinfo)
1391    switch (devinfo->gen) {
1397       if (devinfo->is_haswell) {
1405       if (devinfo->is_g4x) {
1428 _3DPRIMITIVE_StartInstanceLocation_start(const struct gen_device_info *devinfo)
1430    switch (devinfo->gen) {
1436       if (devinfo->is_haswell) {
1444       if (devinfo->is_g4x) {
1471 _3DPRIMITIVE_StartVertexLocation_bits(const struct gen_device_info *devinfo)
1473    switch (devinfo->gen) {
1479       if (devinfo->is_haswell) {
1487       if (devinfo->is_g4x) {
1511 _3DPRIMITIVE_StartVertexLocation_start(const struct gen_device_info *devinfo)
1513    switch (devinfo->gen) {
1519       if (devinfo->is_haswell) {
1527       if (devinfo->is_g4x) {
1549 _3DPRIMITIVE_UAVCoherencyRequired_bits(const struct gen_device_info *devinfo)
1551    switch (devinfo->gen) {
1557       if (devinfo->is_haswell) {
1565       if (devinfo->is_g4x) {
1584 _3DPRIMITIVE_UAVCoherencyRequired_start(const struct gen_device_info *devinfo)
1586    switch (devinfo->gen) {
1592       if (devinfo->is_haswell) {
1600       if (devinfo->is_g4x) {
1627 _3DPRIMITIVE_VertexAccessType_bits(const struct gen_device_info *devinfo)
1629    switch (devinfo->gen) {
1635       if (devinfo->is_haswell) {
1643       if (devinfo->is_g4x) {
1667 _3DPRIMITIVE_VertexAccessType_start(const struct gen_device_info *devinfo)
1669    switch (devinfo->gen) {
1675       if (devinfo->is_haswell) {
1683       if (devinfo->is_g4x) {
1710 _3DPRIMITIVE_VertexCountPerInstance_bits(const struct gen_device_info *devinfo)
1712    switch (devinfo->gen) {
1718       if (devinfo->is_haswell) {
1726       if (devinfo->is_g4x) {
1750 _3DPRIMITIVE_VertexCountPerInstance_start(const struct gen_device_info *devinfo)
1752    switch (devinfo->gen) {
1758       if (devinfo->is_haswell) {
1766       if (devinfo->is_g4x) {
1784 _3DSTATE_3D_MODE_length(const struct gen_device_info *devinfo)
1786    switch (devinfo->gen) {
1792       if (devinfo->is_haswell) {
1800       if (devinfo->is_g4x) {
1818 _3DSTATE_3D_MODE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
1820    switch (devinfo->gen) {
1826       if (devinfo->is_haswell) {
1834       if (devinfo->is_g4x) {
1849 _3DSTATE_3D_MODE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
1851    switch (devinfo->gen) {
1857       if (devinfo->is_haswell) {
1865       if (devinfo->is_g4x) {
1883 _3DSTATE_3D_MODE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
1885    switch (devinfo->gen) {
1891       if (devinfo->is_haswell) {
1899       if (devinfo->is_g4x) {
1914 _3DSTATE_3D_MODE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
1916    switch (devinfo->gen) {
1922       if (devinfo->is_haswell) {
1930       if (devinfo->is_g4x) {
1948 _3DSTATE_3D_MODE_CommandSubType_bits(const struct gen_device_info *devinfo)
1950    switch (devinfo->gen) {
1956       if (devinfo->is_haswell) {
1964       if (devinfo->is_g4x) {
1979 _3DSTATE_3D_MODE_CommandSubType_start(const struct gen_device_info *devinfo)
1981    switch (devinfo->gen) {
1987       if (devinfo->is_haswell) {
1995       if (devinfo->is_g4x) {
2013 _3DSTATE_3D_MODE_CommandType_bits(const struct gen_device_info *devinfo)
2015    switch (devinfo->gen) {
2021       if (devinfo->is_haswell) {
2029       if (devinfo->is_g4x) {
2044 _3DSTATE_3D_MODE_CommandType_start(const struct gen_device_info *devinfo)
2046    switch (devinfo->gen) {
2052       if (devinfo->is_haswell) {
2060       if (devinfo->is_g4x) {
2078 _3DSTATE_3D_MODE_DWordLength_bits(const struct gen_device_info *devinfo)
2080    switch (devinfo->gen) {
2086       if (devinfo->is_haswell) {
2094       if (devinfo->is_g4x) {
2109 _3DSTATE_3D_MODE_DWordLength_start(const struct gen_device_info *devinfo)
2111    switch (devinfo->gen) {
2117       if (devinfo->is_haswell) {
2125       if (devinfo->is_g4x) {
2143 _3DSTATE_3D_MODE_MaskBits_bits(const struct gen_device_info *devinfo)
2145    switch (devinfo->gen) {
2151       if (devinfo->is_haswell) {
2159       if (devinfo->is_g4x) {
2174 _3DSTATE_3D_MODE_MaskBits_start(const struct gen_device_info *devinfo)
2176    switch (devinfo->gen) {
2182       if (devinfo->is_haswell) {
2190       if (devinfo->is_g4x) {
2216 _3DSTATE_AA_LINE_PARAMETERS_length(const struct gen_device_info *devinfo)
2218    switch (devinfo->gen) {
2224       if (devinfo->is_haswell) {
2232       if (devinfo->is_g4x) {
2258 _3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
2260    switch (devinfo->gen) {
2266       if (devinfo->is_haswell) {
2274       if (devinfo->is_g4x) {
2297 _3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
2299    switch (devinfo->gen) {
2305       if (devinfo->is_haswell) {
2313       if (devinfo->is_g4x) {
2339 _3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
2341    switch (devinfo->gen) {
2347       if (devinfo->is_haswell) {
2355       if (devinfo->is_g4x) {
2378 _3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
2380    switch (devinfo->gen) {
2386       if (devinfo->is_haswell) {
2394       if (devinfo->is_g4x) {
2420 _3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_bits(const struct gen_device_info *devinfo)
2422    switch (devinfo->gen) {
2428       if (devinfo->is_haswell) {
2436       if (devinfo->is_g4x) {
2459 _3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_start(const struct gen_device_info *devinfo)
2461    switch (devinfo->gen) {
2467       if (devinfo->is_haswell) {
2475       if (devinfo->is_g4x) {
2501 _3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_bits(const struct gen_device_info *devinfo)
2503    switch (devinfo->gen) {
2509       if (devinfo->is_haswell) {
2517       if (devinfo->is_g4x) {
2540 _3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_start(const struct gen_device_info *devinfo)
2542    switch (devinfo->gen) {
2548       if (devinfo->is_haswell) {
2556       if (devinfo->is_g4x) {
2582 _3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_bits(const struct gen_device_info *devinfo)
2584    switch (devinfo->gen) {
2590       if (devinfo->is_haswell) {
2598       if (devinfo->is_g4x) {
2621 _3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_start(const struct gen_device_info *devinfo)
2623    switch (devinfo->gen) {
2629       if (devinfo->is_haswell) {
2637       if (devinfo->is_g4x) {
2663 _3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_bits(const struct gen_device_info *devinfo)
2665    switch (devinfo->gen) {
2671       if (devinfo->is_haswell) {
2679       if (devinfo->is_g4x) {
2702 _3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_start(const struct gen_device_info *devinfo)
2704    switch (devinfo->gen) {
2710       if (devinfo->is_haswell) {
2718       if (devinfo->is_g4x) {
2739 _3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageBias_bits(const struct gen_device_info *devinfo)
2741    switch (devinfo->gen) {
2747       if (devinfo->is_haswell) {
2755       if (devinfo->is_g4x) {
2773 _3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageBias_start(const struct gen_device_info *devinfo)
2775    switch (devinfo->gen) {
2781       if (devinfo->is_haswell) {
2789       if (devinfo->is_g4x) {
2810 _3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapBias_bits(const struct gen_device_info *devinfo)
2812    switch (devinfo->gen) {
2818       if (devinfo->is_haswell) {
2826       if (devinfo->is_g4x) {
2844 _3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapBias_start(const struct gen_device_info *devinfo)
2846    switch (devinfo->gen) {
2852       if (devinfo->is_haswell) {
2860       if (devinfo->is_g4x) {
2881 _3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapSlope_bits(const struct gen_device_info *devinfo)
2883    switch (devinfo->gen) {
2889       if (devinfo->is_haswell) {
2897       if (devinfo->is_g4x) {
2915 _3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapSlope_start(const struct gen_device_info *devinfo)
2917    switch (devinfo->gen) {
2923       if (devinfo->is_haswell) {
2931       if (devinfo->is_g4x) {
2952 _3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageSlope_bits(const struct gen_device_info *devinfo)
2954    switch (devinfo->gen) {
2960       if (devinfo->is_haswell) {
2968       if (devinfo->is_g4x) {
2986 _3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageSlope_start(const struct gen_device_info *devinfo)
2988    switch (devinfo->gen) {
2994       if (devinfo->is_haswell) {
3002       if (devinfo->is_g4x) {
3028 _3DSTATE_AA_LINE_PARAMETERS_CommandSubType_bits(const struct gen_device_info *devinfo)
3030    switch (devinfo->gen) {
3036       if (devinfo->is_haswell) {
3044       if (devinfo->is_g4x) {
3067 _3DSTATE_AA_LINE_PARAMETERS_CommandSubType_start(const struct gen_device_info *devinfo)
3069    switch (devinfo->gen) {
3075       if (devinfo->is_haswell) {
3083       if (devinfo->is_g4x) {
3109 _3DSTATE_AA_LINE_PARAMETERS_CommandType_bits(const struct gen_device_info *devinfo)
3111    switch (devinfo->gen) {
3117       if (devinfo->is_haswell) {
3125       if (devinfo->is_g4x) {
3148 _3DSTATE_AA_LINE_PARAMETERS_CommandType_start(const struct gen_device_info *devinfo)
3150    switch (devinfo->gen) {
3156       if (devinfo->is_haswell) {
3164       if (devinfo->is_g4x) {
3190 _3DSTATE_AA_LINE_PARAMETERS_DWordLength_bits(const struct gen_device_info *devinfo)
3192    switch (devinfo->gen) {
3198       if (devinfo->is_haswell) {
3206       if (devinfo->is_g4x) {
3229 _3DSTATE_AA_LINE_PARAMETERS_DWordLength_start(const struct gen_device_info *devinfo)
3231    switch (devinfo->gen) {
3237       if (devinfo->is_haswell) {
3245       if (devinfo->is_g4x) {
3273 _3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
3275    switch (devinfo->gen) {
3281       if (devinfo->is_haswell) {
3289       if (devinfo->is_g4x) {
3308 _3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
3310    switch (devinfo->gen) {
3316       if (devinfo->is_haswell) {
3324       if (devinfo->is_g4x) {
3346 _3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
3348    switch (devinfo->gen) {
3354       if (devinfo->is_haswell) {
3362       if (devinfo->is_g4x) {
3381 _3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
3383    switch (devinfo->gen) {
3389       if (devinfo->is_haswell) {
3397       if (devinfo->is_g4x) {
3419 _3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableBlockClear_bits(const struct gen_device_info *devinfo)
3421    switch (devinfo->gen) {
3427       if (devinfo->is_haswell) {
3435       if (devinfo->is_g4x) {
3454 _3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableBlockClear_start(const struct gen_device_info *devinfo)
3456    switch (devinfo->gen) {
3462       if (devinfo->is_haswell) {
3470       if (devinfo->is_g4x) {
3492 _3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableEditTarget_bits(const struct gen_device_info *devinfo)
3494    switch (devinfo->gen) {
3500       if (devinfo->is_haswell) {
3508       if (devinfo->is_g4x) {
3527 _3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableEditTarget_start(const struct gen_device_info *devinfo)
3529    switch (devinfo->gen) {
3535       if (devinfo->is_haswell) {
3543       if (devinfo->is_g4x) {
3565 _3DSTATE_BINDING_TABLE_EDIT_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
3567    switch (devinfo->gen) {
3573       if (devinfo->is_haswell) {
3581       if (devinfo->is_g4x) {
3600 _3DSTATE_BINDING_TABLE_EDIT_DS_CommandSubType_start(const struct gen_device_info *devinfo)
3602    switch (devinfo->gen) {
3608       if (devinfo->is_haswell) {
3616       if (devinfo->is_g4x) {
3638 _3DSTATE_BINDING_TABLE_EDIT_DS_CommandType_bits(const struct gen_device_info *devinfo)
3640    switch (devinfo->gen) {
3646       if (devinfo->is_haswell) {
3654       if (devinfo->is_g4x) {
3673 _3DSTATE_BINDING_TABLE_EDIT_DS_CommandType_start(const struct gen_device_info *devinfo)
3675    switch (devinfo->gen) {
3681       if (devinfo->is_haswell) {
3689       if (devinfo->is_g4x) {
3711 _3DSTATE_BINDING_TABLE_EDIT_DS_DWordLength_bits(const struct gen_device_info *devinfo)
3713    switch (devinfo->gen) {
3719       if (devinfo->is_haswell) {
3727       if (devinfo->is_g4x) {
3746 _3DSTATE_BINDING_TABLE_EDIT_DS_DWordLength_start(const struct gen_device_info *devinfo)
3748    switch (devinfo->gen) {
3754       if (devinfo->is_haswell) {
3762       if (devinfo->is_g4x) {
3784 _3DSTATE_BINDING_TABLE_EDIT_DS_Entryn_bits(const struct gen_device_info *devinfo)
3786    switch (devinfo->gen) {
3792       if (devinfo->is_haswell) {
3800       if (devinfo->is_g4x) {
3819 _3DSTATE_BINDING_TABLE_EDIT_DS_Entryn_start(const struct gen_device_info *devinfo)
3821    switch (devinfo->gen) {
3827       if (devinfo->is_haswell) {
3835       if (devinfo->is_g4x) {
3863 _3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
3865    switch (devinfo->gen) {
3871       if (devinfo->is_haswell) {
3879       if (devinfo->is_g4x) {
3898 _3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
3900    switch (devinfo->gen) {
3906       if (devinfo->is_haswell) {
3914       if (devinfo->is_g4x) {
3936 _3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
3938    switch (devinfo->gen) {
3944       if (devinfo->is_haswell) {
3952       if (devinfo->is_g4x) {
3971 _3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
3973    switch (devinfo->gen) {
3979       if (devinfo->is_haswell) {
3987       if (devinfo->is_g4x) {
4009 _3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableBlockClear_bits(const struct gen_device_info *devinfo)
4011    switch (devinfo->gen) {
4017       if (devinfo->is_haswell) {
4025       if (devinfo->is_g4x) {
4044 _3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableBlockClear_start(const struct gen_device_info *devinfo)
4046    switch (devinfo->gen) {
4052       if (devinfo->is_haswell) {
4060       if (devinfo->is_g4x) {
4082 _3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableEditTarget_bits(const struct gen_device_info *devinfo)
4084    switch (devinfo->gen) {
4090       if (devinfo->is_haswell) {
4098       if (devinfo->is_g4x) {
4117 _3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableEditTarget_start(const struct gen_device_info *devinfo)
4119    switch (devinfo->gen) {
4125       if (devinfo->is_haswell) {
4133       if (devinfo->is_g4x) {
4155 _3DSTATE_BINDING_TABLE_EDIT_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
4157    switch (devinfo->gen) {
4163       if (devinfo->is_haswell) {
4171       if (devinfo->is_g4x) {
4190 _3DSTATE_BINDING_TABLE_EDIT_GS_CommandSubType_start(const struct gen_device_info *devinfo)
4192    switch (devinfo->gen) {
4198       if (devinfo->is_haswell) {
4206       if (devinfo->is_g4x) {
4228 _3DSTATE_BINDING_TABLE_EDIT_GS_CommandType_bits(const struct gen_device_info *devinfo)
4230    switch (devinfo->gen) {
4236       if (devinfo->is_haswell) {
4244       if (devinfo->is_g4x) {
4263 _3DSTATE_BINDING_TABLE_EDIT_GS_CommandType_start(const struct gen_device_info *devinfo)
4265    switch (devinfo->gen) {
4271       if (devinfo->is_haswell) {
4279       if (devinfo->is_g4x) {
4301 _3DSTATE_BINDING_TABLE_EDIT_GS_DWordLength_bits(const struct gen_device_info *devinfo)
4303    switch (devinfo->gen) {
4309       if (devinfo->is_haswell) {
4317       if (devinfo->is_g4x) {
4336 _3DSTATE_BINDING_TABLE_EDIT_GS_DWordLength_start(const struct gen_device_info *devinfo)
4338    switch (devinfo->gen) {
4344       if (devinfo->is_haswell) {
4352       if (devinfo->is_g4x) {
4374 _3DSTATE_BINDING_TABLE_EDIT_GS_Entryn_bits(const struct gen_device_info *devinfo)
4376    switch (devinfo->gen) {
4382       if (devinfo->is_haswell) {
4390       if (devinfo->is_g4x) {
4409 _3DSTATE_BINDING_TABLE_EDIT_GS_Entryn_start(const struct gen_device_info *devinfo)
4411    switch (devinfo->gen) {
4417       if (devinfo->is_haswell) {
4425       if (devinfo->is_g4x) {
4453 _3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
4455    switch (devinfo->gen) {
4461       if (devinfo->is_haswell) {
4469       if (devinfo->is_g4x) {
4488 _3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
4490    switch (devinfo->gen) {
4496       if (devinfo->is_haswell) {
4504       if (devinfo->is_g4x) {
4526 _3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
4528    switch (devinfo->gen) {
4534       if (devinfo->is_haswell) {
4542       if (devinfo->is_g4x) {
4561 _3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
4563    switch (devinfo->gen) {
4569       if (devinfo->is_haswell) {
4577       if (devinfo->is_g4x) {
4599 _3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableBlockClear_bits(const struct gen_device_info *devinfo)
4601    switch (devinfo->gen) {
4607       if (devinfo->is_haswell) {
4615       if (devinfo->is_g4x) {
4634 _3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableBlockClear_start(const struct gen_device_info *devinfo)
4636    switch (devinfo->gen) {
4642       if (devinfo->is_haswell) {
4650       if (devinfo->is_g4x) {
4672 _3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableEditTarget_bits(const struct gen_device_info *devinfo)
4674    switch (devinfo->gen) {
4680       if (devinfo->is_haswell) {
4688       if (devinfo->is_g4x) {
4707 _3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableEditTarget_start(const struct gen_device_info *devinfo)
4709    switch (devinfo->gen) {
4715       if (devinfo->is_haswell) {
4723       if (devinfo->is_g4x) {
4745 _3DSTATE_BINDING_TABLE_EDIT_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
4747    switch (devinfo->gen) {
4753       if (devinfo->is_haswell) {
4761       if (devinfo->is_g4x) {
4780 _3DSTATE_BINDING_TABLE_EDIT_HS_CommandSubType_start(const struct gen_device_info *devinfo)
4782    switch (devinfo->gen) {
4788       if (devinfo->is_haswell) {
4796       if (devinfo->is_g4x) {
4818 _3DSTATE_BINDING_TABLE_EDIT_HS_CommandType_bits(const struct gen_device_info *devinfo)
4820    switch (devinfo->gen) {
4826       if (devinfo->is_haswell) {
4834       if (devinfo->is_g4x) {
4853 _3DSTATE_BINDING_TABLE_EDIT_HS_CommandType_start(const struct gen_device_info *devinfo)
4855    switch (devinfo->gen) {
4861       if (devinfo->is_haswell) {
4869       if (devinfo->is_g4x) {
4891 _3DSTATE_BINDING_TABLE_EDIT_HS_DWordLength_bits(const struct gen_device_info *devinfo)
4893    switch (devinfo->gen) {
4899       if (devinfo->is_haswell) {
4907       if (devinfo->is_g4x) {
4926 _3DSTATE_BINDING_TABLE_EDIT_HS_DWordLength_start(const struct gen_device_info *devinfo)
4928    switch (devinfo->gen) {
4934       if (devinfo->is_haswell) {
4942       if (devinfo->is_g4x) {
4964 _3DSTATE_BINDING_TABLE_EDIT_HS_Entryn_bits(const struct gen_device_info *devinfo)
4966    switch (devinfo->gen) {
4972       if (devinfo->is_haswell) {
4980       if (devinfo->is_g4x) {
4999 _3DSTATE_BINDING_TABLE_EDIT_HS_Entryn_start(const struct gen_device_info *devinfo)
5001    switch (devinfo->gen) {
5007       if (devinfo->is_haswell) {
5015       if (devinfo->is_g4x) {
5043 _3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
5045    switch (devinfo->gen) {
5051       if (devinfo->is_haswell) {
5059       if (devinfo->is_g4x) {
5078 _3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
5080    switch (devinfo->gen) {
5086       if (devinfo->is_haswell) {
5094       if (devinfo->is_g4x) {
5116 _3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
5118    switch (devinfo->gen) {
5124       if (devinfo->is_haswell) {
5132       if (devinfo->is_g4x) {
5151 _3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
5153    switch (devinfo->gen) {
5159       if (devinfo->is_haswell) {
5167       if (devinfo->is_g4x) {
5189 _3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableBlockClear_bits(const struct gen_device_info *devinfo)
5191    switch (devinfo->gen) {
5197       if (devinfo->is_haswell) {
5205       if (devinfo->is_g4x) {
5224 _3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableBlockClear_start(const struct gen_device_info *devinfo)
5226    switch (devinfo->gen) {
5232       if (devinfo->is_haswell) {
5240       if (devinfo->is_g4x) {
5262 _3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableEditTarget_bits(const struct gen_device_info *devinfo)
5264    switch (devinfo->gen) {
5270       if (devinfo->is_haswell) {
5278       if (devinfo->is_g4x) {
5297 _3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableEditTarget_start(const struct gen_device_info *devinfo)
5299    switch (devinfo->gen) {
5305       if (devinfo->is_haswell) {
5313       if (devinfo->is_g4x) {
5335 _3DSTATE_BINDING_TABLE_EDIT_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
5337    switch (devinfo->gen) {
5343       if (devinfo->is_haswell) {
5351       if (devinfo->is_g4x) {
5370 _3DSTATE_BINDING_TABLE_EDIT_PS_CommandSubType_start(const struct gen_device_info *devinfo)
5372    switch (devinfo->gen) {
5378       if (devinfo->is_haswell) {
5386       if (devinfo->is_g4x) {
5408 _3DSTATE_BINDING_TABLE_EDIT_PS_CommandType_bits(const struct gen_device_info *devinfo)
5410    switch (devinfo->gen) {
5416       if (devinfo->is_haswell) {
5424       if (devinfo->is_g4x) {
5443 _3DSTATE_BINDING_TABLE_EDIT_PS_CommandType_start(const struct gen_device_info *devinfo)
5445    switch (devinfo->gen) {
5451       if (devinfo->is_haswell) {
5459       if (devinfo->is_g4x) {
5481 _3DSTATE_BINDING_TABLE_EDIT_PS_DWordLength_bits(const struct gen_device_info *devinfo)
5483    switch (devinfo->gen) {
5489       if (devinfo->is_haswell) {
5497       if (devinfo->is_g4x) {
5516 _3DSTATE_BINDING_TABLE_EDIT_PS_DWordLength_start(const struct gen_device_info *devinfo)
5518    switch (devinfo->gen) {
5524       if (devinfo->is_haswell) {
5532       if (devinfo->is_g4x) {
5554 _3DSTATE_BINDING_TABLE_EDIT_PS_Entryn_bits(const struct gen_device_info *devinfo)
5556    switch (devinfo->gen) {
5562       if (devinfo->is_haswell) {
5570       if (devinfo->is_g4x) {
5589 _3DSTATE_BINDING_TABLE_EDIT_PS_Entryn_start(const struct gen_device_info *devinfo)
5591    switch (devinfo->gen) {
5597       if (devinfo->is_haswell) {
5605       if (devinfo->is_g4x) {
5633 _3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
5635    switch (devinfo->gen) {
5641       if (devinfo->is_haswell) {
5649       if (devinfo->is_g4x) {
5668 _3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
5670    switch (devinfo->gen) {
5676       if (devinfo->is_haswell) {
5684       if (devinfo->is_g4x) {
5706 _3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
5708    switch (devinfo->gen) {
5714       if (devinfo->is_haswell) {
5722       if (devinfo->is_g4x) {
5741 _3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
5743    switch (devinfo->gen) {
5749       if (devinfo->is_haswell) {
5757       if (devinfo->is_g4x) {
5779 _3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableBlockClear_bits(const struct gen_device_info *devinfo)
5781    switch (devinfo->gen) {
5787       if (devinfo->is_haswell) {
5795       if (devinfo->is_g4x) {
5814 _3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableBlockClear_start(const struct gen_device_info *devinfo)
5816    switch (devinfo->gen) {
5822       if (devinfo->is_haswell) {
5830       if (devinfo->is_g4x) {
5852 _3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableEditTarget_bits(const struct gen_device_info *devinfo)
5854    switch (devinfo->gen) {
5860       if (devinfo->is_haswell) {
5868       if (devinfo->is_g4x) {
5887 _3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableEditTarget_start(const struct gen_device_info *devinfo)
5889    switch (devinfo->gen) {
5895       if (devinfo->is_haswell) {
5903       if (devinfo->is_g4x) {
5925 _3DSTATE_BINDING_TABLE_EDIT_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
5927    switch (devinfo->gen) {
5933       if (devinfo->is_haswell) {
5941       if (devinfo->is_g4x) {
5960 _3DSTATE_BINDING_TABLE_EDIT_VS_CommandSubType_start(const struct gen_device_info *devinfo)
5962    switch (devinfo->gen) {
5968       if (devinfo->is_haswell) {
5976       if (devinfo->is_g4x) {
5998 _3DSTATE_BINDING_TABLE_EDIT_VS_CommandType_bits(const struct gen_device_info *devinfo)
6000    switch (devinfo->gen) {
6006       if (devinfo->is_haswell) {
6014       if (devinfo->is_g4x) {
6033 _3DSTATE_BINDING_TABLE_EDIT_VS_CommandType_start(const struct gen_device_info *devinfo)
6035    switch (devinfo->gen) {
6041       if (devinfo->is_haswell) {
6049       if (devinfo->is_g4x) {
6071 _3DSTATE_BINDING_TABLE_EDIT_VS_DWordLength_bits(const struct gen_device_info *devinfo)
6073    switch (devinfo->gen) {
6079       if (devinfo->is_haswell) {
6087       if (devinfo->is_g4x) {
6106 _3DSTATE_BINDING_TABLE_EDIT_VS_DWordLength_start(const struct gen_device_info *devinfo)
6108    switch (devinfo->gen) {
6114       if (devinfo->is_haswell) {
6122       if (devinfo->is_g4x) {
6144 _3DSTATE_BINDING_TABLE_EDIT_VS_Entryn_bits(const struct gen_device_info *devinfo)
6146    switch (devinfo->gen) {
6152       if (devinfo->is_haswell) {
6160       if (devinfo->is_g4x) {
6179 _3DSTATE_BINDING_TABLE_EDIT_VS_Entryn_start(const struct gen_device_info *devinfo)
6181    switch (devinfo->gen) {
6187       if (devinfo->is_haswell) {
6195       if (devinfo->is_g4x) {
6216 _3DSTATE_BINDING_TABLE_POINTERS_length(const struct gen_device_info *devinfo)
6218    switch (devinfo->gen) {
6224       if (devinfo->is_haswell) {
6232       if (devinfo->is_g4x) {
6253 _3DSTATE_BINDING_TABLE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
6255    switch (devinfo->gen) {
6261       if (devinfo->is_haswell) {
6269       if (devinfo->is_g4x) {
6287 _3DSTATE_BINDING_TABLE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
6289    switch (devinfo->gen) {
6295       if (devinfo->is_haswell) {
6303       if (devinfo->is_g4x) {
6324 _3DSTATE_BINDING_TABLE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
6326    switch (devinfo->gen) {
6332       if (devinfo->is_haswell) {
6340       if (devinfo->is_g4x) {
6358 _3DSTATE_BINDING_TABLE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
6360    switch (devinfo->gen) {
6366       if (devinfo->is_haswell) {
6374       if (devinfo->is_g4x) {
6395 _3DSTATE_BINDING_TABLE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
6397    switch (devinfo->gen) {
6403       if (devinfo->is_haswell) {
6411       if (devinfo->is_g4x) {
6429 _3DSTATE_BINDING_TABLE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
6431    switch (devinfo->gen) {
6437       if (devinfo->is_haswell) {
6445       if (devinfo->is_g4x) {
6466 _3DSTATE_BINDING_TABLE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
6468    switch (devinfo->gen) {
6474       if (devinfo->is_haswell) {
6482       if (devinfo->is_g4x) {
6500 _3DSTATE_BINDING_TABLE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
6502    switch (devinfo->gen) {
6508       if (devinfo->is_haswell) {
6516       if (devinfo->is_g4x) {
6537 _3DSTATE_BINDING_TABLE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
6539    switch (devinfo->gen) {
6545       if (devinfo->is_haswell) {
6553       if (devinfo->is_g4x) {
6571 _3DSTATE_BINDING_TABLE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
6573    switch (devinfo->gen) {
6579       if (devinfo->is_haswell) {
6587       if (devinfo->is_g4x) {
6605 _3DSTATE_BINDING_TABLE_POINTERS_GSBindingTableChange_bits(const struct gen_device_info *devinfo)
6607    switch (devinfo->gen) {
6613       if (devinfo->is_haswell) {
6621       if (devinfo->is_g4x) {
6636 _3DSTATE_BINDING_TABLE_POINTERS_GSBindingTableChange_start(const struct gen_device_info *devinfo)
6638    switch (devinfo->gen) {
6644       if (devinfo->is_haswell) {
6652       if (devinfo->is_g4x) {
6670 _3DSTATE_BINDING_TABLE_POINTERS_PSBindingTableChange_bits(const struct gen_device_info *devinfo)
6672    switch (devinfo->gen) {
6678       if (devinfo->is_haswell) {
6686       if (devinfo->is_g4x) {
6701 _3DSTATE_BINDING_TABLE_POINTERS_PSBindingTableChange_start(const struct gen_device_info *devinfo)
6703    switch (devinfo->gen) {
6709       if (devinfo->is_haswell) {
6717       if (devinfo->is_g4x) {
6737 _3DSTATE_BINDING_TABLE_POINTERS_PointertoCLIPBindingTable_bits(const struct gen_device_info *devinfo)
6739    switch (devinfo->gen) {
6745       if (devinfo->is_haswell) {
6753       if (devinfo->is_g4x) {
6770 _3DSTATE_BINDING_TABLE_POINTERS_PointertoCLIPBindingTable_start(const struct gen_device_info *devinfo)
6772    switch (devinfo->gen) {
6778       if (devinfo->is_haswell) {
6786       if (devinfo->is_g4x) {
6807 _3DSTATE_BINDING_TABLE_POINTERS_PointertoGSBindingTable_bits(const struct gen_device_info *devinfo)
6809    switch (devinfo->gen) {
6815       if (devinfo->is_haswell) {
6823       if (devinfo->is_g4x) {
6841 _3DSTATE_BINDING_TABLE_POINTERS_PointertoGSBindingTable_start(const struct gen_device_info *devinfo)
6843    switch (devinfo->gen) {
6849       if (devinfo->is_haswell) {
6857       if (devinfo->is_g4x) {
6878 _3DSTATE_BINDING_TABLE_POINTERS_PointertoPSBindingTable_bits(const struct gen_device_info *devinfo)
6880    switch (devinfo->gen) {
6886       if (devinfo->is_haswell) {
6894       if (devinfo->is_g4x) {
6912 _3DSTATE_BINDING_TABLE_POINTERS_PointertoPSBindingTable_start(const struct gen_device_info *devinfo)
6914    switch (devinfo->gen) {
6920       if (devinfo->is_haswell) {
6928       if (devinfo->is_g4x) {
6948 _3DSTATE_BINDING_TABLE_POINTERS_PointertoSFBindingTable_bits(const struct gen_device_info *devinfo)
6950    switch (devinfo->gen) {
6956       if (devinfo->is_haswell) {
6964       if (devinfo->is_g4x) {
6981 _3DSTATE_BINDING_TABLE_POINTERS_PointertoSFBindingTable_start(const struct gen_device_info *devinfo)
6983    switch (devinfo->gen) {
6989       if (devinfo->is_haswell) {
6997       if (devinfo->is_g4x) {
7018 _3DSTATE_BINDING_TABLE_POINTERS_PointertoVSBindingTable_bits(const struct gen_device_info *devinfo)
7020    switch (devinfo->gen) {
7026       if (devinfo->is_haswell) {
7034       if (devinfo->is_g4x) {
7052 _3DSTATE_BINDING_TABLE_POINTERS_PointertoVSBindingTable_start(const struct gen_device_info *devinfo)
7054    switch (devinfo->gen) {
7060       if (devinfo->is_haswell) {
7068       if (devinfo->is_g4x) {
7086 _3DSTATE_BINDING_TABLE_POINTERS_VSBindingTableChange_bits(const struct gen_device_info *devinfo)
7088    switch (devinfo->gen) {
7094       if (devinfo->is_haswell) {
7102       if (devinfo->is_g4x) {
7117 _3DSTATE_BINDING_TABLE_POINTERS_VSBindingTableChange_start(const struct gen_device_info *devinfo)
7119    switch (devinfo->gen) {
7125       if (devinfo->is_haswell) {
7133       if (devinfo->is_g4x) {
7156 _3DSTATE_BINDING_TABLE_POINTERS_DS_length(const struct gen_device_info *devinfo)
7158    switch (devinfo->gen) {
7164       if (devinfo->is_haswell) {
7172       if (devinfo->is_g4x) {
7195 _3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
7197    switch (devinfo->gen) {
7203       if (devinfo->is_haswell) {
7211       if (devinfo->is_g4x) {
7231 _3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
7233    switch (devinfo->gen) {
7239       if (devinfo->is_haswell) {
7247       if (devinfo->is_g4x) {
7270 _3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
7272    switch (devinfo->gen) {
7278       if (devinfo->is_haswell) {
7286       if (devinfo->is_g4x) {
7306 _3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
7308    switch (devinfo->gen) {
7314       if (devinfo->is_haswell) {
7322       if (devinfo->is_g4x) {
7345 _3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
7347    switch (devinfo->gen) {
7353       if (devinfo->is_haswell) {
7361       if (devinfo->is_g4x) {
7381 _3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_start(const struct gen_device_info *devinfo)
7383    switch (devinfo->gen) {
7389       if (devinfo->is_haswell) {
7397       if (devinfo->is_g4x) {
7420 _3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_bits(const struct gen_device_info *devinfo)
7422    switch (devinfo->gen) {
7428       if (devinfo->is_haswell) {
7436       if (devinfo->is_g4x) {
7456 _3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_start(const struct gen_device_info *devinfo)
7458    switch (devinfo->gen) {
7464       if (devinfo->is_haswell) {
7472       if (devinfo->is_g4x) {
7495 _3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_bits(const struct gen_device_info *devinfo)
7497    switch (devinfo->gen) {
7503       if (devinfo->is_haswell) {
7511       if (devinfo->is_g4x) {
7531 _3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_start(const struct gen_device_info *devinfo)
7533    switch (devinfo->gen) {
7539       if (devinfo->is_haswell) {
7547       if (devinfo->is_g4x) {
7570 _3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_bits(const struct gen_device_info *devinfo)
7572    switch (devinfo->gen) {
7578       if (devinfo->is_haswell) {
7586       if (devinfo->is_g4x) {
7606 _3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_start(const struct gen_device_info *devinfo)
7608    switch (devinfo->gen) {
7614       if (devinfo->is_haswell) {
7622       if (devinfo->is_g4x) {
7645 _3DSTATE_BINDING_TABLE_POINTERS_GS_length(const struct gen_device_info *devinfo)
7647    switch (devinfo->gen) {
7653       if (devinfo->is_haswell) {
7661       if (devinfo->is_g4x) {
7684 _3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
7686    switch (devinfo->gen) {
7692       if (devinfo->is_haswell) {
7700       if (devinfo->is_g4x) {
7720 _3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
7722    switch (devinfo->gen) {
7728       if (devinfo->is_haswell) {
7736       if (devinfo->is_g4x) {
7759 _3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
7761    switch (devinfo->gen) {
7767       if (devinfo->is_haswell) {
7775       if (devinfo->is_g4x) {
7795 _3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
7797    switch (devinfo->gen) {
7803       if (devinfo->is_haswell) {
7811       if (devinfo->is_g4x) {
7834 _3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
7836    switch (devinfo->gen) {
7842       if (devinfo->is_haswell) {
7850       if (devinfo->is_g4x) {
7870 _3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_start(const struct gen_device_info *devinfo)
7872    switch (devinfo->gen) {
7878       if (devinfo->is_haswell) {
7886       if (devinfo->is_g4x) {
7909 _3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_bits(const struct gen_device_info *devinfo)
7911    switch (devinfo->gen) {
7917       if (devinfo->is_haswell) {
7925       if (devinfo->is_g4x) {
7945 _3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_start(const struct gen_device_info *devinfo)
7947    switch (devinfo->gen) {
7953       if (devinfo->is_haswell) {
7961       if (devinfo->is_g4x) {
7984 _3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_bits(const struct gen_device_info *devinfo)
7986    switch (devinfo->gen) {
7992       if (devinfo->is_haswell) {
8000       if (devinfo->is_g4x) {
8020 _3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_start(const struct gen_device_info *devinfo)
8022    switch (devinfo->gen) {
8028       if (devinfo->is_haswell) {
8036       if (devinfo->is_g4x) {
8059 _3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_bits(const struct gen_device_info *devinfo)
8061    switch (devinfo->gen) {
8067       if (devinfo->is_haswell) {
8075       if (devinfo->is_g4x) {
8095 _3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_start(const struct gen_device_info *devinfo)
8097    switch (devinfo->gen) {
8103       if (devinfo->is_haswell) {
8111       if (devinfo->is_g4x) {
8134 _3DSTATE_BINDING_TABLE_POINTERS_HS_length(const struct gen_device_info *devinfo)
8136    switch (devinfo->gen) {
8142       if (devinfo->is_haswell) {
8150       if (devinfo->is_g4x) {
8173 _3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
8175    switch (devinfo->gen) {
8181       if (devinfo->is_haswell) {
8189       if (devinfo->is_g4x) {
8209 _3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
8211    switch (devinfo->gen) {
8217       if (devinfo->is_haswell) {
8225       if (devinfo->is_g4x) {
8248 _3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
8250    switch (devinfo->gen) {
8256       if (devinfo->is_haswell) {
8264       if (devinfo->is_g4x) {
8284 _3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
8286    switch (devinfo->gen) {
8292       if (devinfo->is_haswell) {
8300       if (devinfo->is_g4x) {
8323 _3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
8325    switch (devinfo->gen) {
8331       if (devinfo->is_haswell) {
8339       if (devinfo->is_g4x) {
8359 _3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_start(const struct gen_device_info *devinfo)
8361    switch (devinfo->gen) {
8367       if (devinfo->is_haswell) {
8375       if (devinfo->is_g4x) {
8398 _3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_bits(const struct gen_device_info *devinfo)
8400    switch (devinfo->gen) {
8406       if (devinfo->is_haswell) {
8414       if (devinfo->is_g4x) {
8434 _3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_start(const struct gen_device_info *devinfo)
8436    switch (devinfo->gen) {
8442       if (devinfo->is_haswell) {
8450       if (devinfo->is_g4x) {
8473 _3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_bits(const struct gen_device_info *devinfo)
8475    switch (devinfo->gen) {
8481       if (devinfo->is_haswell) {
8489       if (devinfo->is_g4x) {
8509 _3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_start(const struct gen_device_info *devinfo)
8511    switch (devinfo->gen) {
8517       if (devinfo->is_haswell) {
8525       if (devinfo->is_g4x) {
8548 _3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_bits(const struct gen_device_info *devinfo)
8550    switch (devinfo->gen) {
8556       if (devinfo->is_haswell) {
8564       if (devinfo->is_g4x) {
8584 _3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_start(const struct gen_device_info *devinfo)
8586    switch (devinfo->gen) {
8592       if (devinfo->is_haswell) {
8600       if (devinfo->is_g4x) {
8623 _3DSTATE_BINDING_TABLE_POINTERS_PS_length(const struct gen_device_info *devinfo)
8625    switch (devinfo->gen) {
8631       if (devinfo->is_haswell) {
8639       if (devinfo->is_g4x) {
8662 _3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
8664    switch (devinfo->gen) {
8670       if (devinfo->is_haswell) {
8678       if (devinfo->is_g4x) {
8698 _3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
8700    switch (devinfo->gen) {
8706       if (devinfo->is_haswell) {
8714       if (devinfo->is_g4x) {
8737 _3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
8739    switch (devinfo->gen) {
8745       if (devinfo->is_haswell) {
8753       if (devinfo->is_g4x) {
8773 _3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
8775    switch (devinfo->gen) {
8781       if (devinfo->is_haswell) {
8789       if (devinfo->is_g4x) {
8812 _3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
8814    switch (devinfo->gen) {
8820       if (devinfo->is_haswell) {
8828       if (devinfo->is_g4x) {
8848 _3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_start(const struct gen_device_info *devinfo)
8850    switch (devinfo->gen) {
8856       if (devinfo->is_haswell) {
8864       if (devinfo->is_g4x) {
8887 _3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_bits(const struct gen_device_info *devinfo)
8889    switch (devinfo->gen) {
8895       if (devinfo->is_haswell) {
8903       if (devinfo->is_g4x) {
8923 _3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_start(const struct gen_device_info *devinfo)
8925    switch (devinfo->gen) {
8931       if (devinfo->is_haswell) {
8939       if (devinfo->is_g4x) {
8962 _3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_bits(const struct gen_device_info *devinfo)
8964    switch (devinfo->gen) {
8970       if (devinfo->is_haswell) {
8978       if (devinfo->is_g4x) {
8998 _3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_start(const struct gen_device_info *devinfo)
9000    switch (devinfo->gen) {
9006       if (devinfo->is_haswell) {
9014       if (devinfo->is_g4x) {
9037 _3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_bits(const struct gen_device_info *devinfo)
9039    switch (devinfo->gen) {
9045       if (devinfo->is_haswell) {
9053       if (devinfo->is_g4x) {
9073 _3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_start(const struct gen_device_info *devinfo)
9075    switch (devinfo->gen) {
9081       if (devinfo->is_haswell) {
9089       if (devinfo->is_g4x) {
9112 _3DSTATE_BINDING_TABLE_POINTERS_VS_length(const struct gen_device_info *devinfo)
9114    switch (devinfo->gen) {
9120       if (devinfo->is_haswell) {
9128       if (devinfo->is_g4x) {
9151 _3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
9153    switch (devinfo->gen) {
9159       if (devinfo->is_haswell) {
9167       if (devinfo->is_g4x) {
9187 _3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
9189    switch (devinfo->gen) {
9195       if (devinfo->is_haswell) {
9203       if (devinfo->is_g4x) {
9226 _3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
9228    switch (devinfo->gen) {
9234       if (devinfo->is_haswell) {
9242       if (devinfo->is_g4x) {
9262 _3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
9264    switch (devinfo->gen) {
9270       if (devinfo->is_haswell) {
9278       if (devinfo->is_g4x) {
9301 _3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
9303    switch (devinfo->gen) {
9309       if (devinfo->is_haswell) {
9317       if (devinfo->is_g4x) {
9337 _3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_start(const struct gen_device_info *devinfo)
9339    switch (devinfo->gen) {
9345       if (devinfo->is_haswell) {
9353       if (devinfo->is_g4x) {
9376 _3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_bits(const struct gen_device_info *devinfo)
9378    switch (devinfo->gen) {
9384       if (devinfo->is_haswell) {
9392       if (devinfo->is_g4x) {
9412 _3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_start(const struct gen_device_info *devinfo)
9414    switch (devinfo->gen) {
9420       if (devinfo->is_haswell) {
9428       if (devinfo->is_g4x) {
9451 _3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_bits(const struct gen_device_info *devinfo)
9453    switch (devinfo->gen) {
9459       if (devinfo->is_haswell) {
9467       if (devinfo->is_g4x) {
9487 _3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_start(const struct gen_device_info *devinfo)
9489    switch (devinfo->gen) {
9495       if (devinfo->is_haswell) {
9503       if (devinfo->is_g4x) {
9526 _3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_bits(const struct gen_device_info *devinfo)
9528    switch (devinfo->gen) {
9534       if (devinfo->is_haswell) {
9542       if (devinfo->is_g4x) {
9562 _3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_start(const struct gen_device_info *devinfo)
9564    switch (devinfo->gen) {
9570       if (devinfo->is_haswell) {
9578       if (devinfo->is_g4x) {
9600 _3DSTATE_BINDING_TABLE_POOL_ALLOC_length(const struct gen_device_info *devinfo)
9602    switch (devinfo->gen) {
9608       if (devinfo->is_haswell) {
9616       if (devinfo->is_g4x) {
9638 _3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
9640    switch (devinfo->gen) {
9646       if (devinfo->is_haswell) {
9654       if (devinfo->is_g4x) {
9673 _3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandOpcode_start(const struct gen_device_info *devinfo)
9675    switch (devinfo->gen) {
9681       if (devinfo->is_haswell) {
9689       if (devinfo->is_g4x) {
9711 _3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
9713    switch (devinfo->gen) {
9719       if (devinfo->is_haswell) {
9727       if (devinfo->is_g4x) {
9746 _3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
9748    switch (devinfo->gen) {
9754       if (devinfo->is_haswell) {
9762       if (devinfo->is_g4x) {
9784 _3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBaseAddress_bits(const struct gen_device_info *devinfo)
9786    switch (devinfo->gen) {
9792       if (devinfo->is_haswell) {
9800       if (devinfo->is_g4x) {
9819 _3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBaseAddress_start(const struct gen_device_info *devinfo)
9821    switch (devinfo->gen) {
9827       if (devinfo->is_haswell) {
9835       if (devinfo->is_g4x) {
9856 _3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBufferSize_bits(const struct gen_device_info *devinfo)
9858    switch (devinfo->gen) {
9864       if (devinfo->is_haswell) {
9872       if (devinfo->is_g4x) {
9890 _3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBufferSize_start(const struct gen_device_info *devinfo)
9892    switch (devinfo->gen) {
9898       if (devinfo->is_haswell) {
9906       if (devinfo->is_g4x) {
9928 _3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolEnable_bits(const struct gen_device_info *devinfo)
9930    switch (devinfo->gen) {
9936       if (devinfo->is_haswell) {
9944       if (devinfo->is_g4x) {
9963 _3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolEnable_start(const struct gen_device_info *devinfo)
9965    switch (devinfo->gen) {
9971       if (devinfo->is_haswell) {
9979       if (devinfo->is_g4x) {
9997 _3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolUpperBound_bits(const struct gen_device_info *devinfo)
9999    switch (devinfo->gen) {
10005       if (devinfo->is_haswell) {
10013       if (devinfo->is_g4x) {
10028 _3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolUpperBound_start(const struct gen_device_info *devinfo)
10030    switch (devinfo->gen) {
10036       if (devinfo->is_haswell) {
10044       if (devinfo->is_g4x) {
10066 _3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandSubType_bits(const struct gen_device_info *devinfo)
10068    switch (devinfo->gen) {
10074       if (devinfo->is_haswell) {
10082       if (devinfo->is_g4x) {
10101 _3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandSubType_start(const struct gen_device_info *devinfo)
10103    switch (devinfo->gen) {
10109       if (devinfo->is_haswell) {
10117       if (devinfo->is_g4x) {
10139 _3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandType_bits(const struct gen_device_info *devinfo)
10141    switch (devinfo->gen) {
10147       if (devinfo->is_haswell) {
10155       if (devinfo->is_g4x) {
10174 _3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandType_start(const struct gen_device_info *devinfo)
10176    switch (devinfo->gen) {
10182       if (devinfo->is_haswell) {
10190       if (devinfo->is_g4x) {
10212 _3DSTATE_BINDING_TABLE_POOL_ALLOC_DWordLength_bits(const struct gen_device_info *devinfo)
10214    switch (devinfo->gen) {
10220       if (devinfo->is_haswell) {
10228       if (devinfo->is_g4x) {
10247 _3DSTATE_BINDING_TABLE_POOL_ALLOC_DWordLength_start(const struct gen_device_info *devinfo)
10249    switch (devinfo->gen) {
10255       if (devinfo->is_haswell) {
10263       if (devinfo->is_g4x) {
10285 _3DSTATE_BINDING_TABLE_POOL_ALLOC_MOCS_bits(const struct gen_device_info *devinfo)
10287    switch (devinfo->gen) {
10293       if (devinfo->is_haswell) {
10301       if (devinfo->is_g4x) {
10320 _3DSTATE_BINDING_TABLE_POOL_ALLOC_MOCS_start(const struct gen_device_info *devinfo)
10322    switch (devinfo->gen) {
10328       if (devinfo->is_haswell) {
10336       if (devinfo->is_g4x) {
10359 _3DSTATE_BLEND_STATE_POINTERS_length(const struct gen_device_info *devinfo)
10361    switch (devinfo->gen) {
10367       if (devinfo->is_haswell) {
10375       if (devinfo->is_g4x) {
10398 _3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
10400    switch (devinfo->gen) {
10406       if (devinfo->is_haswell) {
10414       if (devinfo->is_g4x) {
10434 _3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
10436    switch (devinfo->gen) {
10442       if (devinfo->is_haswell) {
10450       if (devinfo->is_g4x) {
10473 _3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
10475    switch (devinfo->gen) {
10481       if (devinfo->is_haswell) {
10489       if (devinfo->is_g4x) {
10509 _3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
10511    switch (devinfo->gen) {
10517       if (devinfo->is_haswell) {
10525       if (devinfo->is_g4x) {
10548 _3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_bits(const struct gen_device_info *devinfo)
10550    switch (devinfo->gen) {
10556       if (devinfo->is_haswell) {
10564       if (devinfo->is_g4x) {
10584 _3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_start(const struct gen_device_info *devinfo)
10586    switch (devinfo->gen) {
10592       if (devinfo->is_haswell) {
10600       if (devinfo->is_g4x) {
10621 _3DSTATE_BLEND_STATE_POINTERS_BlendStatePointerValid_bits(const struct gen_device_info *devinfo)
10623    switch (devinfo->gen) {
10629       if (devinfo->is_haswell) {
10637       if (devinfo->is_g4x) {
10655 _3DSTATE_BLEND_STATE_POINTERS_BlendStatePointerValid_start(const struct gen_device_info *devinfo)
10657    switch (devinfo->gen) {
10663       if (devinfo->is_haswell) {
10671       if (devinfo->is_g4x) {
10694 _3DSTATE_BLEND_STATE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
10696    switch (devinfo->gen) {
10702       if (devinfo->is_haswell) {
10710       if (devinfo->is_g4x) {
10730 _3DSTATE_BLEND_STATE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
10732    switch (devinfo->gen) {
10738       if (devinfo->is_haswell) {
10746       if (devinfo->is_g4x) {
10769 _3DSTATE_BLEND_STATE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
10771    switch (devinfo->gen) {
10777       if (devinfo->is_haswell) {
10785       if (devinfo->is_g4x) {
10805 _3DSTATE_BLEND_STATE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
10807    switch (devinfo->gen) {
10813       if (devinfo->is_haswell) {
10821       if (devinfo->is_g4x) {
10844 _3DSTATE_BLEND_STATE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
10846    switch (devinfo->gen) {
10852       if (devinfo->is_haswell) {
10860       if (devinfo->is_g4x) {
10880 _3DSTATE_BLEND_STATE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
10882    switch (devinfo->gen) {
10888       if (devinfo->is_haswell) {
10896       if (devinfo->is_g4x) {
10920 _3DSTATE_CC_STATE_POINTERS_length(const struct gen_device_info *devinfo)
10922    switch (devinfo->gen) {
10928       if (devinfo->is_haswell) {
10936       if (devinfo->is_g4x) {
10960 _3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
10962    switch (devinfo->gen) {
10968       if (devinfo->is_haswell) {
10976       if (devinfo->is_g4x) {
10997 _3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
10999    switch (devinfo->gen) {
11005       if (devinfo->is_haswell) {
11013       if (devinfo->is_g4x) {
11037 _3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
11039    switch (devinfo->gen) {
11045       if (devinfo->is_haswell) {
11053       if (devinfo->is_g4x) {
11074 _3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
11076    switch (devinfo->gen) {
11082       if (devinfo->is_haswell) {
11090       if (devinfo->is_g4x) {
11108 _3DSTATE_CC_STATE_POINTERS_BLEND_STATEChange_bits(const struct gen_device_info *devinfo)
11110    switch (devinfo->gen) {
11116       if (devinfo->is_haswell) {
11124       if (devinfo->is_g4x) {
11139 _3DSTATE_CC_STATE_POINTERS_BLEND_STATEChange_start(const struct gen_device_info *devinfo)
11141    switch (devinfo->gen) {
11147       if (devinfo->is_haswell) {
11155       if (devinfo->is_g4x) {
11179 _3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_bits(const struct gen_device_info *devinfo)
11181    switch (devinfo->gen) {
11187       if (devinfo->is_haswell) {
11195       if (devinfo->is_g4x) {
11216 _3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_start(const struct gen_device_info *devinfo)
11218    switch (devinfo->gen) {
11224       if (devinfo->is_haswell) {
11232       if (devinfo->is_g4x) {
11254 _3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointerValid_bits(const struct gen_device_info *devinfo)
11256    switch (devinfo->gen) {
11262       if (devinfo->is_haswell) {
11270       if (devinfo->is_g4x) {
11289 _3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointerValid_start(const struct gen_device_info *devinfo)
11291    switch (devinfo->gen) {
11297       if (devinfo->is_haswell) {
11305       if (devinfo->is_g4x) {
11329 _3DSTATE_CC_STATE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
11331    switch (devinfo->gen) {
11337       if (devinfo->is_haswell) {
11345       if (devinfo->is_g4x) {
11366 _3DSTATE_CC_STATE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
11368    switch (devinfo->gen) {
11374       if (devinfo->is_haswell) {
11382       if (devinfo->is_g4x) {
11406 _3DSTATE_CC_STATE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
11408    switch (devinfo->gen) {
11414       if (devinfo->is_haswell) {
11422       if (devinfo->is_g4x) {
11443 _3DSTATE_CC_STATE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
11445    switch (devinfo->gen) {
11451       if (devinfo->is_haswell) {
11459       if (devinfo->is_g4x) {
11477 _3DSTATE_CC_STATE_POINTERS_DEPTH_STENCIL_STATEChange_bits(const struct gen_device_info *devinfo)
11479    switch (devinfo->gen) {
11485       if (devinfo->is_haswell) {
11493       if (devinfo->is_g4x) {
11508 _3DSTATE_CC_STATE_POINTERS_DEPTH_STENCIL_STATEChange_start(const struct gen_device_info *devinfo)
11510    switch (devinfo->gen) {
11516       if (devinfo->is_haswell) {
11524       if (devinfo->is_g4x) {
11548 _3DSTATE_CC_STATE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
11550    switch (devinfo->gen) {
11556       if (devinfo->is_haswell) {
11564       if (devinfo->is_g4x) {
11585 _3DSTATE_CC_STATE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
11587    switch (devinfo->gen) {
11593       if (devinfo->is_haswell) {
11601       if (devinfo->is_g4x) {
11619 _3DSTATE_CC_STATE_POINTERS_PointertoBLEND_STATE_bits(const struct gen_device_info *devinfo)
11621    switch (devinfo->gen) {
11627       if (devinfo->is_haswell) {
11635       if (devinfo->is_g4x) {
11650 _3DSTATE_CC_STATE_POINTERS_PointertoBLEND_STATE_start(const struct gen_device_info *devinfo)
11652    switch (devinfo->gen) {
11658       if (devinfo->is_haswell) {
11666       if (devinfo->is_g4x) {
11684 _3DSTATE_CC_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_bits(const struct gen_device_info *devinfo)
11686    switch (devinfo->gen) {
11692       if (devinfo->is_haswell) {
11700       if (devinfo->is_g4x) {
11715 _3DSTATE_CC_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_start(const struct gen_device_info *devinfo)
11717    switch (devinfo->gen) {
11723       if (devinfo->is_haswell) {
11731       if (devinfo->is_g4x) {
11755 _3DSTATE_CHROMA_KEY_length(const struct gen_device_info *devinfo)
11757    switch (devinfo->gen) {
11763       if (devinfo->is_haswell) {
11771       if (devinfo->is_g4x) {
11795 _3DSTATE_CHROMA_KEY_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
11797    switch (devinfo->gen) {
11803       if (devinfo->is_haswell) {
11811       if (devinfo->is_g4x) {
11832 _3DSTATE_CHROMA_KEY_3DCommandOpcode_start(const struct gen_device_info *devinfo)
11834    switch (devinfo->gen) {
11840       if (devinfo->is_haswell) {
11848       if (devinfo->is_g4x) {
11872 _3DSTATE_CHROMA_KEY_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
11874    switch (devinfo->gen) {
11880       if (devinfo->is_haswell) {
11888       if (devinfo->is_g4x) {
11909 _3DSTATE_CHROMA_KEY_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
11911    switch (devinfo->gen) {
11917       if (devinfo->is_haswell) {
11925       if (devinfo->is_g4x) {
11949 _3DSTATE_CHROMA_KEY_ChromaKeyHighValue_bits(const struct gen_device_info *devinfo)
11951    switch (devinfo->gen) {
11957       if (devinfo->is_haswell) {
11965       if (devinfo->is_g4x) {
11986 _3DSTATE_CHROMA_KEY_ChromaKeyHighValue_start(const struct gen_device_info *devinfo)
11988    switch (devinfo->gen) {
11994       if (devinfo->is_haswell) {
12002       if (devinfo->is_g4x) {
12026 _3DSTATE_CHROMA_KEY_ChromaKeyLowValue_bits(const struct gen_device_info *devinfo)
12028    switch (devinfo->gen) {
12034       if (devinfo->is_haswell) {
12042       if (devinfo->is_g4x) {
12063 _3DSTATE_CHROMA_KEY_ChromaKeyLowValue_start(const struct gen_device_info *devinfo)
12065    switch (devinfo->gen) {
12071       if (devinfo->is_haswell) {
12079       if (devinfo->is_g4x) {
12103 _3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_bits(const struct gen_device_info *devinfo)
12105    switch (devinfo->gen) {
12111       if (devinfo->is_haswell) {
12119       if (devinfo->is_g4x) {
12140 _3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_start(const struct gen_device_info *devinfo)
12142    switch (devinfo->gen) {
12148       if (devinfo->is_haswell) {
12156       if (devinfo->is_g4x) {
12180 _3DSTATE_CHROMA_KEY_CommandSubType_bits(const struct gen_device_info *devinfo)
12182    switch (devinfo->gen) {
12188       if (devinfo->is_haswell) {
12196       if (devinfo->is_g4x) {
12217 _3DSTATE_CHROMA_KEY_CommandSubType_start(const struct gen_device_info *devinfo)
12219    switch (devinfo->gen) {
12225       if (devinfo->is_haswell) {
12233       if (devinfo->is_g4x) {
12257 _3DSTATE_CHROMA_KEY_CommandType_bits(const struct gen_device_info *devinfo)
12259    switch (devinfo->gen) {
12265       if (devinfo->is_haswell) {
12273       if (devinfo->is_g4x) {
12294 _3DSTATE_CHROMA_KEY_CommandType_start(const struct gen_device_info *devinfo)
12296    switch (devinfo->gen) {
12302       if (devinfo->is_haswell) {
12310       if (devinfo->is_g4x) {
12334 _3DSTATE_CHROMA_KEY_DWordLength_bits(const struct gen_device_info *devinfo)
12336    switch (devinfo->gen) {
12342       if (devinfo->is_haswell) {
12350       if (devinfo->is_g4x) {
12371 _3DSTATE_CHROMA_KEY_DWordLength_start(const struct gen_device_info *devinfo)
12373    switch (devinfo->gen) {
12379       if (devinfo->is_haswell) {
12387       if (devinfo->is_g4x) {
12412 _3DSTATE_CLEAR_PARAMS_length(const struct gen_device_info *devinfo)
12414    switch (devinfo->gen) {
12420       if (devinfo->is_haswell) {
12428       if (devinfo->is_g4x) {
12453 _3DSTATE_CLEAR_PARAMS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
12455    switch (devinfo->gen) {
12461       if (devinfo->is_haswell) {
12469       if (devinfo->is_g4x) {
12491 _3DSTATE_CLEAR_PARAMS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
12493    switch (devinfo->gen) {
12499       if (devinfo->is_haswell) {
12507       if (devinfo->is_g4x) {
12532 _3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
12534    switch (devinfo->gen) {
12540       if (devinfo->is_haswell) {
12548       if (devinfo->is_g4x) {
12570 _3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
12572    switch (devinfo->gen) {
12578       if (devinfo->is_haswell) {
12586       if (devinfo->is_g4x) {
12611 _3DSTATE_CLEAR_PARAMS_CommandSubType_bits(const struct gen_device_info *devinfo)
12613    switch (devinfo->gen) {
12619       if (devinfo->is_haswell) {
12627       if (devinfo->is_g4x) {
12649 _3DSTATE_CLEAR_PARAMS_CommandSubType_start(const struct gen_device_info *devinfo)
12651    switch (devinfo->gen) {
12657       if (devinfo->is_haswell) {
12665       if (devinfo->is_g4x) {
12690 _3DSTATE_CLEAR_PARAMS_CommandType_bits(const struct gen_device_info *devinfo)
12692    switch (devinfo->gen) {
12698       if (devinfo->is_haswell) {
12706       if (devinfo->is_g4x) {
12728 _3DSTATE_CLEAR_PARAMS_CommandType_start(const struct gen_device_info *devinfo)
12730    switch (devinfo->gen) {
12736       if (devinfo->is_haswell) {
12744       if (devinfo->is_g4x) {
12769 _3DSTATE_CLEAR_PARAMS_DWordLength_bits(const struct gen_device_info *devinfo)
12771    switch (devinfo->gen) {
12777       if (devinfo->is_haswell) {
12785       if (devinfo->is_g4x) {
12807 _3DSTATE_CLEAR_PARAMS_DWordLength_start(const struct gen_device_info *devinfo)
12809    switch (devinfo->gen) {
12815       if (devinfo->is_haswell) {
12823       if (devinfo->is_g4x) {
12848 _3DSTATE_CLEAR_PARAMS_DepthClearValue_bits(const struct gen_device_info *devinfo)
12850    switch (devinfo->gen) {
12856       if (devinfo->is_haswell) {
12864       if (devinfo->is_g4x) {
12886 _3DSTATE_CLEAR_PARAMS_DepthClearValue_start(const struct gen_device_info *devinfo)
12888    switch (devinfo->gen) {
12894       if (devinfo->is_haswell) {
12902       if (devinfo->is_g4x) {
12927 _3DSTATE_CLEAR_PARAMS_DepthClearValueValid_bits(const struct gen_device_info *devinfo)
12929    switch (devinfo->gen) {
12935       if (devinfo->is_haswell) {
12943       if (devinfo->is_g4x) {
12965 _3DSTATE_CLEAR_PARAMS_DepthClearValueValid_start(const struct gen_device_info *devinfo)
12967    switch (devinfo->gen) {
12973       if (devinfo->is_haswell) {
12981       if (devinfo->is_g4x) {
13005 _3DSTATE_CLIP_length(const struct gen_device_info *devinfo)
13007    switch (devinfo->gen) {
13013       if (devinfo->is_haswell) {
13021       if (devinfo->is_g4x) {
13045 _3DSTATE_CLIP_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
13047    switch (devinfo->gen) {
13053       if (devinfo->is_haswell) {
13061       if (devinfo->is_g4x) {
13082 _3DSTATE_CLIP_3DCommandOpcode_start(const struct gen_device_info *devinfo)
13084    switch (devinfo->gen) {
13090       if (devinfo->is_haswell) {
13098       if (devinfo->is_g4x) {
13122 _3DSTATE_CLIP_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
13124    switch (devinfo->gen) {
13130       if (devinfo->is_haswell) {
13138       if (devinfo->is_g4x) {
13159 _3DSTATE_CLIP_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
13161    switch (devinfo->gen) {
13167       if (devinfo->is_haswell) {
13175       if (devinfo->is_g4x) {
13199 _3DSTATE_CLIP_APIMode_bits(const struct gen_device_info *devinfo)
13201    switch (devinfo->gen) {
13207       if (devinfo->is_haswell) {
13215       if (devinfo->is_g4x) {
13236 _3DSTATE_CLIP_APIMode_start(const struct gen_device_info *devinfo)
13238    switch (devinfo->gen) {
13244       if (devinfo->is_haswell) {
13252       if (devinfo->is_g4x) {
13276 _3DSTATE_CLIP_ClipEnable_bits(const struct gen_device_info *devinfo)
13278    switch (devinfo->gen) {
13284       if (devinfo->is_haswell) {
13292       if (devinfo->is_g4x) {
13313 _3DSTATE_CLIP_ClipEnable_start(const struct gen_device_info *devinfo)
13315    switch (devinfo->gen) {
13321       if (devinfo->is_haswell) {
13329       if (devinfo->is_g4x) {
13353 _3DSTATE_CLIP_ClipMode_bits(const struct gen_device_info *devinfo)
13355    switch (devinfo->gen) {
13361       if (devinfo->is_haswell) {
13369       if (devinfo->is_g4x) {
13390 _3DSTATE_CLIP_ClipMode_start(const struct gen_device_info *devinfo)
13392    switch (devinfo->gen) {
13398       if (devinfo->is_haswell) {
13406       if (devinfo->is_g4x) {
13430 _3DSTATE_CLIP_CommandSubType_bits(const struct gen_device_info *devinfo)
13432    switch (devinfo->gen) {
13438       if (devinfo->is_haswell) {
13446       if (devinfo->is_g4x) {
13467 _3DSTATE_CLIP_CommandSubType_start(const struct gen_device_info *devinfo)
13469    switch (devinfo->gen) {
13475       if (devinfo->is_haswell) {
13483       if (devinfo->is_g4x) {
13507 _3DSTATE_CLIP_CommandType_bits(const struct gen_device_info *devinfo)
13509    switch (devinfo->gen) {
13515       if (devinfo->is_haswell) {
13523       if (devinfo->is_g4x) {
13544 _3DSTATE_CLIP_CommandType_start(const struct gen_device_info *devinfo)
13546    switch (devinfo->gen) {
13552       if (devinfo->is_haswell) {
13560       if (devinfo->is_g4x) {
13579 _3DSTATE_CLIP_CullMode_bits(const struct gen_device_info *devinfo)
13581    switch (devinfo->gen) {
13587       if (devinfo->is_haswell) {
13595       if (devinfo->is_g4x) {
13611 _3DSTATE_CLIP_CullMode_start(const struct gen_device_info *devinfo)
13613    switch (devinfo->gen) {
13619       if (devinfo->is_haswell) {
13627       if (devinfo->is_g4x) {
13651 _3DSTATE_CLIP_DWordLength_bits(const struct gen_device_info *devinfo)
13653    switch (devinfo->gen) {
13659       if (devinfo->is_haswell) {
13667       if (devinfo->is_g4x) {
13688 _3DSTATE_CLIP_DWordLength_start(const struct gen_device_info *devinfo)
13690    switch (devinfo->gen) {
13696       if (devinfo->is_haswell) {
13704       if (devinfo->is_g4x) {
13727 _3DSTATE_CLIP_EarlyCullEnable_bits(const struct gen_device_info *devinfo)
13729    switch (devinfo->gen) {
13735       if (devinfo->is_haswell) {
13743       if (devinfo->is_g4x) {
13763 _3DSTATE_CLIP_EarlyCullEnable_start(const struct gen_device_info *devinfo)
13765    switch (devinfo->gen) {
13771       if (devinfo->is_haswell) {
13779       if (devinfo->is_g4x) {
13800 _3DSTATE_CLIP_ForceClipMode_bits(const struct gen_device_info *devinfo)
13802    switch (devinfo->gen) {
13808       if (devinfo->is_haswell) {
13816       if (devinfo->is_g4x) {
13834 _3DSTATE_CLIP_ForceClipMode_start(const struct gen_device_info *devinfo)
13836    switch (devinfo->gen) {
13842       if (devinfo->is_haswell) {
13850       if (devinfo->is_g4x) {
13871 _3DSTATE_CLIP_ForceUserClipDistanceClipTestEnableBitmask_bits(const struct gen_device_info *devinfo)
13873    switch (devinfo->gen) {
13879       if (devinfo->is_haswell) {
13887       if (devinfo->is_g4x) {
13905 _3DSTATE_CLIP_ForceUserClipDistanceClipTestEnableBitmask_start(const struct gen_device_info *devinfo)
13907    switch (devinfo->gen) {
13913       if (devinfo->is_haswell) {
13921       if (devinfo->is_g4x) {
13942 _3DSTATE_CLIP_ForceUserClipDistanceCullTestEnableBitmask_bits(const struct gen_device_info *devinfo)
13944    switch (devinfo->gen) {
13950       if (devinfo->is_haswell) {
13958       if (devinfo->is_g4x) {
13976 _3DSTATE_CLIP_ForceUserClipDistanceCullTestEnableBitmask_start(const struct gen_device_info *devinfo)
13978    switch (devinfo->gen) {
13984       if (devinfo->is_haswell) {
13992       if (devinfo->is_g4x) {
14016 _3DSTATE_CLIP_ForceZeroRTAIndexEnable_bits(const struct gen_device_info *devinfo)
14018    switch (devinfo->gen) {
14024       if (devinfo->is_haswell) {
14032       if (devinfo->is_g4x) {
14053 _3DSTATE_CLIP_ForceZeroRTAIndexEnable_start(const struct gen_device_info *devinfo)
14055    switch (devinfo->gen) {
14061       if (devinfo->is_haswell) {
14069       if (devinfo->is_g4x) {
14088 _3DSTATE_CLIP_FrontWinding_bits(const struct gen_device_info *devinfo)
14090    switch (devinfo->gen) {
14096       if (devinfo->is_haswell) {
14104       if (devinfo->is_g4x) {
14120 _3DSTATE_CLIP_FrontWinding_start(const struct gen_device_info *devinfo)
14122    switch (devinfo->gen) {
14128       if (devinfo->is_haswell) {
14136       if (devinfo->is_g4x) {
14160 _3DSTATE_CLIP_GuardbandClipTestEnable_bits(const struct gen_device_info *devinfo)
14162    switch (devinfo->gen) {
14168       if (devinfo->is_haswell) {
14176       if (devinfo->is_g4x) {
14197 _3DSTATE_CLIP_GuardbandClipTestEnable_start(const struct gen_device_info *devinfo)
14199    switch (devinfo->gen) {
14205       if (devinfo->is_haswell) {
14213       if (devinfo->is_g4x) {
14237 _3DSTATE_CLIP_LineStripListProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
14239    switch (devinfo->gen) {
14245       if (devinfo->is_haswell) {
14253       if (devinfo->is_g4x) {
14274 _3DSTATE_CLIP_LineStripListProvokingVertexSelect_start(const struct gen_device_info *devinfo)
14276    switch (devinfo->gen) {
14282       if (devinfo->is_haswell) {
14290       if (devinfo->is_g4x) {
14314 _3DSTATE_CLIP_MaximumPointWidth_bits(const struct gen_device_info *devinfo)
14316    switch (devinfo->gen) {
14322       if (devinfo->is_haswell) {
14330       if (devinfo->is_g4x) {
14351 _3DSTATE_CLIP_MaximumPointWidth_start(const struct gen_device_info *devinfo)
14353    switch (devinfo->gen) {
14359       if (devinfo->is_haswell) {
14367       if (devinfo->is_g4x) {
14391 _3DSTATE_CLIP_MaximumVPIndex_bits(const struct gen_device_info *devinfo)
14393    switch (devinfo->gen) {
14399       if (devinfo->is_haswell) {
14407       if (devinfo->is_g4x) {
14428 _3DSTATE_CLIP_MaximumVPIndex_start(const struct gen_device_info *devinfo)
14430    switch (devinfo->gen) {
14436       if (devinfo->is_haswell) {
14444       if (devinfo->is_g4x) {
14468 _3DSTATE_CLIP_MinimumPointWidth_bits(const struct gen_device_info *devinfo)
14470    switch (devinfo->gen) {
14476       if (devinfo->is_haswell) {
14484       if (devinfo->is_g4x) {
14505 _3DSTATE_CLIP_MinimumPointWidth_start(const struct gen_device_info *devinfo)
14507    switch (devinfo->gen) {
14513       if (devinfo->is_haswell) {
14521       if (devinfo->is_g4x) {
14545 _3DSTATE_CLIP_NonPerspectiveBarycentricEnable_bits(const struct gen_device_info *devinfo)
14547    switch (devinfo->gen) {
14553       if (devinfo->is_haswell) {
14561       if (devinfo->is_g4x) {
14582 _3DSTATE_CLIP_NonPerspectiveBarycentricEnable_start(const struct gen_device_info *devinfo)
14584    switch (devinfo->gen) {
14590       if (devinfo->is_haswell) {
14598       if (devinfo->is_g4x) {
14622 _3DSTATE_CLIP_PerspectiveDivideDisable_bits(const struct gen_device_info *devinfo)
14624    switch (devinfo->gen) {
14630       if (devinfo->is_haswell) {
14638       if (devinfo->is_g4x) {
14659 _3DSTATE_CLIP_PerspectiveDivideDisable_start(const struct gen_device_info *devinfo)
14661    switch (devinfo->gen) {
14667       if (devinfo->is_haswell) {
14675       if (devinfo->is_g4x) {
14699 _3DSTATE_CLIP_StatisticsEnable_bits(const struct gen_device_info *devinfo)
14701    switch (devinfo->gen) {
14707       if (devinfo->is_haswell) {
14715       if (devinfo->is_g4x) {
14736 _3DSTATE_CLIP_StatisticsEnable_start(const struct gen_device_info *devinfo)
14738    switch (devinfo->gen) {
14744       if (devinfo->is_haswell) {
14752       if (devinfo->is_g4x) {
14776 _3DSTATE_CLIP_TriangleFanProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
14778    switch (devinfo->gen) {
14784       if (devinfo->is_haswell) {
14792       if (devinfo->is_g4x) {
14813 _3DSTATE_CLIP_TriangleFanProvokingVertexSelect_start(const struct gen_device_info *devinfo)
14815    switch (devinfo->gen) {
14821       if (devinfo->is_haswell) {
14829       if (devinfo->is_g4x) {
14853 _3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
14855    switch (devinfo->gen) {
14861       if (devinfo->is_haswell) {
14869       if (devinfo->is_g4x) {
14890 _3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_start(const struct gen_device_info *devinfo)
14892    switch (devinfo->gen) {
14898       if (devinfo->is_haswell) {
14906       if (devinfo->is_g4x) {
14930 _3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_bits(const struct gen_device_info *devinfo)
14932    switch (devinfo->gen) {
14938       if (devinfo->is_haswell) {
14946       if (devinfo->is_g4x) {
14967 _3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_start(const struct gen_device_info *devinfo)
14969    switch (devinfo->gen) {
14975       if (devinfo->is_haswell) {
14983       if (devinfo->is_g4x) {
15007 _3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_bits(const struct gen_device_info *devinfo)
15009    switch (devinfo->gen) {
15015       if (devinfo->is_haswell) {
15023       if (devinfo->is_g4x) {
15044 _3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_start(const struct gen_device_info *devinfo)
15046    switch (devinfo->gen) {
15052       if (devinfo->is_haswell) {
15060       if (devinfo->is_g4x) {
15083 _3DSTATE_CLIP_VertexSubPixelPrecisionSelect_bits(const struct gen_device_info *devinfo)
15085    switch (devinfo->gen) {
15091       if (devinfo->is_haswell) {
15099       if (devinfo->is_g4x) {
15119 _3DSTATE_CLIP_VertexSubPixelPrecisionSelect_start(const struct gen_device_info *devinfo)
15121    switch (devinfo->gen) {
15127       if (devinfo->is_haswell) {
15135       if (devinfo->is_g4x) {
15159 _3DSTATE_CLIP_ViewportXYClipTestEnable_bits(const struct gen_device_info *devinfo)
15161    switch (devinfo->gen) {
15167       if (devinfo->is_haswell) {
15175       if (devinfo->is_g4x) {
15196 _3DSTATE_CLIP_ViewportXYClipTestEnable_start(const struct gen_device_info *devinfo)
15198    switch (devinfo->gen) {
15204       if (devinfo->is_haswell) {
15212       if (devinfo->is_g4x) {
15232 _3DSTATE_CLIP_ViewportZClipTestEnable_bits(const struct gen_device_info *devinfo)
15234    switch (devinfo->gen) {
15240       if (devinfo->is_haswell) {
15248       if (devinfo->is_g4x) {
15265 _3DSTATE_CLIP_ViewportZClipTestEnable_start(const struct gen_device_info *devinfo)
15267    switch (devinfo->gen) {
15273       if (devinfo->is_haswell) {
15281       if (devinfo->is_g4x) {
15305 _3DSTATE_CONSTANT_BODY_length(const struct gen_device_info *devinfo)
15307    switch (devinfo->gen) {
15313       if (devinfo->is_haswell) {
15321       if (devinfo->is_g4x) {
15344 _3DSTATE_CONSTANT_BODY_Buffer_bits(const struct gen_device_info *devinfo)
15346    switch (devinfo->gen) {
15352       if (devinfo->is_haswell) {
15360       if (devinfo->is_g4x) {
15380 _3DSTATE_CONSTANT_BODY_Buffer_start(const struct gen_device_info *devinfo)
15382    switch (devinfo->gen) {
15388       if (devinfo->is_haswell) {
15396       if (devinfo->is_g4x) {
15414 _3DSTATE_CONSTANT_BODY_ConstantBuffer0ReadLength_bits(const struct gen_device_info *devinfo)
15416    switch (devinfo->gen) {
15422       if (devinfo->is_haswell) {
15430       if (devinfo->is_g4x) {
15445 _3DSTATE_CONSTANT_BODY_ConstantBuffer0ReadLength_start(const struct gen_device_info *devinfo)
15447    switch (devinfo->gen) {
15453       if (devinfo->is_haswell) {
15461       if (devinfo->is_g4x) {
15479 _3DSTATE_CONSTANT_BODY_ConstantBuffer1ReadLength_bits(const struct gen_device_info *devinfo)
15481    switch (devinfo->gen) {
15487       if (devinfo->is_haswell) {
15495       if (devinfo->is_g4x) {
15510 _3DSTATE_CONSTANT_BODY_ConstantBuffer1ReadLength_start(const struct gen_device_info *devinfo)
15512    switch (devinfo->gen) {
15518       if (devinfo->is_haswell) {
15526       if (devinfo->is_g4x) {
15544 _3DSTATE_CONSTANT_BODY_ConstantBuffer2ReadLength_bits(const struct gen_device_info *devinfo)
15546    switch (devinfo->gen) {
15552       if (devinfo->is_haswell) {
15560       if (devinfo->is_g4x) {
15575 _3DSTATE_CONSTANT_BODY_ConstantBuffer2ReadLength_start(const struct gen_device_info *devinfo)
15577    switch (devinfo->gen) {
15583       if (devinfo->is_haswell) {
15591       if (devinfo->is_g4x) {
15609 _3DSTATE_CONSTANT_BODY_ConstantBuffer3ReadLength_bits(const struct gen_device_info *devinfo)
15611    switch (devinfo->gen) {
15617       if (devinfo->is_haswell) {
15625       if (devinfo->is_g4x) {
15640 _3DSTATE_CONSTANT_BODY_ConstantBuffer3ReadLength_start(const struct gen_device_info *devinfo)
15642    switch (devinfo->gen) {
15648       if (devinfo->is_haswell) {
15656       if (devinfo->is_g4x) {
15675 _3DSTATE_CONSTANT_BODY_MOCS_bits(const struct gen_device_info *devinfo)
15677    switch (devinfo->gen) {
15683       if (devinfo->is_haswell) {
15691       if (devinfo->is_g4x) {
15707 _3DSTATE_CONSTANT_BODY_MOCS_start(const struct gen_device_info *devinfo)
15709    switch (devinfo->gen) {
15715       if (devinfo->is_haswell) {
15723       if (devinfo->is_g4x) {
15741 _3DSTATE_CONSTANT_BODY_PointertoConstantBuffer0_bits(const struct gen_device_info *devinfo)
15743    switch (devinfo->gen) {
15749       if (devinfo->is_haswell) {
15757       if (devinfo->is_g4x) {
15772 _3DSTATE_CONSTANT_BODY_PointertoConstantBuffer0_start(const struct gen_device_info *devinfo)
15774    switch (devinfo->gen) {
15780       if (devinfo->is_haswell) {
15788       if (devinfo->is_g4x) {
15806 _3DSTATE_CONSTANT_BODY_PointertoConstantBuffer1_bits(const struct gen_device_info *devinfo)
15808    switch (devinfo->gen) {
15814       if (devinfo->is_haswell) {
15822       if (devinfo->is_g4x) {
15837 _3DSTATE_CONSTANT_BODY_PointertoConstantBuffer1_start(const struct gen_device_info *devinfo)
15839    switch (devinfo->gen) {
15845       if (devinfo->is_haswell) {
15853       if (devinfo->is_g4x) {
15871 _3DSTATE_CONSTANT_BODY_PointertoConstantBuffer2_bits(const struct gen_device_info *devinfo)
15873    switch (devinfo->gen) {
15879       if (devinfo->is_haswell) {
15887       if (devinfo->is_g4x) {
15902 _3DSTATE_CONSTANT_BODY_PointertoConstantBuffer2_start(const struct gen_device_info *devinfo)
15904    switch (devinfo->gen) {
15910       if (devinfo->is_haswell) {
15918       if (devinfo->is_g4x) {
15936 _3DSTATE_CONSTANT_BODY_PointertoConstantBuffer3_bits(const struct gen_device_info *devinfo)
15938    switch (devinfo->gen) {
15944       if (devinfo->is_haswell) {
15952       if (devinfo->is_g4x) {
15967 _3DSTATE_CONSTANT_BODY_PointertoConstantBuffer3_start(const struct gen_device_info *devinfo)
15969    switch (devinfo->gen) {
15975       if (devinfo->is_haswell) {
15983       if (devinfo->is_g4x) {
16006 _3DSTATE_CONSTANT_BODY_ReadLength_bits(const struct gen_device_info *devinfo)
16008    switch (devinfo->gen) {
16014       if (devinfo->is_haswell) {
16022       if (devinfo->is_g4x) {
16042 _3DSTATE_CONSTANT_BODY_ReadLength_start(const struct gen_device_info *devinfo)
16044    switch (devinfo->gen) {
16050       if (devinfo->is_haswell) {
16058       if (devinfo->is_g4x) {
16078 _3DSTATE_CONSTANT_COLOR_length(const struct gen_device_info *devinfo)
16080    switch (devinfo->gen) {
16086       if (devinfo->is_haswell) {
16094       if (devinfo->is_g4x) {
16114 _3DSTATE_CONSTANT_COLOR_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
16116    switch (devinfo->gen) {
16122       if (devinfo->is_haswell) {
16130       if (devinfo->is_g4x) {
16147 _3DSTATE_CONSTANT_COLOR_3DCommandOpcode_start(const struct gen_device_info *devinfo)
16149    switch (devinfo->gen) {
16155       if (devinfo->is_haswell) {
16163       if (devinfo->is_g4x) {
16183 _3DSTATE_CONSTANT_COLOR_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
16185    switch (devinfo->gen) {
16191       if (devinfo->is_haswell) {
16199       if (devinfo->is_g4x) {
16216 _3DSTATE_CONSTANT_COLOR_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
16218    switch (devinfo->gen) {
16224       if (devinfo->is_haswell) {
16232       if (devinfo->is_g4x) {
16252 _3DSTATE_CONSTANT_COLOR_BlendConstantColorAlpha_bits(const struct gen_device_info *devinfo)
16254    switch (devinfo->gen) {
16260       if (devinfo->is_haswell) {
16268       if (devinfo->is_g4x) {
16285 _3DSTATE_CONSTANT_COLOR_BlendConstantColorAlpha_start(const struct gen_device_info *devinfo)
16287    switch (devinfo->gen) {
16293       if (devinfo->is_haswell) {
16301       if (devinfo->is_g4x) {
16321 _3DSTATE_CONSTANT_COLOR_BlendConstantColorBlue_bits(const struct gen_device_info *devinfo)
16323    switch (devinfo->gen) {
16329       if (devinfo->is_haswell) {
16337       if (devinfo->is_g4x) {
16354 _3DSTATE_CONSTANT_COLOR_BlendConstantColorBlue_start(const struct gen_device_info *devinfo)
16356    switch (devinfo->gen) {
16362       if (devinfo->is_haswell) {
16370       if (devinfo->is_g4x) {
16390 _3DSTATE_CONSTANT_COLOR_BlendConstantColorGreen_bits(const struct gen_device_info *devinfo)
16392    switch (devinfo->gen) {
16398       if (devinfo->is_haswell) {
16406       if (devinfo->is_g4x) {
16423 _3DSTATE_CONSTANT_COLOR_BlendConstantColorGreen_start(const struct gen_device_info *devinfo)
16425    switch (devinfo->gen) {
16431       if (devinfo->is_haswell) {
16439       if (devinfo->is_g4x) {
16459 _3DSTATE_CONSTANT_COLOR_BlendConstantColorRed_bits(const struct gen_device_info *devinfo)
16461    switch (devinfo->gen) {
16467       if (devinfo->is_haswell) {
16475       if (devinfo->is_g4x) {
16492 _3DSTATE_CONSTANT_COLOR_BlendConstantColorRed_start(const struct gen_device_info *devinfo)
16494    switch (devinfo->gen) {
16500       if (devinfo->is_haswell) {
16508       if (devinfo->is_g4x) {
16528 _3DSTATE_CONSTANT_COLOR_CommandSubType_bits(const struct gen_device_info *devinfo)
16530    switch (devinfo->gen) {
16536       if (devinfo->is_haswell) {
16544       if (devinfo->is_g4x) {
16561 _3DSTATE_CONSTANT_COLOR_CommandSubType_start(const struct gen_device_info *devinfo)
16563    switch (devinfo->gen) {
16569       if (devinfo->is_haswell) {
16577       if (devinfo->is_g4x) {
16597 _3DSTATE_CONSTANT_COLOR_CommandType_bits(const struct gen_device_info *devinfo)
16599    switch (devinfo->gen) {
16605       if (devinfo->is_haswell) {
16613       if (devinfo->is_g4x) {
16630 _3DSTATE_CONSTANT_COLOR_CommandType_start(const struct gen_device_info *devinfo)
16632    switch (devinfo->gen) {
16638       if (devinfo->is_haswell) {
16646       if (devinfo->is_g4x) {
16666 _3DSTATE_CONSTANT_COLOR_DWordLength_bits(const struct gen_device_info *devinfo)
16668    switch (devinfo->gen) {
16674       if (devinfo->is_haswell) {
16682       if (devinfo->is_g4x) {
16699 _3DSTATE_CONSTANT_COLOR_DWordLength_start(const struct gen_device_info *devinfo)
16701    switch (devinfo->gen) {
16707       if (devinfo->is_haswell) {
16715       if (devinfo->is_g4x) {
16738 _3DSTATE_CONSTANT_DS_length(const struct gen_device_info *devinfo)
16740    switch (devinfo->gen) {
16746       if (devinfo->is_haswell) {
16754       if (devinfo->is_g4x) {
16777 _3DSTATE_CONSTANT_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
16779    switch (devinfo->gen) {
16785       if (devinfo->is_haswell) {
16793       if (devinfo->is_g4x) {
16813 _3DSTATE_CONSTANT_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
16815    switch (devinfo->gen) {
16821       if (devinfo->is_haswell) {
16829       if (devinfo->is_g4x) {
16852 _3DSTATE_CONSTANT_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
16854    switch (devinfo->gen) {
16860       if (devinfo->is_haswell) {
16868       if (devinfo->is_g4x) {
16888 _3DSTATE_CONSTANT_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
16890    switch (devinfo->gen) {
16896       if (devinfo->is_haswell) {
16904       if (devinfo->is_g4x) {
16927 _3DSTATE_CONSTANT_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
16929    switch (devinfo->gen) {
16935       if (devinfo->is_haswell) {
16943       if (devinfo->is_g4x) {
16963 _3DSTATE_CONSTANT_DS_CommandSubType_start(const struct gen_device_info *devinfo)
16965    switch (devinfo->gen) {
16971       if (devinfo->is_haswell) {
16979       if (devinfo->is_g4x) {
17002 _3DSTATE_CONSTANT_DS_CommandType_bits(const struct gen_device_info *devinfo)
17004    switch (devinfo->gen) {
17010       if (devinfo->is_haswell) {
17018       if (devinfo->is_g4x) {
17038 _3DSTATE_CONSTANT_DS_CommandType_start(const struct gen_device_info *devinfo)
17040    switch (devinfo->gen) {
17046       if (devinfo->is_haswell) {
17054       if (devinfo->is_g4x) {
17077 _3DSTATE_CONSTANT_DS_ConstantBody_bits(const struct gen_device_info *devinfo)
17079    switch (devinfo->gen) {
17085       if (devinfo->is_haswell) {
17093       if (devinfo->is_g4x) {
17113 _3DSTATE_CONSTANT_DS_ConstantBody_start(const struct gen_device_info *devinfo)
17115    switch (devinfo->gen) {
17121       if (devinfo->is_haswell) {
17129       if (devinfo->is_g4x) {
17152 _3DSTATE_CONSTANT_DS_DWordLength_bits(const struct gen_device_info *devinfo)
17154    switch (devinfo->gen) {
17160       if (devinfo->is_haswell) {
17168       if (devinfo->is_g4x) {
17188 _3DSTATE_CONSTANT_DS_DWordLength_start(const struct gen_device_info *devinfo)
17190    switch (devinfo->gen) {
17196       if (devinfo->is_haswell) {
17204       if (devinfo->is_g4x) {
17225 _3DSTATE_CONSTANT_DS_MOCS_bits(const struct gen_device_info *devinfo)
17227    switch (devinfo->gen) {
17233       if (devinfo->is_haswell) {
17241       if (devinfo->is_g4x) {
17259 _3DSTATE_CONSTANT_DS_MOCS_start(const struct gen_device_info *devinfo)
17261    switch (devinfo->gen) {
17267       if (devinfo->is_haswell) {
17275       if (devinfo->is_g4x) {
17299 _3DSTATE_CONSTANT_GS_length(const struct gen_device_info *devinfo)
17301    switch (devinfo->gen) {
17307       if (devinfo->is_haswell) {
17315       if (devinfo->is_g4x) {
17339 _3DSTATE_CONSTANT_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
17341    switch (devinfo->gen) {
17347       if (devinfo->is_haswell) {
17355       if (devinfo->is_g4x) {
17376 _3DSTATE_CONSTANT_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
17378    switch (devinfo->gen) {
17384       if (devinfo->is_haswell) {
17392       if (devinfo->is_g4x) {
17416 _3DSTATE_CONSTANT_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
17418    switch (devinfo->gen) {
17424       if (devinfo->is_haswell) {
17432       if (devinfo->is_g4x) {
17453 _3DSTATE_CONSTANT_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
17455    switch (devinfo->gen) {
17461       if (devinfo->is_haswell) {
17469       if (devinfo->is_g4x) {
17487 _3DSTATE_CONSTANT_GS_Buffer0Valid_bits(const struct gen_device_info *devinfo)
17489    switch (devinfo->gen) {
17495       if (devinfo->is_haswell) {
17503       if (devinfo->is_g4x) {
17518 _3DSTATE_CONSTANT_GS_Buffer0Valid_start(const struct gen_device_info *devinfo)
17520    switch (devinfo->gen) {
17526       if (devinfo->is_haswell) {
17534       if (devinfo->is_g4x) {
17552 _3DSTATE_CONSTANT_GS_Buffer1Valid_bits(const struct gen_device_info *devinfo)
17554    switch (devinfo->gen) {
17560       if (devinfo->is_haswell) {
17568       if (devinfo->is_g4x) {
17583 _3DSTATE_CONSTANT_GS_Buffer1Valid_start(const struct gen_device_info *devinfo)
17585    switch (devinfo->gen) {
17591       if (devinfo->is_haswell) {
17599       if (devinfo->is_g4x) {
17617 _3DSTATE_CONSTANT_GS_Buffer2Valid_bits(const struct gen_device_info *devinfo)
17619    switch (devinfo->gen) {
17625       if (devinfo->is_haswell) {
17633       if (devinfo->is_g4x) {
17648 _3DSTATE_CONSTANT_GS_Buffer2Valid_start(const struct gen_device_info *devinfo)
17650    switch (devinfo->gen) {
17656       if (devinfo->is_haswell) {
17664       if (devinfo->is_g4x) {
17682 _3DSTATE_CONSTANT_GS_Buffer3Valid_bits(const struct gen_device_info *devinfo)
17684    switch (devinfo->gen) {
17690       if (devinfo->is_haswell) {
17698       if (devinfo->is_g4x) {
17713 _3DSTATE_CONSTANT_GS_Buffer3Valid_start(const struct gen_device_info *devinfo)
17715    switch (devinfo->gen) {
17721       if (devinfo->is_haswell) {
17729       if (devinfo->is_g4x) {
17753 _3DSTATE_CONSTANT_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
17755    switch (devinfo->gen) {
17761       if (devinfo->is_haswell) {
17769       if (devinfo->is_g4x) {
17790 _3DSTATE_CONSTANT_GS_CommandSubType_start(const struct gen_device_info *devinfo)
17792    switch (devinfo->gen) {
17798       if (devinfo->is_haswell) {
17806       if (devinfo->is_g4x) {
17830 _3DSTATE_CONSTANT_GS_CommandType_bits(const struct gen_device_info *devinfo)
17832    switch (devinfo->gen) {
17838       if (devinfo->is_haswell) {
17846       if (devinfo->is_g4x) {
17867 _3DSTATE_CONSTANT_GS_CommandType_start(const struct gen_device_info *devinfo)
17869    switch (devinfo->gen) {
17875       if (devinfo->is_haswell) {
17883       if (devinfo->is_g4x) {
17907 _3DSTATE_CONSTANT_GS_ConstantBody_bits(const struct gen_device_info *devinfo)
17909    switch (devinfo->gen) {
17915       if (devinfo->is_haswell) {
17923       if (devinfo->is_g4x) {
17944 _3DSTATE_CONSTANT_GS_ConstantBody_start(const struct gen_device_info *devinfo)
17946    switch (devinfo->gen) {
17952       if (devinfo->is_haswell) {
17960       if (devinfo->is_g4x) {
17984 _3DSTATE_CONSTANT_GS_DWordLength_bits(const struct gen_device_info *devinfo)
17986    switch (devinfo->gen) {
17992       if (devinfo->is_haswell) {
18000       if (devinfo->is_g4x) {
18021 _3DSTATE_CONSTANT_GS_DWordLength_start(const struct gen_device_info *devinfo)
18023    switch (devinfo->gen) {
18029       if (devinfo->is_haswell) {
18037       if (devinfo->is_g4x) {
18059 _3DSTATE_CONSTANT_GS_MOCS_bits(const struct gen_device_info *devinfo)
18061    switch (devinfo->gen) {
18067       if (devinfo->is_haswell) {
18075       if (devinfo->is_g4x) {
18094 _3DSTATE_CONSTANT_GS_MOCS_start(const struct gen_device_info *devinfo)
18096    switch (devinfo->gen) {
18102       if (devinfo->is_haswell) {
18110       if (devinfo->is_g4x) {
18133 _3DSTATE_CONSTANT_HS_length(const struct gen_device_info *devinfo)
18135    switch (devinfo->gen) {
18141       if (devinfo->is_haswell) {
18149       if (devinfo->is_g4x) {
18172 _3DSTATE_CONSTANT_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
18174    switch (devinfo->gen) {
18180       if (devinfo->is_haswell) {
18188       if (devinfo->is_g4x) {
18208 _3DSTATE_CONSTANT_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
18210    switch (devinfo->gen) {
18216       if (devinfo->is_haswell) {
18224       if (devinfo->is_g4x) {
18247 _3DSTATE_CONSTANT_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
18249    switch (devinfo->gen) {
18255       if (devinfo->is_haswell) {
18263       if (devinfo->is_g4x) {
18283 _3DSTATE_CONSTANT_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
18285    switch (devinfo->gen) {
18291       if (devinfo->is_haswell) {
18299       if (devinfo->is_g4x) {
18322 _3DSTATE_CONSTANT_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
18324    switch (devinfo->gen) {
18330       if (devinfo->is_haswell) {
18338       if (devinfo->is_g4x) {
18358 _3DSTATE_CONSTANT_HS_CommandSubType_start(const struct gen_device_info *devinfo)
18360    switch (devinfo->gen) {
18366       if (devinfo->is_haswell) {
18374       if (devinfo->is_g4x) {
18397 _3DSTATE_CONSTANT_HS_CommandType_bits(const struct gen_device_info *devinfo)
18399    switch (devinfo->gen) {
18405       if (devinfo->is_haswell) {
18413       if (devinfo->is_g4x) {
18433 _3DSTATE_CONSTANT_HS_CommandType_start(const struct gen_device_info *devinfo)
18435    switch (devinfo->gen) {
18441       if (devinfo->is_haswell) {
18449       if (devinfo->is_g4x) {
18472 _3DSTATE_CONSTANT_HS_ConstantBody_bits(const struct gen_device_info *devinfo)
18474    switch (devinfo->gen) {
18480       if (devinfo->is_haswell) {
18488       if (devinfo->is_g4x) {
18508 _3DSTATE_CONSTANT_HS_ConstantBody_start(const struct gen_device_info *devinfo)
18510    switch (devinfo->gen) {
18516       if (devinfo->is_haswell) {
18524       if (devinfo->is_g4x) {
18547 _3DSTATE_CONSTANT_HS_DWordLength_bits(const struct gen_device_info *devinfo)
18549    switch (devinfo->gen) {
18555       if (devinfo->is_haswell) {
18563       if (devinfo->is_g4x) {
18583 _3DSTATE_CONSTANT_HS_DWordLength_start(const struct gen_device_info *devinfo)
18585    switch (devinfo->gen) {
18591       if (devinfo->is_haswell) {
18599       if (devinfo->is_g4x) {
18620 _3DSTATE_CONSTANT_HS_MOCS_bits(const struct gen_device_info *devinfo)
18622    switch (devinfo->gen) {
18628       if (devinfo->is_haswell) {
18636       if (devinfo->is_g4x) {
18654 _3DSTATE_CONSTANT_HS_MOCS_start(const struct gen_device_info *devinfo)
18656    switch (devinfo->gen) {
18662       if (devinfo->is_haswell) {
18670       if (devinfo->is_g4x) {
18694 _3DSTATE_CONSTANT_PS_length(const struct gen_device_info *devinfo)
18696    switch (devinfo->gen) {
18702       if (devinfo->is_haswell) {
18710       if (devinfo->is_g4x) {
18734 _3DSTATE_CONSTANT_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
18736    switch (devinfo->gen) {
18742       if (devinfo->is_haswell) {
18750       if (devinfo->is_g4x) {
18771 _3DSTATE_CONSTANT_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
18773    switch (devinfo->gen) {
18779       if (devinfo->is_haswell) {
18787       if (devinfo->is_g4x) {
18811 _3DSTATE_CONSTANT_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
18813    switch (devinfo->gen) {
18819       if (devinfo->is_haswell) {
18827       if (devinfo->is_g4x) {
18848 _3DSTATE_CONSTANT_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
18850    switch (devinfo->gen) {
18856       if (devinfo->is_haswell) {
18864       if (devinfo->is_g4x) {
18882 _3DSTATE_CONSTANT_PS_Buffer0Valid_bits(const struct gen_device_info *devinfo)
18884    switch (devinfo->gen) {
18890       if (devinfo->is_haswell) {
18898       if (devinfo->is_g4x) {
18913 _3DSTATE_CONSTANT_PS_Buffer0Valid_start(const struct gen_device_info *devinfo)
18915    switch (devinfo->gen) {
18921       if (devinfo->is_haswell) {
18929       if (devinfo->is_g4x) {
18947 _3DSTATE_CONSTANT_PS_Buffer1Valid_bits(const struct gen_device_info *devinfo)
18949    switch (devinfo->gen) {
18955       if (devinfo->is_haswell) {
18963       if (devinfo->is_g4x) {
18978 _3DSTATE_CONSTANT_PS_Buffer1Valid_start(const struct gen_device_info *devinfo)
18980    switch (devinfo->gen) {
18986       if (devinfo->is_haswell) {
18994       if (devinfo->is_g4x) {
19012 _3DSTATE_CONSTANT_PS_Buffer2Valid_bits(const struct gen_device_info *devinfo)
19014    switch (devinfo->gen) {
19020       if (devinfo->is_haswell) {
19028       if (devinfo->is_g4x) {
19043 _3DSTATE_CONSTANT_PS_Buffer2Valid_start(const struct gen_device_info *devinfo)
19045    switch (devinfo->gen) {
19051       if (devinfo->is_haswell) {
19059       if (devinfo->is_g4x) {
19077 _3DSTATE_CONSTANT_PS_Buffer3Valid_bits(const struct gen_device_info *devinfo)
19079    switch (devinfo->gen) {
19085       if (devinfo->is_haswell) {
19093       if (devinfo->is_g4x) {
19108 _3DSTATE_CONSTANT_PS_Buffer3Valid_start(const struct gen_device_info *devinfo)
19110    switch (devinfo->gen) {
19116       if (devinfo->is_haswell) {
19124       if (devinfo->is_g4x) {
19148 _3DSTATE_CONSTANT_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
19150    switch (devinfo->gen) {
19156       if (devinfo->is_haswell) {
19164       if (devinfo->is_g4x) {
19185 _3DSTATE_CONSTANT_PS_CommandSubType_start(const struct gen_device_info *devinfo)
19187    switch (devinfo->gen) {
19193       if (devinfo->is_haswell) {
19201       if (devinfo->is_g4x) {
19225 _3DSTATE_CONSTANT_PS_CommandType_bits(const struct gen_device_info *devinfo)
19227    switch (devinfo->gen) {
19233       if (devinfo->is_haswell) {
19241       if (devinfo->is_g4x) {
19262 _3DSTATE_CONSTANT_PS_CommandType_start(const struct gen_device_info *devinfo)
19264    switch (devinfo->gen) {
19270       if (devinfo->is_haswell) {
19278       if (devinfo->is_g4x) {
19302 _3DSTATE_CONSTANT_PS_ConstantBody_bits(const struct gen_device_info *devinfo)
19304    switch (devinfo->gen) {
19310       if (devinfo->is_haswell) {
19318       if (devinfo->is_g4x) {
19339 _3DSTATE_CONSTANT_PS_ConstantBody_start(const struct gen_device_info *devinfo)
19341    switch (devinfo->gen) {
19347       if (devinfo->is_haswell) {
19355       if (devinfo->is_g4x) {
19379 _3DSTATE_CONSTANT_PS_DWordLength_bits(const struct gen_device_info *devinfo)
19381    switch (devinfo->gen) {
19387       if (devinfo->is_haswell) {
19395       if (devinfo->is_g4x) {
19416 _3DSTATE_CONSTANT_PS_DWordLength_start(const struct gen_device_info *devinfo)
19418    switch (devinfo->gen) {
19424       if (devinfo->is_haswell) {
19432       if (devinfo->is_g4x) {
19451 _3DSTATE_CONSTANT_PS_DisableGatheratSetShaderHint_bits(const struct gen_device_info *devinfo)
19453    switch (devinfo->gen) {
19459       if (devinfo->is_haswell) {
19467       if (devinfo->is_g4x) {
19483 _3DSTATE_CONSTANT_PS_DisableGatheratSetShaderHint_start(const struct gen_device_info *devinfo)
19485    switch (devinfo->gen) {
19491       if (devinfo->is_haswell) {
19499       if (devinfo->is_g4x) {
19521 _3DSTATE_CONSTANT_PS_MOCS_bits(const struct gen_device_info *devinfo)
19523    switch (devinfo->gen) {
19529       if (devinfo->is_haswell) {
19537       if (devinfo->is_g4x) {
19556 _3DSTATE_CONSTANT_PS_MOCS_start(const struct gen_device_info *devinfo)
19558    switch (devinfo->gen) {
19564       if (devinfo->is_haswell) {
19572       if (devinfo->is_g4x) {
19596 _3DSTATE_CONSTANT_VS_length(const struct gen_device_info *devinfo)
19598    switch (devinfo->gen) {
19604       if (devinfo->is_haswell) {
19612       if (devinfo->is_g4x) {
19636 _3DSTATE_CONSTANT_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
19638    switch (devinfo->gen) {
19644       if (devinfo->is_haswell) {
19652       if (devinfo->is_g4x) {
19673 _3DSTATE_CONSTANT_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
19675    switch (devinfo->gen) {
19681       if (devinfo->is_haswell) {
19689       if (devinfo->is_g4x) {
19713 _3DSTATE_CONSTANT_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
19715    switch (devinfo->gen) {
19721       if (devinfo->is_haswell) {
19729       if (devinfo->is_g4x) {
19750 _3DSTATE_CONSTANT_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
19752    switch (devinfo->gen) {
19758       if (devinfo->is_haswell) {
19766       if (devinfo->is_g4x) {
19784 _3DSTATE_CONSTANT_VS_Buffer0Valid_bits(const struct gen_device_info *devinfo)
19786    switch (devinfo->gen) {
19792       if (devinfo->is_haswell) {
19800       if (devinfo->is_g4x) {
19815 _3DSTATE_CONSTANT_VS_Buffer0Valid_start(const struct gen_device_info *devinfo)
19817    switch (devinfo->gen) {
19823       if (devinfo->is_haswell) {
19831       if (devinfo->is_g4x) {
19849 _3DSTATE_CONSTANT_VS_Buffer1Valid_bits(const struct gen_device_info *devinfo)
19851    switch (devinfo->gen) {
19857       if (devinfo->is_haswell) {
19865       if (devinfo->is_g4x) {
19880 _3DSTATE_CONSTANT_VS_Buffer1Valid_start(const struct gen_device_info *devinfo)
19882    switch (devinfo->gen) {
19888       if (devinfo->is_haswell) {
19896       if (devinfo->is_g4x) {
19914 _3DSTATE_CONSTANT_VS_Buffer2Valid_bits(const struct gen_device_info *devinfo)
19916    switch (devinfo->gen) {
19922       if (devinfo->is_haswell) {
19930       if (devinfo->is_g4x) {
19945 _3DSTATE_CONSTANT_VS_Buffer2Valid_start(const struct gen_device_info *devinfo)
19947    switch (devinfo->gen) {
19953       if (devinfo->is_haswell) {
19961       if (devinfo->is_g4x) {
19979 _3DSTATE_CONSTANT_VS_Buffer3Valid_bits(const struct gen_device_info *devinfo)
19981    switch (devinfo->gen) {
19987       if (devinfo->is_haswell) {
19995       if (devinfo->is_g4x) {
20010 _3DSTATE_CONSTANT_VS_Buffer3Valid_start(const struct gen_device_info *devinfo)
20012    switch (devinfo->gen) {
20018       if (devinfo->is_haswell) {
20026       if (devinfo->is_g4x) {
20050 _3DSTATE_CONSTANT_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
20052    switch (devinfo->gen) {
20058       if (devinfo->is_haswell) {
20066       if (devinfo->is_g4x) {
20087 _3DSTATE_CONSTANT_VS_CommandSubType_start(const struct gen_device_info *devinfo)
20089    switch (devinfo->gen) {
20095       if (devinfo->is_haswell) {
20103       if (devinfo->is_g4x) {
20127 _3DSTATE_CONSTANT_VS_CommandType_bits(const struct gen_device_info *devinfo)
20129    switch (devinfo->gen) {
20135       if (devinfo->is_haswell) {
20143       if (devinfo->is_g4x) {
20164 _3DSTATE_CONSTANT_VS_CommandType_start(const struct gen_device_info *devinfo)
20166    switch (devinfo->gen) {
20172       if (devinfo->is_haswell) {
20180       if (devinfo->is_g4x) {
20204 _3DSTATE_CONSTANT_VS_ConstantBody_bits(const struct gen_device_info *devinfo)
20206    switch (devinfo->gen) {
20212       if (devinfo->is_haswell) {
20220       if (devinfo->is_g4x) {
20241 _3DSTATE_CONSTANT_VS_ConstantBody_start(const struct gen_device_info *devinfo)
20243    switch (devinfo->gen) {
20249       if (devinfo->is_haswell) {
20257       if (devinfo->is_g4x) {
20281 _3DSTATE_CONSTANT_VS_DWordLength_bits(const struct gen_device_info *devinfo)
20283    switch (devinfo->gen) {
20289       if (devinfo->is_haswell) {
20297       if (devinfo->is_g4x) {
20318 _3DSTATE_CONSTANT_VS_DWordLength_start(const struct gen_device_info *devinfo)
20320    switch (devinfo->gen) {
20326       if (devinfo->is_haswell) {
20334       if (devinfo->is_g4x) {
20356 _3DSTATE_CONSTANT_VS_MOCS_bits(const struct gen_device_info *devinfo)
20358    switch (devinfo->gen) {
20364       if (devinfo->is_haswell) {
20372       if (devinfo->is_g4x) {
20391 _3DSTATE_CONSTANT_VS_MOCS_start(const struct gen_device_info *devinfo)
20393    switch (devinfo->gen) {
20399       if (devinfo->is_haswell) {
20407       if (devinfo->is_g4x) {
20434 _3DSTATE_DEPTH_BUFFER_length(const struct gen_device_info *devinfo)
20436    switch (devinfo->gen) {
20442       if (devinfo->is_haswell) {
20450       if (devinfo->is_g4x) {
20477 _3DSTATE_DEPTH_BUFFER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
20479    switch (devinfo->gen) {
20485       if (devinfo->is_haswell) {
20493       if (devinfo->is_g4x) {
20517 _3DSTATE_DEPTH_BUFFER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
20519    switch (devinfo->gen) {
20525       if (devinfo->is_haswell) {
20533       if (devinfo->is_g4x) {
20560 _3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
20562    switch (devinfo->gen) {
20568       if (devinfo->is_haswell) {
20576       if (devinfo->is_g4x) {
20600 _3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
20602    switch (devinfo->gen) {
20608       if (devinfo->is_haswell) {
20616       if (devinfo->is_g4x) {
20643 _3DSTATE_DEPTH_BUFFER_CommandSubType_bits(const struct gen_device_info *devinfo)
20645    switch (devinfo->gen) {
20651       if (devinfo->is_haswell) {
20659       if (devinfo->is_g4x) {
20683 _3DSTATE_DEPTH_BUFFER_CommandSubType_start(const struct gen_device_info *devinfo)
20685    switch (devinfo->gen) {
20691       if (devinfo->is_haswell) {
20699       if (devinfo->is_g4x) {
20726 _3DSTATE_DEPTH_BUFFER_CommandType_bits(const struct gen_device_info *devinfo)
20728    switch (devinfo->gen) {
20734       if (devinfo->is_haswell) {
20742       if (devinfo->is_g4x) {
20766 _3DSTATE_DEPTH_BUFFER_CommandType_start(const struct gen_device_info *devinfo)
20768    switch (devinfo->gen) {
20774       if (devinfo->is_haswell) {
20782       if (devinfo->is_g4x) {
20809 _3DSTATE_DEPTH_BUFFER_DWordLength_bits(const struct gen_device_info *devinfo)
20811    switch (devinfo->gen) {
20817       if (devinfo->is_haswell) {
20825       if (devinfo->is_g4x) {
20849 _3DSTATE_DEPTH_BUFFER_DWordLength_start(const struct gen_device_info *devinfo)
20851    switch (devinfo->gen) {
20857       if (devinfo->is_haswell) {
20865       if (devinfo->is_g4x) {
20892 _3DSTATE_DEPTH_BUFFER_Depth_bits(const struct gen_device_info *devinfo)
20894    switch (devinfo->gen) {
20900       if (devinfo->is_haswell) {
20908       if (devinfo->is_g4x) {
20932 _3DSTATE_DEPTH_BUFFER_Depth_start(const struct gen_device_info *devinfo)
20934    switch (devinfo->gen) {
20940       if (devinfo->is_haswell) {
20948       if (devinfo->is_g4x) {
20967 _3DSTATE_DEPTH_BUFFER_DepthBufferCoordinateOffsetDisable_bits(const struct gen_device_info *devinfo)
20969    switch (devinfo->gen) {
20975       if (devinfo->is_haswell) {
20983       if (devinfo->is_g4x) {
20999 _3DSTATE_DEPTH_BUFFER_DepthBufferCoordinateOffsetDisable_start(const struct gen_device_info *devinfo)
21001    switch (devinfo->gen) {
21007       if (devinfo->is_haswell) {
21015       if (devinfo->is_g4x) {
21037 _3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_bits(const struct gen_device_info *devinfo)
21039    switch (devinfo->gen) {
21045       if (devinfo->is_haswell) {
21053       if (devinfo->is_g4x) {
21072 _3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_start(const struct gen_device_info *devinfo)
21074    switch (devinfo->gen) {
21080       if (devinfo->is_haswell) {
21088       if (devinfo->is_g4x) {
21110 _3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_bits(const struct gen_device_info *devinfo)
21112    switch (devinfo->gen) {
21118       if (devinfo->is_haswell) {
21126       if (devinfo->is_g4x) {
21145 _3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_start(const struct gen_device_info *devinfo)
21147    switch (devinfo->gen) {
21153       if (devinfo->is_haswell) {
21161       if (devinfo->is_g4x) {
21184 _3DSTATE_DEPTH_BUFFER_DepthWriteEnable_bits(const struct gen_device_info *devinfo)
21186    switch (devinfo->gen) {
21192       if (devinfo->is_haswell) {
21200       if (devinfo->is_g4x) {
21220 _3DSTATE_DEPTH_BUFFER_DepthWriteEnable_start(const struct gen_device_info *devinfo)
21222    switch (devinfo->gen) {
21228       if (devinfo->is_haswell) {
21236       if (devinfo->is_g4x) {
21263 _3DSTATE_DEPTH_BUFFER_Height_bits(const struct gen_device_info *devinfo)
21265    switch (devinfo->gen) {
21271       if (devinfo->is_haswell) {
21279       if (devinfo->is_g4x) {
21303 _3DSTATE_DEPTH_BUFFER_Height_start(const struct gen_device_info *devinfo)
21305    switch (devinfo->gen) {
21311       if (devinfo->is_haswell) {
21319       if (devinfo->is_g4x) {
21344 _3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_bits(const struct gen_device_info *devinfo)
21346    switch (devinfo->gen) {
21352       if (devinfo->is_haswell) {
21360       if (devinfo->is_g4x) {
21382 _3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_start(const struct gen_device_info *devinfo)
21384    switch (devinfo->gen) {
21390       if (devinfo->is_haswell) {
21398       if (devinfo->is_g4x) {
21425 _3DSTATE_DEPTH_BUFFER_LOD_bits(const struct gen_device_info *devinfo)
21427    switch (devinfo->gen) {
21433       if (devinfo->is_haswell) {
21441       if (devinfo->is_g4x) {
21465 _3DSTATE_DEPTH_BUFFER_LOD_start(const struct gen_device_info *devinfo)
21467    switch (devinfo->gen) {
21473       if (devinfo->is_haswell) {
21481       if (devinfo->is_g4x) {
21502 _3DSTATE_DEPTH_BUFFER_MIPMapLayoutMode_bits(const struct gen_device_info *devinfo)
21504    switch (devinfo->gen) {
21510       if (devinfo->is_haswell) {
21518       if (devinfo->is_g4x) {
21536 _3DSTATE_DEPTH_BUFFER_MIPMapLayoutMode_start(const struct gen_device_info *devinfo)
21538    switch (devinfo->gen) {
21544       if (devinfo->is_haswell) {
21552       if (devinfo->is_g4x) {
21576 _3DSTATE_DEPTH_BUFFER_MOCS_bits(const struct gen_device_info *devinfo)
21578    switch (devinfo->gen) {
21584       if (devinfo->is_haswell) {
21592       if (devinfo->is_g4x) {
21613 _3DSTATE_DEPTH_BUFFER_MOCS_start(const struct gen_device_info *devinfo)
21615    switch (devinfo->gen) {
21621       if (devinfo->is_haswell) {
21629       if (devinfo->is_g4x) {
21656 _3DSTATE_DEPTH_BUFFER_MinimumArrayElement_bits(const struct gen_device_info *devinfo)
21658    switch (devinfo->gen) {
21664       if (devinfo->is_haswell) {
21672       if (devinfo->is_g4x) {
21696 _3DSTATE_DEPTH_BUFFER_MinimumArrayElement_start(const struct gen_device_info *devinfo)
21698    switch (devinfo->gen) {
21704       if (devinfo->is_haswell) {
21712       if (devinfo->is_g4x) {
21732 _3DSTATE_DEPTH_BUFFER_MipTailStartLOD_bits(const struct gen_device_info *devinfo)
21734    switch (devinfo->gen) {
21740       if (devinfo->is_haswell) {
21748       if (devinfo->is_g4x) {
21765 _3DSTATE_DEPTH_BUFFER_MipTailStartLOD_start(const struct gen_device_info *devinfo)
21767    switch (devinfo->gen) {
21773       if (devinfo->is_haswell) {
21781       if (devinfo->is_g4x) {
21808 _3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_bits(const struct gen_device_info *devinfo)
21810    switch (devinfo->gen) {
21816       if (devinfo->is_haswell) {
21824       if (devinfo->is_g4x) {
21848 _3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_start(const struct gen_device_info *devinfo)
21850    switch (devinfo->gen) {
21856       if (devinfo->is_haswell) {
21864       if (devinfo->is_g4x) {
21883 _3DSTATE_DEPTH_BUFFER_SeparateStencilBufferEnable_bits(const struct gen_device_info *devinfo)
21885    switch (devinfo->gen) {
21891       if (devinfo->is_haswell) {
21899       if (devinfo->is_g4x) {
21915 _3DSTATE_DEPTH_BUFFER_SeparateStencilBufferEnable_start(const struct gen_device_info *devinfo)
21917    switch (devinfo->gen) {
21923       if (devinfo->is_haswell) {
21931       if (devinfo->is_g4x) {
21952 _3DSTATE_DEPTH_BUFFER_SoftwareTiledRenderingMode_bits(const struct gen_device_info *devinfo)
21954    switch (devinfo->gen) {
21960       if (devinfo->is_haswell) {
21968       if (devinfo->is_g4x) {
21986 _3DSTATE_DEPTH_BUFFER_SoftwareTiledRenderingMode_start(const struct gen_device_info *devinfo)
21988    switch (devinfo->gen) {
21994       if (devinfo->is_haswell) {
22002       if (devinfo->is_g4x) {
22025 _3DSTATE_DEPTH_BUFFER_StencilWriteEnable_bits(const struct gen_device_info *devinfo)
22027    switch (devinfo->gen) {
22033       if (devinfo->is_haswell) {
22041       if (devinfo->is_g4x) {
22061 _3DSTATE_DEPTH_BUFFER_StencilWriteEnable_start(const struct gen_device_info *devinfo)
22063    switch (devinfo->gen) {
22069       if (devinfo->is_haswell) {
22077       if (devinfo->is_g4x) {
22104 _3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_bits(const struct gen_device_info *devinfo)
22106    switch (devinfo->gen) {
22112       if (devinfo->is_haswell) {
22120       if (devinfo->is_g4x) {
22144 _3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_start(const struct gen_device_info *devinfo)
22146    switch (devinfo->gen) {
22152       if (devinfo->is_haswell) {
22160       if (devinfo->is_g4x) {
22187 _3DSTATE_DEPTH_BUFFER_SurfaceFormat_bits(const struct gen_device_info *devinfo)
22189    switch (devinfo->gen) {
22195       if (devinfo->is_haswell) {
22203       if (devinfo->is_g4x) {
22227 _3DSTATE_DEPTH_BUFFER_SurfaceFormat_start(const struct gen_device_info *devinfo)
22229    switch (devinfo->gen) {
22235       if (devinfo->is_haswell) {
22243       if (devinfo->is_g4x) {
22270 _3DSTATE_DEPTH_BUFFER_SurfacePitch_bits(const struct gen_device_info *devinfo)
22272    switch (devinfo->gen) {
22278       if (devinfo->is_haswell) {
22286       if (devinfo->is_g4x) {
22310 _3DSTATE_DEPTH_BUFFER_SurfacePitch_start(const struct gen_device_info *devinfo)
22312    switch (devinfo->gen) {
22318       if (devinfo->is_haswell) {
22326       if (devinfo->is_g4x) {
22347 _3DSTATE_DEPTH_BUFFER_SurfaceQPitch_bits(const struct gen_device_info *devinfo)
22349    switch (devinfo->gen) {
22355       if (devinfo->is_haswell) {
22363       if (devinfo->is_g4x) {
22381 _3DSTATE_DEPTH_BUFFER_SurfaceQPitch_start(const struct gen_device_info *devinfo)
22383    switch (devinfo->gen) {
22389       if (devinfo->is_haswell) {
22397       if (devinfo->is_g4x) {
22424 _3DSTATE_DEPTH_BUFFER_SurfaceType_bits(const struct gen_device_info *devinfo)
22426    switch (devinfo->gen) {
22432       if (devinfo->is_haswell) {
22440       if (devinfo->is_g4x) {
22464 _3DSTATE_DEPTH_BUFFER_SurfaceType_start(const struct gen_device_info *devinfo)
22466    switch (devinfo->gen) {
22472       if (devinfo->is_haswell) {
22480       if (devinfo->is_g4x) {
22501 _3DSTATE_DEPTH_BUFFER_TileWalk_bits(const struct gen_device_info *devinfo)
22503    switch (devinfo->gen) {
22509       if (devinfo->is_haswell) {
22517       if (devinfo->is_g4x) {
22535 _3DSTATE_DEPTH_BUFFER_TileWalk_start(const struct gen_device_info *devinfo)
22537    switch (devinfo->gen) {
22543       if (devinfo->is_haswell) {
22551       if (devinfo->is_g4x) {
22571 _3DSTATE_DEPTH_BUFFER_TiledResourceMode_bits(const struct gen_device_info *devinfo)
22573    switch (devinfo->gen) {
22579       if (devinfo->is_haswell) {
22587       if (devinfo->is_g4x) {
22604 _3DSTATE_DEPTH_BUFFER_TiledResourceMode_start(const struct gen_device_info *devinfo)
22606    switch (devinfo->gen) {
22612       if (devinfo->is_haswell) {
22620       if (devinfo->is_g4x) {
22641 _3DSTATE_DEPTH_BUFFER_TiledSurface_bits(const struct gen_device_info *devinfo)
22643    switch (devinfo->gen) {
22649       if (devinfo->is_haswell) {
22657       if (devinfo->is_g4x) {
22675 _3DSTATE_DEPTH_BUFFER_TiledSurface_start(const struct gen_device_info *devinfo)
22677    switch (devinfo->gen) {
22683       if (devinfo->is_haswell) {
22691       if (devinfo->is_g4x) {
22718 _3DSTATE_DEPTH_BUFFER_Width_bits(const struct gen_device_info *devinfo)
22720    switch (devinfo->gen) {
22726       if (devinfo->is_haswell) {
22734       if (devinfo->is_g4x) {
22758 _3DSTATE_DEPTH_BUFFER_Width_start(const struct gen_device_info *devinfo)
22760    switch (devinfo->gen) {
22766       if (devinfo->is_haswell) {
22774       if (devinfo->is_g4x) {
22793 _3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length(const struct gen_device_info *devinfo)
22795    switch (devinfo->gen) {
22801       if (devinfo->is_haswell) {
22809       if (devinfo->is_g4x) {
22828 _3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
22830    switch (devinfo->gen) {
22836       if (devinfo->is_haswell) {
22844       if (devinfo->is_g4x) {
22860 _3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
22862    switch (devinfo->gen) {
22868       if (devinfo->is_haswell) {
22876       if (devinfo->is_g4x) {
22895 _3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
22897    switch (devinfo->gen) {
22903       if (devinfo->is_haswell) {
22911       if (devinfo->is_g4x) {
22927 _3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
22929    switch (devinfo->gen) {
22935       if (devinfo->is_haswell) {
22943       if (devinfo->is_g4x) {
22962 _3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
22964    switch (devinfo->gen) {
22970       if (devinfo->is_haswell) {
22978       if (devinfo->is_g4x) {
22994 _3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
22996    switch (devinfo->gen) {
23002       if (devinfo->is_haswell) {
23010       if (devinfo->is_g4x) {
23029 _3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
23031    switch (devinfo->gen) {
23037       if (devinfo->is_haswell) {
23045       if (devinfo->is_g4x) {
23061 _3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
23063    switch (devinfo->gen) {
23069       if (devinfo->is_haswell) {
23077       if (devinfo->is_g4x) {
23096 _3DSTATE_DEPTH_STENCIL_STATE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
23098    switch (devinfo->gen) {
23104       if (devinfo->is_haswell) {
23112       if (devinfo->is_g4x) {
23128 _3DSTATE_DEPTH_STENCIL_STATE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
23130    switch (devinfo->gen) {
23136       if (devinfo->is_haswell) {
23144       if (devinfo->is_g4x) {
23163 _3DSTATE_DEPTH_STENCIL_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_bits(const struct gen_device_info *devinfo)
23165    switch (devinfo->gen) {
23171       if (devinfo->is_haswell) {
23179       if (devinfo->is_g4x) {
23195 _3DSTATE_DEPTH_STENCIL_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_start(const struct gen_device_info *devinfo)
23197    switch (devinfo->gen) {
23203       if (devinfo->is_haswell) {
23211       if (devinfo->is_g4x) {
23238 _3DSTATE_DRAWING_RECTANGLE_length(const struct gen_device_info *devinfo)
23240    switch (devinfo->gen) {
23246       if (devinfo->is_haswell) {
23254       if (devinfo->is_g4x) {
23281 _3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
23283    switch (devinfo->gen) {
23289       if (devinfo->is_haswell) {
23297       if (devinfo->is_g4x) {
23321 _3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
23323    switch (devinfo->gen) {
23329       if (devinfo->is_haswell) {
23337       if (devinfo->is_g4x) {
23364 _3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
23366    switch (devinfo->gen) {
23372       if (devinfo->is_haswell) {
23380       if (devinfo->is_g4x) {
23404 _3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
23406    switch (devinfo->gen) {
23412       if (devinfo->is_haswell) {
23420       if (devinfo->is_g4x) {
23447 _3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_bits(const struct gen_device_info *devinfo)
23449    switch (devinfo->gen) {
23455       if (devinfo->is_haswell) {
23463       if (devinfo->is_g4x) {
23487 _3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_start(const struct gen_device_info *devinfo)
23489    switch (devinfo->gen) {
23495       if (devinfo->is_haswell) {
23503       if (devinfo->is_g4x) {
23530 _3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_bits(const struct gen_device_info *devinfo)
23532    switch (devinfo->gen) {
23538       if (devinfo->is_haswell) {
23546       if (devinfo->is_g4x) {
23570 _3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_start(const struct gen_device_info *devinfo)
23572    switch (devinfo->gen) {
23578       if (devinfo->is_haswell) {
23586       if (devinfo->is_g4x) {
23613 _3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_bits(const struct gen_device_info *devinfo)
23615    switch (devinfo->gen) {
23621       if (devinfo->is_haswell) {
23629       if (devinfo->is_g4x) {
23653 _3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_start(const struct gen_device_info *devinfo)
23655    switch (devinfo->gen) {
23661       if (devinfo->is_haswell) {
23669       if (devinfo->is_g4x) {
23696 _3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_bits(const struct gen_device_info *devinfo)
23698    switch (devinfo->gen) {
23704       if (devinfo->is_haswell) {
23712       if (devinfo->is_g4x) {
23736 _3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_start(const struct gen_device_info *devinfo)
23738    switch (devinfo->gen) {
23744       if (devinfo->is_haswell) {
23752       if (devinfo->is_g4x) {
23779 _3DSTATE_DRAWING_RECTANGLE_CommandSubType_bits(const struct gen_device_info *devinfo)
23781    switch (devinfo->gen) {
23787       if (devinfo->is_haswell) {
23795       if (devinfo->is_g4x) {
23819 _3DSTATE_DRAWING_RECTANGLE_CommandSubType_start(const struct gen_device_info *devinfo)
23821    switch (devinfo->gen) {
23827       if (devinfo->is_haswell) {
23835       if (devinfo->is_g4x) {
23862 _3DSTATE_DRAWING_RECTANGLE_CommandType_bits(const struct gen_device_info *devinfo)
23864    switch (devinfo->gen) {
23870       if (devinfo->is_haswell) {
23878       if (devinfo->is_g4x) {
23902 _3DSTATE_DRAWING_RECTANGLE_CommandType_start(const struct gen_device_info *devinfo)
23904    switch (devinfo->gen) {
23910       if (devinfo->is_haswell) {
23918       if (devinfo->is_g4x) {
23940 _3DSTATE_DRAWING_RECTANGLE_CoreModeSelect_bits(const struct gen_device_info *devinfo)
23942    switch (devinfo->gen) {
23948       if (devinfo->is_haswell) {
23956       if (devinfo->is_g4x) {
23975 _3DSTATE_DRAWING_RECTANGLE_CoreModeSelect_start(const struct gen_device_info *devinfo)
23977    switch (devinfo->gen) {
23983       if (devinfo->is_haswell) {
23991       if (devinfo->is_g4x) {
24018 _3DSTATE_DRAWING_RECTANGLE_DWordLength_bits(const struct gen_device_info *devinfo)
24020    switch (devinfo->gen) {
24026       if (devinfo->is_haswell) {
24034       if (devinfo->is_g4x) {
24058 _3DSTATE_DRAWING_RECTANGLE_DWordLength_start(const struct gen_device_info *devinfo)
24060    switch (devinfo->gen) {
24066       if (devinfo->is_haswell) {
24074       if (devinfo->is_g4x) {
24101 _3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_bits(const struct gen_device_info *devinfo)
24103    switch (devinfo->gen) {
24109       if (devinfo->is_haswell) {
24117       if (devinfo->is_g4x) {
24141 _3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_start(const struct gen_device_info *devinfo)
24143    switch (devinfo->gen) {
24149       if (devinfo->is_haswell) {
24157       if (devinfo->is_g4x) {
24184 _3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_bits(const struct gen_device_info *devinfo)
24186    switch (devinfo->gen) {
24192       if (devinfo->is_haswell) {
24200       if (devinfo->is_g4x) {
24224 _3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_start(const struct gen_device_info *devinfo)
24226    switch (devinfo->gen) {
24232       if (devinfo->is_haswell) {
24240       if (devinfo->is_g4x) {
24263 _3DSTATE_DS_length(const struct gen_device_info *devinfo)
24265    switch (devinfo->gen) {
24271       if (devinfo->is_haswell) {
24279       if (devinfo->is_g4x) {
24302 _3DSTATE_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
24304    switch (devinfo->gen) {
24310       if (devinfo->is_haswell) {
24318       if (devinfo->is_g4x) {
24338 _3DSTATE_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
24340    switch (devinfo->gen) {
24346       if (devinfo->is_haswell) {
24354       if (devinfo->is_g4x) {
24377 _3DSTATE_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
24379    switch (devinfo->gen) {
24385       if (devinfo->is_haswell) {
24393       if (devinfo->is_g4x) {
24413 _3DSTATE_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
24415    switch (devinfo->gen) {
24421       if (devinfo->is_haswell) {
24429       if (devinfo->is_g4x) {
24451 _3DSTATE_DS_AccessesUAV_bits(const struct gen_device_info *devinfo)
24453    switch (devinfo->gen) {
24459       if (devinfo->is_haswell) {
24467       if (devinfo->is_g4x) {
24486 _3DSTATE_DS_AccessesUAV_start(const struct gen_device_info *devinfo)
24488    switch (devinfo->gen) {
24494       if (devinfo->is_haswell) {
24502       if (devinfo->is_g4x) {
24525 _3DSTATE_DS_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
24527    switch (devinfo->gen) {
24533       if (devinfo->is_haswell) {
24541       if (devinfo->is_g4x) {
24561 _3DSTATE_DS_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
24563    switch (devinfo->gen) {
24569       if (devinfo->is_haswell) {
24577       if (devinfo->is_g4x) {
24598 _3DSTATE_DS_CacheDisable_bits(const struct gen_device_info *devinfo)
24600    switch (devinfo->gen) {
24606       if (devinfo->is_haswell) {
24614       if (devinfo->is_g4x) {
24632 _3DSTATE_DS_CacheDisable_start(const struct gen_device_info *devinfo)
24634    switch (devinfo->gen) {
24640       if (devinfo->is_haswell) {
24648       if (devinfo->is_g4x) {
24671 _3DSTATE_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
24673    switch (devinfo->gen) {
24679       if (devinfo->is_haswell) {
24687       if (devinfo->is_g4x) {
24707 _3DSTATE_DS_CommandSubType_start(const struct gen_device_info *devinfo)
24709    switch (devinfo->gen) {
24715       if (devinfo->is_haswell) {
24723       if (devinfo->is_g4x) {
24746 _3DSTATE_DS_CommandType_bits(const struct gen_device_info *devinfo)
24748    switch (devinfo->gen) {
24754       if (devinfo->is_haswell) {
24762       if (devinfo->is_g4x) {
24782 _3DSTATE_DS_CommandType_start(const struct gen_device_info *devinfo)
24784    switch (devinfo->gen) {
24790       if (devinfo->is_haswell) {
24798       if (devinfo->is_g4x) {
24821 _3DSTATE_DS_ComputeWCoordinateEnable_bits(const struct gen_device_info *devinfo)
24823    switch (devinfo->gen) {
24829       if (devinfo->is_haswell) {
24837       if (devinfo->is_g4x) {
24857 _3DSTATE_DS_ComputeWCoordinateEnable_start(const struct gen_device_info *devinfo)
24859    switch (devinfo->gen) {
24865       if (devinfo->is_haswell) {
24873       if (devinfo->is_g4x) {
24892 _3DSTATE_DS_DSCacheDisable_bits(const struct gen_device_info *devinfo)
24894    switch (devinfo->gen) {
24900       if (devinfo->is_haswell) {
24908       if (devinfo->is_g4x) {
24924 _3DSTATE_DS_DSCacheDisable_start(const struct gen_device_info *devinfo)
24926    switch (devinfo->gen) {
24932       if (devinfo->is_haswell) {
24940       if (devinfo->is_g4x) {
24960 _3DSTATE_DS_DUAL_PATCHKernelStartPointer_bits(const struct gen_device_info *devinfo)
24962    switch (devinfo->gen) {
24968       if (devinfo->is_haswell) {
24976       if (devinfo->is_g4x) {
24993 _3DSTATE_DS_DUAL_PATCHKernelStartPointer_start(const struct gen_device_info *devinfo)
24995    switch (devinfo->gen) {
25001       if (devinfo->is_haswell) {
25009       if (devinfo->is_g4x) {
25032 _3DSTATE_DS_DWordLength_bits(const struct gen_device_info *devinfo)
25034    switch (devinfo->gen) {
25040       if (devinfo->is_haswell) {
25048       if (devinfo->is_g4x) {
25068 _3DSTATE_DS_DWordLength_start(const struct gen_device_info *devinfo)
25070    switch (devinfo->gen) {
25076       if (devinfo->is_haswell) {
25084       if (devinfo->is_g4x) {
25107 _3DSTATE_DS_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
25109    switch (devinfo->gen) {
25115       if (devinfo->is_haswell) {
25123       if (devinfo->is_g4x) {
25143 _3DSTATE_DS_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
25145    switch (devinfo->gen) {
25151       if (devinfo->is_haswell) {
25159       if (devinfo->is_g4x) {
25180 _3DSTATE_DS_DispatchMode_bits(const struct gen_device_info *devinfo)
25182    switch (devinfo->gen) {
25188       if (devinfo->is_haswell) {
25196       if (devinfo->is_g4x) {
25214 _3DSTATE_DS_DispatchMode_start(const struct gen_device_info *devinfo)
25216    switch (devinfo->gen) {
25222       if (devinfo->is_haswell) {
25230       if (devinfo->is_g4x) {
25253 _3DSTATE_DS_Enable_bits(const struct gen_device_info *devinfo)
25255    switch (devinfo->gen) {
25261       if (devinfo->is_haswell) {
25269       if (devinfo->is_g4x) {
25289 _3DSTATE_DS_Enable_start(const struct gen_device_info *devinfo)
25291    switch (devinfo->gen) {
25297       if (devinfo->is_haswell) {
25305       if (devinfo->is_g4x) {
25328 _3DSTATE_DS_FloatingPointMode_bits(const struct gen_device_info *devinfo)
25330    switch (devinfo->gen) {
25336       if (devinfo->is_haswell) {
25344       if (devinfo->is_g4x) {
25364 _3DSTATE_DS_FloatingPointMode_start(const struct gen_device_info *devinfo)
25366    switch (devinfo->gen) {
25372       if (devinfo->is_haswell) {
25380       if (devinfo->is_g4x) {
25403 _3DSTATE_DS_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
25405    switch (devinfo->gen) {
25411       if (devinfo->is_haswell) {
25419       if (devinfo->is_g4x) {
25439 _3DSTATE_DS_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
25441    switch (devinfo->gen) {
25447       if (devinfo->is_haswell) {
25455       if (devinfo->is_g4x) {
25478 _3DSTATE_DS_KernelStartPointer_bits(const struct gen_device_info *devinfo)
25480    switch (devinfo->gen) {
25486       if (devinfo->is_haswell) {
25494       if (devinfo->is_g4x) {
25514 _3DSTATE_DS_KernelStartPointer_start(const struct gen_device_info *devinfo)
25516    switch (devinfo->gen) {
25522       if (devinfo->is_haswell) {
25530       if (devinfo->is_g4x) {
25553 _3DSTATE_DS_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
25555    switch (devinfo->gen) {
25561       if (devinfo->is_haswell) {
25569       if (devinfo->is_g4x) {
25589 _3DSTATE_DS_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
25591    switch (devinfo->gen) {
25597       if (devinfo->is_haswell) {
25605       if (devinfo->is_g4x) {
25628 _3DSTATE_DS_PatchURBEntryReadLength_bits(const struct gen_device_info *devinfo)
25630    switch (devinfo->gen) {
25636       if (devinfo->is_haswell) {
25644       if (devinfo->is_g4x) {
25664 _3DSTATE_DS_PatchURBEntryReadLength_start(const struct gen_device_info *devinfo)
25666    switch (devinfo->gen) {
25672       if (devinfo->is_haswell) {
25680       if (devinfo->is_g4x) {
25703 _3DSTATE_DS_PatchURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
25705    switch (devinfo->gen) {
25711       if (devinfo->is_haswell) {
25719       if (devinfo->is_g4x) {
25739 _3DSTATE_DS_PatchURBEntryReadOffset_start(const struct gen_device_info *devinfo)
25741    switch (devinfo->gen) {
25747       if (devinfo->is_haswell) {
25755       if (devinfo->is_g4x) {
25778 _3DSTATE_DS_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
25780    switch (devinfo->gen) {
25786       if (devinfo->is_haswell) {
25794       if (devinfo->is_g4x) {
25814 _3DSTATE_DS_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
25816    switch (devinfo->gen) {
25822       if (devinfo->is_haswell) {
25830       if (devinfo->is_g4x) {
25853 _3DSTATE_DS_SamplerCount_bits(const struct gen_device_info *devinfo)
25855    switch (devinfo->gen) {
25861       if (devinfo->is_haswell) {
25869       if (devinfo->is_g4x) {
25889 _3DSTATE_DS_SamplerCount_start(const struct gen_device_info *devinfo)
25891    switch (devinfo->gen) {
25897       if (devinfo->is_haswell) {
25905       if (devinfo->is_g4x) {
25928 _3DSTATE_DS_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
25930    switch (devinfo->gen) {
25936       if (devinfo->is_haswell) {
25944       if (devinfo->is_g4x) {
25964 _3DSTATE_DS_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
25966    switch (devinfo->gen) {
25972       if (devinfo->is_haswell) {
25980       if (devinfo->is_g4x) {
26000 _3DSTATE_DS_SingleDomainPointDispatch_bits(const struct gen_device_info *devinfo)
26002    switch (devinfo->gen) {
26008       if (devinfo->is_haswell) {
26016       if (devinfo->is_g4x) {
26033 _3DSTATE_DS_SingleDomainPointDispatch_start(const struct gen_device_info *devinfo)
26035    switch (devinfo->gen) {
26041       if (devinfo->is_haswell) {
26049       if (devinfo->is_g4x) {
26072 _3DSTATE_DS_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
26074    switch (devinfo->gen) {
26080       if (devinfo->is_haswell) {
26088       if (devinfo->is_g4x) {
26108 _3DSTATE_DS_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
26110    switch (devinfo->gen) {
26116       if (devinfo->is_haswell) {
26124       if (devinfo->is_g4x) {
26147 _3DSTATE_DS_StatisticsEnable_bits(const struct gen_device_info *devinfo)
26149    switch (devinfo->gen) {
26155       if (devinfo->is_haswell) {
26163       if (devinfo->is_g4x) {
26183 _3DSTATE_DS_StatisticsEnable_start(const struct gen_device_info *devinfo)
26185    switch (devinfo->gen) {
26191       if (devinfo->is_haswell) {
26199       if (devinfo->is_g4x) {
26221 _3DSTATE_DS_ThreadDispatchPriority_bits(const struct gen_device_info *devinfo)
26223    switch (devinfo->gen) {
26229       if (devinfo->is_haswell) {
26237       if (devinfo->is_g4x) {
26256 _3DSTATE_DS_ThreadDispatchPriority_start(const struct gen_device_info *devinfo)
26258    switch (devinfo->gen) {
26264       if (devinfo->is_haswell) {
26272       if (devinfo->is_g4x) {
26293 _3DSTATE_DS_UserClipDistanceClipTestEnableBitmask_bits(const struct gen_device_info *devinfo)
26295    switch (devinfo->gen) {
26301       if (devinfo->is_haswell) {
26309       if (devinfo->is_g4x) {
26327 _3DSTATE_DS_UserClipDistanceClipTestEnableBitmask_start(const struct gen_device_info *devinfo)
26329    switch (devinfo->gen) {
26335       if (devinfo->is_haswell) {
26343       if (devinfo->is_g4x) {
26364 _3DSTATE_DS_UserClipDistanceCullTestEnableBitmask_bits(const struct gen_device_info *devinfo)
26366    switch (devinfo->gen) {
26372       if (devinfo->is_haswell) {
26380       if (devinfo->is_g4x) {
26398 _3DSTATE_DS_UserClipDistanceCullTestEnableBitmask_start(const struct gen_device_info *devinfo)
26400    switch (devinfo->gen) {
26406       if (devinfo->is_haswell) {
26414       if (devinfo->is_g4x) {
26437 _3DSTATE_DS_VectorMaskEnable_bits(const struct gen_device_info *devinfo)
26439    switch (devinfo->gen) {
26445       if (devinfo->is_haswell) {
26453       if (devinfo->is_g4x) {
26473 _3DSTATE_DS_VectorMaskEnable_start(const struct gen_device_info *devinfo)
26475    switch (devinfo->gen) {
26481       if (devinfo->is_haswell) {
26489       if (devinfo->is_g4x) {
26510 _3DSTATE_DS_VertexURBEntryOutputLength_bits(const struct gen_device_info *devinfo)
26512    switch (devinfo->gen) {
26518       if (devinfo->is_haswell) {
26526       if (devinfo->is_g4x) {
26544 _3DSTATE_DS_VertexURBEntryOutputLength_start(const struct gen_device_info *devinfo)
26546    switch (devinfo->gen) {
26552       if (devinfo->is_haswell) {
26560       if (devinfo->is_g4x) {
26581 _3DSTATE_DS_VertexURBEntryOutputReadOffset_bits(const struct gen_device_info *devinfo)
26583    switch (devinfo->gen) {
26589       if (devinfo->is_haswell) {
26597       if (devinfo->is_g4x) {
26615 _3DSTATE_DS_VertexURBEntryOutputReadOffset_start(const struct gen_device_info *devinfo)
26617    switch (devinfo->gen) {
26623       if (devinfo->is_haswell) {
26631       if (devinfo->is_g4x) {
26659 _3DSTATE_GATHER_CONSTANT_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
26661    switch (devinfo->gen) {
26667       if (devinfo->is_haswell) {
26675       if (devinfo->is_g4x) {
26694 _3DSTATE_GATHER_CONSTANT_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
26696    switch (devinfo->gen) {
26702       if (devinfo->is_haswell) {
26710       if (devinfo->is_g4x) {
26732 _3DSTATE_GATHER_CONSTANT_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
26734    switch (devinfo->gen) {
26740       if (devinfo->is_haswell) {
26748       if (devinfo->is_g4x) {
26767 _3DSTATE_GATHER_CONSTANT_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
26769    switch (devinfo->gen) {
26775       if (devinfo->is_haswell) {
26783       if (devinfo->is_g4x) {
26805 _3DSTATE_GATHER_CONSTANT_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
26807    switch (devinfo->gen) {
26813       if (devinfo->is_haswell) {
26821       if (devinfo->is_g4x) {
26840 _3DSTATE_GATHER_CONSTANT_DS_CommandSubType_start(const struct gen_device_info *devinfo)
26842    switch (devinfo->gen) {
26848       if (devinfo->is_haswell) {
26856       if (devinfo->is_g4x) {
26878 _3DSTATE_GATHER_CONSTANT_DS_CommandType_bits(const struct gen_device_info *devinfo)
26880    switch (devinfo->gen) {
26886       if (devinfo->is_haswell) {
26894       if (devinfo->is_g4x) {
26913 _3DSTATE_GATHER_CONSTANT_DS_CommandType_start(const struct gen_device_info *devinfo)
26915    switch (devinfo->gen) {
26921       if (devinfo->is_haswell) {
26929       if (devinfo->is_g4x) {
26951 _3DSTATE_GATHER_CONSTANT_DS_ConstantBufferBindingTableBlock_bits(const struct gen_device_info *devinfo)
26953    switch (devinfo->gen) {
26959       if (devinfo->is_haswell) {
26967       if (devinfo->is_g4x) {
26986 _3DSTATE_GATHER_CONSTANT_DS_ConstantBufferBindingTableBlock_start(const struct gen_device_info *devinfo)
26988    switch (devinfo->gen) {
26994       if (devinfo->is_haswell) {
27002       if (devinfo->is_g4x) {
27023 _3DSTATE_GATHER_CONSTANT_DS_ConstantBufferDx9GenerateStall_bits(const struct gen_device_info *devinfo)
27025    switch (devinfo->gen) {
27031       if (devinfo->is_haswell) {
27039       if (devinfo->is_g4x) {
27057 _3DSTATE_GATHER_CONSTANT_DS_ConstantBufferDx9GenerateStall_start(const struct gen_device_info *devinfo)
27059    switch (devinfo->gen) {
27065       if (devinfo->is_haswell) {
27073       if (devinfo->is_g4x) {
27095 _3DSTATE_GATHER_CONSTANT_DS_ConstantBufferValid_bits(const struct gen_device_info *devinfo)
27097    switch (devinfo->gen) {
27103       if (devinfo->is_haswell) {
27111       if (devinfo->is_g4x) {
27130 _3DSTATE_GATHER_CONSTANT_DS_ConstantBufferValid_start(const struct gen_device_info *devinfo)
27132    switch (devinfo->gen) {
27138       if (devinfo->is_haswell) {
27146       if (devinfo->is_g4x) {
27168 _3DSTATE_GATHER_CONSTANT_DS_DWordLength_bits(const struct gen_device_info *devinfo)
27170    switch (devinfo->gen) {
27176       if (devinfo->is_haswell) {
27184       if (devinfo->is_g4x) {
27203 _3DSTATE_GATHER_CONSTANT_DS_DWordLength_start(const struct gen_device_info *devinfo)
27205    switch (devinfo->gen) {
27211       if (devinfo->is_haswell) {
27219       if (devinfo->is_g4x) {
27241 _3DSTATE_GATHER_CONSTANT_DS_Entry_0_bits(const struct gen_device_info *devinfo)
27243    switch (devinfo->gen) {
27249       if (devinfo->is_haswell) {
27257       if (devinfo->is_g4x) {
27276 _3DSTATE_GATHER_CONSTANT_DS_Entry_0_start(const struct gen_device_info *devinfo)
27278    switch (devinfo->gen) {
27284       if (devinfo->is_haswell) {
27292       if (devinfo->is_g4x) {
27314 _3DSTATE_GATHER_CONSTANT_DS_Entry_1_bits(const struct gen_device_info *devinfo)
27316    switch (devinfo->gen) {
27322       if (devinfo->is_haswell) {
27330       if (devinfo->is_g4x) {
27349 _3DSTATE_GATHER_CONSTANT_DS_Entry_1_start(const struct gen_device_info *devinfo)
27351    switch (devinfo->gen) {
27357       if (devinfo->is_haswell) {
27365       if (devinfo->is_g4x) {
27387 _3DSTATE_GATHER_CONSTANT_DS_GatherBufferOffset_bits(const struct gen_device_info *devinfo)
27389    switch (devinfo->gen) {
27395       if (devinfo->is_haswell) {
27403       if (devinfo->is_g4x) {
27422 _3DSTATE_GATHER_CONSTANT_DS_GatherBufferOffset_start(const struct gen_device_info *devinfo)
27424    switch (devinfo->gen) {
27430       if (devinfo->is_haswell) {
27438       if (devinfo->is_g4x) {
27458 _3DSTATE_GATHER_CONSTANT_DS_OnDieTable_bits(const struct gen_device_info *devinfo)
27460    switch (devinfo->gen) {
27466       if (devinfo->is_haswell) {
27474       if (devinfo->is_g4x) {
27491 _3DSTATE_GATHER_CONSTANT_DS_OnDieTable_start(const struct gen_device_info *devinfo)
27493    switch (devinfo->gen) {
27499       if (devinfo->is_haswell) {
27507       if (devinfo->is_g4x) {
27527 _3DSTATE_GATHER_CONSTANT_DS_UpdateGatherTableOnly_bits(const struct gen_device_info *devinfo)
27529    switch (devinfo->gen) {
27535       if (devinfo->is_haswell) {
27543       if (devinfo->is_g4x) {
27560 _3DSTATE_GATHER_CONSTANT_DS_UpdateGatherTableOnly_start(const struct gen_device_info *devinfo)
27562    switch (devinfo->gen) {
27568       if (devinfo->is_haswell) {
27576       if (devinfo->is_g4x) {
27604 _3DSTATE_GATHER_CONSTANT_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
27606    switch (devinfo->gen) {
27612       if (devinfo->is_haswell) {
27620       if (devinfo->is_g4x) {
27639 _3DSTATE_GATHER_CONSTANT_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
27641    switch (devinfo->gen) {
27647       if (devinfo->is_haswell) {
27655       if (devinfo->is_g4x) {
27677 _3DSTATE_GATHER_CONSTANT_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
27679    switch (devinfo->gen) {
27685       if (devinfo->is_haswell) {
27693       if (devinfo->is_g4x) {
27712 _3DSTATE_GATHER_CONSTANT_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
27714    switch (devinfo->gen) {
27720       if (devinfo->is_haswell) {
27728       if (devinfo->is_g4x) {
27750 _3DSTATE_GATHER_CONSTANT_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
27752    switch (devinfo->gen) {
27758       if (devinfo->is_haswell) {
27766       if (devinfo->is_g4x) {
27785 _3DSTATE_GATHER_CONSTANT_GS_CommandSubType_start(const struct gen_device_info *devinfo)
27787    switch (devinfo->gen) {
27793       if (devinfo->is_haswell) {
27801       if (devinfo->is_g4x) {
27823 _3DSTATE_GATHER_CONSTANT_GS_CommandType_bits(const struct gen_device_info *devinfo)
27825    switch (devinfo->gen) {
27831       if (devinfo->is_haswell) {
27839       if (devinfo->is_g4x) {
27858 _3DSTATE_GATHER_CONSTANT_GS_CommandType_start(const struct gen_device_info *devinfo)
27860    switch (devinfo->gen) {
27866       if (devinfo->is_haswell) {
27874       if (devinfo->is_g4x) {
27896 _3DSTATE_GATHER_CONSTANT_GS_ConstantBufferBindingTableBlock_bits(const struct gen_device_info *devinfo)
27898    switch (devinfo->gen) {
27904       if (devinfo->is_haswell) {
27912       if (devinfo->is_g4x) {
27931 _3DSTATE_GATHER_CONSTANT_GS_ConstantBufferBindingTableBlock_start(const struct gen_device_info *devinfo)
27933    switch (devinfo->gen) {
27939       if (devinfo->is_haswell) {
27947       if (devinfo->is_g4x) {
27968 _3DSTATE_GATHER_CONSTANT_GS_ConstantBufferDx9GenerateStall_bits(const struct gen_device_info *devinfo)
27970    switch (devinfo->gen) {
27976       if (devinfo->is_haswell) {
27984       if (devinfo->is_g4x) {
28002 _3DSTATE_GATHER_CONSTANT_GS_ConstantBufferDx9GenerateStall_start(const struct gen_device_info *devinfo)
28004    switch (devinfo->gen) {
28010       if (devinfo->is_haswell) {
28018       if (devinfo->is_g4x) {
28040 _3DSTATE_GATHER_CONSTANT_GS_ConstantBufferValid_bits(const struct gen_device_info *devinfo)
28042    switch (devinfo->gen) {
28048       if (devinfo->is_haswell) {
28056       if (devinfo->is_g4x) {
28075 _3DSTATE_GATHER_CONSTANT_GS_ConstantBufferValid_start(const struct gen_device_info *devinfo)
28077    switch (devinfo->gen) {
28083       if (devinfo->is_haswell) {
28091       if (devinfo->is_g4x) {
28113 _3DSTATE_GATHER_CONSTANT_GS_DWordLength_bits(const struct gen_device_info *devinfo)
28115    switch (devinfo->gen) {
28121       if (devinfo->is_haswell) {
28129       if (devinfo->is_g4x) {
28148 _3DSTATE_GATHER_CONSTANT_GS_DWordLength_start(const struct gen_device_info *devinfo)
28150    switch (devinfo->gen) {
28156       if (devinfo->is_haswell) {
28164       if (devinfo->is_g4x) {
28186 _3DSTATE_GATHER_CONSTANT_GS_Entry_0_bits(const struct gen_device_info *devinfo)
28188    switch (devinfo->gen) {
28194       if (devinfo->is_haswell) {
28202       if (devinfo->is_g4x) {
28221 _3DSTATE_GATHER_CONSTANT_GS_Entry_0_start(const struct gen_device_info *devinfo)
28223    switch (devinfo->gen) {
28229       if (devinfo->is_haswell) {
28237       if (devinfo->is_g4x) {
28259 _3DSTATE_GATHER_CONSTANT_GS_Entry_1_bits(const struct gen_device_info *devinfo)
28261    switch (devinfo->gen) {
28267       if (devinfo->is_haswell) {
28275       if (devinfo->is_g4x) {
28294 _3DSTATE_GATHER_CONSTANT_GS_Entry_1_start(const struct gen_device_info *devinfo)
28296    switch (devinfo->gen) {
28302       if (devinfo->is_haswell) {
28310       if (devinfo->is_g4x) {
28332 _3DSTATE_GATHER_CONSTANT_GS_GatherBufferOffset_bits(const struct gen_device_info *devinfo)
28334    switch (devinfo->gen) {
28340       if (devinfo->is_haswell) {
28348       if (devinfo->is_g4x) {
28367 _3DSTATE_GATHER_CONSTANT_GS_GatherBufferOffset_start(const struct gen_device_info *devinfo)
28369    switch (devinfo->gen) {
28375       if (devinfo->is_haswell) {
28383       if (devinfo->is_g4x) {
28403 _3DSTATE_GATHER_CONSTANT_GS_OnDieTable_bits(const struct gen_device_info *devinfo)
28405    switch (devinfo->gen) {
28411       if (devinfo->is_haswell) {
28419       if (devinfo->is_g4x) {
28436 _3DSTATE_GATHER_CONSTANT_GS_OnDieTable_start(const struct gen_device_info *devinfo)
28438    switch (devinfo->gen) {
28444       if (devinfo->is_haswell) {
28452       if (devinfo->is_g4x) {
28472 _3DSTATE_GATHER_CONSTANT_GS_UpdateGatherTableOnly_bits(const struct gen_device_info *devinfo)
28474    switch (devinfo->gen) {
28480       if (devinfo->is_haswell) {
28488       if (devinfo->is_g4x) {
28505 _3DSTATE_GATHER_CONSTANT_GS_UpdateGatherTableOnly_start(const struct gen_device_info *devinfo)
28507    switch (devinfo->gen) {
28513       if (devinfo->is_haswell) {
28521       if (devinfo->is_g4x) {
28549 _3DSTATE_GATHER_CONSTANT_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
28551    switch (devinfo->gen) {
28557       if (devinfo->is_haswell) {
28565       if (devinfo->is_g4x) {
28584 _3DSTATE_GATHER_CONSTANT_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
28586    switch (devinfo->gen) {
28592       if (devinfo->is_haswell) {
28600       if (devinfo->is_g4x) {
28622 _3DSTATE_GATHER_CONSTANT_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
28624    switch (devinfo->gen) {
28630       if (devinfo->is_haswell) {
28638       if (devinfo->is_g4x) {
28657 _3DSTATE_GATHER_CONSTANT_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
28659    switch (devinfo->gen) {
28665       if (devinfo->is_haswell) {
28673       if (devinfo->is_g4x) {
28695 _3DSTATE_GATHER_CONSTANT_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
28697    switch (devinfo->gen) {
28703       if (devinfo->is_haswell) {
28711       if (devinfo->is_g4x) {
28730 _3DSTATE_GATHER_CONSTANT_HS_CommandSubType_start(const struct gen_device_info *devinfo)
28732    switch (devinfo->gen) {
28738       if (devinfo->is_haswell) {
28746       if (devinfo->is_g4x) {
28768 _3DSTATE_GATHER_CONSTANT_HS_CommandType_bits(const struct gen_device_info *devinfo)
28770    switch (devinfo->gen) {
28776       if (devinfo->is_haswell) {
28784       if (devinfo->is_g4x) {
28803 _3DSTATE_GATHER_CONSTANT_HS_CommandType_start(const struct gen_device_info *devinfo)
28805    switch (devinfo->gen) {
28811       if (devinfo->is_haswell) {
28819       if (devinfo->is_g4x) {
28841 _3DSTATE_GATHER_CONSTANT_HS_ConstantBufferBindingTableBlock_bits(const struct gen_device_info *devinfo)
28843    switch (devinfo->gen) {
28849       if (devinfo->is_haswell) {
28857       if (devinfo->is_g4x) {
28876 _3DSTATE_GATHER_CONSTANT_HS_ConstantBufferBindingTableBlock_start(const struct gen_device_info *devinfo)
28878    switch (devinfo->gen) {
28884       if (devinfo->is_haswell) {
28892       if (devinfo->is_g4x) {
28913 _3DSTATE_GATHER_CONSTANT_HS_ConstantBufferDx9GenerateStall_bits(const struct gen_device_info *devinfo)
28915    switch (devinfo->gen) {
28921       if (devinfo->is_haswell) {
28929       if (devinfo->is_g4x) {
28947 _3DSTATE_GATHER_CONSTANT_HS_ConstantBufferDx9GenerateStall_start(const struct gen_device_info *devinfo)
28949    switch (devinfo->gen) {
28955       if (devinfo->is_haswell) {
28963       if (devinfo->is_g4x) {
28985 _3DSTATE_GATHER_CONSTANT_HS_ConstantBufferValid_bits(const struct gen_device_info *devinfo)
28987    switch (devinfo->gen) {
28993       if (devinfo->is_haswell) {
29001       if (devinfo->is_g4x) {
29020 _3DSTATE_GATHER_CONSTANT_HS_ConstantBufferValid_start(const struct gen_device_info *devinfo)
29022    switch (devinfo->gen) {
29028       if (devinfo->is_haswell) {
29036       if (devinfo->is_g4x) {
29058 _3DSTATE_GATHER_CONSTANT_HS_DWordLength_bits(const struct gen_device_info *devinfo)
29060    switch (devinfo->gen) {
29066       if (devinfo->is_haswell) {
29074       if (devinfo->is_g4x) {
29093 _3DSTATE_GATHER_CONSTANT_HS_DWordLength_start(const struct gen_device_info *devinfo)
29095    switch (devinfo->gen) {
29101       if (devinfo->is_haswell) {
29109       if (devinfo->is_g4x) {
29131 _3DSTATE_GATHER_CONSTANT_HS_Entry_0_bits(const struct gen_device_info *devinfo)
29133    switch (devinfo->gen) {
29139       if (devinfo->is_haswell) {
29147       if (devinfo->is_g4x) {
29166 _3DSTATE_GATHER_CONSTANT_HS_Entry_0_start(const struct gen_device_info *devinfo)
29168    switch (devinfo->gen) {
29174       if (devinfo->is_haswell) {
29182       if (devinfo->is_g4x) {
29204 _3DSTATE_GATHER_CONSTANT_HS_Entry_1_bits(const struct gen_device_info *devinfo)
29206    switch (devinfo->gen) {
29212       if (devinfo->is_haswell) {
29220       if (devinfo->is_g4x) {
29239 _3DSTATE_GATHER_CONSTANT_HS_Entry_1_start(const struct gen_device_info *devinfo)
29241    switch (devinfo->gen) {
29247       if (devinfo->is_haswell) {
29255       if (devinfo->is_g4x) {
29277 _3DSTATE_GATHER_CONSTANT_HS_GatherBufferOffset_bits(const struct gen_device_info *devinfo)
29279    switch (devinfo->gen) {
29285       if (devinfo->is_haswell) {
29293       if (devinfo->is_g4x) {
29312 _3DSTATE_GATHER_CONSTANT_HS_GatherBufferOffset_start(const struct gen_device_info *devinfo)
29314    switch (devinfo->gen) {
29320       if (devinfo->is_haswell) {
29328       if (devinfo->is_g4x) {
29348 _3DSTATE_GATHER_CONSTANT_HS_OnDieTable_bits(const struct gen_device_info *devinfo)
29350    switch (devinfo->gen) {
29356       if (devinfo->is_haswell) {
29364       if (devinfo->is_g4x) {
29381 _3DSTATE_GATHER_CONSTANT_HS_OnDieTable_start(const struct gen_device_info *devinfo)
29383    switch (devinfo->gen) {
29389       if (devinfo->is_haswell) {
29397       if (devinfo->is_g4x) {
29417 _3DSTATE_GATHER_CONSTANT_HS_UpdateGatherTableOnly_bits(const struct gen_device_info *devinfo)
29419    switch (devinfo->gen) {
29425       if (devinfo->is_haswell) {
29433       if (devinfo->is_g4x) {
29450 _3DSTATE_GATHER_CONSTANT_HS_UpdateGatherTableOnly_start(const struct gen_device_info *devinfo)
29452    switch (devinfo->gen) {
29458       if (devinfo->is_haswell) {
29466       if (devinfo->is_g4x) {
29494 _3DSTATE_GATHER_CONSTANT_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
29496    switch (devinfo->gen) {
29502       if (devinfo->is_haswell) {
29510       if (devinfo->is_g4x) {
29529 _3DSTATE_GATHER_CONSTANT_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
29531    switch (devinfo->gen) {
29537       if (devinfo->is_haswell) {
29545       if (devinfo->is_g4x) {
29567 _3DSTATE_GATHER_CONSTANT_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
29569    switch (devinfo->gen) {
29575       if (devinfo->is_haswell) {
29583       if (devinfo->is_g4x) {
29602 _3DSTATE_GATHER_CONSTANT_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
29604    switch (devinfo->gen) {
29610       if (devinfo->is_haswell) {
29618       if (devinfo->is_g4x) {
29640 _3DSTATE_GATHER_CONSTANT_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
29642    switch (devinfo->gen) {
29648       if (devinfo->is_haswell) {
29656       if (devinfo->is_g4x) {
29675 _3DSTATE_GATHER_CONSTANT_PS_CommandSubType_start(const struct gen_device_info *devinfo)
29677    switch (devinfo->gen) {
29683       if (devinfo->is_haswell) {
29691       if (devinfo->is_g4x) {
29713 _3DSTATE_GATHER_CONSTANT_PS_CommandType_bits(const struct gen_device_info *devinfo)
29715    switch (devinfo->gen) {
29721       if (devinfo->is_haswell) {
29729       if (devinfo->is_g4x) {
29748 _3DSTATE_GATHER_CONSTANT_PS_CommandType_start(const struct gen_device_info *devinfo)
29750    switch (devinfo->gen) {
29756       if (devinfo->is_haswell) {
29764       if (devinfo->is_g4x) {
29786 _3DSTATE_GATHER_CONSTANT_PS_ConstantBufferBindingTableBlock_bits(const struct gen_device_info *devinfo)
29788    switch (devinfo->gen) {
29794       if (devinfo->is_haswell) {
29802       if (devinfo->is_g4x) {
29821 _3DSTATE_GATHER_CONSTANT_PS_ConstantBufferBindingTableBlock_start(const struct gen_device_info *devinfo)
29823    switch (devinfo->gen) {
29829       if (devinfo->is_haswell) {
29837       if (devinfo->is_g4x) {
29859 _3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9Enable_bits(const struct gen_device_info *devinfo)
29861    switch (devinfo->gen) {
29867       if (devinfo->is_haswell) {
29875       if (devinfo->is_g4x) {
29894 _3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9Enable_start(const struct gen_device_info *devinfo)
29896    switch (devinfo->gen) {
29902       if (devinfo->is_haswell) {
29910       if (devinfo->is_g4x) {
29931 _3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9GenerateStall_bits(const struct gen_device_info *devinfo)
29933    switch (devinfo->gen) {
29939       if (devinfo->is_haswell) {
29947       if (devinfo->is_g4x) {
29965 _3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9GenerateStall_start(const struct gen_device_info *devinfo)
29967    switch (devinfo->gen) {
29973       if (devinfo->is_haswell) {
29981       if (devinfo->is_g4x) {
30003 _3DSTATE_GATHER_CONSTANT_PS_ConstantBufferValid_bits(const struct gen_device_info *devinfo)
30005    switch (devinfo->gen) {
30011       if (devinfo->is_haswell) {
30019       if (devinfo->is_g4x) {
30038 _3DSTATE_GATHER_CONSTANT_PS_ConstantBufferValid_start(const struct gen_device_info *devinfo)
30040    switch (devinfo->gen) {
30046       if (devinfo->is_haswell) {
30054       if (devinfo->is_g4x) {
30076 _3DSTATE_GATHER_CONSTANT_PS_DWordLength_bits(const struct gen_device_info *devinfo)
30078    switch (devinfo->gen) {
30084       if (devinfo->is_haswell) {
30092       if (devinfo->is_g4x) {
30111 _3DSTATE_GATHER_CONSTANT_PS_DWordLength_start(const struct gen_device_info *devinfo)
30113    switch (devinfo->gen) {
30119       if (devinfo->is_haswell) {
30127       if (devinfo->is_g4x) {
30147 _3DSTATE_GATHER_CONSTANT_PS_DX9OnDieRegisterReadEnable_bits(const struct gen_device_info *devinfo)
30149    switch (devinfo->gen) {
30155       if (devinfo->is_haswell) {
30163       if (devinfo->is_g4x) {
30180 _3DSTATE_GATHER_CONSTANT_PS_DX9OnDieRegisterReadEnable_start(const struct gen_device_info *devinfo)
30182    switch (devinfo->gen) {
30188       if (devinfo->is_haswell) {
30196       if (devinfo->is_g4x) {
30218 _3DSTATE_GATHER_CONSTANT_PS_Entry_0_bits(const struct gen_device_info *devinfo)
30220    switch (devinfo->gen) {
30226       if (devinfo->is_haswell) {
30234       if (devinfo->is_g4x) {
30253 _3DSTATE_GATHER_CONSTANT_PS_Entry_0_start(const struct gen_device_info *devinfo)
30255    switch (devinfo->gen) {
30261       if (devinfo->is_haswell) {
30269       if (devinfo->is_g4x) {
30291 _3DSTATE_GATHER_CONSTANT_PS_Entry_1_bits(const struct gen_device_info *devinfo)
30293    switch (devinfo->gen) {
30299       if (devinfo->is_haswell) {
30307       if (devinfo->is_g4x) {
30326 _3DSTATE_GATHER_CONSTANT_PS_Entry_1_start(const struct gen_device_info *devinfo)
30328    switch (devinfo->gen) {
30334       if (devinfo->is_haswell) {
30342       if (devinfo->is_g4x) {
30364 _3DSTATE_GATHER_CONSTANT_PS_GatherBufferOffset_bits(const struct gen_device_info *devinfo)
30366    switch (devinfo->gen) {
30372       if (devinfo->is_haswell) {
30380       if (devinfo->is_g4x) {
30399 _3DSTATE_GATHER_CONSTANT_PS_GatherBufferOffset_start(const struct gen_device_info *devinfo)
30401    switch (devinfo->gen) {
30407       if (devinfo->is_haswell) {
30415       if (devinfo->is_g4x) {
30435 _3DSTATE_GATHER_CONSTANT_PS_OnDieTable_bits(const struct gen_device_info *devinfo)
30437    switch (devinfo->gen) {
30443       if (devinfo->is_haswell) {
30451       if (devinfo->is_g4x) {
30468 _3DSTATE_GATHER_CONSTANT_PS_OnDieTable_start(const struct gen_device_info *devinfo)
30470    switch (devinfo->gen) {
30476       if (devinfo->is_haswell) {
30484       if (devinfo->is_g4x) {
30504 _3DSTATE_GATHER_CONSTANT_PS_UpdateGatherTableOnly_bits(const struct gen_device_info *devinfo)
30506    switch (devinfo->gen) {
30512       if (devinfo->is_haswell) {
30520       if (devinfo->is_g4x) {
30537 _3DSTATE_GATHER_CONSTANT_PS_UpdateGatherTableOnly_start(const struct gen_device_info *devinfo)
30539    switch (devinfo->gen) {
30545       if (devinfo->is_haswell) {
30553       if (devinfo->is_g4x) {
30581 _3DSTATE_GATHER_CONSTANT_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
30583    switch (devinfo->gen) {
30589       if (devinfo->is_haswell) {
30597       if (devinfo->is_g4x) {
30616 _3DSTATE_GATHER_CONSTANT_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
30618    switch (devinfo->gen) {
30624       if (devinfo->is_haswell) {
30632       if (devinfo->is_g4x) {
30654 _3DSTATE_GATHER_CONSTANT_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
30656    switch (devinfo->gen) {
30662       if (devinfo->is_haswell) {
30670       if (devinfo->is_g4x) {
30689 _3DSTATE_GATHER_CONSTANT_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
30691    switch (devinfo->gen) {
30697       if (devinfo->is_haswell) {
30705       if (devinfo->is_g4x) {
30727 _3DSTATE_GATHER_CONSTANT_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
30729    switch (devinfo->gen) {
30735       if (devinfo->is_haswell) {
30743       if (devinfo->is_g4x) {
30762 _3DSTATE_GATHER_CONSTANT_VS_CommandSubType_start(const struct gen_device_info *devinfo)
30764    switch (devinfo->gen) {
30770       if (devinfo->is_haswell) {
30778       if (devinfo->is_g4x) {
30800 _3DSTATE_GATHER_CONSTANT_VS_CommandType_bits(const struct gen_device_info *devinfo)
30802    switch (devinfo->gen) {
30808       if (devinfo->is_haswell) {
30816       if (devinfo->is_g4x) {
30835 _3DSTATE_GATHER_CONSTANT_VS_CommandType_start(const struct gen_device_info *devinfo)
30837    switch (devinfo->gen) {
30843       if (devinfo->is_haswell) {
30851       if (devinfo->is_g4x) {
30873 _3DSTATE_GATHER_CONSTANT_VS_ConstantBufferBindingTableBlock_bits(const struct gen_device_info *devinfo)
30875    switch (devinfo->gen) {
30881       if (devinfo->is_haswell) {
30889       if (devinfo->is_g4x) {
30908 _3DSTATE_GATHER_CONSTANT_VS_ConstantBufferBindingTableBlock_start(const struct gen_device_info *devinfo)
30910    switch (devinfo->gen) {
30916       if (devinfo->is_haswell) {
30924       if (devinfo->is_g4x) {
30946 _3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9Enable_bits(const struct gen_device_info *devinfo)
30948    switch (devinfo->gen) {
30954       if (devinfo->is_haswell) {
30962       if (devinfo->is_g4x) {
30981 _3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9Enable_start(const struct gen_device_info *devinfo)
30983    switch (devinfo->gen) {
30989       if (devinfo->is_haswell) {
30997       if (devinfo->is_g4x) {
31018 _3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9GenerateStall_bits(const struct gen_device_info *devinfo)
31020    switch (devinfo->gen) {
31026       if (devinfo->is_haswell) {
31034       if (devinfo->is_g4x) {
31052 _3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9GenerateStall_start(const struct gen_device_info *devinfo)
31054    switch (devinfo->gen) {
31060       if (devinfo->is_haswell) {
31068       if (devinfo->is_g4x) {
31090 _3DSTATE_GATHER_CONSTANT_VS_ConstantBufferValid_bits(const struct gen_device_info *devinfo)
31092    switch (devinfo->gen) {
31098       if (devinfo->is_haswell) {
31106       if (devinfo->is_g4x) {
31125 _3DSTATE_GATHER_CONSTANT_VS_ConstantBufferValid_start(const struct gen_device_info *devinfo)
31127    switch (devinfo->gen) {
31133       if (devinfo->is_haswell) {
31141       if (devinfo->is_g4x) {
31163 _3DSTATE_GATHER_CONSTANT_VS_DWordLength_bits(const struct gen_device_info *devinfo)
31165    switch (devinfo->gen) {
31171       if (devinfo->is_haswell) {
31179       if (devinfo->is_g4x) {
31198 _3DSTATE_GATHER_CONSTANT_VS_DWordLength_start(const struct gen_device_info *devinfo)
31200    switch (devinfo->gen) {
31206       if (devinfo->is_haswell) {
31214       if (devinfo->is_g4x) {
31234 _3DSTATE_GATHER_CONSTANT_VS_DX9OnDieRegisterReadEnable_bits(const struct gen_device_info *devinfo)
31236    switch (devinfo->gen) {
31242       if (devinfo->is_haswell) {
31250       if (devinfo->is_g4x) {
31267 _3DSTATE_GATHER_CONSTANT_VS_DX9OnDieRegisterReadEnable_start(const struct gen_device_info *devinfo)
31269    switch (devinfo->gen) {
31275       if (devinfo->is_haswell) {
31283       if (devinfo->is_g4x) {
31305 _3DSTATE_GATHER_CONSTANT_VS_Entry_0_bits(const struct gen_device_info *devinfo)
31307    switch (devinfo->gen) {
31313       if (devinfo->is_haswell) {
31321       if (devinfo->is_g4x) {
31340 _3DSTATE_GATHER_CONSTANT_VS_Entry_0_start(const struct gen_device_info *devinfo)
31342    switch (devinfo->gen) {
31348       if (devinfo->is_haswell) {
31356       if (devinfo->is_g4x) {
31378 _3DSTATE_GATHER_CONSTANT_VS_Entry_1_bits(const struct gen_device_info *devinfo)
31380    switch (devinfo->gen) {
31386       if (devinfo->is_haswell) {
31394       if (devinfo->is_g4x) {
31413 _3DSTATE_GATHER_CONSTANT_VS_Entry_1_start(const struct gen_device_info *devinfo)
31415    switch (devinfo->gen) {
31421       if (devinfo->is_haswell) {
31429       if (devinfo->is_g4x) {
31451 _3DSTATE_GATHER_CONSTANT_VS_GatherBufferOffset_bits(const struct gen_device_info *devinfo)
31453    switch (devinfo->gen) {
31459       if (devinfo->is_haswell) {
31467       if (devinfo->is_g4x) {
31486 _3DSTATE_GATHER_CONSTANT_VS_GatherBufferOffset_start(const struct gen_device_info *devinfo)
31488    switch (devinfo->gen) {
31494       if (devinfo->is_haswell) {
31502       if (devinfo->is_g4x) {
31522 _3DSTATE_GATHER_CONSTANT_VS_OnDieTable_bits(const struct gen_device_info *devinfo)
31524    switch (devinfo->gen) {
31530       if (devinfo->is_haswell) {
31538       if (devinfo->is_g4x) {
31555 _3DSTATE_GATHER_CONSTANT_VS_OnDieTable_start(const struct gen_device_info *devinfo)
31557    switch (devinfo->gen) {
31563       if (devinfo->is_haswell) {
31571       if (devinfo->is_g4x) {
31591 _3DSTATE_GATHER_CONSTANT_VS_UpdateGatherTableOnly_bits(const struct gen_device_info *devinfo)
31593    switch (devinfo->gen) {
31599       if (devinfo->is_haswell) {
31607       if (devinfo->is_g4x) {
31624 _3DSTATE_GATHER_CONSTANT_VS_UpdateGatherTableOnly_start(const struct gen_device_info *devinfo)
31626    switch (devinfo->gen) {
31632       if (devinfo->is_haswell) {
31640       if (devinfo->is_g4x) {
31662 _3DSTATE_GATHER_POOL_ALLOC_length(const struct gen_device_info *devinfo)
31664    switch (devinfo->gen) {
31670       if (devinfo->is_haswell) {
31678       if (devinfo->is_g4x) {
31700 _3DSTATE_GATHER_POOL_ALLOC_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
31702    switch (devinfo->gen) {
31708       if (devinfo->is_haswell) {
31716       if (devinfo->is_g4x) {
31735 _3DSTATE_GATHER_POOL_ALLOC_3DCommandOpcode_start(const struct gen_device_info *devinfo)
31737    switch (devinfo->gen) {
31743       if (devinfo->is_haswell) {
31751       if (devinfo->is_g4x) {
31773 _3DSTATE_GATHER_POOL_ALLOC_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
31775    switch (devinfo->gen) {
31781       if (devinfo->is_haswell) {
31789       if (devinfo->is_g4x) {
31808 _3DSTATE_GATHER_POOL_ALLOC_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
31810    switch (devinfo->gen) {
31816       if (devinfo->is_haswell) {
31824       if (devinfo->is_g4x) {
31846 _3DSTATE_GATHER_POOL_ALLOC_CommandSubType_bits(const struct gen_device_info *devinfo)
31848    switch (devinfo->gen) {
31854       if (devinfo->is_haswell) {
31862       if (devinfo->is_g4x) {
31881 _3DSTATE_GATHER_POOL_ALLOC_CommandSubType_start(const struct gen_device_info *devinfo)
31883    switch (devinfo->gen) {
31889       if (devinfo->is_haswell) {
31897       if (devinfo->is_g4x) {
31919 _3DSTATE_GATHER_POOL_ALLOC_CommandType_bits(const struct gen_device_info *devinfo)
31921    switch (devinfo->gen) {
31927       if (devinfo->is_haswell) {
31935       if (devinfo->is_g4x) {
31954 _3DSTATE_GATHER_POOL_ALLOC_CommandType_start(const struct gen_device_info *devinfo)
31956    switch (devinfo->gen) {
31962       if (devinfo->is_haswell) {
31970       if (devinfo->is_g4x) {
31992 _3DSTATE_GATHER_POOL_ALLOC_DWordLength_bits(const struct gen_device_info *devinfo)
31994    switch (devinfo->gen) {
32000       if (devinfo->is_haswell) {
32008       if (devinfo->is_g4x) {
32027 _3DSTATE_GATHER_POOL_ALLOC_DWordLength_start(const struct gen_device_info *devinfo)
32029    switch (devinfo->gen) {
32035       if (devinfo->is_haswell) {
32043       if (devinfo->is_g4x) {
32065 _3DSTATE_GATHER_POOL_ALLOC_GatherPoolBaseAddress_bits(const struct gen_device_info *devinfo)
32067    switch (devinfo->gen) {
32073       if (devinfo->is_haswell) {
32081       if (devinfo->is_g4x) {
32100 _3DSTATE_GATHER_POOL_ALLOC_GatherPoolBaseAddress_start(const struct gen_device_info *devinfo)
32102    switch (devinfo->gen) {
32108       if (devinfo->is_haswell) {
32116       if (devinfo->is_g4x) {
32137 _3DSTATE_GATHER_POOL_ALLOC_GatherPoolBufferSize_bits(const struct gen_device_info *devinfo)
32139    switch (devinfo->gen) {
32145       if (devinfo->is_haswell) {
32153       if (devinfo->is_g4x) {
32171 _3DSTATE_GATHER_POOL_ALLOC_GatherPoolBufferSize_start(const struct gen_device_info *devinfo)
32173    switch (devinfo->gen) {
32179       if (devinfo->is_haswell) {
32187       if (devinfo->is_g4x) {
32209 _3DSTATE_GATHER_POOL_ALLOC_GatherPoolEnable_bits(const struct gen_device_info *devinfo)
32211    switch (devinfo->gen) {
32217       if (devinfo->is_haswell) {
32225       if (devinfo->is_g4x) {
32244 _3DSTATE_GATHER_POOL_ALLOC_GatherPoolEnable_start(const struct gen_device_info *devinfo)
32246    switch (devinfo->gen) {
32252       if (devinfo->is_haswell) {
32260       if (devinfo->is_g4x) {
32278 _3DSTATE_GATHER_POOL_ALLOC_GatherPoolUpperBound_bits(const struct gen_device_info *devinfo)
32280    switch (devinfo->gen) {
32286       if (devinfo->is_haswell) {
32294       if (devinfo->is_g4x) {
32309 _3DSTATE_GATHER_POOL_ALLOC_GatherPoolUpperBound_start(const struct gen_device_info *devinfo)
32311    switch (devinfo->gen) {
32317       if (devinfo->is_haswell) {
32325       if (devinfo->is_g4x) {
32347 _3DSTATE_GATHER_POOL_ALLOC_MOCS_bits(const struct gen_device_info *devinfo)
32349    switch (devinfo->gen) {
32355       if (devinfo->is_haswell) {
32363       if (devinfo->is_g4x) {
32382 _3DSTATE_GATHER_POOL_ALLOC_MOCS_start(const struct gen_device_info *devinfo)
32384    switch (devinfo->gen) {
32390       if (devinfo->is_haswell) {
32398       if (devinfo->is_g4x) {
32418 _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_length(const struct gen_device_info *devinfo)
32420    switch (devinfo->gen) {
32426       if (devinfo->is_haswell) {
32434       if (devinfo->is_g4x) {
32454 _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
32456    switch (devinfo->gen) {
32462       if (devinfo->is_haswell) {
32470       if (devinfo->is_g4x) {
32487 _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandOpcode_start(const struct gen_device_info *devinfo)
32489    switch (devinfo->gen) {
32495       if (devinfo->is_haswell) {
32503       if (devinfo->is_g4x) {
32523 _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
32525    switch (devinfo->gen) {
32531       if (devinfo->is_haswell) {
32539       if (devinfo->is_g4x) {
32556 _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
32558    switch (devinfo->gen) {
32564       if (devinfo->is_haswell) {
32572       if (devinfo->is_g4x) {
32592 _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandSubType_bits(const struct gen_device_info *devinfo)
32594    switch (devinfo->gen) {
32600       if (devinfo->is_haswell) {
32608       if (devinfo->is_g4x) {
32625 _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandSubType_start(const struct gen_device_info *devinfo)
32627    switch (devinfo->gen) {
32633       if (devinfo->is_haswell) {
32641       if (devinfo->is_g4x) {
32661 _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandType_bits(const struct gen_device_info *devinfo)
32663    switch (devinfo->gen) {
32669       if (devinfo->is_haswell) {
32677       if (devinfo->is_g4x) {
32694 _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandType_start(const struct gen_device_info *devinfo)
32696    switch (devinfo->gen) {
32702       if (devinfo->is_haswell) {
32710       if (devinfo->is_g4x) {
32730 _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_DWordLength_bits(const struct gen_device_info *devinfo)
32732    switch (devinfo->gen) {
32738       if (devinfo->is_haswell) {
32746       if (devinfo->is_g4x) {
32763 _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_DWordLength_start(const struct gen_device_info *devinfo)
32765    switch (devinfo->gen) {
32771       if (devinfo->is_haswell) {
32779       if (devinfo->is_g4x) {
32799 _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_GlobalDepthOffsetClamp_bits(const struct gen_device_info *devinfo)
32801    switch (devinfo->gen) {
32807       if (devinfo->is_haswell) {
32815       if (devinfo->is_g4x) {
32832 _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_GlobalDepthOffsetClamp_start(const struct gen_device_info *devinfo)
32834    switch (devinfo->gen) {
32840       if (devinfo->is_haswell) {
32848       if (devinfo->is_g4x) {
32872 _3DSTATE_GS_length(const struct gen_device_info *devinfo)
32874    switch (devinfo->gen) {
32880       if (devinfo->is_haswell) {
32888       if (devinfo->is_g4x) {
32912 _3DSTATE_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
32914    switch (devinfo->gen) {
32920       if (devinfo->is_haswell) {
32928       if (devinfo->is_g4x) {
32949 _3DSTATE_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
32951    switch (devinfo->gen) {
32957       if (devinfo->is_haswell) {
32965       if (devinfo->is_g4x) {
32989 _3DSTATE_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
32991    switch (devinfo->gen) {
32997       if (devinfo->is_haswell) {
33005       if (devinfo->is_g4x) {
33026 _3DSTATE_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
33028    switch (devinfo->gen) {
33034       if (devinfo->is_haswell) {
33042       if (devinfo->is_g4x) {
33063 _3DSTATE_GS_AccessesUAV_bits(const struct gen_device_info *devinfo)
33065    switch (devinfo->gen) {
33071       if (devinfo->is_haswell) {
33079       if (devinfo->is_g4x) {
33097 _3DSTATE_GS_AccessesUAV_start(const struct gen_device_info *devinfo)
33099    switch (devinfo->gen) {
33105       if (devinfo->is_haswell) {
33113       if (devinfo->is_g4x) {
33137 _3DSTATE_GS_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
33139    switch (devinfo->gen) {
33145       if (devinfo->is_haswell) {
33153       if (devinfo->is_g4x) {
33174 _3DSTATE_GS_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
33176    switch (devinfo->gen) {
33182       if (devinfo->is_haswell) {
33190       if (devinfo->is_g4x) {
33214 _3DSTATE_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
33216    switch (devinfo->gen) {
33222       if (devinfo->is_haswell) {
33230       if (devinfo->is_g4x) {
33251 _3DSTATE_GS_CommandSubType_start(const struct gen_device_info *devinfo)
33253    switch (devinfo->gen) {
33259       if (devinfo->is_haswell) {
33267       if (devinfo->is_g4x) {
33291 _3DSTATE_GS_CommandType_bits(const struct gen_device_info *devinfo)
33293    switch (devinfo->gen) {
33299       if (devinfo->is_haswell) {
33307       if (devinfo->is_g4x) {
33328 _3DSTATE_GS_CommandType_start(const struct gen_device_info *devinfo)
33330    switch (devinfo->gen) {
33336       if (devinfo->is_haswell) {
33344       if (devinfo->is_g4x) {
33367 _3DSTATE_GS_ControlDataFormat_bits(const struct gen_device_info *devinfo)
33369    switch (devinfo->gen) {
33375       if (devinfo->is_haswell) {
33383       if (devinfo->is_g4x) {
33403 _3DSTATE_GS_ControlDataFormat_start(const struct gen_device_info *devinfo)
33405    switch (devinfo->gen) {
33411       if (devinfo->is_haswell) {
33419       if (devinfo->is_g4x) {
33442 _3DSTATE_GS_ControlDataHeaderSize_bits(const struct gen_device_info *devinfo)
33444    switch (devinfo->gen) {
33450       if (devinfo->is_haswell) {
33458       if (devinfo->is_g4x) {
33478 _3DSTATE_GS_ControlDataHeaderSize_start(const struct gen_device_info *devinfo)
33480    switch (devinfo->gen) {
33486       if (devinfo->is_haswell) {
33494       if (devinfo->is_g4x) {
33518 _3DSTATE_GS_DWordLength_bits(const struct gen_device_info *devinfo)
33520    switch (devinfo->gen) {
33526       if (devinfo->is_haswell) {
33534       if (devinfo->is_g4x) {
33555 _3DSTATE_GS_DWordLength_start(const struct gen_device_info *devinfo)
33557    switch (devinfo->gen) {
33563       if (devinfo->is_haswell) {
33571       if (devinfo->is_g4x) {
33592 _3DSTATE_GS_DefaultStreamId_bits(const struct gen_device_info *devinfo)
33594    switch (devinfo->gen) {
33600       if (devinfo->is_haswell) {
33608       if (devinfo->is_g4x) {
33626 _3DSTATE_GS_DefaultStreamId_start(const struct gen_device_info *devinfo)
33628    switch (devinfo->gen) {
33634       if (devinfo->is_haswell) {
33642       if (devinfo->is_g4x) {
33661 _3DSTATE_GS_DefaultStreamID_bits(const struct gen_device_info *devinfo)
33663    switch (devinfo->gen) {
33669       if (devinfo->is_haswell) {
33677       if (devinfo->is_g4x) {
33693 _3DSTATE_GS_DefaultStreamID_start(const struct gen_device_info *devinfo)
33695    switch (devinfo->gen) {
33701       if (devinfo->is_haswell) {
33709       if (devinfo->is_g4x) {
33733 _3DSTATE_GS_DiscardAdjacency_bits(const struct gen_device_info *devinfo)
33735    switch (devinfo->gen) {
33741       if (devinfo->is_haswell) {
33749       if (devinfo->is_g4x) {
33770 _3DSTATE_GS_DiscardAdjacency_start(const struct gen_device_info *devinfo)
33772    switch (devinfo->gen) {
33778       if (devinfo->is_haswell) {
33786       if (devinfo->is_g4x) {
33810 _3DSTATE_GS_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
33812    switch (devinfo->gen) {
33818       if (devinfo->is_haswell) {
33826       if (devinfo->is_g4x) {
33847 _3DSTATE_GS_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
33849    switch (devinfo->gen) {
33855       if (devinfo->is_haswell) {
33863       if (devinfo->is_g4x) {
33883 _3DSTATE_GS_DispatchGRFStartRegisterForURBData54_bits(const struct gen_device_info *devinfo)
33885    switch (devinfo->gen) {
33891       if (devinfo->is_haswell) {
33899       if (devinfo->is_g4x) {
33916 _3DSTATE_GS_DispatchGRFStartRegisterForURBData54_start(const struct gen_device_info *devinfo)
33918    switch (devinfo->gen) {
33924       if (devinfo->is_haswell) {
33932       if (devinfo->is_g4x) {
33955 _3DSTATE_GS_DispatchMode_bits(const struct gen_device_info *devinfo)
33957    switch (devinfo->gen) {
33963       if (devinfo->is_haswell) {
33971       if (devinfo->is_g4x) {
33991 _3DSTATE_GS_DispatchMode_start(const struct gen_device_info *devinfo)
33993    switch (devinfo->gen) {
33999       if (devinfo->is_haswell) {
34007       if (devinfo->is_g4x) {
34031 _3DSTATE_GS_Enable_bits(const struct gen_device_info *devinfo)
34033    switch (devinfo->gen) {
34039       if (devinfo->is_haswell) {
34047       if (devinfo->is_g4x) {
34068 _3DSTATE_GS_Enable_start(const struct gen_device_info *devinfo)
34070    switch (devinfo->gen) {
34076       if (devinfo->is_haswell) {
34084       if (devinfo->is_g4x) {
34105 _3DSTATE_GS_ExpectedVertexCount_bits(const struct gen_device_info *devinfo)
34107    switch (devinfo->gen) {
34113       if (devinfo->is_haswell) {
34121       if (devinfo->is_g4x) {
34139 _3DSTATE_GS_ExpectedVertexCount_start(const struct gen_device_info *devinfo)
34141    switch (devinfo->gen) {
34147       if (devinfo->is_haswell) {
34155       if (devinfo->is_g4x) {
34179 _3DSTATE_GS_FloatingPointMode_bits(const struct gen_device_info *devinfo)
34181    switch (devinfo->gen) {
34187       if (devinfo->is_haswell) {
34195       if (devinfo->is_g4x) {
34216 _3DSTATE_GS_FloatingPointMode_start(const struct gen_device_info *devinfo)
34218    switch (devinfo->gen) {
34224       if (devinfo->is_haswell) {
34232       if (devinfo->is_g4x) {
34251 _3DSTATE_GS_GSInvocationsIncrementValue_bits(const struct gen_device_info *devinfo)
34253    switch (devinfo->gen) {
34259       if (devinfo->is_haswell) {
34267       if (devinfo->is_g4x) {
34283 _3DSTATE_GS_GSInvocationsIncrementValue_start(const struct gen_device_info *devinfo)
34285    switch (devinfo->gen) {
34291       if (devinfo->is_haswell) {
34299       if (devinfo->is_g4x) {
34317 _3DSTATE_GS_GSaccessesUAV_bits(const struct gen_device_info *devinfo)
34319    switch (devinfo->gen) {
34325       if (devinfo->is_haswell) {
34333       if (devinfo->is_g4x) {
34348 _3DSTATE_GS_GSaccessesUAV_start(const struct gen_device_info *devinfo)
34350    switch (devinfo->gen) {
34356       if (devinfo->is_haswell) {
34364       if (devinfo->is_g4x) {
34387 _3DSTATE_GS_Hint_bits(const struct gen_device_info *devinfo)
34389    switch (devinfo->gen) {
34395       if (devinfo->is_haswell) {
34403       if (devinfo->is_g4x) {
34423 _3DSTATE_GS_Hint_start(const struct gen_device_info *devinfo)
34425    switch (devinfo->gen) {
34431       if (devinfo->is_haswell) {
34439       if (devinfo->is_g4x) {
34463 _3DSTATE_GS_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
34465    switch (devinfo->gen) {
34471       if (devinfo->is_haswell) {
34479       if (devinfo->is_g4x) {
34500 _3DSTATE_GS_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
34502    switch (devinfo->gen) {
34508       if (devinfo->is_haswell) {
34516       if (devinfo->is_g4x) {
34539 _3DSTATE_GS_IncludePrimitiveID_bits(const struct gen_device_info *devinfo)
34541    switch (devinfo->gen) {
34547       if (devinfo->is_haswell) {
34555       if (devinfo->is_g4x) {
34575 _3DSTATE_GS_IncludePrimitiveID_start(const struct gen_device_info *devinfo)
34577    switch (devinfo->gen) {
34583       if (devinfo->is_haswell) {
34591       if (devinfo->is_g4x) {
34614 _3DSTATE_GS_IncludeVertexHandles_bits(const struct gen_device_info *devinfo)
34616    switch (devinfo->gen) {
34622       if (devinfo->is_haswell) {
34630       if (devinfo->is_g4x) {
34650 _3DSTATE_GS_IncludeVertexHandles_start(const struct gen_device_info *devinfo)
34652    switch (devinfo->gen) {
34658       if (devinfo->is_haswell) {
34666       if (devinfo->is_g4x) {
34689 _3DSTATE_GS_InstanceControl_bits(const struct gen_device_info *devinfo)
34691    switch (devinfo->gen) {
34697       if (devinfo->is_haswell) {
34705       if (devinfo->is_g4x) {
34725 _3DSTATE_GS_InstanceControl_start(const struct gen_device_info *devinfo)
34727    switch (devinfo->gen) {
34733       if (devinfo->is_haswell) {
34741       if (devinfo->is_g4x) {
34762 _3DSTATE_GS_InvocationsIncrementValue_bits(const struct gen_device_info *devinfo)
34764    switch (devinfo->gen) {
34770       if (devinfo->is_haswell) {
34778       if (devinfo->is_g4x) {
34796 _3DSTATE_GS_InvocationsIncrementValue_start(const struct gen_device_info *devinfo)
34798    switch (devinfo->gen) {
34804       if (devinfo->is_haswell) {
34812       if (devinfo->is_g4x) {
34836 _3DSTATE_GS_KernelStartPointer_bits(const struct gen_device_info *devinfo)
34838    switch (devinfo->gen) {
34844       if (devinfo->is_haswell) {
34852       if (devinfo->is_g4x) {
34873 _3DSTATE_GS_KernelStartPointer_start(const struct gen_device_info *devinfo)
34875    switch (devinfo->gen) {
34881       if (devinfo->is_haswell) {
34889       if (devinfo->is_g4x) {
34913 _3DSTATE_GS_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
34915    switch (devinfo->gen) {
34921       if (devinfo->is_haswell) {
34929       if (devinfo->is_g4x) {
34950 _3DSTATE_GS_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
34952    switch (devinfo->gen) {
34958       if (devinfo->is_haswell) {
34966       if (devinfo->is_g4x) {
34990 _3DSTATE_GS_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
34992    switch (devinfo->gen) {
34998       if (devinfo->is_haswell) {
35006       if (devinfo->is_g4x) {
35027 _3DSTATE_GS_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
35029    switch (devinfo->gen) {
35035       if (devinfo->is_haswell) {
35043       if (devinfo->is_g4x) {
35066 _3DSTATE_GS_OutputTopology_bits(const struct gen_device_info *devinfo)
35068    switch (devinfo->gen) {
35074       if (devinfo->is_haswell) {
35082       if (devinfo->is_g4x) {
35102 _3DSTATE_GS_OutputTopology_start(const struct gen_device_info *devinfo)
35104    switch (devinfo->gen) {
35110       if (devinfo->is_haswell) {
35118       if (devinfo->is_g4x) {
35141 _3DSTATE_GS_OutputVertexSize_bits(const struct gen_device_info *devinfo)
35143    switch (devinfo->gen) {
35149       if (devinfo->is_haswell) {
35157       if (devinfo->is_g4x) {
35177 _3DSTATE_GS_OutputVertexSize_start(const struct gen_device_info *devinfo)
35179    switch (devinfo->gen) {
35185       if (devinfo->is_haswell) {
35193       if (devinfo->is_g4x) {
35217 _3DSTATE_GS_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
35219    switch (devinfo->gen) {
35225       if (devinfo->is_haswell) {
35233       if (devinfo->is_g4x) {
35254 _3DSTATE_GS_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
35256    switch (devinfo->gen) {
35262       if (devinfo->is_haswell) {
35270       if (devinfo->is_g4x) {
35288 _3DSTATE_GS_RenderingEnabled_bits(const struct gen_device_info *devinfo)
35290    switch (devinfo->gen) {
35296       if (devinfo->is_haswell) {
35304       if (devinfo->is_g4x) {
35319 _3DSTATE_GS_RenderingEnabled_start(const struct gen_device_info *devinfo)
35321    switch (devinfo->gen) {
35327       if (devinfo->is_haswell) {
35335       if (devinfo->is_g4x) {
35359 _3DSTATE_GS_ReorderMode_bits(const struct gen_device_info *devinfo)
35361    switch (devinfo->gen) {
35367       if (devinfo->is_haswell) {
35375       if (devinfo->is_g4x) {
35396 _3DSTATE_GS_ReorderMode_start(const struct gen_device_info *devinfo)
35398    switch (devinfo->gen) {
35404       if (devinfo->is_haswell) {
35412       if (devinfo->is_g4x) {
35430 _3DSTATE_GS_SOStatisticsEnable_bits(const struct gen_device_info *devinfo)
35432    switch (devinfo->gen) {
35438       if (devinfo->is_haswell) {
35446       if (devinfo->is_g4x) {
35461 _3DSTATE_GS_SOStatisticsEnable_start(const struct gen_device_info *devinfo)
35463    switch (devinfo->gen) {
35469       if (devinfo->is_haswell) {
35477       if (devinfo->is_g4x) {
35495 _3DSTATE_GS_SVBIPayloadEnable_bits(const struct gen_device_info *devinfo)
35497    switch (devinfo->gen) {
35503       if (devinfo->is_haswell) {
35511       if (devinfo->is_g4x) {
35526 _3DSTATE_GS_SVBIPayloadEnable_start(const struct gen_device_info *devinfo)
35528    switch (devinfo->gen) {
35534       if (devinfo->is_haswell) {
35542       if (devinfo->is_g4x) {
35560 _3DSTATE_GS_SVBIPostIncrementEnable_bits(const struct gen_device_info *devinfo)
35562    switch (devinfo->gen) {
35568       if (devinfo->is_haswell) {
35576       if (devinfo->is_g4x) {
35591 _3DSTATE_GS_SVBIPostIncrementEnable_start(const struct gen_device_info *devinfo)
35593    switch (devinfo->gen) {
35599       if (devinfo->is_haswell) {
35607       if (devinfo->is_g4x) {
35625 _3DSTATE_GS_SVBIPostIncrementValue_bits(const struct gen_device_info *devinfo)
35627    switch (devinfo->gen) {
35633       if (devinfo->is_haswell) {
35641       if (devinfo->is_g4x) {
35656 _3DSTATE_GS_SVBIPostIncrementValue_start(const struct gen_device_info *devinfo)
35658    switch (devinfo->gen) {
35664       if (devinfo->is_haswell) {
35672       if (devinfo->is_g4x) {
35696 _3DSTATE_GS_SamplerCount_bits(const struct gen_device_info *devinfo)
35698    switch (devinfo->gen) {
35704       if (devinfo->is_haswell) {
35712       if (devinfo->is_g4x) {
35733 _3DSTATE_GS_SamplerCount_start(const struct gen_device_info *devinfo)
35735    switch (devinfo->gen) {
35741       if (devinfo->is_haswell) {
35749       if (devinfo->is_g4x) {
35773 _3DSTATE_GS_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
35775    switch (devinfo->gen) {
35781       if (devinfo->is_haswell) {
35789       if (devinfo->is_g4x) {
35810 _3DSTATE_GS_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
35812    switch (devinfo->gen) {
35818       if (devinfo->is_haswell) {
35826       if (devinfo->is_g4x) {
35845 _3DSTATE_GS_SemaphoreHandle_bits(const struct gen_device_info *devinfo)
35847    switch (devinfo->gen) {
35853       if (devinfo->is_haswell) {
35861       if (devinfo->is_g4x) {
35877 _3DSTATE_GS_SemaphoreHandle_start(const struct gen_device_info *devinfo)
35879    switch (devinfo->gen) {
35885       if (devinfo->is_haswell) {
35893       if (devinfo->is_g4x) {
35917 _3DSTATE_GS_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
35919    switch (devinfo->gen) {
35925       if (devinfo->is_haswell) {
35933       if (devinfo->is_g4x) {
35954 _3DSTATE_GS_SingleProgramFlow_start(const struct gen_device_info *devinfo)
35956    switch (devinfo->gen) {
35962       if (devinfo->is_haswell) {
35970       if (devinfo->is_g4x) {
35994 _3DSTATE_GS_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
35996    switch (devinfo->gen) {
36002       if (devinfo->is_haswell) {
36010       if (devinfo->is_g4x) {
36031 _3DSTATE_GS_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
36033    switch (devinfo->gen) {
36039       if (devinfo->is_haswell) {
36047       if (devinfo->is_g4x) {
36068 _3DSTATE_GS_StaticOutput_bits(const struct gen_device_info *devinfo)
36070    switch (devinfo->gen) {
36076       if (devinfo->is_haswell) {
36084       if (devinfo->is_g4x) {
36102 _3DSTATE_GS_StaticOutput_start(const struct gen_device_info *devinfo)
36104    switch (devinfo->gen) {
36110       if (devinfo->is_haswell) {
36118       if (devinfo->is_g4x) {
36139 _3DSTATE_GS_StaticOutputVertexCount_bits(const struct gen_device_info *devinfo)
36141    switch (devinfo->gen) {
36147       if (devinfo->is_haswell) {
36155       if (devinfo->is_g4x) {
36173 _3DSTATE_GS_StaticOutputVertexCount_start(const struct gen_device_info *devinfo)
36175    switch (devinfo->gen) {
36181       if (devinfo->is_haswell) {
36189       if (devinfo->is_g4x) {
36213 _3DSTATE_GS_StatisticsEnable_bits(const struct gen_device_info *devinfo)
36215    switch (devinfo->gen) {
36221       if (devinfo->is_haswell) {
36229       if (devinfo->is_g4x) {
36250 _3DSTATE_GS_StatisticsEnable_start(const struct gen_device_info *devinfo)
36252    switch (devinfo->gen) {
36258       if (devinfo->is_haswell) {
36266       if (devinfo->is_g4x) {
36287 _3DSTATE_GS_ThreadDispatchPriority_bits(const struct gen_device_info *devinfo)
36289    switch (devinfo->gen) {
36295       if (devinfo->is_haswell) {
36303       if (devinfo->is_g4x) {
36321 _3DSTATE_GS_ThreadDispatchPriority_start(const struct gen_device_info *devinfo)
36323    switch (devinfo->gen) {
36329       if (devinfo->is_haswell) {
36337       if (devinfo->is_g4x) {
36357 _3DSTATE_GS_ThreadPriority_bits(const struct gen_device_info *devinfo)
36359    switch (devinfo->gen) {
36365       if (devinfo->is_haswell) {
36373       if (devinfo->is_g4x) {
36390 _3DSTATE_GS_ThreadPriority_start(const struct gen_device_info *devinfo)
36392    switch (devinfo->gen) {
36398       if (devinfo->is_haswell) {
36406       if (devinfo->is_g4x) {
36427 _3DSTATE_GS_UserClipDistanceClipTestEnableBitmask_bits(const struct gen_device_info *devinfo)
36429    switch (devinfo->gen) {
36435       if (devinfo->is_haswell) {
36443       if (devinfo->is_g4x) {
36461 _3DSTATE_GS_UserClipDistanceClipTestEnableBitmask_start(const struct gen_device_info *devinfo)
36463    switch (devinfo->gen) {
36469       if (devinfo->is_haswell) {
36477       if (devinfo->is_g4x) {
36498 _3DSTATE_GS_UserClipDistanceCullTestEnableBitmask_bits(const struct gen_device_info *devinfo)
36500    switch (devinfo->gen) {
36506       if (devinfo->is_haswell) {
36514       if (devinfo->is_g4x) {
36532 _3DSTATE_GS_UserClipDistanceCullTestEnableBitmask_start(const struct gen_device_info *devinfo)
36534    switch (devinfo->gen) {
36540       if (devinfo->is_haswell) {
36548       if (devinfo->is_g4x) {
36572 _3DSTATE_GS_VectorMaskEnable_bits(const struct gen_device_info *devinfo)
36574    switch (devinfo->gen) {
36580       if (devinfo->is_haswell) {
36588       if (devinfo->is_g4x) {
36609 _3DSTATE_GS_VectorMaskEnable_start(const struct gen_device_info *devinfo)
36611    switch (devinfo->gen) {
36617       if (devinfo->is_haswell) {
36625       if (devinfo->is_g4x) {
36646 _3DSTATE_GS_VertexURBEntryOutputLength_bits(const struct gen_device_info *devinfo)
36648    switch (devinfo->gen) {
36654       if (devinfo->is_haswell) {
36662       if (devinfo->is_g4x) {
36680 _3DSTATE_GS_VertexURBEntryOutputLength_start(const struct gen_device_info *devinfo)
36682    switch (devinfo->gen) {
36688       if (devinfo->is_haswell) {
36696       if (devinfo->is_g4x) {
36717 _3DSTATE_GS_VertexURBEntryOutputReadOffset_bits(const struct gen_device_info *devinfo)
36719    switch (devinfo->gen) {
36725       if (devinfo->is_haswell) {
36733       if (devinfo->is_g4x) {
36751 _3DSTATE_GS_VertexURBEntryOutputReadOffset_start(const struct gen_device_info *devinfo)
36753    switch (devinfo->gen) {
36759       if (devinfo->is_haswell) {
36767       if (devinfo->is_g4x) {
36791 _3DSTATE_GS_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
36793    switch (devinfo->gen) {
36799       if (devinfo->is_haswell) {
36807       if (devinfo->is_g4x) {
36828 _3DSTATE_GS_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
36830    switch (devinfo->gen) {
36836       if (devinfo->is_haswell) {
36844       if (devinfo->is_g4x) {
36868 _3DSTATE_GS_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
36870    switch (devinfo->gen) {
36876       if (devinfo->is_haswell) {
36884       if (devinfo->is_g4x) {
36905 _3DSTATE_GS_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
36907    switch (devinfo->gen) {
36913       if (devinfo->is_haswell) {
36921       if (devinfo->is_g4x) {
36939 _3DSTATE_GS_SVB_INDEX_length(const struct gen_device_info *devinfo)
36941    switch (devinfo->gen) {
36947       if (devinfo->is_haswell) {
36955       if (devinfo->is_g4x) {
36973 _3DSTATE_GS_SVB_INDEX_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
36975    switch (devinfo->gen) {
36981       if (devinfo->is_haswell) {
36989       if (devinfo->is_g4x) {
37004 _3DSTATE_GS_SVB_INDEX_3DCommandOpcode_start(const struct gen_device_info *devinfo)
37006    switch (devinfo->gen) {
37012       if (devinfo->is_haswell) {
37020       if (devinfo->is_g4x) {
37038 _3DSTATE_GS_SVB_INDEX_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
37040    switch (devinfo->gen) {
37046       if (devinfo->is_haswell) {
37054       if (devinfo->is_g4x) {
37069 _3DSTATE_GS_SVB_INDEX_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
37071    switch (devinfo->gen) {
37077       if (devinfo->is_haswell) {
37085       if (devinfo->is_g4x) {
37103 _3DSTATE_GS_SVB_INDEX_CommandSubType_bits(const struct gen_device_info *devinfo)
37105    switch (devinfo->gen) {
37111       if (devinfo->is_haswell) {
37119       if (devinfo->is_g4x) {
37134 _3DSTATE_GS_SVB_INDEX_CommandSubType_start(const struct gen_device_info *devinfo)
37136    switch (devinfo->gen) {
37142       if (devinfo->is_haswell) {
37150       if (devinfo->is_g4x) {
37168 _3DSTATE_GS_SVB_INDEX_CommandType_bits(const struct gen_device_info *devinfo)
37170    switch (devinfo->gen) {
37176       if (devinfo->is_haswell) {
37184       if (devinfo->is_g4x) {
37199 _3DSTATE_GS_SVB_INDEX_CommandType_start(const struct gen_device_info *devinfo)
37201    switch (devinfo->gen) {
37207       if (devinfo->is_haswell) {
37215       if (devinfo->is_g4x) {
37233 _3DSTATE_GS_SVB_INDEX_DWordLength_bits(const struct gen_device_info *devinfo)
37235    switch (devinfo->gen) {
37241       if (devinfo->is_haswell) {
37249       if (devinfo->is_g4x) {
37264 _3DSTATE_GS_SVB_INDEX_DWordLength_start(const struct gen_device_info *devinfo)
37266    switch (devinfo->gen) {
37272       if (devinfo->is_haswell) {
37280       if (devinfo->is_g4x) {
37298 _3DSTATE_GS_SVB_INDEX_IndexNumber_bits(const struct gen_device_info *devinfo)
37300    switch (devinfo->gen) {
37306       if (devinfo->is_haswell) {
37314       if (devinfo->is_g4x) {
37329 _3DSTATE_GS_SVB_INDEX_IndexNumber_start(const struct gen_device_info *devinfo)
37331    switch (devinfo->gen) {
37337       if (devinfo->is_haswell) {
37345       if (devinfo->is_g4x) {
37363 _3DSTATE_GS_SVB_INDEX_LoadInternalVertexCount_bits(const struct gen_device_info *devinfo)
37365    switch (devinfo->gen) {
37371       if (devinfo->is_haswell) {
37379       if (devinfo->is_g4x) {
37394 _3DSTATE_GS_SVB_INDEX_LoadInternalVertexCount_start(const struct gen_device_info *devinfo)
37396    switch (devinfo->gen) {
37402       if (devinfo->is_haswell) {
37410       if (devinfo->is_g4x) {
37428 _3DSTATE_GS_SVB_INDEX_MaximumIndex_bits(const struct gen_device_info *devinfo)
37430    switch (devinfo->gen) {
37436       if (devinfo->is_haswell) {
37444       if (devinfo->is_g4x) {
37459 _3DSTATE_GS_SVB_INDEX_MaximumIndex_start(const struct gen_device_info *devinfo)
37461    switch (devinfo->gen) {
37467       if (devinfo->is_haswell) {
37475       if (devinfo->is_g4x) {
37493 _3DSTATE_GS_SVB_INDEX_StreamedVertexBufferIndex_bits(const struct gen_device_info *devinfo)
37495    switch (devinfo->gen) {
37501       if (devinfo->is_haswell) {
37509       if (devinfo->is_g4x) {
37524 _3DSTATE_GS_SVB_INDEX_StreamedVertexBufferIndex_start(const struct gen_device_info *devinfo)
37526    switch (devinfo->gen) {
37532       if (devinfo->is_haswell) {
37540       if (devinfo->is_g4x) {
37565 _3DSTATE_HIER_DEPTH_BUFFER_length(const struct gen_device_info *devinfo)
37567    switch (devinfo->gen) {
37573       if (devinfo->is_haswell) {
37581       if (devinfo->is_g4x) {
37606 _3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
37608    switch (devinfo->gen) {
37614       if (devinfo->is_haswell) {
37622       if (devinfo->is_g4x) {
37644 _3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
37646    switch (devinfo->gen) {
37652       if (devinfo->is_haswell) {
37660       if (devinfo->is_g4x) {
37685 _3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
37687    switch (devinfo->gen) {
37693       if (devinfo->is_haswell) {
37701       if (devinfo->is_g4x) {
37723 _3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
37725    switch (devinfo->gen) {
37731       if (devinfo->is_haswell) {
37739       if (devinfo->is_g4x) {
37764 _3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_bits(const struct gen_device_info *devinfo)
37766    switch (devinfo->gen) {
37772       if (devinfo->is_haswell) {
37780       if (devinfo->is_g4x) {
37802 _3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_start(const struct gen_device_info *devinfo)
37804    switch (devinfo->gen) {
37810       if (devinfo->is_haswell) {
37818       if (devinfo->is_g4x) {
37843 _3DSTATE_HIER_DEPTH_BUFFER_CommandType_bits(const struct gen_device_info *devinfo)
37845    switch (devinfo->gen) {
37851       if (devinfo->is_haswell) {
37859       if (devinfo->is_g4x) {
37881 _3DSTATE_HIER_DEPTH_BUFFER_CommandType_start(const struct gen_device_info *devinfo)
37883    switch (devinfo->gen) {
37889       if (devinfo->is_haswell) {
37897       if (devinfo->is_g4x) {
37922 _3DSTATE_HIER_DEPTH_BUFFER_DWordLength_bits(const struct gen_device_info *devinfo)
37924    switch (devinfo->gen) {
37930       if (devinfo->is_haswell) {
37938       if (devinfo->is_g4x) {
37960 _3DSTATE_HIER_DEPTH_BUFFER_DWordLength_start(const struct gen_device_info *devinfo)
37962    switch (devinfo->gen) {
37968       if (devinfo->is_haswell) {
37976       if (devinfo->is_g4x) {
38000 _3DSTATE_HIER_DEPTH_BUFFER_MOCS_bits(const struct gen_device_info *devinfo)
38002    switch (devinfo->gen) {
38008       if (devinfo->is_haswell) {
38016       if (devinfo->is_g4x) {
38037 _3DSTATE_HIER_DEPTH_BUFFER_MOCS_start(const struct gen_device_info *devinfo)
38039    switch (devinfo->gen) {
38045       if (devinfo->is_haswell) {
38053       if (devinfo->is_g4x) {
38078 _3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_bits(const struct gen_device_info *devinfo)
38080    switch (devinfo->gen) {
38086       if (devinfo->is_haswell) {
38094       if (devinfo->is_g4x) {
38116 _3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_start(const struct gen_device_info *devinfo)
38118    switch (devinfo->gen) {
38124       if (devinfo->is_haswell) {
38132       if (devinfo->is_g4x) {
38157 _3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_bits(const struct gen_device_info *devinfo)
38159    switch (devinfo->gen) {
38165       if (devinfo->is_haswell) {
38173       if (devinfo->is_g4x) {
38195 _3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_start(const struct gen_device_info *devinfo)
38197    switch (devinfo->gen) {
38203       if (devinfo->is_haswell) {
38211       if (devinfo->is_g4x) {
38232 _3DSTATE_HIER_DEPTH_BUFFER_SurfaceQPitch_bits(const struct gen_device_info *devinfo)
38234    switch (devinfo->gen) {
38240       if (devinfo->is_haswell) {
38248       if (devinfo->is_g4x) {
38266 _3DSTATE_HIER_DEPTH_BUFFER_SurfaceQPitch_start(const struct gen_device_info *devinfo)
38268    switch (devinfo->gen) {
38274       if (devinfo->is_haswell) {
38282       if (devinfo->is_g4x) {
38300 _3DSTATE_HIER_DEPTH_BUFFER_TiledResourceMode_bits(const struct gen_device_info *devinfo)
38302    switch (devinfo->gen) {
38308       if (devinfo->is_haswell) {
38316       if (devinfo->is_g4x) {
38331 _3DSTATE_HIER_DEPTH_BUFFER_TiledResourceMode_start(const struct gen_device_info *devinfo)
38333    switch (devinfo->gen) {
38339       if (devinfo->is_haswell) {
38347       if (devinfo->is_g4x) {
38370 _3DSTATE_HS_length(const struct gen_device_info *devinfo)
38372    switch (devinfo->gen) {
38378       if (devinfo->is_haswell) {
38386       if (devinfo->is_g4x) {
38409 _3DSTATE_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
38411    switch (devinfo->gen) {
38417       if (devinfo->is_haswell) {
38425       if (devinfo->is_g4x) {
38445 _3DSTATE_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
38447    switch (devinfo->gen) {
38453       if (devinfo->is_haswell) {
38461       if (devinfo->is_g4x) {
38484 _3DSTATE_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
38486    switch (devinfo->gen) {
38492       if (devinfo->is_haswell) {
38500       if (devinfo->is_g4x) {
38520 _3DSTATE_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
38522    switch (devinfo->gen) {
38528       if (devinfo->is_haswell) {
38536       if (devinfo->is_g4x) {
38557 _3DSTATE_HS_AccessesUAV_bits(const struct gen_device_info *devinfo)
38559    switch (devinfo->gen) {
38565       if (devinfo->is_haswell) {
38573       if (devinfo->is_g4x) {
38591 _3DSTATE_HS_AccessesUAV_start(const struct gen_device_info *devinfo)
38593    switch (devinfo->gen) {
38599       if (devinfo->is_haswell) {
38607       if (devinfo->is_g4x) {
38630 _3DSTATE_HS_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
38632    switch (devinfo->gen) {
38638       if (devinfo->is_haswell) {
38646       if (devinfo->is_g4x) {
38666 _3DSTATE_HS_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
38668    switch (devinfo->gen) {
38674       if (devinfo->is_haswell) {
38682       if (devinfo->is_g4x) {
38705 _3DSTATE_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
38707    switch (devinfo->gen) {
38713       if (devinfo->is_haswell) {
38721       if (devinfo->is_g4x) {
38741 _3DSTATE_HS_CommandSubType_start(const struct gen_device_info *devinfo)
38743    switch (devinfo->gen) {
38749       if (devinfo->is_haswell) {
38757       if (devinfo->is_g4x) {
38780 _3DSTATE_HS_CommandType_bits(const struct gen_device_info *devinfo)
38782    switch (devinfo->gen) {
38788       if (devinfo->is_haswell) {
38796       if (devinfo->is_g4x) {
38816 _3DSTATE_HS_CommandType_start(const struct gen_device_info *devinfo)
38818    switch (devinfo->gen) {
38824       if (devinfo->is_haswell) {
38832       if (devinfo->is_g4x) {
38855 _3DSTATE_HS_DWordLength_bits(const struct gen_device_info *devinfo)
38857    switch (devinfo->gen) {
38863       if (devinfo->is_haswell) {
38871       if (devinfo->is_g4x) {
38891 _3DSTATE_HS_DWordLength_start(const struct gen_device_info *devinfo)
38893    switch (devinfo->gen) {
38899       if (devinfo->is_haswell) {
38907       if (devinfo->is_g4x) {
38930 _3DSTATE_HS_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
38932    switch (devinfo->gen) {
38938       if (devinfo->is_haswell) {
38946       if (devinfo->is_g4x) {
38966 _3DSTATE_HS_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
38968    switch (devinfo->gen) {
38974       if (devinfo->is_haswell) {
38982       if (devinfo->is_g4x) {
39002 _3DSTATE_HS_DispatchGRFStartRegisterForURBData5_bits(const struct gen_device_info *devinfo)
39004    switch (devinfo->gen) {
39010       if (devinfo->is_haswell) {
39018       if (devinfo->is_g4x) {
39035 _3DSTATE_HS_DispatchGRFStartRegisterForURBData5_start(const struct gen_device_info *devinfo)
39037    switch (devinfo->gen) {
39043       if (devinfo->is_haswell) {
39051       if (devinfo->is_g4x) {
39071 _3DSTATE_HS_DispatchMode_bits(const struct gen_device_info *devinfo)
39073    switch (devinfo->gen) {
39079       if (devinfo->is_haswell) {
39087       if (devinfo->is_g4x) {
39104 _3DSTATE_HS_DispatchMode_start(const struct gen_device_info *devinfo)
39106    switch (devinfo->gen) {
39112       if (devinfo->is_haswell) {
39120       if (devinfo->is_g4x) {
39143 _3DSTATE_HS_Enable_bits(const struct gen_device_info *devinfo)
39145    switch (devinfo->gen) {
39151       if (devinfo->is_haswell) {
39159       if (devinfo->is_g4x) {
39179 _3DSTATE_HS_Enable_start(const struct gen_device_info *devinfo)
39181    switch (devinfo->gen) {
39187       if (devinfo->is_haswell) {
39195       if (devinfo->is_g4x) {
39218 _3DSTATE_HS_FloatingPointMode_bits(const struct gen_device_info *devinfo)
39220    switch (devinfo->gen) {
39226       if (devinfo->is_haswell) {
39234       if (devinfo->is_g4x) {
39254 _3DSTATE_HS_FloatingPointMode_start(const struct gen_device_info *devinfo)
39256    switch (devinfo->gen) {
39262       if (devinfo->is_haswell) {
39270       if (devinfo->is_g4x) {
39288 _3DSTATE_HS_HSaccessesUAV_bits(const struct gen_device_info *devinfo)
39290    switch (devinfo->gen) {
39296       if (devinfo->is_haswell) {
39304       if (devinfo->is_g4x) {
39319 _3DSTATE_HS_HSaccessesUAV_start(const struct gen_device_info *devinfo)
39321    switch (devinfo->gen) {
39327       if (devinfo->is_haswell) {
39335       if (devinfo->is_g4x) {
39358 _3DSTATE_HS_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
39360    switch (devinfo->gen) {
39366       if (devinfo->is_haswell) {
39374       if (devinfo->is_g4x) {
39394 _3DSTATE_HS_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
39396    switch (devinfo->gen) {
39402       if (devinfo->is_haswell) {
39410       if (devinfo->is_g4x) {
39430 _3DSTATE_HS_IncludePrimitiveID_bits(const struct gen_device_info *devinfo)
39432    switch (devinfo->gen) {
39438       if (devinfo->is_haswell) {
39446       if (devinfo->is_g4x) {
39463 _3DSTATE_HS_IncludePrimitiveID_start(const struct gen_device_info *devinfo)
39465    switch (devinfo->gen) {
39471       if (devinfo->is_haswell) {
39479       if (devinfo->is_g4x) {
39502 _3DSTATE_HS_IncludeVertexHandles_bits(const struct gen_device_info *devinfo)
39504    switch (devinfo->gen) {
39510       if (devinfo->is_haswell) {
39518       if (devinfo->is_g4x) {
39538 _3DSTATE_HS_IncludeVertexHandles_start(const struct gen_device_info *devinfo)
39540    switch (devinfo->gen) {
39546       if (devinfo->is_haswell) {
39554       if (devinfo->is_g4x) {
39577 _3DSTATE_HS_InstanceCount_bits(const struct gen_device_info *devinfo)
39579    switch (devinfo->gen) {
39585       if (devinfo->is_haswell) {
39593       if (devinfo->is_g4x) {
39613 _3DSTATE_HS_InstanceCount_start(const struct gen_device_info *devinfo)
39615    switch (devinfo->gen) {
39621       if (devinfo->is_haswell) {
39629       if (devinfo->is_g4x) {
39652 _3DSTATE_HS_KernelStartPointer_bits(const struct gen_device_info *devinfo)
39654    switch (devinfo->gen) {
39660       if (devinfo->is_haswell) {
39668       if (devinfo->is_g4x) {
39688 _3DSTATE_HS_KernelStartPointer_start(const struct gen_device_info *devinfo)
39690    switch (devinfo->gen) {
39696       if (devinfo->is_haswell) {
39704       if (devinfo->is_g4x) {
39727 _3DSTATE_HS_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
39729    switch (devinfo->gen) {
39735       if (devinfo->is_haswell) {
39743       if (devinfo->is_g4x) {
39763 _3DSTATE_HS_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
39765    switch (devinfo->gen) {
39771       if (devinfo->is_haswell) {
39779       if (devinfo->is_g4x) {
39802 _3DSTATE_HS_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
39804    switch (devinfo->gen) {
39810       if (devinfo->is_haswell) {
39818       if (devinfo->is_g4x) {
39838 _3DSTATE_HS_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
39840    switch (devinfo->gen) {
39846       if (devinfo->is_haswell) {
39854       if (devinfo->is_g4x) {
39877 _3DSTATE_HS_SamplerCount_bits(const struct gen_device_info *devinfo)
39879    switch (devinfo->gen) {
39885       if (devinfo->is_haswell) {
39893       if (devinfo->is_g4x) {
39913 _3DSTATE_HS_SamplerCount_start(const struct gen_device_info *devinfo)
39915    switch (devinfo->gen) {
39921       if (devinfo->is_haswell) {
39929       if (devinfo->is_g4x) {
39952 _3DSTATE_HS_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
39954    switch (devinfo->gen) {
39960       if (devinfo->is_haswell) {
39968       if (devinfo->is_g4x) {
39988 _3DSTATE_HS_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
39990    switch (devinfo->gen) {
39996       if (devinfo->is_haswell) {
40004       if (devinfo->is_g4x) {
40023 _3DSTATE_HS_SemaphoreHandle_bits(const struct gen_device_info *devinfo)
40025    switch (devinfo->gen) {
40031       if (devinfo->is_haswell) {
40039       if (devinfo->is_g4x) {
40055 _3DSTATE_HS_SemaphoreHandle_start(const struct gen_device_info *devinfo)
40057    switch (devinfo->gen) {
40063       if (devinfo->is_haswell) {
40071       if (devinfo->is_g4x) {
40094 _3DSTATE_HS_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
40096    switch (devinfo->gen) {
40102       if (devinfo->is_haswell) {
40110       if (devinfo->is_g4x) {
40130 _3DSTATE_HS_SingleProgramFlow_start(const struct gen_device_info *devinfo)
40132    switch (devinfo->gen) {
40138       if (devinfo->is_haswell) {
40146       if (devinfo->is_g4x) {
40169 _3DSTATE_HS_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
40171    switch (devinfo->gen) {
40177       if (devinfo->is_haswell) {
40185       if (devinfo->is_g4x) {
40205 _3DSTATE_HS_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
40207    switch (devinfo->gen) {
40213       if (devinfo->is_haswell) {
40221       if (devinfo->is_g4x) {
40244 _3DSTATE_HS_StatisticsEnable_bits(const struct gen_device_info *devinfo)
40246    switch (devinfo->gen) {
40252       if (devinfo->is_haswell) {
40260       if (devinfo->is_g4x) {
40280 _3DSTATE_HS_StatisticsEnable_start(const struct gen_device_info *devinfo)
40282    switch (devinfo->gen) {
40288       if (devinfo->is_haswell) {
40296       if (devinfo->is_g4x) {
40318 _3DSTATE_HS_ThreadDispatchPriority_bits(const struct gen_device_info *devinfo)
40320    switch (devinfo->gen) {
40326       if (devinfo->is_haswell) {
40334       if (devinfo->is_g4x) {
40353 _3DSTATE_HS_ThreadDispatchPriority_start(const struct gen_device_info *devinfo)
40355    switch (devinfo->gen) {
40361       if (devinfo->is_haswell) {
40369       if (devinfo->is_g4x) {
40392 _3DSTATE_HS_VectorMaskEnable_bits(const struct gen_device_info *devinfo)
40394    switch (devinfo->gen) {
40400       if (devinfo->is_haswell) {
40408       if (devinfo->is_g4x) {
40428 _3DSTATE_HS_VectorMaskEnable_start(const struct gen_device_info *devinfo)
40430    switch (devinfo->gen) {
40436       if (devinfo->is_haswell) {
40444       if (devinfo->is_g4x) {
40467 _3DSTATE_HS_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
40469    switch (devinfo->gen) {
40475       if (devinfo->is_haswell) {
40483       if (devinfo->is_g4x) {
40503 _3DSTATE_HS_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
40505    switch (devinfo->gen) {
40511       if (devinfo->is_haswell) {
40519       if (devinfo->is_g4x) {
40542 _3DSTATE_HS_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
40544    switch (devinfo->gen) {
40550       if (devinfo->is_haswell) {
40558       if (devinfo->is_g4x) {
40578 _3DSTATE_HS_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
40580    switch (devinfo->gen) {
40586       if (devinfo->is_haswell) {
40594       if (devinfo->is_g4x) {
40621 _3DSTATE_INDEX_BUFFER_length(const struct gen_device_info *devinfo)
40623    switch (devinfo->gen) {
40629       if (devinfo->is_haswell) {
40637       if (devinfo->is_g4x) {
40664 _3DSTATE_INDEX_BUFFER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
40666    switch (devinfo->gen) {
40672       if (devinfo->is_haswell) {
40680       if (devinfo->is_g4x) {
40704 _3DSTATE_INDEX_BUFFER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
40706    switch (devinfo->gen) {
40712       if (devinfo->is_haswell) {
40720       if (devinfo->is_g4x) {
40747 _3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
40749    switch (devinfo->gen) {
40755       if (devinfo->is_haswell) {
40763       if (devinfo->is_g4x) {
40787 _3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
40789    switch (devinfo->gen) {
40795       if (devinfo->is_haswell) {
40803       if (devinfo->is_g4x) {
40826 _3DSTATE_INDEX_BUFFER_BufferEndingAddress_bits(const struct gen_device_info *devinfo)
40828    switch (devinfo->gen) {
40834       if (devinfo->is_haswell) {
40842       if (devinfo->is_g4x) {
40862 _3DSTATE_INDEX_BUFFER_BufferEndingAddress_start(const struct gen_device_info *devinfo)
40864    switch (devinfo->gen) {
40870       if (devinfo->is_haswell) {
40878       if (devinfo->is_g4x) {
40899 _3DSTATE_INDEX_BUFFER_BufferSize_bits(const struct gen_device_info *devinfo)
40901    switch (devinfo->gen) {
40907       if (devinfo->is_haswell) {
40915       if (devinfo->is_g4x) {
40933 _3DSTATE_INDEX_BUFFER_BufferSize_start(const struct gen_device_info *devinfo)
40935    switch (devinfo->gen) {
40941       if (devinfo->is_haswell) {
40949       if (devinfo->is_g4x) {
40976 _3DSTATE_INDEX_BUFFER_BufferStartingAddress_bits(const struct gen_device_info *devinfo)
40978    switch (devinfo->gen) {
40984       if (devinfo->is_haswell) {
40992       if (devinfo->is_g4x) {
41016 _3DSTATE_INDEX_BUFFER_BufferStartingAddress_start(const struct gen_device_info *devinfo)
41018    switch (devinfo->gen) {
41024       if (devinfo->is_haswell) {
41032       if (devinfo->is_g4x) {
41059 _3DSTATE_INDEX_BUFFER_CommandSubType_bits(const struct gen_device_info *devinfo)
41061    switch (devinfo->gen) {
41067       if (devinfo->is_haswell) {
41075       if (devinfo->is_g4x) {
41099 _3DSTATE_INDEX_BUFFER_CommandSubType_start(const struct gen_device_info *devinfo)
41101    switch (devinfo->gen) {
41107       if (devinfo->is_haswell) {
41115       if (devinfo->is_g4x) {
41142 _3DSTATE_INDEX_BUFFER_CommandType_bits(const struct gen_device_info *devinfo)
41144    switch (devinfo->gen) {
41150       if (devinfo->is_haswell) {
41158       if (devinfo->is_g4x) {
41182 _3DSTATE_INDEX_BUFFER_CommandType_start(const struct gen_device_info *devinfo)
41184    switch (devinfo->gen) {
41190       if (devinfo->is_haswell) {
41198       if (devinfo->is_g4x) {
41220 _3DSTATE_INDEX_BUFFER_CutIndexEnable_bits(const struct gen_device_info *devinfo)
41222    switch (devinfo->gen) {
41228       if (devinfo->is_haswell) {
41236       if (devinfo->is_g4x) {
41255 _3DSTATE_INDEX_BUFFER_CutIndexEnable_start(const struct gen_device_info *devinfo)
41257    switch (devinfo->gen) {
41263       if (devinfo->is_haswell) {
41271       if (devinfo->is_g4x) {
41298 _3DSTATE_INDEX_BUFFER_DWordLength_bits(const struct gen_device_info *devinfo)
41300    switch (devinfo->gen) {
41306       if (devinfo->is_haswell) {
41314       if (devinfo->is_g4x) {
41338 _3DSTATE_INDEX_BUFFER_DWordLength_start(const struct gen_device_info *devinfo)
41340    switch (devinfo->gen) {
41346       if (devinfo->is_haswell) {
41354       if (devinfo->is_g4x) {
41381 _3DSTATE_INDEX_BUFFER_IndexFormat_bits(const struct gen_device_info *devinfo)
41383    switch (devinfo->gen) {
41389       if (devinfo->is_haswell) {
41397       if (devinfo->is_g4x) {
41421 _3DSTATE_INDEX_BUFFER_IndexFormat_start(const struct gen_device_info *devinfo)
41423    switch (devinfo->gen) {
41429       if (devinfo->is_haswell) {
41437       if (devinfo->is_g4x) {
41461 _3DSTATE_INDEX_BUFFER_MOCS_bits(const struct gen_device_info *devinfo)
41463    switch (devinfo->gen) {
41469       if (devinfo->is_haswell) {
41477       if (devinfo->is_g4x) {
41498 _3DSTATE_INDEX_BUFFER_MOCS_start(const struct gen_device_info *devinfo)
41500    switch (devinfo->gen) {
41506       if (devinfo->is_haswell) {
41514       if (devinfo->is_g4x) {
41541 _3DSTATE_LINE_STIPPLE_length(const struct gen_device_info *devinfo)
41543    switch (devinfo->gen) {
41549       if (devinfo->is_haswell) {
41557       if (devinfo->is_g4x) {
41584 _3DSTATE_LINE_STIPPLE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
41586    switch (devinfo->gen) {
41592       if (devinfo->is_haswell) {
41600       if (devinfo->is_g4x) {
41624 _3DSTATE_LINE_STIPPLE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
41626    switch (devinfo->gen) {
41632       if (devinfo->is_haswell) {
41640       if (devinfo->is_g4x) {
41667 _3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
41669    switch (devinfo->gen) {
41675       if (devinfo->is_haswell) {
41683       if (devinfo->is_g4x) {
41707 _3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
41709    switch (devinfo->gen) {
41715       if (devinfo->is_haswell) {
41723       if (devinfo->is_g4x) {
41750 _3DSTATE_LINE_STIPPLE_CommandSubType_bits(const struct gen_device_info *devinfo)
41752    switch (devinfo->gen) {
41758       if (devinfo->is_haswell) {
41766       if (devinfo->is_g4x) {
41790 _3DSTATE_LINE_STIPPLE_CommandSubType_start(const struct gen_device_info *devinfo)
41792    switch (devinfo->gen) {
41798       if (devinfo->is_haswell) {
41806       if (devinfo->is_g4x) {
41833 _3DSTATE_LINE_STIPPLE_CommandType_bits(const struct gen_device_info *devinfo)
41835    switch (devinfo->gen) {
41841       if (devinfo->is_haswell) {
41849       if (devinfo->is_g4x) {
41873 _3DSTATE_LINE_STIPPLE_CommandType_start(const struct gen_device_info *devinfo)
41875    switch (devinfo->gen) {
41881       if (devinfo->is_haswell) {
41889       if (devinfo->is_g4x) {
41916 _3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_bits(const struct gen_device_info *devinfo)
41918    switch (devinfo->gen) {
41924       if (devinfo->is_haswell) {
41932       if (devinfo->is_g4x) {
41956 _3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_start(const struct gen_device_info *devinfo)
41958    switch (devinfo->gen) {
41964       if (devinfo->is_haswell) {
41972       if (devinfo->is_g4x) {
41999 _3DSTATE_LINE_STIPPLE_CurrentStippleIndex_bits(const struct gen_device_info *devinfo)
42001    switch (devinfo->gen) {
42007       if (devinfo->is_haswell) {
42015       if (devinfo->is_g4x) {
42039 _3DSTATE_LINE_STIPPLE_CurrentStippleIndex_start(const struct gen_device_info *devinfo)
42041    switch (devinfo->gen) {
42047       if (devinfo->is_haswell) {
42055       if (devinfo->is_g4x) {
42082 _3DSTATE_LINE_STIPPLE_DWordLength_bits(const struct gen_device_info *devinfo)
42084    switch (devinfo->gen) {
42090       if (devinfo->is_haswell) {
42098       if (devinfo->is_g4x) {
42122 _3DSTATE_LINE_STIPPLE_DWordLength_start(const struct gen_device_info *devinfo)
42124    switch (devinfo->gen) {
42130       if (devinfo->is_haswell) {
42138       if (devinfo->is_g4x) {
42165 _3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_bits(const struct gen_device_info *devinfo)
42167    switch (devinfo->gen) {
42173       if (devinfo->is_haswell) {
42181       if (devinfo->is_g4x) {
42205 _3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_start(const struct gen_device_info *devinfo)
42207    switch (devinfo->gen) {
42213       if (devinfo->is_haswell) {
42221       if (devinfo->is_g4x) {
42248 _3DSTATE_LINE_STIPPLE_LineStipplePattern_bits(const struct gen_device_info *devinfo)
42250    switch (devinfo->gen) {
42256       if (devinfo->is_haswell) {
42264       if (devinfo->is_g4x) {
42288 _3DSTATE_LINE_STIPPLE_LineStipplePattern_start(const struct gen_device_info *devinfo)
42290    switch (devinfo->gen) {
42296       if (devinfo->is_haswell) {
42304       if (devinfo->is_g4x) {
42331 _3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_bits(const struct gen_device_info *devinfo)
42333    switch (devinfo->gen) {
42339       if (devinfo->is_haswell) {
42347       if (devinfo->is_g4x) {
42371 _3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_start(const struct gen_device_info *devinfo)
42373    switch (devinfo->gen) {
42379       if (devinfo->is_haswell) {
42387       if (devinfo->is_g4x) {
42406 _3DSTATE_LINE_STIPPLE_ModifyEnable_bits(const struct gen_device_info *devinfo)
42408    switch (devinfo->gen) {
42414       if (devinfo->is_haswell) {
42422       if (devinfo->is_g4x) {
42438 _3DSTATE_LINE_STIPPLE_ModifyEnable_start(const struct gen_device_info *devinfo)
42440    switch (devinfo->gen) {
42446       if (devinfo->is_haswell) {
42454       if (devinfo->is_g4x) {
42479 _3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_bits(const struct gen_device_info *devinfo)
42481    switch (devinfo->gen) {
42487       if (devinfo->is_haswell) {
42495       if (devinfo->is_g4x) {
42517 _3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_start(const struct gen_device_info *devinfo)
42519    switch (devinfo->gen) {
42525       if (devinfo->is_haswell) {
42533       if (devinfo->is_g4x) {
42557 _3DSTATE_MONOFILTER_SIZE_length(const struct gen_device_info *devinfo)
42559    switch (devinfo->gen) {
42565       if (devinfo->is_haswell) {
42573       if (devinfo->is_g4x) {
42597 _3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
42599    switch (devinfo->gen) {
42605       if (devinfo->is_haswell) {
42613       if (devinfo->is_g4x) {
42634 _3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
42636    switch (devinfo->gen) {
42642       if (devinfo->is_haswell) {
42650       if (devinfo->is_g4x) {
42674 _3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
42676    switch (devinfo->gen) {
42682       if (devinfo->is_haswell) {
42690       if (devinfo->is_g4x) {
42711 _3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
42713    switch (devinfo->gen) {
42719       if (devinfo->is_haswell) {
42727       if (devinfo->is_g4x) {
42751 _3DSTATE_MONOFILTER_SIZE_CommandSubType_bits(const struct gen_device_info *devinfo)
42753    switch (devinfo->gen) {
42759       if (devinfo->is_haswell) {
42767       if (devinfo->is_g4x) {
42788 _3DSTATE_MONOFILTER_SIZE_CommandSubType_start(const struct gen_device_info *devinfo)
42790    switch (devinfo->gen) {
42796       if (devinfo->is_haswell) {
42804       if (devinfo->is_g4x) {
42828 _3DSTATE_MONOFILTER_SIZE_CommandType_bits(const struct gen_device_info *devinfo)
42830    switch (devinfo->gen) {
42836       if (devinfo->is_haswell) {
42844       if (devinfo->is_g4x) {
42865 _3DSTATE_MONOFILTER_SIZE_CommandType_start(const struct gen_device_info *devinfo)
42867    switch (devinfo->gen) {
42873       if (devinfo->is_haswell) {
42881       if (devinfo->is_g4x) {
42905 _3DSTATE_MONOFILTER_SIZE_DWordLength_bits(const struct gen_device_info *devinfo)
42907    switch (devinfo->gen) {
42913       if (devinfo->is_haswell) {
42921       if (devinfo->is_g4x) {
42942 _3DSTATE_MONOFILTER_SIZE_DWordLength_start(const struct gen_device_info *devinfo)
42944    switch (devinfo->gen) {
42950       if (devinfo->is_haswell) {
42958       if (devinfo->is_g4x) {
42982 _3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_bits(const struct gen_device_info *devinfo)
42984    switch (devinfo->gen) {
42990       if (devinfo->is_haswell) {
42998       if (devinfo->is_g4x) {
43019 _3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_start(const struct gen_device_info *devinfo)
43021    switch (devinfo->gen) {
43027       if (devinfo->is_haswell) {
43035       if (devinfo->is_g4x) {
43059 _3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_bits(const struct gen_device_info *devinfo)
43061    switch (devinfo->gen) {
43067       if (devinfo->is_haswell) {
43075       if (devinfo->is_g4x) {
43096 _3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_start(const struct gen_device_info *devinfo)
43098    switch (devinfo->gen) {
43104       if (devinfo->is_haswell) {
43112       if (devinfo->is_g4x) {
43136 _3DSTATE_MULTISAMPLE_length(const struct gen_device_info *devinfo)
43138    switch (devinfo->gen) {
43144       if (devinfo->is_haswell) {
43152       if (devinfo->is_g4x) {
43176 _3DSTATE_MULTISAMPLE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
43178    switch (devinfo->gen) {
43184       if (devinfo->is_haswell) {
43192       if (devinfo->is_g4x) {
43213 _3DSTATE_MULTISAMPLE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
43215    switch (devinfo->gen) {
43221       if (devinfo->is_haswell) {
43229       if (devinfo->is_g4x) {
43253 _3DSTATE_MULTISAMPLE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
43255    switch (devinfo->gen) {
43261       if (devinfo->is_haswell) {
43269       if (devinfo->is_g4x) {
43290 _3DSTATE_MULTISAMPLE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
43292    switch (devinfo->gen) {
43298       if (devinfo->is_haswell) {
43306       if (devinfo->is_g4x) {
43330 _3DSTATE_MULTISAMPLE_CommandSubType_bits(const struct gen_device_info *devinfo)
43332    switch (devinfo->gen) {
43338       if (devinfo->is_haswell) {
43346       if (devinfo->is_g4x) {
43367 _3DSTATE_MULTISAMPLE_CommandSubType_start(const struct gen_device_info *devinfo)
43369    switch (devinfo->gen) {
43375       if (devinfo->is_haswell) {
43383       if (devinfo->is_g4x) {
43407 _3DSTATE_MULTISAMPLE_CommandType_bits(const struct gen_device_info *devinfo)
43409    switch (devinfo->gen) {
43415       if (devinfo->is_haswell) {
43423       if (devinfo->is_g4x) {
43444 _3DSTATE_MULTISAMPLE_CommandType_start(const struct gen_device_info *devinfo)
43446    switch (devinfo->gen) {
43452       if (devinfo->is_haswell) {
43460       if (devinfo->is_g4x) {
43484 _3DSTATE_MULTISAMPLE_DWordLength_bits(const struct gen_device_info *devinfo)
43486    switch (devinfo->gen) {
43492       if (devinfo->is_haswell) {
43500       if (devinfo->is_g4x) {
43521 _3DSTATE_MULTISAMPLE_DWordLength_start(const struct gen_device_info *devinfo)
43523    switch (devinfo->gen) {
43529       if (devinfo->is_haswell) {
43537       if (devinfo->is_g4x) {
43555 _3DSTATE_MULTISAMPLE_MultiSampleEnable_bits(const struct gen_device_info *devinfo)
43557    switch (devinfo->gen) {
43563       if (devinfo->is_haswell) {
43571       if (devinfo->is_g4x) {
43586 _3DSTATE_MULTISAMPLE_MultiSampleEnable_start(const struct gen_device_info *devinfo)
43588    switch (devinfo->gen) {
43594       if (devinfo->is_haswell) {
43602       if (devinfo->is_g4x) {
43626 _3DSTATE_MULTISAMPLE_NumberofMultisamples_bits(const struct gen_device_info *devinfo)
43628    switch (devinfo->gen) {
43634       if (devinfo->is_haswell) {
43642       if (devinfo->is_g4x) {
43663 _3DSTATE_MULTISAMPLE_NumberofMultisamples_start(const struct gen_device_info *devinfo)
43665    switch (devinfo->gen) {
43671       if (devinfo->is_haswell) {
43679       if (devinfo->is_g4x) {
43703 _3DSTATE_MULTISAMPLE_PixelLocation_bits(const struct gen_device_info *devinfo)
43705    switch (devinfo->gen) {
43711       if (devinfo->is_haswell) {
43719       if (devinfo->is_g4x) {
43740 _3DSTATE_MULTISAMPLE_PixelLocation_start(const struct gen_device_info *devinfo)
43742    switch (devinfo->gen) {
43748       if (devinfo->is_haswell) {
43756       if (devinfo->is_g4x) {
43777 _3DSTATE_MULTISAMPLE_PixelPositionOffsetEnable_bits(const struct gen_device_info *devinfo)
43779    switch (devinfo->gen) {
43785       if (devinfo->is_haswell) {
43793       if (devinfo->is_g4x) {
43811 _3DSTATE_MULTISAMPLE_PixelPositionOffsetEnable_start(const struct gen_device_info *devinfo)
43813    switch (devinfo->gen) {
43819       if (devinfo->is_haswell) {
43827       if (devinfo->is_g4x) {
43847 _3DSTATE_MULTISAMPLE_Sample0XOffset_bits(const struct gen_device_info *devinfo)
43849    switch (devinfo->gen) {
43855       if (devinfo->is_haswell) {
43863       if (devinfo->is_g4x) {
43880 _3DSTATE_MULTISAMPLE_Sample0XOffset_start(const struct gen_device_info *devinfo)
43882    switch (devinfo->gen) {
43888       if (devinfo->is_haswell) {
43896       if (devinfo->is_g4x) {
43916 _3DSTATE_MULTISAMPLE_Sample0YOffset_bits(const struct gen_device_info *devinfo)
43918    switch (devinfo->gen) {
43924       if (devinfo->is_haswell) {
43932       if (devinfo->is_g4x) {
43949 _3DSTATE_MULTISAMPLE_Sample0YOffset_start(const struct gen_device_info *devinfo)
43951    switch (devinfo->gen) {
43957       if (devinfo->is_haswell) {
43965       if (devinfo->is_g4x) {
43985 _3DSTATE_MULTISAMPLE_Sample1XOffset_bits(const struct gen_device_info *devinfo)
43987    switch (devinfo->gen) {
43993       if (devinfo->is_haswell) {
44001       if (devinfo->is_g4x) {
44018 _3DSTATE_MULTISAMPLE_Sample1XOffset_start(const struct gen_device_info *devinfo)
44020    switch (devinfo->gen) {
44026       if (devinfo->is_haswell) {
44034       if (devinfo->is_g4x) {
44054 _3DSTATE_MULTISAMPLE_Sample1YOffset_bits(const struct gen_device_info *devinfo)
44056    switch (devinfo->gen) {
44062       if (devinfo->is_haswell) {
44070       if (devinfo->is_g4x) {
44087 _3DSTATE_MULTISAMPLE_Sample1YOffset_start(const struct gen_device_info *devinfo)
44089    switch (devinfo->gen) {
44095       if (devinfo->is_haswell) {
44103       if (devinfo->is_g4x) {
44123 _3DSTATE_MULTISAMPLE_Sample2XOffset_bits(const struct gen_device_info *devinfo)
44125    switch (devinfo->gen) {
44131       if (devinfo->is_haswell) {
44139       if (devinfo->is_g4x) {
44156 _3DSTATE_MULTISAMPLE_Sample2XOffset_start(const struct gen_device_info *devinfo)
44158    switch (devinfo->gen) {
44164       if (devinfo->is_haswell) {
44172       if (devinfo->is_g4x) {
44192 _3DSTATE_MULTISAMPLE_Sample2YOffset_bits(const struct gen_device_info *devinfo)
44194    switch (devinfo->gen) {
44200       if (devinfo->is_haswell) {
44208       if (devinfo->is_g4x) {
44225 _3DSTATE_MULTISAMPLE_Sample2YOffset_start(const struct gen_device_info *devinfo)
44227    switch (devinfo->gen) {
44233       if (devinfo->is_haswell) {
44241       if (devinfo->is_g4x) {
44261 _3DSTATE_MULTISAMPLE_Sample3XOffset_bits(const struct gen_device_info *devinfo)
44263    switch (devinfo->gen) {
44269       if (devinfo->is_haswell) {
44277       if (devinfo->is_g4x) {
44294 _3DSTATE_MULTISAMPLE_Sample3XOffset_start(const struct gen_device_info *devinfo)
44296    switch (devinfo->gen) {
44302       if (devinfo->is_haswell) {
44310       if (devinfo->is_g4x) {
44330 _3DSTATE_MULTISAMPLE_Sample3YOffset_bits(const struct gen_device_info *devinfo)
44332    switch (devinfo->gen) {
44338       if (devinfo->is_haswell) {
44346       if (devinfo->is_g4x) {
44363 _3DSTATE_MULTISAMPLE_Sample3YOffset_start(const struct gen_device_info *devinfo)
44365    switch (devinfo->gen) {
44371       if (devinfo->is_haswell) {
44379       if (devinfo->is_g4x) {
44398 _3DSTATE_MULTISAMPLE_Sample4XOffset_bits(const struct gen_device_info *devinfo)
44400    switch (devinfo->gen) {
44406       if (devinfo->is_haswell) {
44414       if (devinfo->is_g4x) {
44430 _3DSTATE_MULTISAMPLE_Sample4XOffset_start(const struct gen_device_info *devinfo)
44432    switch (devinfo->gen) {
44438       if (devinfo->is_haswell) {
44446       if (devinfo->is_g4x) {
44465 _3DSTATE_MULTISAMPLE_Sample4YOffset_bits(const struct gen_device_info *devinfo)
44467    switch (devinfo->gen) {
44473       if (devinfo->is_haswell) {
44481       if (devinfo->is_g4x) {
44497 _3DSTATE_MULTISAMPLE_Sample4YOffset_start(const struct gen_device_info *devinfo)
44499    switch (devinfo->gen) {
44505       if (devinfo->is_haswell) {
44513       if (devinfo->is_g4x) {
44532 _3DSTATE_MULTISAMPLE_Sample5XOffset_bits(const struct gen_device_info *devinfo)
44534    switch (devinfo->gen) {
44540       if (devinfo->is_haswell) {
44548       if (devinfo->is_g4x) {
44564 _3DSTATE_MULTISAMPLE_Sample5XOffset_start(const struct gen_device_info *devinfo)
44566    switch (devinfo->gen) {
44572       if (devinfo->is_haswell) {
44580       if (devinfo->is_g4x) {
44599 _3DSTATE_MULTISAMPLE_Sample5YOffset_bits(const struct gen_device_info *devinfo)
44601    switch (devinfo->gen) {
44607       if (devinfo->is_haswell) {
44615       if (devinfo->is_g4x) {
44631 _3DSTATE_MULTISAMPLE_Sample5YOffset_start(const struct gen_device_info *devinfo)
44633    switch (devinfo->gen) {
44639       if (devinfo->is_haswell) {
44647       if (devinfo->is_g4x) {
44666 _3DSTATE_MULTISAMPLE_Sample6XOffset_bits(const struct gen_device_info *devinfo)
44668    switch (devinfo->gen) {
44674       if (devinfo->is_haswell) {
44682       if (devinfo->is_g4x) {
44698 _3DSTATE_MULTISAMPLE_Sample6XOffset_start(const struct gen_device_info *devinfo)
44700    switch (devinfo->gen) {
44706       if (devinfo->is_haswell) {
44714       if (devinfo->is_g4x) {
44733 _3DSTATE_MULTISAMPLE_Sample6YOffset_bits(const struct gen_device_info *devinfo)
44735    switch (devinfo->gen) {
44741       if (devinfo->is_haswell) {
44749       if (devinfo->is_g4x) {
44765 _3DSTATE_MULTISAMPLE_Sample6YOffset_start(const struct gen_device_info *devinfo)
44767    switch (devinfo->gen) {
44773       if (devinfo->is_haswell) {
44781       if (devinfo->is_g4x) {
44800 _3DSTATE_MULTISAMPLE_Sample7XOffset_bits(const struct gen_device_info *devinfo)
44802    switch (devinfo->gen) {
44808       if (devinfo->is_haswell) {
44816       if (devinfo->is_g4x) {
44832 _3DSTATE_MULTISAMPLE_Sample7XOffset_start(const struct gen_device_info *devinfo)
44834    switch (devinfo->gen) {
44840       if (devinfo->is_haswell) {
44848       if (devinfo->is_g4x) {
44867 _3DSTATE_MULTISAMPLE_Sample7YOffset_bits(const struct gen_device_info *devinfo)
44869    switch (devinfo->gen) {
44875       if (devinfo->is_haswell) {
44883       if (devinfo->is_g4x) {
44899 _3DSTATE_MULTISAMPLE_Sample7YOffset_start(const struct gen_device_info *devinfo)
44901    switch (devinfo->gen) {
44907       if (devinfo->is_haswell) {
44915       if (devinfo->is_g4x) {
44935 _3DSTATE_PIPELINED_POINTERS_length(const struct gen_device_info *devinfo)
44937    switch (devinfo->gen) {
44943       if (devinfo->is_haswell) {
44951       if (devinfo->is_g4x) {
44971 _3DSTATE_PIPELINED_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
44973    switch (devinfo->gen) {
44979       if (devinfo->is_haswell) {
44987       if (devinfo->is_g4x) {
45004 _3DSTATE_PIPELINED_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
45006    switch (devinfo->gen) {
45012       if (devinfo->is_haswell) {
45020       if (devinfo->is_g4x) {
45040 _3DSTATE_PIPELINED_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
45042    switch (devinfo->gen) {
45048       if (devinfo->is_haswell) {
45056       if (devinfo->is_g4x) {
45073 _3DSTATE_PIPELINED_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
45075    switch (devinfo->gen) {
45081       if (devinfo->is_haswell) {
45089       if (devinfo->is_g4x) {
45109 _3DSTATE_PIPELINED_POINTERS_ClipEnable_bits(const struct gen_device_info *devinfo)
45111    switch (devinfo->gen) {
45117       if (devinfo->is_haswell) {
45125       if (devinfo->is_g4x) {
45142 _3DSTATE_PIPELINED_POINTERS_ClipEnable_start(const struct gen_device_info *devinfo)
45144    switch (devinfo->gen) {
45150       if (devinfo->is_haswell) {
45158       if (devinfo->is_g4x) {
45178 _3DSTATE_PIPELINED_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
45180    switch (devinfo->gen) {
45186       if (devinfo->is_haswell) {
45194       if (devinfo->is_g4x) {
45211 _3DSTATE_PIPELINED_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
45213    switch (devinfo->gen) {
45219       if (devinfo->is_haswell) {
45227       if (devinfo->is_g4x) {
45247 _3DSTATE_PIPELINED_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
45249    switch (devinfo->gen) {
45255       if (devinfo->is_haswell) {
45263       if (devinfo->is_g4x) {
45280 _3DSTATE_PIPELINED_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
45282    switch (devinfo->gen) {
45288       if (devinfo->is_haswell) {
45296       if (devinfo->is_g4x) {
45316 _3DSTATE_PIPELINED_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
45318    switch (devinfo->gen) {
45324       if (devinfo->is_haswell) {
45332       if (devinfo->is_g4x) {
45349 _3DSTATE_PIPELINED_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
45351    switch (devinfo->gen) {
45357       if (devinfo->is_haswell) {
45365       if (devinfo->is_g4x) {
45385 _3DSTATE_PIPELINED_POINTERS_GSEnable_bits(const struct gen_device_info *devinfo)
45387    switch (devinfo->gen) {
45393       if (devinfo->is_haswell) {
45401       if (devinfo->is_g4x) {
45418 _3DSTATE_PIPELINED_POINTERS_GSEnable_start(const struct gen_device_info *devinfo)
45420    switch (devinfo->gen) {
45426       if (devinfo->is_haswell) {
45434       if (devinfo->is_g4x) {
45454 _3DSTATE_PIPELINED_POINTERS_PointertoCLIPState_bits(const struct gen_device_info *devinfo)
45456    switch (devinfo->gen) {
45462       if (devinfo->is_haswell) {
45470       if (devinfo->is_g4x) {
45487 _3DSTATE_PIPELINED_POINTERS_PointertoCLIPState_start(const struct gen_device_info *devinfo)
45489    switch (devinfo->gen) {
45495       if (devinfo->is_haswell) {
45503       if (devinfo->is_g4x) {
45523 _3DSTATE_PIPELINED_POINTERS_PointertoColorCalcState_bits(const struct gen_device_info *devinfo)
45525    switch (devinfo->gen) {
45531       if (devinfo->is_haswell) {
45539       if (devinfo->is_g4x) {
45556 _3DSTATE_PIPELINED_POINTERS_PointertoColorCalcState_start(const struct gen_device_info *devinfo)
45558    switch (devinfo->gen) {
45564       if (devinfo->is_haswell) {
45572       if (devinfo->is_g4x) {
45592 _3DSTATE_PIPELINED_POINTERS_PointertoGSState_bits(const struct gen_device_info *devinfo)
45594    switch (devinfo->gen) {
45600       if (devinfo->is_haswell) {
45608       if (devinfo->is_g4x) {
45625 _3DSTATE_PIPELINED_POINTERS_PointertoGSState_start(const struct gen_device_info *devinfo)
45627    switch (devinfo->gen) {
45633       if (devinfo->is_haswell) {
45641       if (devinfo->is_g4x) {
45661 _3DSTATE_PIPELINED_POINTERS_PointertoSFState_bits(const struct gen_device_info *devinfo)
45663    switch (devinfo->gen) {
45669       if (devinfo->is_haswell) {
45677       if (devinfo->is_g4x) {
45694 _3DSTATE_PIPELINED_POINTERS_PointertoSFState_start(const struct gen_device_info *devinfo)
45696    switch (devinfo->gen) {
45702       if (devinfo->is_haswell) {
45710       if (devinfo->is_g4x) {
45730 _3DSTATE_PIPELINED_POINTERS_PointertoVSState_bits(const struct gen_device_info *devinfo)
45732    switch (devinfo->gen) {
45738       if (devinfo->is_haswell) {
45746       if (devinfo->is_g4x) {
45763 _3DSTATE_PIPELINED_POINTERS_PointertoVSState_start(const struct gen_device_info *devinfo)
45765    switch (devinfo->gen) {
45771       if (devinfo->is_haswell) {
45779       if (devinfo->is_g4x) {
45799 _3DSTATE_PIPELINED_POINTERS_PointertoWMState_bits(const struct gen_device_info *devinfo)
45801    switch (devinfo->gen) {
45807       if (devinfo->is_haswell) {
45815       if (devinfo->is_g4x) {
45832 _3DSTATE_PIPELINED_POINTERS_PointertoWMState_start(const struct gen_device_info *devinfo)
45834    switch (devinfo->gen) {
45840       if (devinfo->is_haswell) {
45848       if (devinfo->is_g4x) {
45875 _3DSTATE_POLY_STIPPLE_OFFSET_length(const struct gen_device_info *devinfo)
45877    switch (devinfo->gen) {
45883       if (devinfo->is_haswell) {
45891       if (devinfo->is_g4x) {
45918 _3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
45920    switch (devinfo->gen) {
45926       if (devinfo->is_haswell) {
45934       if (devinfo->is_g4x) {
45958 _3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_start(const struct gen_device_info *devinfo)
45960    switch (devinfo->gen) {
45966       if (devinfo->is_haswell) {
45974       if (devinfo->is_g4x) {
46001 _3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
46003    switch (devinfo->gen) {
46009       if (devinfo->is_haswell) {
46017       if (devinfo->is_g4x) {
46041 _3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
46043    switch (devinfo->gen) {
46049       if (devinfo->is_haswell) {
46057       if (devinfo->is_g4x) {
46084 _3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_bits(const struct gen_device_info *devinfo)
46086    switch (devinfo->gen) {
46092       if (devinfo->is_haswell) {
46100       if (devinfo->is_g4x) {
46124 _3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_start(const struct gen_device_info *devinfo)
46126    switch (devinfo->gen) {
46132       if (devinfo->is_haswell) {
46140       if (devinfo->is_g4x) {
46167 _3DSTATE_POLY_STIPPLE_OFFSET_CommandType_bits(const struct gen_device_info *devinfo)
46169    switch (devinfo->gen) {
46175       if (devinfo->is_haswell) {
46183       if (devinfo->is_g4x) {
46207 _3DSTATE_POLY_STIPPLE_OFFSET_CommandType_start(const struct gen_device_info *devinfo)
46209    switch (devinfo->gen) {
46215       if (devinfo->is_haswell) {
46223       if (devinfo->is_g4x) {
46250 _3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_bits(const struct gen_device_info *devinfo)
46252    switch (devinfo->gen) {
46258       if (devinfo->is_haswell) {
46266       if (devinfo->is_g4x) {
46290 _3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_start(const struct gen_device_info *devinfo)
46292    switch (devinfo->gen) {
46298       if (devinfo->is_haswell) {
46306       if (devinfo->is_g4x) {
46333 _3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_bits(const struct gen_device_info *devinfo)
46335    switch (devinfo->gen) {
46341       if (devinfo->is_haswell) {
46349       if (devinfo->is_g4x) {
46373 _3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_start(const struct gen_device_info *devinfo)
46375    switch (devinfo->gen) {
46381       if (devinfo->is_haswell) {
46389       if (devinfo->is_g4x) {
46416 _3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_bits(const struct gen_device_info *devinfo)
46418    switch (devinfo->gen) {
46424       if (devinfo->is_haswell) {
46432       if (devinfo->is_g4x) {
46456 _3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_start(const struct gen_device_info *devinfo)
46458    switch (devinfo->gen) {
46464       if (devinfo->is_haswell) {
46472       if (devinfo->is_g4x) {
46499 _3DSTATE_POLY_STIPPLE_PATTERN_length(const struct gen_device_info *devinfo)
46501    switch (devinfo->gen) {
46507       if (devinfo->is_haswell) {
46515       if (devinfo->is_g4x) {
46542 _3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
46544    switch (devinfo->gen) {
46550       if (devinfo->is_haswell) {
46558       if (devinfo->is_g4x) {
46582 _3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_start(const struct gen_device_info *devinfo)
46584    switch (devinfo->gen) {
46590       if (devinfo->is_haswell) {
46598       if (devinfo->is_g4x) {
46625 _3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
46627    switch (devinfo->gen) {
46633       if (devinfo->is_haswell) {
46641       if (devinfo->is_g4x) {
46665 _3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
46667    switch (devinfo->gen) {
46673       if (devinfo->is_haswell) {
46681       if (devinfo->is_g4x) {
46708 _3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_bits(const struct gen_device_info *devinfo)
46710    switch (devinfo->gen) {
46716       if (devinfo->is_haswell) {
46724       if (devinfo->is_g4x) {
46748 _3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_start(const struct gen_device_info *devinfo)
46750    switch (devinfo->gen) {
46756       if (devinfo->is_haswell) {
46764       if (devinfo->is_g4x) {
46791 _3DSTATE_POLY_STIPPLE_PATTERN_CommandType_bits(const struct gen_device_info *devinfo)
46793    switch (devinfo->gen) {
46799       if (devinfo->is_haswell) {
46807       if (devinfo->is_g4x) {
46831 _3DSTATE_POLY_STIPPLE_PATTERN_CommandType_start(const struct gen_device_info *devinfo)
46833    switch (devinfo->gen) {
46839       if (devinfo->is_haswell) {
46847       if (devinfo->is_g4x) {
46874 _3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_bits(const struct gen_device_info *devinfo)
46876    switch (devinfo->gen) {
46882       if (devinfo->is_haswell) {
46890       if (devinfo->is_g4x) {
46914 _3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_start(const struct gen_device_info *devinfo)
46916    switch (devinfo->gen) {
46922       if (devinfo->is_haswell) {
46930       if (devinfo->is_g4x) {
46957 _3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_bits(const struct gen_device_info *devinfo)
46959    switch (devinfo->gen) {
46965       if (devinfo->is_haswell) {
46973       if (devinfo->is_g4x) {
46997 _3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_start(const struct gen_device_info *devinfo)
46999    switch (devinfo->gen) {
47005       if (devinfo->is_haswell) {
47013       if (devinfo->is_g4x) {
47036 _3DSTATE_PS_length(const struct gen_device_info *devinfo)
47038    switch (devinfo->gen) {
47044       if (devinfo->is_haswell) {
47052       if (devinfo->is_g4x) {
47075 _3DSTATE_PS_16PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
47077    switch (devinfo->gen) {
47083       if (devinfo->is_haswell) {
47091       if (devinfo->is_g4x) {
47111 _3DSTATE_PS_16PixelDispatchEnable_start(const struct gen_device_info *devinfo)
47113    switch (devinfo->gen) {
47119       if (devinfo->is_haswell) {
47127       if (devinfo->is_g4x) {
47150 _3DSTATE_PS_32PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
47152    switch (devinfo->gen) {
47158       if (devinfo->is_haswell) {
47166       if (devinfo->is_g4x) {
47186 _3DSTATE_PS_32PixelDispatchEnable_start(const struct gen_device_info *devinfo)
47188    switch (devinfo->gen) {
47194       if (devinfo->is_haswell) {
47202       if (devinfo->is_g4x) {
47225 _3DSTATE_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
47227    switch (devinfo->gen) {
47233       if (devinfo->is_haswell) {
47241       if (devinfo->is_g4x) {
47261 _3DSTATE_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
47263    switch (devinfo->gen) {
47269       if (devinfo->is_haswell) {
47277       if (devinfo->is_g4x) {
47300 _3DSTATE_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
47302    switch (devinfo->gen) {
47308       if (devinfo->is_haswell) {
47316       if (devinfo->is_g4x) {
47336 _3DSTATE_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
47338    switch (devinfo->gen) {
47344       if (devinfo->is_haswell) {
47352       if (devinfo->is_g4x) {
47375 _3DSTATE_PS_8PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
47377    switch (devinfo->gen) {
47383       if (devinfo->is_haswell) {
47391       if (devinfo->is_g4x) {
47411 _3DSTATE_PS_8PixelDispatchEnable_start(const struct gen_device_info *devinfo)
47413    switch (devinfo->gen) {
47419       if (devinfo->is_haswell) {
47427       if (devinfo->is_g4x) {
47446 _3DSTATE_PS_AttributeEnable_bits(const struct gen_device_info *devinfo)
47448    switch (devinfo->gen) {
47454       if (devinfo->is_haswell) {
47462       if (devinfo->is_g4x) {
47478 _3DSTATE_PS_AttributeEnable_start(const struct gen_device_info *devinfo)
47480    switch (devinfo->gen) {
47486       if (devinfo->is_haswell) {
47494       if (devinfo->is_g4x) {
47517 _3DSTATE_PS_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
47519    switch (devinfo->gen) {
47525       if (devinfo->is_haswell) {
47533       if (devinfo->is_g4x) {
47553 _3DSTATE_PS_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
47555    switch (devinfo->gen) {
47561       if (devinfo->is_haswell) {
47569       if (devinfo->is_g4x) {
47592 _3DSTATE_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
47594    switch (devinfo->gen) {
47600       if (devinfo->is_haswell) {
47608       if (devinfo->is_g4x) {
47628 _3DSTATE_PS_CommandSubType_start(const struct gen_device_info *devinfo)
47630    switch (devinfo->gen) {
47636       if (devinfo->is_haswell) {
47644       if (devinfo->is_g4x) {
47667 _3DSTATE_PS_CommandType_bits(const struct gen_device_info *devinfo)
47669    switch (devinfo->gen) {
47675       if (devinfo->is_haswell) {
47683       if (devinfo->is_g4x) {
47703 _3DSTATE_PS_CommandType_start(const struct gen_device_info *devinfo)
47705    switch (devinfo->gen) {
47711       if (devinfo->is_haswell) {
47719       if (devinfo->is_g4x) {
47742 _3DSTATE_PS_DWordLength_bits(const struct gen_device_info *devinfo)
47744    switch (devinfo->gen) {
47750       if (devinfo->is_haswell) {
47758       if (devinfo->is_g4x) {
47778 _3DSTATE_PS_DWordLength_start(const struct gen_device_info *devinfo)
47780    switch (devinfo->gen) {
47786       if (devinfo->is_haswell) {
47794       if (devinfo->is_g4x) {
47813 _3DSTATE_PS_DenormalMode_bits(const struct gen_device_info *devinfo)
47815    switch (devinfo->gen) {
47821       if (devinfo->is_haswell) {
47829       if (devinfo->is_g4x) {
47845 _3DSTATE_PS_DenormalMode_start(const struct gen_device_info *devinfo)
47847    switch (devinfo->gen) {
47853       if (devinfo->is_haswell) {
47861       if (devinfo->is_g4x) {
47884 _3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_bits(const struct gen_device_info *devinfo)
47886    switch (devinfo->gen) {
47892       if (devinfo->is_haswell) {
47900       if (devinfo->is_g4x) {
47920 _3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_start(const struct gen_device_info *devinfo)
47922    switch (devinfo->gen) {
47928       if (devinfo->is_haswell) {
47936       if (devinfo->is_g4x) {
47959 _3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_bits(const struct gen_device_info *devinfo)
47961    switch (devinfo->gen) {
47967       if (devinfo->is_haswell) {
47975       if (devinfo->is_g4x) {
47995 _3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_start(const struct gen_device_info *devinfo)
47997    switch (devinfo->gen) {
48003       if (devinfo->is_haswell) {
48011       if (devinfo->is_g4x) {
48034 _3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_bits(const struct gen_device_info *devinfo)
48036    switch (devinfo->gen) {
48042       if (devinfo->is_haswell) {
48050       if (devinfo->is_g4x) {
48070 _3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_start(const struct gen_device_info *devinfo)
48072    switch (devinfo->gen) {
48078       if (devinfo->is_haswell) {
48086       if (devinfo->is_g4x) {
48105 _3DSTATE_PS_DualSourceBlendEnable_bits(const struct gen_device_info *devinfo)
48107    switch (devinfo->gen) {
48113       if (devinfo->is_haswell) {
48121       if (devinfo->is_g4x) {
48137 _3DSTATE_PS_DualSourceBlendEnable_start(const struct gen_device_info *devinfo)
48139    switch (devinfo->gen) {
48145       if (devinfo->is_haswell) {
48153       if (devinfo->is_g4x) {
48176 _3DSTATE_PS_FloatingPointMode_bits(const struct gen_device_info *devinfo)
48178    switch (devinfo->gen) {
48184       if (devinfo->is_haswell) {
48192       if (devinfo->is_g4x) {
48212 _3DSTATE_PS_FloatingPointMode_start(const struct gen_device_info *devinfo)
48214    switch (devinfo->gen) {
48220       if (devinfo->is_haswell) {
48228       if (devinfo->is_g4x) {
48251 _3DSTATE_PS_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
48253    switch (devinfo->gen) {
48259       if (devinfo->is_haswell) {
48267       if (devinfo->is_g4x) {
48287 _3DSTATE_PS_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
48289    switch (devinfo->gen) {
48295       if (devinfo->is_haswell) {
48303       if (devinfo->is_g4x) {
48326 _3DSTATE_PS_KernelStartPointer0_bits(const struct gen_device_info *devinfo)
48328    switch (devinfo->gen) {
48334       if (devinfo->is_haswell) {
48342       if (devinfo->is_g4x) {
48362 _3DSTATE_PS_KernelStartPointer0_start(const struct gen_device_info *devinfo)
48364    switch (devinfo->gen) {
48370       if (devinfo->is_haswell) {
48378       if (devinfo->is_g4x) {
48401 _3DSTATE_PS_KernelStartPointer1_bits(const struct gen_device_info *devinfo)
48403    switch (devinfo->gen) {
48409       if (devinfo->is_haswell) {
48417       if (devinfo->is_g4x) {
48437 _3DSTATE_PS_KernelStartPointer1_start(const struct gen_device_info *devinfo)
48439    switch (devinfo->gen) {
48445       if (devinfo->is_haswell) {
48453       if (devinfo->is_g4x) {
48476 _3DSTATE_PS_KernelStartPointer2_bits(const struct gen_device_info *devinfo)
48478    switch (devinfo->gen) {
48484       if (devinfo->is_haswell) {
48492       if (devinfo->is_g4x) {
48512 _3DSTATE_PS_KernelStartPointer2_start(const struct gen_device_info *devinfo)
48514    switch (devinfo->gen) {
48520       if (devinfo->is_haswell) {
48528       if (devinfo->is_g4x) {
48551 _3DSTATE_PS_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
48553    switch (devinfo->gen) {
48559       if (devinfo->is_haswell) {
48567       if (devinfo->is_g4x) {
48587 _3DSTATE_PS_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
48589    switch (devinfo->gen) {
48595       if (devinfo->is_haswell) {
48603       if (devinfo->is_g4x) {
48622 _3DSTATE_PS_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
48624    switch (devinfo->gen) {
48630       if (devinfo->is_haswell) {
48638       if (devinfo->is_g4x) {
48654 _3DSTATE_PS_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
48656    switch (devinfo->gen) {
48662       if (devinfo->is_haswell) {
48670       if (devinfo->is_g4x) {
48691 _3DSTATE_PS_MaximumNumberofThreadsPerPSD_bits(const struct gen_device_info *devinfo)
48693    switch (devinfo->gen) {
48699       if (devinfo->is_haswell) {
48707       if (devinfo->is_g4x) {
48725 _3DSTATE_PS_MaximumNumberofThreadsPerPSD_start(const struct gen_device_info *devinfo)
48727    switch (devinfo->gen) {
48733       if (devinfo->is_haswell) {
48741       if (devinfo->is_g4x) {
48759 _3DSTATE_PS_PSAccessesUAV_bits(const struct gen_device_info *devinfo)
48761    switch (devinfo->gen) {
48767       if (devinfo->is_haswell) {
48775       if (devinfo->is_g4x) {
48790 _3DSTATE_PS_PSAccessesUAV_start(const struct gen_device_info *devinfo)
48792    switch (devinfo->gen) {
48798       if (devinfo->is_haswell) {
48806       if (devinfo->is_g4x) {
48829 _3DSTATE_PS_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
48831    switch (devinfo->gen) {
48837       if (devinfo->is_haswell) {
48845       if (devinfo->is_g4x) {
48865 _3DSTATE_PS_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
48867    switch (devinfo->gen) {
48873       if (devinfo->is_haswell) {
48881       if (devinfo->is_g4x) {
48904 _3DSTATE_PS_PositionXYOffsetSelect_bits(const struct gen_device_info *devinfo)
48906    switch (devinfo->gen) {
48912       if (devinfo->is_haswell) {
48920       if (devinfo->is_g4x) {
48940 _3DSTATE_PS_PositionXYOffsetSelect_start(const struct gen_device_info *devinfo)
48942    switch (devinfo->gen) {
48948       if (devinfo->is_haswell) {
48956       if (devinfo->is_g4x) {
48979 _3DSTATE_PS_PushConstantEnable_bits(const struct gen_device_info *devinfo)
48981    switch (devinfo->gen) {
48987       if (devinfo->is_haswell) {
48995       if (devinfo->is_g4x) {
49015 _3DSTATE_PS_PushConstantEnable_start(const struct gen_device_info *devinfo)
49017    switch (devinfo->gen) {
49023       if (devinfo->is_haswell) {
49031       if (devinfo->is_g4x) {
49054 _3DSTATE_PS_RenderTargetFastClearEnable_bits(const struct gen_device_info *devinfo)
49056    switch (devinfo->gen) {
49062       if (devinfo->is_haswell) {
49070       if (devinfo->is_g4x) {
49090 _3DSTATE_PS_RenderTargetFastClearEnable_start(const struct gen_device_info *devinfo)
49092    switch (devinfo->gen) {
49098       if (devinfo->is_haswell) {
49106       if (devinfo->is_g4x) {
49126 _3DSTATE_PS_RenderTargetResolveEnable_bits(const struct gen_device_info *devinfo)
49128    switch (devinfo->gen) {
49134       if (devinfo->is_haswell) {
49142       if (devinfo->is_g4x) {
49159 _3DSTATE_PS_RenderTargetResolveEnable_start(const struct gen_device_info *devinfo)
49161    switch (devinfo->gen) {
49167       if (devinfo->is_haswell) {
49175       if (devinfo->is_g4x) {
49195 _3DSTATE_PS_RenderTargetResolveType_bits(const struct gen_device_info *devinfo)
49197    switch (devinfo->gen) {
49203       if (devinfo->is_haswell) {
49211       if (devinfo->is_g4x) {
49228 _3DSTATE_PS_RenderTargetResolveType_start(const struct gen_device_info *devinfo)
49230    switch (devinfo->gen) {
49236       if (devinfo->is_haswell) {
49244       if (devinfo->is_g4x) {
49267 _3DSTATE_PS_RoundingMode_bits(const struct gen_device_info *devinfo)
49269    switch (devinfo->gen) {
49275       if (devinfo->is_haswell) {
49283       if (devinfo->is_g4x) {
49303 _3DSTATE_PS_RoundingMode_start(const struct gen_device_info *devinfo)
49305    switch (devinfo->gen) {
49311       if (devinfo->is_haswell) {
49319       if (devinfo->is_g4x) {
49337 _3DSTATE_PS_SampleMask_bits(const struct gen_device_info *devinfo)
49339    switch (devinfo->gen) {
49345       if (devinfo->is_haswell) {
49353       if (devinfo->is_g4x) {
49368 _3DSTATE_PS_SampleMask_start(const struct gen_device_info *devinfo)
49370    switch (devinfo->gen) {
49376       if (devinfo->is_haswell) {
49384       if (devinfo->is_g4x) {
49407 _3DSTATE_PS_SamplerCount_bits(const struct gen_device_info *devinfo)
49409    switch (devinfo->gen) {
49415       if (devinfo->is_haswell) {
49423       if (devinfo->is_g4x) {
49443 _3DSTATE_PS_SamplerCount_start(const struct gen_device_info *devinfo)
49445    switch (devinfo->gen) {
49451       if (devinfo->is_haswell) {
49459       if (devinfo->is_g4x) {
49482 _3DSTATE_PS_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
49484    switch (devinfo->gen) {
49490       if (devinfo->is_haswell) {
49498       if (devinfo->is_g4x) {
49518 _3DSTATE_PS_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
49520    switch (devinfo->gen) {
49526       if (devinfo->is_haswell) {
49534       if (devinfo->is_g4x) {
49555 _3DSTATE_PS_SinglePrecisionDenormalMode_bits(const struct gen_device_info *devinfo)
49557    switch (devinfo->gen) {
49563       if (devinfo->is_haswell) {
49571       if (devinfo->is_g4x) {
49589 _3DSTATE_PS_SinglePrecisionDenormalMode_start(const struct gen_device_info *devinfo)
49591    switch (devinfo->gen) {
49597       if (devinfo->is_haswell) {
49605       if (devinfo->is_g4x) {
49628 _3DSTATE_PS_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
49630    switch (devinfo->gen) {
49636       if (devinfo->is_haswell) {
49644       if (devinfo->is_g4x) {
49664 _3DSTATE_PS_SingleProgramFlow_start(const struct gen_device_info *devinfo)
49666    switch (devinfo->gen) {
49672       if (devinfo->is_haswell) {
49680       if (devinfo->is_g4x) {
49703 _3DSTATE_PS_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
49705    switch (devinfo->gen) {
49711       if (devinfo->is_haswell) {
49719       if (devinfo->is_g4x) {
49739 _3DSTATE_PS_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
49741    switch (devinfo->gen) {
49747       if (devinfo->is_haswell) {
49755       if (devinfo->is_g4x) {
49776 _3DSTATE_PS_ThreadDispatchPriority_bits(const struct gen_device_info *devinfo)
49778    switch (devinfo->gen) {
49784       if (devinfo->is_haswell) {
49792       if (devinfo->is_g4x) {
49810 _3DSTATE_PS_ThreadDispatchPriority_start(const struct gen_device_info *devinfo)
49812    switch (devinfo->gen) {
49818       if (devinfo->is_haswell) {
49826       if (devinfo->is_g4x) {
49844 _3DSTATE_PS_ThreadPriority_bits(const struct gen_device_info *devinfo)
49846    switch (devinfo->gen) {
49852       if (devinfo->is_haswell) {
49860       if (devinfo->is_g4x) {
49875 _3DSTATE_PS_ThreadPriority_start(const struct gen_device_info *devinfo)
49877    switch (devinfo->gen) {
49883       if (devinfo->is_haswell) {
49891       if (devinfo->is_g4x) {
49914 _3DSTATE_PS_VectorMaskEnable_bits(const struct gen_device_info *devinfo)
49916    switch (devinfo->gen) {
49922       if (devinfo->is_haswell) {
49930       if (devinfo->is_g4x) {
49950 _3DSTATE_PS_VectorMaskEnable_start(const struct gen_device_info *devinfo)
49952    switch (devinfo->gen) {
49958       if (devinfo->is_haswell) {
49966       if (devinfo->is_g4x) {
49985 _3DSTATE_PS_oMaskPresenttoRenderTarget_bits(const struct gen_device_info *devinfo)
49987    switch (devinfo->gen) {
49993       if (devinfo->is_haswell) {
50001       if (devinfo->is_g4x) {
50017 _3DSTATE_PS_oMaskPresenttoRenderTarget_start(const struct gen_device_info *devinfo)
50019    switch (devinfo->gen) {
50025       if (devinfo->is_haswell) {
50033       if (devinfo->is_g4x) {
50054 _3DSTATE_PS_BLEND_length(const struct gen_device_info *devinfo)
50056    switch (devinfo->gen) {
50062       if (devinfo->is_haswell) {
50070       if (devinfo->is_g4x) {
50091 _3DSTATE_PS_BLEND_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
50093    switch (devinfo->gen) {
50099       if (devinfo->is_haswell) {
50107       if (devinfo->is_g4x) {
50125 _3DSTATE_PS_BLEND_3DCommandOpcode_start(const struct gen_device_info *devinfo)
50127    switch (devinfo->gen) {
50133       if (devinfo->is_haswell) {
50141       if (devinfo->is_g4x) {
50162 _3DSTATE_PS_BLEND_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
50164    switch (devinfo->gen) {
50170       if (devinfo->is_haswell) {
50178       if (devinfo->is_g4x) {
50196 _3DSTATE_PS_BLEND_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
50198    switch (devinfo->gen) {
50204       if (devinfo->is_haswell) {
50212       if (devinfo->is_g4x) {
50233 _3DSTATE_PS_BLEND_AlphaTestEnable_bits(const struct gen_device_info *devinfo)
50235    switch (devinfo->gen) {
50241       if (devinfo->is_haswell) {
50249       if (devinfo->is_g4x) {
50267 _3DSTATE_PS_BLEND_AlphaTestEnable_start(const struct gen_device_info *devinfo)
50269    switch (devinfo->gen) {
50275       if (devinfo->is_haswell) {
50283       if (devinfo->is_g4x) {
50304 _3DSTATE_PS_BLEND_AlphaToCoverageEnable_bits(const struct gen_device_info *devinfo)
50306    switch (devinfo->gen) {
50312       if (devinfo->is_haswell) {
50320       if (devinfo->is_g4x) {
50338 _3DSTATE_PS_BLEND_AlphaToCoverageEnable_start(const struct gen_device_info *devinfo)
50340    switch (devinfo->gen) {
50346       if (devinfo->is_haswell) {
50354       if (devinfo->is_g4x) {
50375 _3DSTATE_PS_BLEND_ColorBufferBlendEnable_bits(const struct gen_device_info *devinfo)
50377    switch (devinfo->gen) {
50383       if (devinfo->is_haswell) {
50391       if (devinfo->is_g4x) {
50409 _3DSTATE_PS_BLEND_ColorBufferBlendEnable_start(const struct gen_device_info *devinfo)
50411    switch (devinfo->gen) {
50417       if (devinfo->is_haswell) {
50425       if (devinfo->is_g4x) {
50446 _3DSTATE_PS_BLEND_CommandSubType_bits(const struct gen_device_info *devinfo)
50448    switch (devinfo->gen) {
50454       if (devinfo->is_haswell) {
50462       if (devinfo->is_g4x) {
50480 _3DSTATE_PS_BLEND_CommandSubType_start(const struct gen_device_info *devinfo)
50482    switch (devinfo->gen) {
50488       if (devinfo->is_haswell) {
50496       if (devinfo->is_g4x) {
50517 _3DSTATE_PS_BLEND_CommandType_bits(const struct gen_device_info *devinfo)
50519    switch (devinfo->gen) {
50525       if (devinfo->is_haswell) {
50533       if (devinfo->is_g4x) {
50551 _3DSTATE_PS_BLEND_CommandType_start(const struct gen_device_info *devinfo)
50553    switch (devinfo->gen) {
50559       if (devinfo->is_haswell) {
50567       if (devinfo->is_g4x) {
50588 _3DSTATE_PS_BLEND_DWordLength_bits(const struct gen_device_info *devinfo)
50590    switch (devinfo->gen) {
50596       if (devinfo->is_haswell) {
50604       if (devinfo->is_g4x) {
50622 _3DSTATE_PS_BLEND_DWordLength_start(const struct gen_device_info *devinfo)
50624    switch (devinfo->gen) {
50630       if (devinfo->is_haswell) {
50638       if (devinfo->is_g4x) {
50659 _3DSTATE_PS_BLEND_DestinationAlphaBlendFactor_bits(const struct gen_device_info *devinfo)
50661    switch (devinfo->gen) {
50667       if (devinfo->is_haswell) {
50675       if (devinfo->is_g4x) {
50693 _3DSTATE_PS_BLEND_DestinationAlphaBlendFactor_start(const struct gen_device_info *devinfo)
50695    switch (devinfo->gen) {
50701       if (devinfo->is_haswell) {
50709       if (devinfo->is_g4x) {
50730 _3DSTATE_PS_BLEND_DestinationBlendFactor_bits(const struct gen_device_info *devinfo)
50732    switch (devinfo->gen) {
50738       if (devinfo->is_haswell) {
50746       if (devinfo->is_g4x) {
50764 _3DSTATE_PS_BLEND_DestinationBlendFactor_start(const struct gen_device_info *devinfo)
50766    switch (devinfo->gen) {
50772       if (devinfo->is_haswell) {
50780       if (devinfo->is_g4x) {
50801 _3DSTATE_PS_BLEND_HasWriteableRT_bits(const struct gen_device_info *devinfo)
50803    switch (devinfo->gen) {
50809       if (devinfo->is_haswell) {
50817       if (devinfo->is_g4x) {
50835 _3DSTATE_PS_BLEND_HasWriteableRT_start(const struct gen_device_info *devinfo)
50837    switch (devinfo->gen) {
50843       if (devinfo->is_haswell) {
50851       if (devinfo->is_g4x) {
50872 _3DSTATE_PS_BLEND_IndependentAlphaBlendEnable_bits(const struct gen_device_info *devinfo)
50874    switch (devinfo->gen) {
50880       if (devinfo->is_haswell) {
50888       if (devinfo->is_g4x) {
50906 _3DSTATE_PS_BLEND_IndependentAlphaBlendEnable_start(const struct gen_device_info *devinfo)
50908    switch (devinfo->gen) {
50914       if (devinfo->is_haswell) {
50922       if (devinfo->is_g4x) {
50943 _3DSTATE_PS_BLEND_SourceAlphaBlendFactor_bits(const struct gen_device_info *devinfo)
50945    switch (devinfo->gen) {
50951       if (devinfo->is_haswell) {
50959       if (devinfo->is_g4x) {
50977 _3DSTATE_PS_BLEND_SourceAlphaBlendFactor_start(const struct gen_device_info *devinfo)
50979    switch (devinfo->gen) {
50985       if (devinfo->is_haswell) {
50993       if (devinfo->is_g4x) {
51014 _3DSTATE_PS_BLEND_SourceBlendFactor_bits(const struct gen_device_info *devinfo)
51016    switch (devinfo->gen) {
51022       if (devinfo->is_haswell) {
51030       if (devinfo->is_g4x) {
51048 _3DSTATE_PS_BLEND_SourceBlendFactor_start(const struct gen_device_info *devinfo)
51050    switch (devinfo->gen) {
51056       if (devinfo->is_haswell) {
51064       if (devinfo->is_g4x) {
51085 _3DSTATE_PS_EXTRA_length(const struct gen_device_info *devinfo)
51087    switch (devinfo->gen) {
51093       if (devinfo->is_haswell) {
51101       if (devinfo->is_g4x) {
51122 _3DSTATE_PS_EXTRA_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
51124    switch (devinfo->gen) {
51130       if (devinfo->is_haswell) {
51138       if (devinfo->is_g4x) {
51156 _3DSTATE_PS_EXTRA_3DCommandOpcode_start(const struct gen_device_info *devinfo)
51158    switch (devinfo->gen) {
51164       if (devinfo->is_haswell) {
51172       if (devinfo->is_g4x) {
51193 _3DSTATE_PS_EXTRA_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
51195    switch (devinfo->gen) {
51201       if (devinfo->is_haswell) {
51209       if (devinfo->is_g4x) {
51227 _3DSTATE_PS_EXTRA_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
51229    switch (devinfo->gen) {
51235       if (devinfo->is_haswell) {
51243       if (devinfo->is_g4x) {
51264 _3DSTATE_PS_EXTRA_AttributeEnable_bits(const struct gen_device_info *devinfo)
51266    switch (devinfo->gen) {
51272       if (devinfo->is_haswell) {
51280       if (devinfo->is_g4x) {
51298 _3DSTATE_PS_EXTRA_AttributeEnable_start(const struct gen_device_info *devinfo)
51300    switch (devinfo->gen) {
51306       if (devinfo->is_haswell) {
51314       if (devinfo->is_g4x) {
51335 _3DSTATE_PS_EXTRA_CommandSubType_bits(const struct gen_device_info *devinfo)
51337    switch (devinfo->gen) {
51343       if (devinfo->is_haswell) {
51351       if (devinfo->is_g4x) {
51369 _3DSTATE_PS_EXTRA_CommandSubType_start(const struct gen_device_info *devinfo)
51371    switch (devinfo->gen) {
51377       if (devinfo->is_haswell) {
51385       if (devinfo->is_g4x) {
51406 _3DSTATE_PS_EXTRA_CommandType_bits(const struct gen_device_info *devinfo)
51408    switch (devinfo->gen) {
51414       if (devinfo->is_haswell) {
51422       if (devinfo->is_g4x) {
51440 _3DSTATE_PS_EXTRA_CommandType_start(const struct gen_device_info *devinfo)
51442    switch (devinfo->gen) {
51448       if (devinfo->is_haswell) {
51456       if (devinfo->is_g4x) {
51477 _3DSTATE_PS_EXTRA_DWordLength_bits(const struct gen_device_info *devinfo)
51479    switch (devinfo->gen) {
51485       if (devinfo->is_haswell) {
51493       if (devinfo->is_g4x) {
51511 _3DSTATE_PS_EXTRA_DWordLength_start(const struct gen_device_info *devinfo)
51513    switch (devinfo->gen) {
51519       if (devinfo->is_haswell) {
51527       if (devinfo->is_g4x) {
51548 _3DSTATE_PS_EXTRA_ForceComputedDepth_bits(const struct gen_device_info *devinfo)
51550    switch (devinfo->gen) {
51556       if (devinfo->is_haswell) {
51564       if (devinfo->is_g4x) {
51582 _3DSTATE_PS_EXTRA_ForceComputedDepth_start(const struct gen_device_info *devinfo)
51584    switch (devinfo->gen) {
51590       if (devinfo->is_haswell) {
51598       if (devinfo->is_g4x) {
51618 _3DSTATE_PS_EXTRA_InputCoverageMaskState_bits(const struct gen_device_info *devinfo)
51620    switch (devinfo->gen) {
51626       if (devinfo->is_haswell) {
51634       if (devinfo->is_g4x) {
51651 _3DSTATE_PS_EXTRA_InputCoverageMaskState_start(const struct gen_device_info *devinfo)
51653    switch (devinfo->gen) {
51659       if (devinfo->is_haswell) {
51667       if (devinfo->is_g4x) {
51688 _3DSTATE_PS_EXTRA_PixelShaderComputedDepthMode_bits(const struct gen_device_info *devinfo)
51690    switch (devinfo->gen) {
51696       if (devinfo->is_haswell) {
51704       if (devinfo->is_g4x) {
51722 _3DSTATE_PS_EXTRA_PixelShaderComputedDepthMode_start(const struct gen_device_info *devinfo)
51724    switch (devinfo->gen) {
51730       if (devinfo->is_haswell) {
51738       if (devinfo->is_g4x) {
51758 _3DSTATE_PS_EXTRA_PixelShaderComputesStencil_bits(const struct gen_device_info *devinfo)
51760    switch (devinfo->gen) {
51766       if (devinfo->is_haswell) {
51774       if (devinfo->is_g4x) {
51791 _3DSTATE_PS_EXTRA_PixelShaderComputesStencil_start(const struct gen_device_info *devinfo)
51793    switch (devinfo->gen) {
51799       if (devinfo->is_haswell) {
51807       if (devinfo->is_g4x) {
51828 _3DSTATE_PS_EXTRA_PixelShaderDisablesAlphaToCoverage_bits(const struct gen_device_info *devinfo)
51830    switch (devinfo->gen) {
51836       if (devinfo->is_haswell) {
51844       if (devinfo->is_g4x) {
51862 _3DSTATE_PS_EXTRA_PixelShaderDisablesAlphaToCoverage_start(const struct gen_device_info *devinfo)
51864    switch (devinfo->gen) {
51870       if (devinfo->is_haswell) {
51878       if (devinfo->is_g4x) {
51899 _3DSTATE_PS_EXTRA_PixelShaderDoesnotwritetoRT_bits(const struct gen_device_info *devinfo)
51901    switch (devinfo->gen) {
51907       if (devinfo->is_haswell) {
51915       if (devinfo->is_g4x) {
51933 _3DSTATE_PS_EXTRA_PixelShaderDoesnotwritetoRT_start(const struct gen_device_info *devinfo)
51935    switch (devinfo->gen) {
51941       if (devinfo->is_haswell) {
51949       if (devinfo->is_g4x) {
51970 _3DSTATE_PS_EXTRA_PixelShaderHasUAV_bits(const struct gen_device_info *devinfo)
51972    switch (devinfo->gen) {
51978       if (devinfo->is_haswell) {
51986       if (devinfo->is_g4x) {
52004 _3DSTATE_PS_EXTRA_PixelShaderHasUAV_start(const struct gen_device_info *devinfo)
52006    switch (devinfo->gen) {
52012       if (devinfo->is_haswell) {
52020       if (devinfo->is_g4x) {
52041 _3DSTATE_PS_EXTRA_PixelShaderIsPerSample_bits(const struct gen_device_info *devinfo)
52043    switch (devinfo->gen) {
52049       if (devinfo->is_haswell) {
52057       if (devinfo->is_g4x) {
52075 _3DSTATE_PS_EXTRA_PixelShaderIsPerSample_start(const struct gen_device_info *devinfo)
52077    switch (devinfo->gen) {
52083       if (devinfo->is_haswell) {
52091       if (devinfo->is_g4x) {
52112 _3DSTATE_PS_EXTRA_PixelShaderKillsPixel_bits(const struct gen_device_info *devinfo)
52114    switch (devinfo->gen) {
52120       if (devinfo->is_haswell) {
52128       if (devinfo->is_g4x) {
52146 _3DSTATE_PS_EXTRA_PixelShaderKillsPixel_start(const struct gen_device_info *devinfo)
52148    switch (devinfo->gen) {
52154       if (devinfo->is_haswell) {
52162       if (devinfo->is_g4x) {
52182 _3DSTATE_PS_EXTRA_PixelShaderPullsBary_bits(const struct gen_device_info *devinfo)
52184    switch (devinfo->gen) {
52190       if (devinfo->is_haswell) {
52198       if (devinfo->is_g4x) {
52215 _3DSTATE_PS_EXTRA_PixelShaderPullsBary_start(const struct gen_device_info *devinfo)
52217    switch (devinfo->gen) {
52223       if (devinfo->is_haswell) {
52231       if (devinfo->is_g4x) {
52250 _3DSTATE_PS_EXTRA_PixelShaderRequiresNonPerspectiveBaryPlaneCoefficients_bits(const struct gen_device_info *devinfo)
52252    switch (devinfo->gen) {
52258       if (devinfo->is_haswell) {
52266       if (devinfo->is_g4x) {
52282 _3DSTATE_PS_EXTRA_PixelShaderRequiresNonPerspectiveBaryPlaneCoefficients_start(const struct gen_device_info *devinfo)
52284    switch (devinfo->gen) {
52290       if (devinfo->is_haswell) {
52298       if (devinfo->is_g4x) {
52317 _3DSTATE_PS_EXTRA_PixelShaderRequiresPerspectiveBaryPlaneCoefficients_bits(const struct gen_device_info *devinfo)
52319    switch (devinfo->gen) {
52325       if (devinfo->is_haswell) {
52333       if (devinfo->is_g4x) {
52349 _3DSTATE_PS_EXTRA_PixelShaderRequiresPerspectiveBaryPlaneCoefficients_start(const struct gen_device_info *devinfo)
52351    switch (devinfo->gen) {
52357       if (devinfo->is_haswell) {
52365       if (devinfo->is_g4x) {
52384 _3DSTATE_PS_EXTRA_PixelShaderRequiresSourceDepthandorWPlaneCoefficients_bits(const struct gen_device_info *devinfo)
52386    switch (devinfo->gen) {
52392       if (devinfo->is_haswell) {
52400       if (devinfo->is_g4x) {
52416 _3DSTATE_PS_EXTRA_PixelShaderRequiresSourceDepthandorWPlaneCoefficients_start(const struct gen_device_info *devinfo)
52418    switch (devinfo->gen) {
52424       if (devinfo->is_haswell) {
52432       if (devinfo->is_g4x) {
52451 _3DSTATE_PS_EXTRA_PixelShaderRequiresSubpixelSampleOffsets_bits(const struct gen_device_info *devinfo)
52453    switch (devinfo->gen) {
52459       if (devinfo->is_haswell) {
52467       if (devinfo->is_g4x) {
52483 _3DSTATE_PS_EXTRA_PixelShaderRequiresSubpixelSampleOffsets_start(const struct gen_device_info *devinfo)
52485    switch (devinfo->gen) {
52491       if (devinfo->is_haswell) {
52499       if (devinfo->is_g4x) {
52517 _3DSTATE_PS_EXTRA_PixelShaderUsesInputCoverageMask_bits(const struct gen_device_info *devinfo)
52519    switch (devinfo->gen) {
52525       if (devinfo->is_haswell) {
52533       if (devinfo->is_g4x) {
52548 _3DSTATE_PS_EXTRA_PixelShaderUsesInputCoverageMask_start(const struct gen_device_info *devinfo)
52550    switch (devinfo->gen) {
52556       if (devinfo->is_haswell) {
52564       if (devinfo->is_g4x) {
52585 _3DSTATE_PS_EXTRA_PixelShaderUsesSourceDepth_bits(const struct gen_device_info *devinfo)
52587    switch (devinfo->gen) {
52593       if (devinfo->is_haswell) {
52601       if (devinfo->is_g4x) {
52619 _3DSTATE_PS_EXTRA_PixelShaderUsesSourceDepth_start(const struct gen_device_info *devinfo)
52621    switch (devinfo->gen) {
52627       if (devinfo->is_haswell) {
52635       if (devinfo->is_g4x) {
52656 _3DSTATE_PS_EXTRA_PixelShaderUsesSourceW_bits(const struct gen_device_info *devinfo)
52658    switch (devinfo->gen) {
52664       if (devinfo->is_haswell) {
52672       if (devinfo->is_g4x) {
52690 _3DSTATE_PS_EXTRA_PixelShaderUsesSourceW_start(const struct gen_device_info *devinfo)
52692    switch (devinfo->gen) {
52698       if (devinfo->is_haswell) {
52706       if (devinfo->is_g4x) {
52727 _3DSTATE_PS_EXTRA_PixelShaderValid_bits(const struct gen_device_info *devinfo)
52729    switch (devinfo->gen) {
52735       if (devinfo->is_haswell) {
52743       if (devinfo->is_g4x) {
52761 _3DSTATE_PS_EXTRA_PixelShaderValid_start(const struct gen_device_info *devinfo)
52763    switch (devinfo->gen) {
52769       if (devinfo->is_haswell) {
52777       if (devinfo->is_g4x) {
52796 _3DSTATE_PS_EXTRA_SimplePSHint_bits(const struct gen_device_info *devinfo)
52798    switch (devinfo->gen) {
52804       if (devinfo->is_haswell) {
52812       if (devinfo->is_g4x) {
52828 _3DSTATE_PS_EXTRA_SimplePSHint_start(const struct gen_device_info *devinfo)
52830    switch (devinfo->gen) {
52836       if (devinfo->is_haswell) {
52844       if (devinfo->is_g4x) {
52865 _3DSTATE_PS_EXTRA_oMaskPresenttoRenderTarget_bits(const struct gen_device_info *devinfo)
52867    switch (devinfo->gen) {
52873       if (devinfo->is_haswell) {
52881       if (devinfo->is_g4x) {
52899 _3DSTATE_PS_EXTRA_oMaskPresenttoRenderTarget_start(const struct gen_device_info *devinfo)
52901    switch (devinfo->gen) {
52907       if (devinfo->is_haswell) {
52915       if (devinfo->is_g4x) {
52938 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_length(const struct gen_device_info *devinfo)
52940    switch (devinfo->gen) {
52946       if (devinfo->is_haswell) {
52954       if (devinfo->is_g4x) {
52977 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
52979    switch (devinfo->gen) {
52985       if (devinfo->is_haswell) {
52993       if (devinfo->is_g4x) {
53013 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
53015    switch (devinfo->gen) {
53021       if (devinfo->is_haswell) {
53029       if (devinfo->is_g4x) {
53052 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
53054    switch (devinfo->gen) {
53060       if (devinfo->is_haswell) {
53068       if (devinfo->is_g4x) {
53088 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
53090    switch (devinfo->gen) {
53096       if (devinfo->is_haswell) {
53104       if (devinfo->is_g4x) {
53127 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
53129    switch (devinfo->gen) {
53135       if (devinfo->is_haswell) {
53143       if (devinfo->is_g4x) {
53163 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_start(const struct gen_device_info *devinfo)
53165    switch (devinfo->gen) {
53171       if (devinfo->is_haswell) {
53179       if (devinfo->is_g4x) {
53202 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_bits(const struct gen_device_info *devinfo)
53204    switch (devinfo->gen) {
53210       if (devinfo->is_haswell) {
53218       if (devinfo->is_g4x) {
53238 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_start(const struct gen_device_info *devinfo)
53240    switch (devinfo->gen) {
53246       if (devinfo->is_haswell) {
53254       if (devinfo->is_g4x) {
53277 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_bits(const struct gen_device_info *devinfo)
53279    switch (devinfo->gen) {
53285       if (devinfo->is_haswell) {
53293       if (devinfo->is_g4x) {
53313 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_start(const struct gen_device_info *devinfo)
53315    switch (devinfo->gen) {
53321       if (devinfo->is_haswell) {
53329       if (devinfo->is_g4x) {
53352 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_bits(const struct gen_device_info *devinfo)
53354    switch (devinfo->gen) {
53360       if (devinfo->is_haswell) {
53368       if (devinfo->is_g4x) {
53388 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_start(const struct gen_device_info *devinfo)
53390    switch (devinfo->gen) {
53396       if (devinfo->is_haswell) {
53404       if (devinfo->is_g4x) {
53427 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_bits(const struct gen_device_info *devinfo)
53429    switch (devinfo->gen) {
53435       if (devinfo->is_haswell) {
53443       if (devinfo->is_g4x) {
53463 _3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_start(const struct gen_device_info *devinfo)
53465    switch (devinfo->gen) {
53471       if (devinfo->is_haswell) {
53479       if (devinfo->is_g4x) {
53502 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_length(const struct gen_device_info *devinfo)
53504    switch (devinfo->gen) {
53510       if (devinfo->is_haswell) {
53518       if (devinfo->is_g4x) {
53541 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
53543    switch (devinfo->gen) {
53549       if (devinfo->is_haswell) {
53557       if (devinfo->is_g4x) {
53577 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
53579    switch (devinfo->gen) {
53585       if (devinfo->is_haswell) {
53593       if (devinfo->is_g4x) {
53616 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
53618    switch (devinfo->gen) {
53624       if (devinfo->is_haswell) {
53632       if (devinfo->is_g4x) {
53652 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
53654    switch (devinfo->gen) {
53660       if (devinfo->is_haswell) {
53668       if (devinfo->is_g4x) {
53691 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
53693    switch (devinfo->gen) {
53699       if (devinfo->is_haswell) {
53707       if (devinfo->is_g4x) {
53727 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_start(const struct gen_device_info *devinfo)
53729    switch (devinfo->gen) {
53735       if (devinfo->is_haswell) {
53743       if (devinfo->is_g4x) {
53766 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_bits(const struct gen_device_info *devinfo)
53768    switch (devinfo->gen) {
53774       if (devinfo->is_haswell) {
53782       if (devinfo->is_g4x) {
53802 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_start(const struct gen_device_info *devinfo)
53804    switch (devinfo->gen) {
53810       if (devinfo->is_haswell) {
53818       if (devinfo->is_g4x) {
53841 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_bits(const struct gen_device_info *devinfo)
53843    switch (devinfo->gen) {
53849       if (devinfo->is_haswell) {
53857       if (devinfo->is_g4x) {
53877 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_start(const struct gen_device_info *devinfo)
53879    switch (devinfo->gen) {
53885       if (devinfo->is_haswell) {
53893       if (devinfo->is_g4x) {
53916 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_bits(const struct gen_device_info *devinfo)
53918    switch (devinfo->gen) {
53924       if (devinfo->is_haswell) {
53932       if (devinfo->is_g4x) {
53952 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_start(const struct gen_device_info *devinfo)
53954    switch (devinfo->gen) {
53960       if (devinfo->is_haswell) {
53968       if (devinfo->is_g4x) {
53991 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_bits(const struct gen_device_info *devinfo)
53993    switch (devinfo->gen) {
53999       if (devinfo->is_haswell) {
54007       if (devinfo->is_g4x) {
54027 _3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_start(const struct gen_device_info *devinfo)
54029    switch (devinfo->gen) {
54035       if (devinfo->is_haswell) {
54043       if (devinfo->is_g4x) {
54066 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_length(const struct gen_device_info *devinfo)
54068    switch (devinfo->gen) {
54074       if (devinfo->is_haswell) {
54082       if (devinfo->is_g4x) {
54105 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
54107    switch (devinfo->gen) {
54113       if (devinfo->is_haswell) {
54121       if (devinfo->is_g4x) {
54141 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
54143    switch (devinfo->gen) {
54149       if (devinfo->is_haswell) {
54157       if (devinfo->is_g4x) {
54180 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
54182    switch (devinfo->gen) {
54188       if (devinfo->is_haswell) {
54196       if (devinfo->is_g4x) {
54216 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
54218    switch (devinfo->gen) {
54224       if (devinfo->is_haswell) {
54232       if (devinfo->is_g4x) {
54255 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
54257    switch (devinfo->gen) {
54263       if (devinfo->is_haswell) {
54271       if (devinfo->is_g4x) {
54291 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_start(const struct gen_device_info *devinfo)
54293    switch (devinfo->gen) {
54299       if (devinfo->is_haswell) {
54307       if (devinfo->is_g4x) {
54330 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_bits(const struct gen_device_info *devinfo)
54332    switch (devinfo->gen) {
54338       if (devinfo->is_haswell) {
54346       if (devinfo->is_g4x) {
54366 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_start(const struct gen_device_info *devinfo)
54368    switch (devinfo->gen) {
54374       if (devinfo->is_haswell) {
54382       if (devinfo->is_g4x) {
54405 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_bits(const struct gen_device_info *devinfo)
54407    switch (devinfo->gen) {
54413       if (devinfo->is_haswell) {
54421       if (devinfo->is_g4x) {
54441 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_start(const struct gen_device_info *devinfo)
54443    switch (devinfo->gen) {
54449       if (devinfo->is_haswell) {
54457       if (devinfo->is_g4x) {
54480 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_bits(const struct gen_device_info *devinfo)
54482    switch (devinfo->gen) {
54488       if (devinfo->is_haswell) {
54496       if (devinfo->is_g4x) {
54516 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_start(const struct gen_device_info *devinfo)
54518    switch (devinfo->gen) {
54524       if (devinfo->is_haswell) {
54532       if (devinfo->is_g4x) {
54555 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_bits(const struct gen_device_info *devinfo)
54557    switch (devinfo->gen) {
54563       if (devinfo->is_haswell) {
54571       if (devinfo->is_g4x) {
54591 _3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_start(const struct gen_device_info *devinfo)
54593    switch (devinfo->gen) {
54599       if (devinfo->is_haswell) {
54607       if (devinfo->is_g4x) {
54630 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_length(const struct gen_device_info *devinfo)
54632    switch (devinfo->gen) {
54638       if (devinfo->is_haswell) {
54646       if (devinfo->is_g4x) {
54669 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
54671    switch (devinfo->gen) {
54677       if (devinfo->is_haswell) {
54685       if (devinfo->is_g4x) {
54705 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
54707    switch (devinfo->gen) {
54713       if (devinfo->is_haswell) {
54721       if (devinfo->is_g4x) {
54744 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
54746    switch (devinfo->gen) {
54752       if (devinfo->is_haswell) {
54760       if (devinfo->is_g4x) {
54780 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
54782    switch (devinfo->gen) {
54788       if (devinfo->is_haswell) {
54796       if (devinfo->is_g4x) {
54819 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
54821    switch (devinfo->gen) {
54827       if (devinfo->is_haswell) {
54835       if (devinfo->is_g4x) {
54855 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_start(const struct gen_device_info *devinfo)
54857    switch (devinfo->gen) {
54863       if (devinfo->is_haswell) {
54871       if (devinfo->is_g4x) {
54894 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_bits(const struct gen_device_info *devinfo)
54896    switch (devinfo->gen) {
54902       if (devinfo->is_haswell) {
54910       if (devinfo->is_g4x) {
54930 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_start(const struct gen_device_info *devinfo)
54932    switch (devinfo->gen) {
54938       if (devinfo->is_haswell) {
54946       if (devinfo->is_g4x) {
54969 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_bits(const struct gen_device_info *devinfo)
54971    switch (devinfo->gen) {
54977       if (devinfo->is_haswell) {
54985       if (devinfo->is_g4x) {
55005 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_start(const struct gen_device_info *devinfo)
55007    switch (devinfo->gen) {
55013       if (devinfo->is_haswell) {
55021       if (devinfo->is_g4x) {
55044 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_bits(const struct gen_device_info *devinfo)
55046    switch (devinfo->gen) {
55052       if (devinfo->is_haswell) {
55060       if (devinfo->is_g4x) {
55080 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_start(const struct gen_device_info *devinfo)
55082    switch (devinfo->gen) {
55088       if (devinfo->is_haswell) {
55096       if (devinfo->is_g4x) {
55119 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_bits(const struct gen_device_info *devinfo)
55121    switch (devinfo->gen) {
55127       if (devinfo->is_haswell) {
55135       if (devinfo->is_g4x) {
55155 _3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_start(const struct gen_device_info *devinfo)
55157    switch (devinfo->gen) {
55163       if (devinfo->is_haswell) {
55171       if (devinfo->is_g4x) {
55194 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_length(const struct gen_device_info *devinfo)
55196    switch (devinfo->gen) {
55202       if (devinfo->is_haswell) {
55210       if (devinfo->is_g4x) {
55233 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
55235    switch (devinfo->gen) {
55241       if (devinfo->is_haswell) {
55249       if (devinfo->is_g4x) {
55269 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
55271    switch (devinfo->gen) {
55277       if (devinfo->is_haswell) {
55285       if (devinfo->is_g4x) {
55308 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
55310    switch (devinfo->gen) {
55316       if (devinfo->is_haswell) {
55324       if (devinfo->is_g4x) {
55344 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
55346    switch (devinfo->gen) {
55352       if (devinfo->is_haswell) {
55360       if (devinfo->is_g4x) {
55383 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
55385    switch (devinfo->gen) {
55391       if (devinfo->is_haswell) {
55399       if (devinfo->is_g4x) {
55419 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_start(const struct gen_device_info *devinfo)
55421    switch (devinfo->gen) {
55427       if (devinfo->is_haswell) {
55435       if (devinfo->is_g4x) {
55458 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_bits(const struct gen_device_info *devinfo)
55460    switch (devinfo->gen) {
55466       if (devinfo->is_haswell) {
55474       if (devinfo->is_g4x) {
55494 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_start(const struct gen_device_info *devinfo)
55496    switch (devinfo->gen) {
55502       if (devinfo->is_haswell) {
55510       if (devinfo->is_g4x) {
55533 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_bits(const struct gen_device_info *devinfo)
55535    switch (devinfo->gen) {
55541       if (devinfo->is_haswell) {
55549       if (devinfo->is_g4x) {
55569 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_start(const struct gen_device_info *devinfo)
55571    switch (devinfo->gen) {
55577       if (devinfo->is_haswell) {
55585       if (devinfo->is_g4x) {
55608 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_bits(const struct gen_device_info *devinfo)
55610    switch (devinfo->gen) {
55616       if (devinfo->is_haswell) {
55624       if (devinfo->is_g4x) {
55644 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_start(const struct gen_device_info *devinfo)
55646    switch (devinfo->gen) {
55652       if (devinfo->is_haswell) {
55660       if (devinfo->is_g4x) {
55683 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_bits(const struct gen_device_info *devinfo)
55685    switch (devinfo->gen) {
55691       if (devinfo->is_haswell) {
55699       if (devinfo->is_g4x) {
55719 _3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_start(const struct gen_device_info *devinfo)
55721    switch (devinfo->gen) {
55727       if (devinfo->is_haswell) {
55735       if (devinfo->is_g4x) {
55756 _3DSTATE_RASTER_length(const struct gen_device_info *devinfo)
55758    switch (devinfo->gen) {
55764       if (devinfo->is_haswell) {
55772       if (devinfo->is_g4x) {
55793 _3DSTATE_RASTER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
55795    switch (devinfo->gen) {
55801       if (devinfo->is_haswell) {
55809       if (devinfo->is_g4x) {
55827 _3DSTATE_RASTER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
55829    switch (devinfo->gen) {
55835       if (devinfo->is_haswell) {
55843       if (devinfo->is_g4x) {
55864 _3DSTATE_RASTER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
55866    switch (devinfo->gen) {
55872       if (devinfo->is_haswell) {
55880       if (devinfo->is_g4x) {
55898 _3DSTATE_RASTER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
55900    switch (devinfo->gen) {
55906       if (devinfo->is_haswell) {
55914       if (devinfo->is_g4x) {
55935 _3DSTATE_RASTER_APIMode_bits(const struct gen_device_info *devinfo)
55937    switch (devinfo->gen) {
55943       if (devinfo->is_haswell) {
55951       if (devinfo->is_g4x) {
55969 _3DSTATE_RASTER_APIMode_start(const struct gen_device_info *devinfo)
55971    switch (devinfo->gen) {
55977       if (devinfo->is_haswell) {
55985       if (devinfo->is_g4x) {
56006 _3DSTATE_RASTER_AntialiasingEnable_bits(const struct gen_device_info *devinfo)
56008    switch (devinfo->gen) {
56014       if (devinfo->is_haswell) {
56022       if (devinfo->is_g4x) {
56040 _3DSTATE_RASTER_AntialiasingEnable_start(const struct gen_device_info *devinfo)
56042    switch (devinfo->gen) {
56048       if (devinfo->is_haswell) {
56056       if (devinfo->is_g4x) {
56077 _3DSTATE_RASTER_BackFaceFillMode_bits(const struct gen_device_info *devinfo)
56079    switch (devinfo->gen) {
56085       if (devinfo->is_haswell) {
56093       if (devinfo->is_g4x) {
56111 _3DSTATE_RASTER_BackFaceFillMode_start(const struct gen_device_info *devinfo)
56113    switch (devinfo->gen) {
56119       if (devinfo->is_haswell) {
56127       if (devinfo->is_g4x) {
56148 _3DSTATE_RASTER_CommandSubType_bits(const struct gen_device_info *devinfo)
56150    switch (devinfo->gen) {
56156       if (devinfo->is_haswell) {
56164       if (devinfo->is_g4x) {
56182 _3DSTATE_RASTER_CommandSubType_start(const struct gen_device_info *devinfo)
56184    switch (devinfo->gen) {
56190       if (devinfo->is_haswell) {
56198       if (devinfo->is_g4x) {
56219 _3DSTATE_RASTER_CommandType_bits(const struct gen_device_info *devinfo)
56221    switch (devinfo->gen) {
56227       if (devinfo->is_haswell) {
56235       if (devinfo->is_g4x) {
56253 _3DSTATE_RASTER_CommandType_start(const struct gen_device_info *devinfo)
56255    switch (devinfo->gen) {
56261       if (devinfo->is_haswell) {
56269       if (devinfo->is_g4x) {
56289 _3DSTATE_RASTER_ConservativeRasterizationEnable_bits(const struct gen_device_info *devinfo)
56291    switch (devinfo->gen) {
56297       if (devinfo->is_haswell) {
56305       if (devinfo->is_g4x) {
56322 _3DSTATE_RASTER_ConservativeRasterizationEnable_start(const struct gen_device_info *devinfo)
56324    switch (devinfo->gen) {
56330       if (devinfo->is_haswell) {
56338       if (devinfo->is_g4x) {
56359 _3DSTATE_RASTER_CullMode_bits(const struct gen_device_info *devinfo)
56361    switch (devinfo->gen) {
56367       if (devinfo->is_haswell) {
56375       if (devinfo->is_g4x) {
56393 _3DSTATE_RASTER_CullMode_start(const struct gen_device_info *devinfo)
56395    switch (devinfo->gen) {
56401       if (devinfo->is_haswell) {
56409       if (devinfo->is_g4x) {
56430 _3DSTATE_RASTER_DWordLength_bits(const struct gen_device_info *devinfo)
56432    switch (devinfo->gen) {
56438       if (devinfo->is_haswell) {
56446       if (devinfo->is_g4x) {
56464 _3DSTATE_RASTER_DWordLength_start(const struct gen_device_info *devinfo)
56466    switch (devinfo->gen) {
56472       if (devinfo->is_haswell) {
56480       if (devinfo->is_g4x) {
56501 _3DSTATE_RASTER_DXMultisampleRasterizationEnable_bits(const struct gen_device_info *devinfo)
56503    switch (devinfo->gen) {
56509       if (devinfo->is_haswell) {
56517       if (devinfo->is_g4x) {
56535 _3DSTATE_RASTER_DXMultisampleRasterizationEnable_start(const struct gen_device_info *devinfo)
56537    switch (devinfo->gen) {
56543       if (devinfo->is_haswell) {
56551       if (devinfo->is_g4x) {
56572 _3DSTATE_RASTER_DXMultisampleRasterizationMode_bits(const struct gen_device_info *devinfo)
56574    switch (devinfo->gen) {
56580       if (devinfo->is_haswell) {
56588       if (devinfo->is_g4x) {
56606 _3DSTATE_RASTER_DXMultisampleRasterizationMode_start(const struct gen_device_info *devinfo)
56608    switch (devinfo->gen) {
56614       if (devinfo->is_haswell) {
56622       if (devinfo->is_g4x) {
56643 _3DSTATE_RASTER_ForceMultisampling_bits(const struct gen_device_info *devinfo)
56645    switch (devinfo->gen) {
56651       if (devinfo->is_haswell) {
56659       if (devinfo->is_g4x) {
56677 _3DSTATE_RASTER_ForceMultisampling_start(const struct gen_device_info *devinfo)
56679    switch (devinfo->gen) {
56685       if (devinfo->is_haswell) {
56693       if (devinfo->is_g4x) {
56714 _3DSTATE_RASTER_ForcedSampleCount_bits(const struct gen_device_info *devinfo)
56716    switch (devinfo->gen) {
56722       if (devinfo->is_haswell) {
56730       if (devinfo->is_g4x) {
56748 _3DSTATE_RASTER_ForcedSampleCount_start(const struct gen_device_info *devinfo)
56750    switch (devinfo->gen) {
56756       if (devinfo->is_haswell) {
56764       if (devinfo->is_g4x) {
56785 _3DSTATE_RASTER_FrontFaceFillMode_bits(const struct gen_device_info *devinfo)
56787    switch (devinfo->gen) {
56793       if (devinfo->is_haswell) {
56801       if (devinfo->is_g4x) {
56819 _3DSTATE_RASTER_FrontFaceFillMode_start(const struct gen_device_info *devinfo)
56821    switch (devinfo->gen) {
56827       if (devinfo->is_haswell) {
56835       if (devinfo->is_g4x) {
56856 _3DSTATE_RASTER_FrontWinding_bits(const struct gen_device_info *devinfo)
56858    switch (devinfo->gen) {
56864       if (devinfo->is_haswell) {
56872       if (devinfo->is_g4x) {
56890 _3DSTATE_RASTER_FrontWinding_start(const struct gen_device_info *devinfo)
56892    switch (devinfo->gen) {
56898       if (devinfo->is_haswell) {
56906       if (devinfo->is_g4x) {
56927 _3DSTATE_RASTER_GlobalDepthOffsetClamp_bits(const struct gen_device_info *devinfo)
56929    switch (devinfo->gen) {
56935       if (devinfo->is_haswell) {
56943       if (devinfo->is_g4x) {
56961 _3DSTATE_RASTER_GlobalDepthOffsetClamp_start(const struct gen_device_info *devinfo)
56963    switch (devinfo->gen) {
56969       if (devinfo->is_haswell) {
56977       if (devinfo->is_g4x) {
56998 _3DSTATE_RASTER_GlobalDepthOffsetConstant_bits(const struct gen_device_info *devinfo)
57000    switch (devinfo->gen) {
57006       if (devinfo->is_haswell) {
57014       if (devinfo->is_g4x) {
57032 _3DSTATE_RASTER_GlobalDepthOffsetConstant_start(const struct gen_device_info *devinfo)
57034    switch (devinfo->gen) {
57040       if (devinfo->is_haswell) {
57048       if (devinfo->is_g4x) {
57069 _3DSTATE_RASTER_GlobalDepthOffsetEnablePoint_bits(const struct gen_device_info *devinfo)
57071    switch (devinfo->gen) {
57077       if (devinfo->is_haswell) {
57085       if (devinfo->is_g4x) {
57103 _3DSTATE_RASTER_GlobalDepthOffsetEnablePoint_start(const struct gen_device_info *devinfo)
57105    switch (devinfo->gen) {
57111       if (devinfo->is_haswell) {
57119       if (devinfo->is_g4x) {
57140 _3DSTATE_RASTER_GlobalDepthOffsetEnableSolid_bits(const struct gen_device_info *devinfo)
57142    switch (devinfo->gen) {
57148       if (devinfo->is_haswell) {
57156       if (devinfo->is_g4x) {
57174 _3DSTATE_RASTER_GlobalDepthOffsetEnableSolid_start(const struct gen_device_info *devinfo)
57176    switch (devinfo->gen) {
57182       if (devinfo->is_haswell) {
57190       if (devinfo->is_g4x) {
57211 _3DSTATE_RASTER_GlobalDepthOffsetEnableWireframe_bits(const struct gen_device_info *devinfo)
57213    switch (devinfo->gen) {
57219       if (devinfo->is_haswell) {
57227       if (devinfo->is_g4x) {
57245 _3DSTATE_RASTER_GlobalDepthOffsetEnableWireframe_start(const struct gen_device_info *devinfo)
57247    switch (devinfo->gen) {
57253       if (devinfo->is_haswell) {
57261       if (devinfo->is_g4x) {
57282 _3DSTATE_RASTER_GlobalDepthOffsetScale_bits(const struct gen_device_info *devinfo)
57284    switch (devinfo->gen) {
57290       if (devinfo->is_haswell) {
57298       if (devinfo->is_g4x) {
57316 _3DSTATE_RASTER_GlobalDepthOffsetScale_start(const struct gen_device_info *devinfo)
57318    switch (devinfo->gen) {
57324       if (devinfo->is_haswell) {
57332       if (devinfo->is_g4x) {
57353 _3DSTATE_RASTER_ScissorRectangleEnable_bits(const struct gen_device_info *devinfo)
57355    switch (devinfo->gen) {
57361       if (devinfo->is_haswell) {
57369       if (devinfo->is_g4x) {
57387 _3DSTATE_RASTER_ScissorRectangleEnable_start(const struct gen_device_info *devinfo)
57389    switch (devinfo->gen) {
57395       if (devinfo->is_haswell) {
57403       if (devinfo->is_g4x) {
57424 _3DSTATE_RASTER_SmoothPointEnable_bits(const struct gen_device_info *devinfo)
57426    switch (devinfo->gen) {
57432       if (devinfo->is_haswell) {
57440       if (devinfo->is_g4x) {
57458 _3DSTATE_RASTER_SmoothPointEnable_start(const struct gen_device_info *devinfo)
57460    switch (devinfo->gen) {
57466       if (devinfo->is_haswell) {
57474       if (devinfo->is_g4x) {
57492 _3DSTATE_RASTER_ViewportZClipTestEnable_bits(const struct gen_device_info *devinfo)
57494    switch (devinfo->gen) {
57500       if (devinfo->is_haswell) {
57508       if (devinfo->is_g4x) {
57523 _3DSTATE_RASTER_ViewportZClipTestEnable_start(const struct gen_device_info *devinfo)
57525    switch (devinfo->gen) {
57531       if (devinfo->is_haswell) {
57539       if (devinfo->is_g4x) {
57559 _3DSTATE_RASTER_ViewportZFarClipTestEnable_bits(const struct gen_device_info *devinfo)
57561    switch (devinfo->gen) {
57567       if (devinfo->is_haswell) {
57575       if (devinfo->is_g4x) {
57592 _3DSTATE_RASTER_ViewportZFarClipTestEnable_start(const struct gen_device_info *devinfo)
57594    switch (devinfo->gen) {
57600       if (devinfo->is_haswell) {
57608       if (devinfo->is_g4x) {
57628 _3DSTATE_RASTER_ViewportZNearClipTestEnable_bits(const struct gen_device_info *devinfo)
57630    switch (devinfo->gen) {
57636       if (devinfo->is_haswell) {
57644       if (devinfo->is_g4x) {
57661 _3DSTATE_RASTER_ViewportZNearClipTestEnable_start(const struct gen_device_info *devinfo)
57663    switch (devinfo->gen) {
57669       if (devinfo->is_haswell) {
57677       if (devinfo->is_g4x) {
57695 _3DSTATE_RAST_MULTISAMPLE_length(const struct gen_device_info *devinfo)
57697    switch (devinfo->gen) {
57703       if (devinfo->is_haswell) {
57711       if (devinfo->is_g4x) {
57729 _3DSTATE_RAST_MULTISAMPLE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
57731    switch (devinfo->gen) {
57737       if (devinfo->is_haswell) {
57745       if (devinfo->is_g4x) {
57760 _3DSTATE_RAST_MULTISAMPLE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
57762    switch (devinfo->gen) {
57768       if (devinfo->is_haswell) {
57776       if (devinfo->is_g4x) {
57794 _3DSTATE_RAST_MULTISAMPLE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
57796    switch (devinfo->gen) {
57802       if (devinfo->is_haswell) {
57810       if (devinfo->is_g4x) {
57825 _3DSTATE_RAST_MULTISAMPLE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
57827    switch (devinfo->gen) {
57833       if (devinfo->is_haswell) {
57841       if (devinfo->is_g4x) {
57859 _3DSTATE_RAST_MULTISAMPLE_CommandSubType_bits(const struct gen_device_info *devinfo)
57861    switch (devinfo->gen) {
57867       if (devinfo->is_haswell) {
57875       if (devinfo->is_g4x) {
57890 _3DSTATE_RAST_MULTISAMPLE_CommandSubType_start(const struct gen_device_info *devinfo)
57892    switch (devinfo->gen) {
57898       if (devinfo->is_haswell) {
57906       if (devinfo->is_g4x) {
57924 _3DSTATE_RAST_MULTISAMPLE_CommandType_bits(const struct gen_device_info *devinfo)
57926    switch (devinfo->gen) {
57932       if (devinfo->is_haswell) {
57940       if (devinfo->is_g4x) {
57955 _3DSTATE_RAST_MULTISAMPLE_CommandType_start(const struct gen_device_info *devinfo)
57957    switch (devinfo->gen) {
57963       if (devinfo->is_haswell) {
57971       if (devinfo->is_g4x) {
57989 _3DSTATE_RAST_MULTISAMPLE_DWordLength_bits(const struct gen_device_info *devinfo)
57991    switch (devinfo->gen) {
57997       if (devinfo->is_haswell) {
58005       if (devinfo->is_g4x) {
58020 _3DSTATE_RAST_MULTISAMPLE_DWordLength_start(const struct gen_device_info *devinfo)
58022    switch (devinfo->gen) {
58028       if (devinfo->is_haswell) {
58036       if (devinfo->is_g4x) {
58054 _3DSTATE_RAST_MULTISAMPLE_NumberofRasterizationMultisamples_bits(const struct gen_device_info *devinfo)
58056    switch (devinfo->gen) {
58062       if (devinfo->is_haswell) {
58070       if (devinfo->is_g4x) {
58085 _3DSTATE_RAST_MULTISAMPLE_NumberofRasterizationMultisamples_start(const struct gen_device_info *devinfo)
58087    switch (devinfo->gen) {
58093       if (devinfo->is_haswell) {
58101       if (devinfo->is_g4x) {
58119 _3DSTATE_RAST_MULTISAMPLE_Sample0XOffset_bits(const struct gen_device_info *devinfo)
58121    switch (devinfo->gen) {
58127       if (devinfo->is_haswell) {
58135       if (devinfo->is_g4x) {
58150 _3DSTATE_RAST_MULTISAMPLE_Sample0XOffset_start(const struct gen_device_info *devinfo)
58152    switch (devinfo->gen) {
58158       if (devinfo->is_haswell) {
58166       if (devinfo->is_g4x) {
58184 _3DSTATE_RAST_MULTISAMPLE_Sample0YOffset_bits(const struct gen_device_info *devinfo)
58186    switch (devinfo->gen) {
58192       if (devinfo->is_haswell) {
58200       if (devinfo->is_g4x) {
58215 _3DSTATE_RAST_MULTISAMPLE_Sample0YOffset_start(const struct gen_device_info *devinfo)
58217    switch (devinfo->gen) {
58223       if (devinfo->is_haswell) {
58231       if (devinfo->is_g4x) {
58249 _3DSTATE_RAST_MULTISAMPLE_Sample1XOffset_bits(const struct gen_device_info *devinfo)
58251    switch (devinfo->gen) {
58257       if (devinfo->is_haswell) {
58265       if (devinfo->is_g4x) {
58280 _3DSTATE_RAST_MULTISAMPLE_Sample1XOffset_start(const struct gen_device_info *devinfo)
58282    switch (devinfo->gen) {
58288       if (devinfo->is_haswell) {
58296       if (devinfo->is_g4x) {
58314 _3DSTATE_RAST_MULTISAMPLE_Sample1YOffset_bits(const struct gen_device_info *devinfo)
58316    switch (devinfo->gen) {
58322       if (devinfo->is_haswell) {
58330       if (devinfo->is_g4x) {
58345 _3DSTATE_RAST_MULTISAMPLE_Sample1YOffset_start(const struct gen_device_info *devinfo)
58347    switch (devinfo->gen) {
58353       if (devinfo->is_haswell) {
58361       if (devinfo->is_g4x) {
58379 _3DSTATE_RAST_MULTISAMPLE_Sample10XOffset_bits(const struct gen_device_info *devinfo)
58381    switch (devinfo->gen) {
58387       if (devinfo->is_haswell) {
58395       if (devinfo->is_g4x) {
58410 _3DSTATE_RAST_MULTISAMPLE_Sample10XOffset_start(const struct gen_device_info *devinfo)
58412    switch (devinfo->gen) {
58418       if (devinfo->is_haswell) {
58426       if (devinfo->is_g4x) {
58444 _3DSTATE_RAST_MULTISAMPLE_Sample10YOffset_bits(const struct gen_device_info *devinfo)
58446    switch (devinfo->gen) {
58452       if (devinfo->is_haswell) {
58460       if (devinfo->is_g4x) {
58475 _3DSTATE_RAST_MULTISAMPLE_Sample10YOffset_start(const struct gen_device_info *devinfo)
58477    switch (devinfo->gen) {
58483       if (devinfo->is_haswell) {
58491       if (devinfo->is_g4x) {
58509 _3DSTATE_RAST_MULTISAMPLE_Sample11XOffset_bits(const struct gen_device_info *devinfo)
58511    switch (devinfo->gen) {
58517       if (devinfo->is_haswell) {
58525       if (devinfo->is_g4x) {
58540 _3DSTATE_RAST_MULTISAMPLE_Sample11XOffset_start(const struct gen_device_info *devinfo)
58542    switch (devinfo->gen) {
58548       if (devinfo->is_haswell) {
58556       if (devinfo->is_g4x) {
58574 _3DSTATE_RAST_MULTISAMPLE_Sample11YOffset_bits(const struct gen_device_info *devinfo)
58576    switch (devinfo->gen) {
58582       if (devinfo->is_haswell) {
58590       if (devinfo->is_g4x) {
58605 _3DSTATE_RAST_MULTISAMPLE_Sample11YOffset_start(const struct gen_device_info *devinfo)
58607    switch (devinfo->gen) {
58613       if (devinfo->is_haswell) {
58621       if (devinfo->is_g4x) {
58639 _3DSTATE_RAST_MULTISAMPLE_Sample12XOffset_bits(const struct gen_device_info *devinfo)
58641    switch (devinfo->gen) {
58647       if (devinfo->is_haswell) {
58655       if (devinfo->is_g4x) {
58670 _3DSTATE_RAST_MULTISAMPLE_Sample12XOffset_start(const struct gen_device_info *devinfo)
58672    switch (devinfo->gen) {
58678       if (devinfo->is_haswell) {
58686       if (devinfo->is_g4x) {
58704 _3DSTATE_RAST_MULTISAMPLE_Sample12YOffset_bits(const struct gen_device_info *devinfo)
58706    switch (devinfo->gen) {
58712       if (devinfo->is_haswell) {
58720       if (devinfo->is_g4x) {
58735 _3DSTATE_RAST_MULTISAMPLE_Sample12YOffset_start(const struct gen_device_info *devinfo)
58737    switch (devinfo->gen) {
58743       if (devinfo->is_haswell) {
58751       if (devinfo->is_g4x) {
58769 _3DSTATE_RAST_MULTISAMPLE_Sample13XOffset_bits(const struct gen_device_info *devinfo)
58771    switch (devinfo->gen) {
58777       if (devinfo->is_haswell) {
58785       if (devinfo->is_g4x) {
58800 _3DSTATE_RAST_MULTISAMPLE_Sample13XOffset_start(const struct gen_device_info *devinfo)
58802    switch (devinfo->gen) {
58808       if (devinfo->is_haswell) {
58816       if (devinfo->is_g4x) {
58834 _3DSTATE_RAST_MULTISAMPLE_Sample13YOffset_bits(const struct gen_device_info *devinfo)
58836    switch (devinfo->gen) {
58842       if (devinfo->is_haswell) {
58850       if (devinfo->is_g4x) {
58865 _3DSTATE_RAST_MULTISAMPLE_Sample13YOffset_start(const struct gen_device_info *devinfo)
58867    switch (devinfo->gen) {
58873       if (devinfo->is_haswell) {
58881       if (devinfo->is_g4x) {
58899 _3DSTATE_RAST_MULTISAMPLE_Sample14XOffset_bits(const struct gen_device_info *devinfo)
58901    switch (devinfo->gen) {
58907       if (devinfo->is_haswell) {
58915       if (devinfo->is_g4x) {
58930 _3DSTATE_RAST_MULTISAMPLE_Sample14XOffset_start(const struct gen_device_info *devinfo)
58932    switch (devinfo->gen) {
58938       if (devinfo->is_haswell) {
58946       if (devinfo->is_g4x) {
58964 _3DSTATE_RAST_MULTISAMPLE_Sample14YOffset_bits(const struct gen_device_info *devinfo)
58966    switch (devinfo->gen) {
58972       if (devinfo->is_haswell) {
58980       if (devinfo->is_g4x) {
58995 _3DSTATE_RAST_MULTISAMPLE_Sample14YOffset_start(const struct gen_device_info *devinfo)
58997    switch (devinfo->gen) {
59003       if (devinfo->is_haswell) {
59011       if (devinfo->is_g4x) {
59029 _3DSTATE_RAST_MULTISAMPLE_Sample15XOffset_bits(const struct gen_device_info *devinfo)
59031    switch (devinfo->gen) {
59037       if (devinfo->is_haswell) {
59045       if (devinfo->is_g4x) {
59060 _3DSTATE_RAST_MULTISAMPLE_Sample15XOffset_start(const struct gen_device_info *devinfo)
59062    switch (devinfo->gen) {
59068       if (devinfo->is_haswell) {
59076       if (devinfo->is_g4x) {
59094 _3DSTATE_RAST_MULTISAMPLE_Sample15YOffset_bits(const struct gen_device_info *devinfo)
59096    switch (devinfo->gen) {
59102       if (devinfo->is_haswell) {
59110       if (devinfo->is_g4x) {
59125 _3DSTATE_RAST_MULTISAMPLE_Sample15YOffset_start(const struct gen_device_info *devinfo)
59127    switch (devinfo->gen) {
59133       if (devinfo->is_haswell) {
59141       if (devinfo->is_g4x) {
59159 _3DSTATE_RAST_MULTISAMPLE_Sample2XOffset_bits(const struct gen_device_info *devinfo)
59161    switch (devinfo->gen) {
59167       if (devinfo->is_haswell) {
59175       if (devinfo->is_g4x) {
59190 _3DSTATE_RAST_MULTISAMPLE_Sample2XOffset_start(const struct gen_device_info *devinfo)
59192    switch (devinfo->gen) {
59198       if (devinfo->is_haswell) {
59206       if (devinfo->is_g4x) {
59224 _3DSTATE_RAST_MULTISAMPLE_Sample2YOffset_bits(const struct gen_device_info *devinfo)
59226    switch (devinfo->gen) {
59232       if (devinfo->is_haswell) {
59240       if (devinfo->is_g4x) {
59255 _3DSTATE_RAST_MULTISAMPLE_Sample2YOffset_start(const struct gen_device_info *devinfo)
59257    switch (devinfo->gen) {
59263       if (devinfo->is_haswell) {
59271       if (devinfo->is_g4x) {
59289 _3DSTATE_RAST_MULTISAMPLE_Sample3XOffset_bits(const struct gen_device_info *devinfo)
59291    switch (devinfo->gen) {
59297       if (devinfo->is_haswell) {
59305       if (devinfo->is_g4x) {
59320 _3DSTATE_RAST_MULTISAMPLE_Sample3XOffset_start(const struct gen_device_info *devinfo)
59322    switch (devinfo->gen) {
59328       if (devinfo->is_haswell) {
59336       if (devinfo->is_g4x) {
59354 _3DSTATE_RAST_MULTISAMPLE_Sample3YOffset_bits(const struct gen_device_info *devinfo)
59356    switch (devinfo->gen) {
59362       if (devinfo->is_haswell) {
59370       if (devinfo->is_g4x) {
59385 _3DSTATE_RAST_MULTISAMPLE_Sample3YOffset_start(const struct gen_device_info *devinfo)
59387    switch (devinfo->gen) {
59393       if (devinfo->is_haswell) {
59401       if (devinfo->is_g4x) {
59419 _3DSTATE_RAST_MULTISAMPLE_Sample4XOffset_bits(const struct gen_device_info *devinfo)
59421    switch (devinfo->gen) {
59427       if (devinfo->is_haswell) {
59435       if (devinfo->is_g4x) {
59450 _3DSTATE_RAST_MULTISAMPLE_Sample4XOffset_start(const struct gen_device_info *devinfo)
59452    switch (devinfo->gen) {
59458       if (devinfo->is_haswell) {
59466       if (devinfo->is_g4x) {
59484 _3DSTATE_RAST_MULTISAMPLE_Sample4YOffset_bits(const struct gen_device_info *devinfo)
59486    switch (devinfo->gen) {
59492       if (devinfo->is_haswell) {
59500       if (devinfo->is_g4x) {
59515 _3DSTATE_RAST_MULTISAMPLE_Sample4YOffset_start(const struct gen_device_info *devinfo)
59517    switch (devinfo->gen) {
59523       if (devinfo->is_haswell) {
59531       if (devinfo->is_g4x) {
59549 _3DSTATE_RAST_MULTISAMPLE_Sample5XOffset_bits(const struct gen_device_info *devinfo)
59551    switch (devinfo->gen) {
59557       if (devinfo->is_haswell) {
59565       if (devinfo->is_g4x) {
59580 _3DSTATE_RAST_MULTISAMPLE_Sample5XOffset_start(const struct gen_device_info *devinfo)
59582    switch (devinfo->gen) {
59588       if (devinfo->is_haswell) {
59596       if (devinfo->is_g4x) {
59614 _3DSTATE_RAST_MULTISAMPLE_Sample5YOffset_bits(const struct gen_device_info *devinfo)
59616    switch (devinfo->gen) {
59622       if (devinfo->is_haswell) {
59630       if (devinfo->is_g4x) {
59645 _3DSTATE_RAST_MULTISAMPLE_Sample5YOffset_start(const struct gen_device_info *devinfo)
59647    switch (devinfo->gen) {
59653       if (devinfo->is_haswell) {
59661       if (devinfo->is_g4x) {
59679 _3DSTATE_RAST_MULTISAMPLE_Sample6XOffset_bits(const struct gen_device_info *devinfo)
59681    switch (devinfo->gen) {
59687       if (devinfo->is_haswell) {
59695       if (devinfo->is_g4x) {
59710 _3DSTATE_RAST_MULTISAMPLE_Sample6XOffset_start(const struct gen_device_info *devinfo)
59712    switch (devinfo->gen) {
59718       if (devinfo->is_haswell) {
59726       if (devinfo->is_g4x) {
59744 _3DSTATE_RAST_MULTISAMPLE_Sample6YOffset_bits(const struct gen_device_info *devinfo)
59746    switch (devinfo->gen) {
59752       if (devinfo->is_haswell) {
59760       if (devinfo->is_g4x) {
59775 _3DSTATE_RAST_MULTISAMPLE_Sample6YOffset_start(const struct gen_device_info *devinfo)
59777    switch (devinfo->gen) {
59783       if (devinfo->is_haswell) {
59791       if (devinfo->is_g4x) {
59809 _3DSTATE_RAST_MULTISAMPLE_Sample7XOffset_bits(const struct gen_device_info *devinfo)
59811    switch (devinfo->gen) {
59817       if (devinfo->is_haswell) {
59825       if (devinfo->is_g4x) {
59840 _3DSTATE_RAST_MULTISAMPLE_Sample7XOffset_start(const struct gen_device_info *devinfo)
59842    switch (devinfo->gen) {
59848       if (devinfo->is_haswell) {
59856       if (devinfo->is_g4x) {
59874 _3DSTATE_RAST_MULTISAMPLE_Sample7YOffset_bits(const struct gen_device_info *devinfo)
59876    switch (devinfo->gen) {
59882       if (devinfo->is_haswell) {
59890       if (devinfo->is_g4x) {
59905 _3DSTATE_RAST_MULTISAMPLE_Sample7YOffset_start(const struct gen_device_info *devinfo)
59907    switch (devinfo->gen) {
59913       if (devinfo->is_haswell) {
59921       if (devinfo->is_g4x) {
59939 _3DSTATE_RAST_MULTISAMPLE_Sample8XOffset_bits(const struct gen_device_info *devinfo)
59941    switch (devinfo->gen) {
59947       if (devinfo->is_haswell) {
59955       if (devinfo->is_g4x) {
59970 _3DSTATE_RAST_MULTISAMPLE_Sample8XOffset_start(const struct gen_device_info *devinfo)
59972    switch (devinfo->gen) {
59978       if (devinfo->is_haswell) {
59986       if (devinfo->is_g4x) {
60004 _3DSTATE_RAST_MULTISAMPLE_Sample8YOffset_bits(const struct gen_device_info *devinfo)
60006    switch (devinfo->gen) {
60012       if (devinfo->is_haswell) {
60020       if (devinfo->is_g4x) {
60035 _3DSTATE_RAST_MULTISAMPLE_Sample8YOffset_start(const struct gen_device_info *devinfo)
60037    switch (devinfo->gen) {
60043       if (devinfo->is_haswell) {
60051       if (devinfo->is_g4x) {
60069 _3DSTATE_RAST_MULTISAMPLE_Sample9XOffset_bits(const struct gen_device_info *devinfo)
60071    switch (devinfo->gen) {
60077       if (devinfo->is_haswell) {
60085       if (devinfo->is_g4x) {
60100 _3DSTATE_RAST_MULTISAMPLE_Sample9XOffset_start(const struct gen_device_info *devinfo)
60102    switch (devinfo->gen) {
60108       if (devinfo->is_haswell) {
60116       if (devinfo->is_g4x) {
60134 _3DSTATE_RAST_MULTISAMPLE_Sample9YOffset_bits(const struct gen_device_info *devinfo)
60136    switch (devinfo->gen) {
60142       if (devinfo->is_haswell) {
60150       if (devinfo->is_g4x) {
60165 _3DSTATE_RAST_MULTISAMPLE_Sample9YOffset_start(const struct gen_device_info *devinfo)
60167    switch (devinfo->gen) {
60173       if (devinfo->is_haswell) {
60181       if (devinfo->is_g4x) {
60201 _3DSTATE_RS_CONSTANT_POINTER_length(const struct gen_device_info *devinfo)
60203    switch (devinfo->gen) {
60209       if (devinfo->is_haswell) {
60217       if (devinfo->is_g4x) {
60237 _3DSTATE_RS_CONSTANT_POINTER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
60239    switch (devinfo->gen) {
60245       if (devinfo->is_haswell) {
60253       if (devinfo->is_g4x) {
60270 _3DSTATE_RS_CONSTANT_POINTER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
60272    switch (devinfo->gen) {
60278       if (devinfo->is_haswell) {
60286       if (devinfo->is_g4x) {
60306 _3DSTATE_RS_CONSTANT_POINTER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
60308    switch (devinfo->gen) {
60314       if (devinfo->is_haswell) {
60322       if (devinfo->is_g4x) {
60339 _3DSTATE_RS_CONSTANT_POINTER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
60341    switch (devinfo->gen) {
60347       if (devinfo->is_haswell) {
60355       if (devinfo->is_g4x) {
60375 _3DSTATE_RS_CONSTANT_POINTER_CommandSubType_bits(const struct gen_device_info *devinfo)
60377    switch (devinfo->gen) {
60383       if (devinfo->is_haswell) {
60391       if (devinfo->is_g4x) {
60408 _3DSTATE_RS_CONSTANT_POINTER_CommandSubType_start(const struct gen_device_info *devinfo)
60410    switch (devinfo->gen) {
60416       if (devinfo->is_haswell) {
60424       if (devinfo->is_g4x) {
60444 _3DSTATE_RS_CONSTANT_POINTER_CommandType_bits(const struct gen_device_info *devinfo)
60446    switch (devinfo->gen) {
60452       if (devinfo->is_haswell) {
60460       if (devinfo->is_g4x) {
60477 _3DSTATE_RS_CONSTANT_POINTER_CommandType_start(const struct gen_device_info *devinfo)
60479    switch (devinfo->gen) {
60485       if (devinfo->is_haswell) {
60493       if (devinfo->is_g4x) {
60513 _3DSTATE_RS_CONSTANT_POINTER_DWordLength_bits(const struct gen_device_info *devinfo)
60515    switch (devinfo->gen) {
60521       if (devinfo->is_haswell) {
60529       if (devinfo->is_g4x) {
60546 _3DSTATE_RS_CONSTANT_POINTER_DWordLength_start(const struct gen_device_info *devinfo)
60548    switch (devinfo->gen) {
60554       if (devinfo->is_haswell) {
60562       if (devinfo->is_g4x) {
60582 _3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddress_bits(const struct gen_device_info *devinfo)
60584    switch (devinfo->gen) {
60590       if (devinfo->is_haswell) {
60598       if (devinfo->is_g4x) {
60615 _3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddress_start(const struct gen_device_info *devinfo)
60617    switch (devinfo->gen) {
60623       if (devinfo->is_haswell) {
60631       if (devinfo->is_g4x) {
60651 _3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddressHigh_bits(const struct gen_device_info *devinfo)
60653    switch (devinfo->gen) {
60659       if (devinfo->is_haswell) {
60667       if (devinfo->is_g4x) {
60684 _3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddressHigh_start(const struct gen_device_info *devinfo)
60686    switch (devinfo->gen) {
60692       if (devinfo->is_haswell) {
60700       if (devinfo->is_g4x) {
60720 _3DSTATE_RS_CONSTANT_POINTER_OperationLoadorStore_bits(const struct gen_device_info *devinfo)
60722    switch (devinfo->gen) {
60728       if (devinfo->is_haswell) {
60736       if (devinfo->is_g4x) {
60753 _3DSTATE_RS_CONSTANT_POINTER_OperationLoadorStore_start(const struct gen_device_info *devinfo)
60755    switch (devinfo->gen) {
60761       if (devinfo->is_haswell) {
60769       if (devinfo->is_g4x) {
60789 _3DSTATE_RS_CONSTANT_POINTER_ShaderSelect_bits(const struct gen_device_info *devinfo)
60791    switch (devinfo->gen) {
60797       if (devinfo->is_haswell) {
60805       if (devinfo->is_g4x) {
60822 _3DSTATE_RS_CONSTANT_POINTER_ShaderSelect_start(const struct gen_device_info *devinfo)
60824    switch (devinfo->gen) {
60830       if (devinfo->is_haswell) {
60838       if (devinfo->is_g4x) {
60868 _3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
60870    switch (devinfo->gen) {
60876       if (devinfo->is_haswell) {
60884       if (devinfo->is_g4x) {
60905 _3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_start(const struct gen_device_info *devinfo)
60907    switch (devinfo->gen) {
60913       if (devinfo->is_haswell) {
60921       if (devinfo->is_g4x) {
60945 _3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
60947    switch (devinfo->gen) {
60953       if (devinfo->is_haswell) {
60961       if (devinfo->is_g4x) {
60982 _3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
60984    switch (devinfo->gen) {
60990       if (devinfo->is_haswell) {
60998       if (devinfo->is_g4x) {
61022 _3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_bits(const struct gen_device_info *devinfo)
61024    switch (devinfo->gen) {
61030       if (devinfo->is_haswell) {
61038       if (devinfo->is_g4x) {
61059 _3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_start(const struct gen_device_info *devinfo)
61061    switch (devinfo->gen) {
61067       if (devinfo->is_haswell) {
61075       if (devinfo->is_g4x) {
61099 _3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_bits(const struct gen_device_info *devinfo)
61101    switch (devinfo->gen) {
61107       if (devinfo->is_haswell) {
61115       if (devinfo->is_g4x) {
61136 _3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_start(const struct gen_device_info *devinfo)
61138    switch (devinfo->gen) {
61144       if (devinfo->is_haswell) {
61152       if (devinfo->is_g4x) {
61176 _3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_bits(const struct gen_device_info *devinfo)
61178    switch (devinfo->gen) {
61184       if (devinfo->is_haswell) {
61192       if (devinfo->is_g4x) {
61213 _3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_start(const struct gen_device_info *devinfo)
61215    switch (devinfo->gen) {
61221       if (devinfo->is_haswell) {
61229       if (devinfo->is_g4x) {
61253 _3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_bits(const struct gen_device_info *devinfo)
61255    switch (devinfo->gen) {
61261       if (devinfo->is_haswell) {
61269       if (devinfo->is_g4x) {
61290 _3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_start(const struct gen_device_info *devinfo)
61292    switch (devinfo->gen) {
61298       if (devinfo->is_haswell) {
61306       if (devinfo->is_g4x) {
61336 _3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
61338    switch (devinfo->gen) {
61344       if (devinfo->is_haswell) {
61352       if (devinfo->is_g4x) {
61373 _3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_start(const struct gen_device_info *devinfo)
61375    switch (devinfo->gen) {
61381       if (devinfo->is_haswell) {
61389       if (devinfo->is_g4x) {
61413 _3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
61415    switch (devinfo->gen) {
61421       if (devinfo->is_haswell) {
61429       if (devinfo->is_g4x) {
61450 _3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
61452    switch (devinfo->gen) {
61458       if (devinfo->is_haswell) {
61466       if (devinfo->is_g4x) {
61490 _3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_bits(const struct gen_device_info *devinfo)
61492    switch (devinfo->gen) {
61498       if (devinfo->is_haswell) {
61506       if (devinfo->is_g4x) {
61527 _3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_start(const struct gen_device_info *devinfo)
61529    switch (devinfo->gen) {
61535       if (devinfo->is_haswell) {
61543       if (devinfo->is_g4x) {
61567 _3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_bits(const struct gen_device_info *devinfo)
61569    switch (devinfo->gen) {
61575       if (devinfo->is_haswell) {
61583       if (devinfo->is_g4x) {
61604 _3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_start(const struct gen_device_info *devinfo)
61606    switch (devinfo->gen) {
61612       if (devinfo->is_haswell) {
61620       if (devinfo->is_g4x) {
61644 _3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_bits(const struct gen_device_info *devinfo)
61646    switch (devinfo->gen) {
61652       if (devinfo->is_haswell) {
61660       if (devinfo->is_g4x) {
61681 _3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_start(const struct gen_device_info *devinfo)
61683    switch (devinfo->gen) {
61689       if (devinfo->is_haswell) {
61697       if (devinfo->is_g4x) {
61721 _3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_bits(const struct gen_device_info *devinfo)
61723    switch (devinfo->gen) {
61729       if (devinfo->is_haswell) {
61737       if (devinfo->is_g4x) {
61758 _3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_start(const struct gen_device_info *devinfo)
61760    switch (devinfo->gen) {
61766       if (devinfo->is_haswell) {
61774       if (devinfo->is_g4x) {
61798 _3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_bits(const struct gen_device_info *devinfo)
61800    switch (devinfo->gen) {
61806       if (devinfo->is_haswell) {
61814       if (devinfo->is_g4x) {
61835 _3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_start(const struct gen_device_info *devinfo)
61837    switch (devinfo->gen) {
61843       if (devinfo->is_haswell) {
61851       if (devinfo->is_g4x) {
61875 _3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_bits(const struct gen_device_info *devinfo)
61877    switch (devinfo->gen) {
61883       if (devinfo->is_haswell) {
61891       if (devinfo->is_g4x) {
61912 _3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_start(const struct gen_device_info *devinfo)
61914    switch (devinfo->gen) {
61920       if (devinfo->is_haswell) {
61928       if (devinfo->is_g4x) {
61952 _3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_bits(const struct gen_device_info *devinfo)
61954    switch (devinfo->gen) {
61960       if (devinfo->is_haswell) {
61968       if (devinfo->is_g4x) {
61989 _3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_start(const struct gen_device_info *devinfo)
61991    switch (devinfo->gen) {
61997       if (devinfo->is_haswell) {
62005       if (devinfo->is_g4x) {
62023 _3DSTATE_SAMPLER_STATE_POINTERS_length(const struct gen_device_info *devinfo)
62025    switch (devinfo->gen) {
62031       if (devinfo->is_haswell) {
62039       if (devinfo->is_g4x) {
62057 _3DSTATE_SAMPLER_STATE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
62059    switch (devinfo->gen) {
62065       if (devinfo->is_haswell) {
62073       if (devinfo->is_g4x) {
62088 _3DSTATE_SAMPLER_STATE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
62090    switch (devinfo->gen) {
62096       if (devinfo->is_haswell) {
62104       if (devinfo->is_g4x) {
62122 _3DSTATE_SAMPLER_STATE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
62124    switch (devinfo->gen) {
62130       if (devinfo->is_haswell) {
62138       if (devinfo->is_g4x) {
62153 _3DSTATE_SAMPLER_STATE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
62155    switch (devinfo->gen) {
62161       if (devinfo->is_haswell) {
62169       if (devinfo->is_g4x) {
62187 _3DSTATE_SAMPLER_STATE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
62189    switch (devinfo->gen) {
62195       if (devinfo->is_haswell) {
62203       if (devinfo->is_g4x) {
62218 _3DSTATE_SAMPLER_STATE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
62220    switch (devinfo->gen) {
62226       if (devinfo->is_haswell) {
62234       if (devinfo->is_g4x) {
62252 _3DSTATE_SAMPLER_STATE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
62254    switch (devinfo->gen) {
62260       if (devinfo->is_haswell) {
62268       if (devinfo->is_g4x) {
62283 _3DSTATE_SAMPLER_STATE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
62285    switch (devinfo->gen) {
62291       if (devinfo->is_haswell) {
62299       if (devinfo->is_g4x) {
62317 _3DSTATE_SAMPLER_STATE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
62319    switch (devinfo->gen) {
62325       if (devinfo->is_haswell) {
62333       if (devinfo->is_g4x) {
62348 _3DSTATE_SAMPLER_STATE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
62350    switch (devinfo->gen) {
62356       if (devinfo->is_haswell) {
62364       if (devinfo->is_g4x) {
62382 _3DSTATE_SAMPLER_STATE_POINTERS_GSSamplerStateChange_bits(const struct gen_device_info *devinfo)
62384    switch (devinfo->gen) {
62390       if (devinfo->is_haswell) {
62398       if (devinfo->is_g4x) {
62413 _3DSTATE_SAMPLER_STATE_POINTERS_GSSamplerStateChange_start(const struct gen_device_info *devinfo)
62415    switch (devinfo->gen) {
62421       if (devinfo->is_haswell) {
62429       if (devinfo->is_g4x) {
62447 _3DSTATE_SAMPLER_STATE_POINTERS_PSSamplerStateChange_bits(const struct gen_device_info *devinfo)
62449    switch (devinfo->gen) {
62455       if (devinfo->is_haswell) {
62463       if (devinfo->is_g4x) {
62478 _3DSTATE_SAMPLER_STATE_POINTERS_PSSamplerStateChange_start(const struct gen_device_info *devinfo)
62480    switch (devinfo->gen) {
62486       if (devinfo->is_haswell) {
62494       if (devinfo->is_g4x) {
62512 _3DSTATE_SAMPLER_STATE_POINTERS_PointertoGSSamplerState_bits(const struct gen_device_info *devinfo)
62514    switch (devinfo->gen) {
62520       if (devinfo->is_haswell) {
62528       if (devinfo->is_g4x) {
62543 _3DSTATE_SAMPLER_STATE_POINTERS_PointertoGSSamplerState_start(const struct gen_device_info *devinfo)
62545    switch (devinfo->gen) {
62551       if (devinfo->is_haswell) {
62559       if (devinfo->is_g4x) {
62577 _3DSTATE_SAMPLER_STATE_POINTERS_PointertoPSSamplerState_bits(const struct gen_device_info *devinfo)
62579    switch (devinfo->gen) {
62585       if (devinfo->is_haswell) {
62593       if (devinfo->is_g4x) {
62608 _3DSTATE_SAMPLER_STATE_POINTERS_PointertoPSSamplerState_start(const struct gen_device_info *devinfo)
62610    switch (devinfo->gen) {
62616       if (devinfo->is_haswell) {
62624       if (devinfo->is_g4x) {
62642 _3DSTATE_SAMPLER_STATE_POINTERS_PointertoVSSamplerState_bits(const struct gen_device_info *devinfo)
62644    switch (devinfo->gen) {
62650       if (devinfo->is_haswell) {
62658       if (devinfo->is_g4x) {
62673 _3DSTATE_SAMPLER_STATE_POINTERS_PointertoVSSamplerState_start(const struct gen_device_info *devinfo)
62675    switch (devinfo->gen) {
62681       if (devinfo->is_haswell) {
62689       if (devinfo->is_g4x) {
62707 _3DSTATE_SAMPLER_STATE_POINTERS_VSSamplerStateChange_bits(const struct gen_device_info *devinfo)
62709    switch (devinfo->gen) {
62715       if (devinfo->is_haswell) {
62723       if (devinfo->is_g4x) {
62738 _3DSTATE_SAMPLER_STATE_POINTERS_VSSamplerStateChange_start(const struct gen_device_info *devinfo)
62740    switch (devinfo->gen) {
62746       if (devinfo->is_haswell) {
62754       if (devinfo->is_g4x) {
62777 _3DSTATE_SAMPLER_STATE_POINTERS_DS_length(const struct gen_device_info *devinfo)
62779    switch (devinfo->gen) {
62785       if (devinfo->is_haswell) {
62793       if (devinfo->is_g4x) {
62816 _3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
62818    switch (devinfo->gen) {
62824       if (devinfo->is_haswell) {
62832       if (devinfo->is_g4x) {
62852 _3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
62854    switch (devinfo->gen) {
62860       if (devinfo->is_haswell) {
62868       if (devinfo->is_g4x) {
62891 _3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
62893    switch (devinfo->gen) {
62899       if (devinfo->is_haswell) {
62907       if (devinfo->is_g4x) {
62927 _3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
62929    switch (devinfo->gen) {
62935       if (devinfo->is_haswell) {
62943       if (devinfo->is_g4x) {
62966 _3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
62968    switch (devinfo->gen) {
62974       if (devinfo->is_haswell) {
62982       if (devinfo->is_g4x) {
63002 _3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_start(const struct gen_device_info *devinfo)
63004    switch (devinfo->gen) {
63010       if (devinfo->is_haswell) {
63018       if (devinfo->is_g4x) {
63041 _3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_bits(const struct gen_device_info *devinfo)
63043    switch (devinfo->gen) {
63049       if (devinfo->is_haswell) {
63057       if (devinfo->is_g4x) {
63077 _3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_start(const struct gen_device_info *devinfo)
63079    switch (devinfo->gen) {
63085       if (devinfo->is_haswell) {
63093       if (devinfo->is_g4x) {
63116 _3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_bits(const struct gen_device_info *devinfo)
63118    switch (devinfo->gen) {
63124       if (devinfo->is_haswell) {
63132       if (devinfo->is_g4x) {
63152 _3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_start(const struct gen_device_info *devinfo)
63154    switch (devinfo->gen) {
63160       if (devinfo->is_haswell) {
63168       if (devinfo->is_g4x) {
63191 _3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_bits(const struct gen_device_info *devinfo)
63193    switch (devinfo->gen) {
63199       if (devinfo->is_haswell) {
63207       if (devinfo->is_g4x) {
63227 _3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_start(const struct gen_device_info *devinfo)
63229    switch (devinfo->gen) {
63235       if (devinfo->is_haswell) {
63243       if (devinfo->is_g4x) {
63266 _3DSTATE_SAMPLER_STATE_POINTERS_GS_length(const struct gen_device_info *devinfo)
63268    switch (devinfo->gen) {
63274       if (devinfo->is_haswell) {
63282       if (devinfo->is_g4x) {
63305 _3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
63307    switch (devinfo->gen) {
63313       if (devinfo->is_haswell) {
63321       if (devinfo->is_g4x) {
63341 _3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
63343    switch (devinfo->gen) {
63349       if (devinfo->is_haswell) {
63357       if (devinfo->is_g4x) {
63380 _3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
63382    switch (devinfo->gen) {
63388       if (devinfo->is_haswell) {
63396       if (devinfo->is_g4x) {
63416 _3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
63418    switch (devinfo->gen) {
63424       if (devinfo->is_haswell) {
63432       if (devinfo->is_g4x) {
63455 _3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
63457    switch (devinfo->gen) {
63463       if (devinfo->is_haswell) {
63471       if (devinfo->is_g4x) {
63491 _3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_start(const struct gen_device_info *devinfo)
63493    switch (devinfo->gen) {
63499       if (devinfo->is_haswell) {
63507       if (devinfo->is_g4x) {
63530 _3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_bits(const struct gen_device_info *devinfo)
63532    switch (devinfo->gen) {
63538       if (devinfo->is_haswell) {
63546       if (devinfo->is_g4x) {
63566 _3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_start(const struct gen_device_info *devinfo)
63568    switch (devinfo->gen) {
63574       if (devinfo->is_haswell) {
63582       if (devinfo->is_g4x) {
63605 _3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_bits(const struct gen_device_info *devinfo)
63607    switch (devinfo->gen) {
63613       if (devinfo->is_haswell) {
63621       if (devinfo->is_g4x) {
63641 _3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_start(const struct gen_device_info *devinfo)
63643    switch (devinfo->gen) {
63649       if (devinfo->is_haswell) {
63657       if (devinfo->is_g4x) {
63680 _3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_bits(const struct gen_device_info *devinfo)
63682    switch (devinfo->gen) {
63688       if (devinfo->is_haswell) {
63696       if (devinfo->is_g4x) {
63716 _3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_start(const struct gen_device_info *devinfo)
63718    switch (devinfo->gen) {
63724       if (devinfo->is_haswell) {
63732       if (devinfo->is_g4x) {
63755 _3DSTATE_SAMPLER_STATE_POINTERS_HS_length(const struct gen_device_info *devinfo)
63757    switch (devinfo->gen) {
63763       if (devinfo->is_haswell) {
63771       if (devinfo->is_g4x) {
63794 _3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
63796    switch (devinfo->gen) {
63802       if (devinfo->is_haswell) {
63810       if (devinfo->is_g4x) {
63830 _3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
63832    switch (devinfo->gen) {
63838       if (devinfo->is_haswell) {
63846       if (devinfo->is_g4x) {
63869 _3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
63871    switch (devinfo->gen) {
63877       if (devinfo->is_haswell) {
63885       if (devinfo->is_g4x) {
63905 _3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
63907    switch (devinfo->gen) {
63913       if (devinfo->is_haswell) {
63921       if (devinfo->is_g4x) {
63944 _3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
63946    switch (devinfo->gen) {
63952       if (devinfo->is_haswell) {
63960       if (devinfo->is_g4x) {
63980 _3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_start(const struct gen_device_info *devinfo)
63982    switch (devinfo->gen) {
63988       if (devinfo->is_haswell) {
63996       if (devinfo->is_g4x) {
64019 _3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_bits(const struct gen_device_info *devinfo)
64021    switch (devinfo->gen) {
64027       if (devinfo->is_haswell) {
64035       if (devinfo->is_g4x) {
64055 _3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_start(const struct gen_device_info *devinfo)
64057    switch (devinfo->gen) {
64063       if (devinfo->is_haswell) {
64071       if (devinfo->is_g4x) {
64094 _3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_bits(const struct gen_device_info *devinfo)
64096    switch (devinfo->gen) {
64102       if (devinfo->is_haswell) {
64110       if (devinfo->is_g4x) {
64130 _3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_start(const struct gen_device_info *devinfo)
64132    switch (devinfo->gen) {
64138       if (devinfo->is_haswell) {
64146       if (devinfo->is_g4x) {
64169 _3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_bits(const struct gen_device_info *devinfo)
64171    switch (devinfo->gen) {
64177       if (devinfo->is_haswell) {
64185       if (devinfo->is_g4x) {
64205 _3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_start(const struct gen_device_info *devinfo)
64207    switch (devinfo->gen) {
64213       if (devinfo->is_haswell) {
64221       if (devinfo->is_g4x) {
64244 _3DSTATE_SAMPLER_STATE_POINTERS_PS_length(const struct gen_device_info *devinfo)
64246    switch (devinfo->gen) {
64252       if (devinfo->is_haswell) {
64260       if (devinfo->is_g4x) {
64283 _3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
64285    switch (devinfo->gen) {
64291       if (devinfo->is_haswell) {
64299       if (devinfo->is_g4x) {
64319 _3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
64321    switch (devinfo->gen) {
64327       if (devinfo->is_haswell) {
64335       if (devinfo->is_g4x) {
64358 _3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
64360    switch (devinfo->gen) {
64366       if (devinfo->is_haswell) {
64374       if (devinfo->is_g4x) {
64394 _3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
64396    switch (devinfo->gen) {
64402       if (devinfo->is_haswell) {
64410       if (devinfo->is_g4x) {
64433 _3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
64435    switch (devinfo->gen) {
64441       if (devinfo->is_haswell) {
64449       if (devinfo->is_g4x) {
64469 _3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_start(const struct gen_device_info *devinfo)
64471    switch (devinfo->gen) {
64477       if (devinfo->is_haswell) {
64485       if (devinfo->is_g4x) {
64508 _3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_bits(const struct gen_device_info *devinfo)
64510    switch (devinfo->gen) {
64516       if (devinfo->is_haswell) {
64524       if (devinfo->is_g4x) {
64544 _3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_start(const struct gen_device_info *devinfo)
64546    switch (devinfo->gen) {
64552       if (devinfo->is_haswell) {
64560       if (devinfo->is_g4x) {
64583 _3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_bits(const struct gen_device_info *devinfo)
64585    switch (devinfo->gen) {
64591       if (devinfo->is_haswell) {
64599       if (devinfo->is_g4x) {
64619 _3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_start(const struct gen_device_info *devinfo)
64621    switch (devinfo->gen) {
64627       if (devinfo->is_haswell) {
64635       if (devinfo->is_g4x) {
64658 _3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_bits(const struct gen_device_info *devinfo)
64660    switch (devinfo->gen) {
64666       if (devinfo->is_haswell) {
64674       if (devinfo->is_g4x) {
64694 _3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_start(const struct gen_device_info *devinfo)
64696    switch (devinfo->gen) {
64702       if (devinfo->is_haswell) {
64710       if (devinfo->is_g4x) {
64733 _3DSTATE_SAMPLER_STATE_POINTERS_VS_length(const struct gen_device_info *devinfo)
64735    switch (devinfo->gen) {
64741       if (devinfo->is_haswell) {
64749       if (devinfo->is_g4x) {
64772 _3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
64774    switch (devinfo->gen) {
64780       if (devinfo->is_haswell) {
64788       if (devinfo->is_g4x) {
64808 _3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
64810    switch (devinfo->gen) {
64816       if (devinfo->is_haswell) {
64824       if (devinfo->is_g4x) {
64847 _3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
64849    switch (devinfo->gen) {
64855       if (devinfo->is_haswell) {
64863       if (devinfo->is_g4x) {
64883 _3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
64885    switch (devinfo->gen) {
64891       if (devinfo->is_haswell) {
64899       if (devinfo->is_g4x) {
64922 _3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
64924    switch (devinfo->gen) {
64930       if (devinfo->is_haswell) {
64938       if (devinfo->is_g4x) {
64958 _3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_start(const struct gen_device_info *devinfo)
64960    switch (devinfo->gen) {
64966       if (devinfo->is_haswell) {
64974       if (devinfo->is_g4x) {
64997 _3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_bits(const struct gen_device_info *devinfo)
64999    switch (devinfo->gen) {
65005       if (devinfo->is_haswell) {
65013       if (devinfo->is_g4x) {
65033 _3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_start(const struct gen_device_info *devinfo)
65035    switch (devinfo->gen) {
65041       if (devinfo->is_haswell) {
65049       if (devinfo->is_g4x) {
65072 _3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_bits(const struct gen_device_info *devinfo)
65074    switch (devinfo->gen) {
65080       if (devinfo->is_haswell) {
65088       if (devinfo->is_g4x) {
65108 _3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_start(const struct gen_device_info *devinfo)
65110    switch (devinfo->gen) {
65116       if (devinfo->is_haswell) {
65124       if (devinfo->is_g4x) {
65147 _3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_bits(const struct gen_device_info *devinfo)
65149    switch (devinfo->gen) {
65155       if (devinfo->is_haswell) {
65163       if (devinfo->is_g4x) {
65183 _3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_start(const struct gen_device_info *devinfo)
65185    switch (devinfo->gen) {
65191       if (devinfo->is_haswell) {
65199       if (devinfo->is_g4x) {
65223 _3DSTATE_SAMPLE_MASK_length(const struct gen_device_info *devinfo)
65225    switch (devinfo->gen) {
65231       if (devinfo->is_haswell) {
65239       if (devinfo->is_g4x) {
65263 _3DSTATE_SAMPLE_MASK_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
65265    switch (devinfo->gen) {
65271       if (devinfo->is_haswell) {
65279       if (devinfo->is_g4x) {
65300 _3DSTATE_SAMPLE_MASK_3DCommandOpcode_start(const struct gen_device_info *devinfo)
65302    switch (devinfo->gen) {
65308       if (devinfo->is_haswell) {
65316       if (devinfo->is_g4x) {
65340 _3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
65342    switch (devinfo->gen) {
65348       if (devinfo->is_haswell) {
65356       if (devinfo->is_g4x) {
65377 _3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
65379    switch (devinfo->gen) {
65385       if (devinfo->is_haswell) {
65393       if (devinfo->is_g4x) {
65417 _3DSTATE_SAMPLE_MASK_CommandSubType_bits(const struct gen_device_info *devinfo)
65419    switch (devinfo->gen) {
65425       if (devinfo->is_haswell) {
65433       if (devinfo->is_g4x) {
65454 _3DSTATE_SAMPLE_MASK_CommandSubType_start(const struct gen_device_info *devinfo)
65456    switch (devinfo->gen) {
65462       if (devinfo->is_haswell) {
65470       if (devinfo->is_g4x) {
65494 _3DSTATE_SAMPLE_MASK_CommandType_bits(const struct gen_device_info *devinfo)
65496    switch (devinfo->gen) {
65502       if (devinfo->is_haswell) {
65510       if (devinfo->is_g4x) {
65531 _3DSTATE_SAMPLE_MASK_CommandType_start(const struct gen_device_info *devinfo)
65533    switch (devinfo->gen) {
65539       if (devinfo->is_haswell) {
65547       if (devinfo->is_g4x) {
65571 _3DSTATE_SAMPLE_MASK_DWordLength_bits(const struct gen_device_info *devinfo)
65573    switch (devinfo->gen) {
65579       if (devinfo->is_haswell) {
65587       if (devinfo->is_g4x) {
65608 _3DSTATE_SAMPLE_MASK_DWordLength_start(const struct gen_device_info *devinfo)
65610    switch (devinfo->gen) {
65616       if (devinfo->is_haswell) {
65624       if (devinfo->is_g4x) {
65648 _3DSTATE_SAMPLE_MASK_SampleMask_bits(const struct gen_device_info *devinfo)
65650    switch (devinfo->gen) {
65656       if (devinfo->is_haswell) {
65664       if (devinfo->is_g4x) {
65685 _3DSTATE_SAMPLE_MASK_SampleMask_start(const struct gen_device_info *devinfo)
65687    switch (devinfo->gen) {
65693       if (devinfo->is_haswell) {
65701       if (devinfo->is_g4x) {
65722 _3DSTATE_SAMPLE_PATTERN_length(const struct gen_device_info *devinfo)
65724    switch (devinfo->gen) {
65730       if (devinfo->is_haswell) {
65738       if (devinfo->is_g4x) {
65758 _3DSTATE_SAMPLE_PATTERN_16xSample0XOffset_bits(const struct gen_device_info *devinfo)
65760    switch (devinfo->gen) {
65766       if (devinfo->is_haswell) {
65774       if (devinfo->is_g4x) {
65791 _3DSTATE_SAMPLE_PATTERN_16xSample0XOffset_start(const struct gen_device_info *devinfo)
65793    switch (devinfo->gen) {
65799       if (devinfo->is_haswell) {
65807       if (devinfo->is_g4x) {
65827 _3DSTATE_SAMPLE_PATTERN_16xSample0YOffset_bits(const struct gen_device_info *devinfo)
65829    switch (devinfo->gen) {
65835       if (devinfo->is_haswell) {
65843       if (devinfo->is_g4x) {
65860 _3DSTATE_SAMPLE_PATTERN_16xSample0YOffset_start(const struct gen_device_info *devinfo)
65862    switch (devinfo->gen) {
65868       if (devinfo->is_haswell) {
65876       if (devinfo->is_g4x) {
65896 _3DSTATE_SAMPLE_PATTERN_16xSample1XOffset_bits(const struct gen_device_info *devinfo)
65898    switch (devinfo->gen) {
65904       if (devinfo->is_haswell) {
65912       if (devinfo->is_g4x) {
65929 _3DSTATE_SAMPLE_PATTERN_16xSample1XOffset_start(const struct gen_device_info *devinfo)
65931    switch (devinfo->gen) {
65937       if (devinfo->is_haswell) {
65945       if (devinfo->is_g4x) {
65965 _3DSTATE_SAMPLE_PATTERN_16xSample1YOffset_bits(const struct gen_device_info *devinfo)
65967    switch (devinfo->gen) {
65973       if (devinfo->is_haswell) {
65981       if (devinfo->is_g4x) {
65998 _3DSTATE_SAMPLE_PATTERN_16xSample1YOffset_start(const struct gen_device_info *devinfo)
66000    switch (devinfo->gen) {
66006       if (devinfo->is_haswell) {
66014       if (devinfo->is_g4x) {
66034 _3DSTATE_SAMPLE_PATTERN_16xSample10XOffset_bits(const struct gen_device_info *devinfo)
66036    switch (devinfo->gen) {
66042       if (devinfo->is_haswell) {
66050       if (devinfo->is_g4x) {
66067 _3DSTATE_SAMPLE_PATTERN_16xSample10XOffset_start(const struct gen_device_info *devinfo)
66069    switch (devinfo->gen) {
66075       if (devinfo->is_haswell) {
66083       if (devinfo->is_g4x) {
66103 _3DSTATE_SAMPLE_PATTERN_16xSample10YOffset_bits(const struct gen_device_info *devinfo)
66105    switch (devinfo->gen) {
66111       if (devinfo->is_haswell) {
66119       if (devinfo->is_g4x) {
66136 _3DSTATE_SAMPLE_PATTERN_16xSample10YOffset_start(const struct gen_device_info *devinfo)
66138    switch (devinfo->gen) {
66144       if (devinfo->is_haswell) {
66152       if (devinfo->is_g4x) {
66172 _3DSTATE_SAMPLE_PATTERN_16xSample11XOffset_bits(const struct gen_device_info *devinfo)
66174    switch (devinfo->gen) {
66180       if (devinfo->is_haswell) {
66188       if (devinfo->is_g4x) {
66205 _3DSTATE_SAMPLE_PATTERN_16xSample11XOffset_start(const struct gen_device_info *devinfo)
66207    switch (devinfo->gen) {
66213       if (devinfo->is_haswell) {
66221       if (devinfo->is_g4x) {
66241 _3DSTATE_SAMPLE_PATTERN_16xSample11YOffset_bits(const struct gen_device_info *devinfo)
66243    switch (devinfo->gen) {
66249       if (devinfo->is_haswell) {
66257       if (devinfo->is_g4x) {
66274 _3DSTATE_SAMPLE_PATTERN_16xSample11YOffset_start(const struct gen_device_info *devinfo)
66276    switch (devinfo->gen) {
66282       if (devinfo->is_haswell) {
66290       if (devinfo->is_g4x) {
66310 _3DSTATE_SAMPLE_PATTERN_16xSample12XOffset_bits(const struct gen_device_info *devinfo)
66312    switch (devinfo->gen) {
66318       if (devinfo->is_haswell) {
66326       if (devinfo->is_g4x) {
66343 _3DSTATE_SAMPLE_PATTERN_16xSample12XOffset_start(const struct gen_device_info *devinfo)
66345    switch (devinfo->gen) {
66351       if (devinfo->is_haswell) {
66359       if (devinfo->is_g4x) {
66379 _3DSTATE_SAMPLE_PATTERN_16xSample12YOffset_bits(const struct gen_device_info *devinfo)
66381    switch (devinfo->gen) {
66387       if (devinfo->is_haswell) {
66395       if (devinfo->is_g4x) {
66412 _3DSTATE_SAMPLE_PATTERN_16xSample12YOffset_start(const struct gen_device_info *devinfo)
66414    switch (devinfo->gen) {
66420       if (devinfo->is_haswell) {
66428       if (devinfo->is_g4x) {
66448 _3DSTATE_SAMPLE_PATTERN_16xSample13XOffset_bits(const struct gen_device_info *devinfo)
66450    switch (devinfo->gen) {
66456       if (devinfo->is_haswell) {
66464       if (devinfo->is_g4x) {
66481 _3DSTATE_SAMPLE_PATTERN_16xSample13XOffset_start(const struct gen_device_info *devinfo)
66483    switch (devinfo->gen) {
66489       if (devinfo->is_haswell) {
66497       if (devinfo->is_g4x) {
66517 _3DSTATE_SAMPLE_PATTERN_16xSample13YOffset_bits(const struct gen_device_info *devinfo)
66519    switch (devinfo->gen) {
66525       if (devinfo->is_haswell) {
66533       if (devinfo->is_g4x) {
66550 _3DSTATE_SAMPLE_PATTERN_16xSample13YOffset_start(const struct gen_device_info *devinfo)
66552    switch (devinfo->gen) {
66558       if (devinfo->is_haswell) {
66566       if (devinfo->is_g4x) {
66586 _3DSTATE_SAMPLE_PATTERN_16xSample14XOffset_bits(const struct gen_device_info *devinfo)
66588    switch (devinfo->gen) {
66594       if (devinfo->is_haswell) {
66602       if (devinfo->is_g4x) {
66619 _3DSTATE_SAMPLE_PATTERN_16xSample14XOffset_start(const struct gen_device_info *devinfo)
66621    switch (devinfo->gen) {
66627       if (devinfo->is_haswell) {
66635       if (devinfo->is_g4x) {
66655 _3DSTATE_SAMPLE_PATTERN_16xSample14YOffset_bits(const struct gen_device_info *devinfo)
66657    switch (devinfo->gen) {
66663       if (devinfo->is_haswell) {
66671       if (devinfo->is_g4x) {
66688 _3DSTATE_SAMPLE_PATTERN_16xSample14YOffset_start(const struct gen_device_info *devinfo)
66690    switch (devinfo->gen) {
66696       if (devinfo->is_haswell) {
66704       if (devinfo->is_g4x) {
66724 _3DSTATE_SAMPLE_PATTERN_16xSample15XOffset_bits(const struct gen_device_info *devinfo)
66726    switch (devinfo->gen) {
66732       if (devinfo->is_haswell) {
66740       if (devinfo->is_g4x) {
66757 _3DSTATE_SAMPLE_PATTERN_16xSample15XOffset_start(const struct gen_device_info *devinfo)
66759    switch (devinfo->gen) {
66765       if (devinfo->is_haswell) {
66773       if (devinfo->is_g4x) {
66793 _3DSTATE_SAMPLE_PATTERN_16xSample15YOffset_bits(const struct gen_device_info *devinfo)
66795    switch (devinfo->gen) {
66801       if (devinfo->is_haswell) {
66809       if (devinfo->is_g4x) {
66826 _3DSTATE_SAMPLE_PATTERN_16xSample15YOffset_start(const struct gen_device_info *devinfo)
66828    switch (devinfo->gen) {
66834       if (devinfo->is_haswell) {
66842       if (devinfo->is_g4x) {
66862 _3DSTATE_SAMPLE_PATTERN_16xSample2XOffset_bits(const struct gen_device_info *devinfo)
66864    switch (devinfo->gen) {
66870       if (devinfo->is_haswell) {
66878       if (devinfo->is_g4x) {
66895 _3DSTATE_SAMPLE_PATTERN_16xSample2XOffset_start(const struct gen_device_info *devinfo)
66897    switch (devinfo->gen) {
66903       if (devinfo->is_haswell) {
66911       if (devinfo->is_g4x) {
66931 _3DSTATE_SAMPLE_PATTERN_16xSample2YOffset_bits(const struct gen_device_info *devinfo)
66933    switch (devinfo->gen) {
66939       if (devinfo->is_haswell) {
66947       if (devinfo->is_g4x) {
66964 _3DSTATE_SAMPLE_PATTERN_16xSample2YOffset_start(const struct gen_device_info *devinfo)
66966    switch (devinfo->gen) {
66972       if (devinfo->is_haswell) {
66980       if (devinfo->is_g4x) {
67000 _3DSTATE_SAMPLE_PATTERN_16xSample3XOffset_bits(const struct gen_device_info *devinfo)
67002    switch (devinfo->gen) {
67008       if (devinfo->is_haswell) {
67016       if (devinfo->is_g4x) {
67033 _3DSTATE_SAMPLE_PATTERN_16xSample3XOffset_start(const struct gen_device_info *devinfo)
67035    switch (devinfo->gen) {
67041       if (devinfo->is_haswell) {
67049       if (devinfo->is_g4x) {
67069 _3DSTATE_SAMPLE_PATTERN_16xSample3YOffset_bits(const struct gen_device_info *devinfo)
67071    switch (devinfo->gen) {
67077       if (devinfo->is_haswell) {
67085       if (devinfo->is_g4x) {
67102 _3DSTATE_SAMPLE_PATTERN_16xSample3YOffset_start(const struct gen_device_info *devinfo)
67104    switch (devinfo->gen) {
67110       if (devinfo->is_haswell) {
67118       if (devinfo->is_g4x) {
67138 _3DSTATE_SAMPLE_PATTERN_16xSample4XOffset_bits(const struct gen_device_info *devinfo)
67140    switch (devinfo->gen) {
67146       if (devinfo->is_haswell) {
67154       if (devinfo->is_g4x) {
67171 _3DSTATE_SAMPLE_PATTERN_16xSample4XOffset_start(const struct gen_device_info *devinfo)
67173    switch (devinfo->gen) {
67179       if (devinfo->is_haswell) {
67187       if (devinfo->is_g4x) {
67207 _3DSTATE_SAMPLE_PATTERN_16xSample4YOffset_bits(const struct gen_device_info *devinfo)
67209    switch (devinfo->gen) {
67215       if (devinfo->is_haswell) {
67223       if (devinfo->is_g4x) {
67240 _3DSTATE_SAMPLE_PATTERN_16xSample4YOffset_start(const struct gen_device_info *devinfo)
67242    switch (devinfo->gen) {
67248       if (devinfo->is_haswell) {
67256       if (devinfo->is_g4x) {
67276 _3DSTATE_SAMPLE_PATTERN_16xSample5XOffset_bits(const struct gen_device_info *devinfo)
67278    switch (devinfo->gen) {
67284       if (devinfo->is_haswell) {
67292       if (devinfo->is_g4x) {
67309 _3DSTATE_SAMPLE_PATTERN_16xSample5XOffset_start(const struct gen_device_info *devinfo)
67311    switch (devinfo->gen) {
67317       if (devinfo->is_haswell) {
67325       if (devinfo->is_g4x) {
67345 _3DSTATE_SAMPLE_PATTERN_16xSample5YOffset_bits(const struct gen_device_info *devinfo)
67347    switch (devinfo->gen) {
67353       if (devinfo->is_haswell) {
67361       if (devinfo->is_g4x) {
67378 _3DSTATE_SAMPLE_PATTERN_16xSample5YOffset_start(const struct gen_device_info *devinfo)
67380    switch (devinfo->gen) {
67386       if (devinfo->is_haswell) {
67394       if (devinfo->is_g4x) {
67414 _3DSTATE_SAMPLE_PATTERN_16xSample6XOffset_bits(const struct gen_device_info *devinfo)
67416    switch (devinfo->gen) {
67422       if (devinfo->is_haswell) {
67430       if (devinfo->is_g4x) {
67447 _3DSTATE_SAMPLE_PATTERN_16xSample6XOffset_start(const struct gen_device_info *devinfo)
67449    switch (devinfo->gen) {
67455       if (devinfo->is_haswell) {
67463       if (devinfo->is_g4x) {
67483 _3DSTATE_SAMPLE_PATTERN_16xSample6YOffset_bits(const struct gen_device_info *devinfo)
67485    switch (devinfo->gen) {
67491       if (devinfo->is_haswell) {
67499       if (devinfo->is_g4x) {
67516 _3DSTATE_SAMPLE_PATTERN_16xSample6YOffset_start(const struct gen_device_info *devinfo)
67518    switch (devinfo->gen) {
67524       if (devinfo->is_haswell) {
67532       if (devinfo->is_g4x) {
67552 _3DSTATE_SAMPLE_PATTERN_16xSample7XOffset_bits(const struct gen_device_info *devinfo)
67554    switch (devinfo->gen) {
67560       if (devinfo->is_haswell) {
67568       if (devinfo->is_g4x) {
67585 _3DSTATE_SAMPLE_PATTERN_16xSample7XOffset_start(const struct gen_device_info *devinfo)
67587    switch (devinfo->gen) {
67593       if (devinfo->is_haswell) {
67601       if (devinfo->is_g4x) {
67621 _3DSTATE_SAMPLE_PATTERN_16xSample7YOffset_bits(const struct gen_device_info *devinfo)
67623    switch (devinfo->gen) {
67629       if (devinfo->is_haswell) {
67637       if (devinfo->is_g4x) {
67654 _3DSTATE_SAMPLE_PATTERN_16xSample7YOffset_start(const struct gen_device_info *devinfo)
67656    switch (devinfo->gen) {
67662       if (devinfo->is_haswell) {
67670       if (devinfo->is_g4x) {
67690 _3DSTATE_SAMPLE_PATTERN_16xSample8XOffset_bits(const struct gen_device_info *devinfo)
67692    switch (devinfo->gen) {
67698       if (devinfo->is_haswell) {
67706       if (devinfo->is_g4x) {
67723 _3DSTATE_SAMPLE_PATTERN_16xSample8XOffset_start(const struct gen_device_info *devinfo)
67725    switch (devinfo->gen) {
67731       if (devinfo->is_haswell) {
67739       if (devinfo->is_g4x) {
67759 _3DSTATE_SAMPLE_PATTERN_16xSample8YOffset_bits(const struct gen_device_info *devinfo)
67761    switch (devinfo->gen) {
67767       if (devinfo->is_haswell) {
67775       if (devinfo->is_g4x) {
67792 _3DSTATE_SAMPLE_PATTERN_16xSample8YOffset_start(const struct gen_device_info *devinfo)
67794    switch (devinfo->gen) {
67800       if (devinfo->is_haswell) {
67808       if (devinfo->is_g4x) {
67828 _3DSTATE_SAMPLE_PATTERN_16xSample9XOffset_bits(const struct gen_device_info *devinfo)
67830    switch (devinfo->gen) {
67836       if (devinfo->is_haswell) {
67844       if (devinfo->is_g4x) {
67861 _3DSTATE_SAMPLE_PATTERN_16xSample9XOffset_start(const struct gen_device_info *devinfo)
67863    switch (devinfo->gen) {
67869       if (devinfo->is_haswell) {
67877       if (devinfo->is_g4x) {
67897 _3DSTATE_SAMPLE_PATTERN_16xSample9YOffset_bits(const struct gen_device_info *devinfo)
67899    switch (devinfo->gen) {
67905       if (devinfo->is_haswell) {
67913       if (devinfo->is_g4x) {
67930 _3DSTATE_SAMPLE_PATTERN_16xSample9YOffset_start(const struct gen_device_info *devinfo)
67932    switch (devinfo->gen) {
67938       if (devinfo->is_haswell) {
67946       if (devinfo->is_g4x) {
67967 _3DSTATE_SAMPLE_PATTERN_1xSample0XOffset_bits(const struct gen_device_info *devinfo)
67969    switch (devinfo->gen) {
67975       if (devinfo->is_haswell) {
67983       if (devinfo->is_g4x) {
68001 _3DSTATE_SAMPLE_PATTERN_1xSample0XOffset_start(const struct gen_device_info *devinfo)
68003    switch (devinfo->gen) {
68009       if (devinfo->is_haswell) {
68017       if (devinfo->is_g4x) {
68038 _3DSTATE_SAMPLE_PATTERN_1xSample0YOffset_bits(const struct gen_device_info *devinfo)
68040    switch (devinfo->gen) {
68046       if (devinfo->is_haswell) {
68054       if (devinfo->is_g4x) {
68072 _3DSTATE_SAMPLE_PATTERN_1xSample0YOffset_start(const struct gen_device_info *devinfo)
68074    switch (devinfo->gen) {
68080       if (devinfo->is_haswell) {
68088       if (devinfo->is_g4x) {
68109 _3DSTATE_SAMPLE_PATTERN_2xSample0XOffset_bits(const struct gen_device_info *devinfo)
68111    switch (devinfo->gen) {
68117       if (devinfo->is_haswell) {
68125       if (devinfo->is_g4x) {
68143 _3DSTATE_SAMPLE_PATTERN_2xSample0XOffset_start(const struct gen_device_info *devinfo)
68145    switch (devinfo->gen) {
68151       if (devinfo->is_haswell) {
68159       if (devinfo->is_g4x) {
68180 _3DSTATE_SAMPLE_PATTERN_2xSample0YOffset_bits(const struct gen_device_info *devinfo)
68182    switch (devinfo->gen) {
68188       if (devinfo->is_haswell) {
68196       if (devinfo->is_g4x) {
68214 _3DSTATE_SAMPLE_PATTERN_2xSample0YOffset_start(const struct gen_device_info *devinfo)
68216    switch (devinfo->gen) {
68222       if (devinfo->is_haswell) {
68230       if (devinfo->is_g4x) {
68251 _3DSTATE_SAMPLE_PATTERN_2xSample1XOffset_bits(const struct gen_device_info *devinfo)
68253    switch (devinfo->gen) {
68259       if (devinfo->is_haswell) {
68267       if (devinfo->is_g4x) {
68285 _3DSTATE_SAMPLE_PATTERN_2xSample1XOffset_start(const struct gen_device_info *devinfo)
68287    switch (devinfo->gen) {
68293       if (devinfo->is_haswell) {
68301       if (devinfo->is_g4x) {
68322 _3DSTATE_SAMPLE_PATTERN_2xSample1YOffset_bits(const struct gen_device_info *devinfo)
68324    switch (devinfo->gen) {
68330       if (devinfo->is_haswell) {
68338       if (devinfo->is_g4x) {
68356 _3DSTATE_SAMPLE_PATTERN_2xSample1YOffset_start(const struct gen_device_info *devinfo)
68358    switch (devinfo->gen) {
68364       if (devinfo->is_haswell) {
68372       if (devinfo->is_g4x) {
68393 _3DSTATE_SAMPLE_PATTERN_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
68395    switch (devinfo->gen) {
68401       if (devinfo->is_haswell) {
68409       if (devinfo->is_g4x) {
68427 _3DSTATE_SAMPLE_PATTERN_3DCommandOpcode_start(const struct gen_device_info *devinfo)
68429    switch (devinfo->gen) {
68435       if (devinfo->is_haswell) {
68443       if (devinfo->is_g4x) {
68464 _3DSTATE_SAMPLE_PATTERN_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
68466    switch (devinfo->gen) {
68472       if (devinfo->is_haswell) {
68480       if (devinfo->is_g4x) {
68498 _3DSTATE_SAMPLE_PATTERN_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
68500    switch (devinfo->gen) {
68506       if (devinfo->is_haswell) {
68514       if (devinfo->is_g4x) {
68535 _3DSTATE_SAMPLE_PATTERN_4xSample0XOffset_bits(const struct gen_device_info *devinfo)
68537    switch (devinfo->gen) {
68543       if (devinfo->is_haswell) {
68551       if (devinfo->is_g4x) {
68569 _3DSTATE_SAMPLE_PATTERN_4xSample0XOffset_start(const struct gen_device_info *devinfo)
68571    switch (devinfo->gen) {
68577       if (devinfo->is_haswell) {
68585       if (devinfo->is_g4x) {
68606 _3DSTATE_SAMPLE_PATTERN_4xSample0YOffset_bits(const struct gen_device_info *devinfo)
68608    switch (devinfo->gen) {
68614       if (devinfo->is_haswell) {
68622       if (devinfo->is_g4x) {
68640 _3DSTATE_SAMPLE_PATTERN_4xSample0YOffset_start(const struct gen_device_info *devinfo)
68642    switch (devinfo->gen) {
68648       if (devinfo->is_haswell) {
68656       if (devinfo->is_g4x) {
68677 _3DSTATE_SAMPLE_PATTERN_4xSample1XOffset_bits(const struct gen_device_info *devinfo)
68679    switch (devinfo->gen) {
68685       if (devinfo->is_haswell) {
68693       if (devinfo->is_g4x) {
68711 _3DSTATE_SAMPLE_PATTERN_4xSample1XOffset_start(const struct gen_device_info *devinfo)
68713    switch (devinfo->gen) {
68719       if (devinfo->is_haswell) {
68727       if (devinfo->is_g4x) {
68748 _3DSTATE_SAMPLE_PATTERN_4xSample1YOffset_bits(const struct gen_device_info *devinfo)
68750    switch (devinfo->gen) {
68756       if (devinfo->is_haswell) {
68764       if (devinfo->is_g4x) {
68782 _3DSTATE_SAMPLE_PATTERN_4xSample1YOffset_start(const struct gen_device_info *devinfo)
68784    switch (devinfo->gen) {
68790       if (devinfo->is_haswell) {
68798       if (devinfo->is_g4x) {
68819 _3DSTATE_SAMPLE_PATTERN_4xSample2XOffset_bits(const struct gen_device_info *devinfo)
68821    switch (devinfo->gen) {
68827       if (devinfo->is_haswell) {
68835       if (devinfo->is_g4x) {
68853 _3DSTATE_SAMPLE_PATTERN_4xSample2XOffset_start(const struct gen_device_info *devinfo)
68855    switch (devinfo->gen) {
68861       if (devinfo->is_haswell) {
68869       if (devinfo->is_g4x) {
68890 _3DSTATE_SAMPLE_PATTERN_4xSample2YOffset_bits(const struct gen_device_info *devinfo)
68892    switch (devinfo->gen) {
68898       if (devinfo->is_haswell) {
68906       if (devinfo->is_g4x) {
68924 _3DSTATE_SAMPLE_PATTERN_4xSample2YOffset_start(const struct gen_device_info *devinfo)
68926    switch (devinfo->gen) {
68932       if (devinfo->is_haswell) {
68940       if (devinfo->is_g4x) {
68961 _3DSTATE_SAMPLE_PATTERN_4xSample3XOffset_bits(const struct gen_device_info *devinfo)
68963    switch (devinfo->gen) {
68969       if (devinfo->is_haswell) {
68977       if (devinfo->is_g4x) {
68995 _3DSTATE_SAMPLE_PATTERN_4xSample3XOffset_start(const struct gen_device_info *devinfo)
68997    switch (devinfo->gen) {
69003       if (devinfo->is_haswell) {
69011       if (devinfo->is_g4x) {
69032 _3DSTATE_SAMPLE_PATTERN_4xSample3YOffset_bits(const struct gen_device_info *devinfo)
69034    switch (devinfo->gen) {
69040       if (devinfo->is_haswell) {
69048       if (devinfo->is_g4x) {
69066 _3DSTATE_SAMPLE_PATTERN_4xSample3YOffset_start(const struct gen_device_info *devinfo)
69068    switch (devinfo->gen) {
69074       if (devinfo->is_haswell) {
69082       if (devinfo->is_g4x) {
69103 _3DSTATE_SAMPLE_PATTERN_8xSample0XOffset_bits(const struct gen_device_info *devinfo)
69105    switch (devinfo->gen) {
69111       if (devinfo->is_haswell) {
69119       if (devinfo->is_g4x) {
69137 _3DSTATE_SAMPLE_PATTERN_8xSample0XOffset_start(const struct gen_device_info *devinfo)
69139    switch (devinfo->gen) {
69145       if (devinfo->is_haswell) {
69153       if (devinfo->is_g4x) {
69174 _3DSTATE_SAMPLE_PATTERN_8xSample0YOffset_bits(const struct gen_device_info *devinfo)
69176    switch (devinfo->gen) {
69182       if (devinfo->is_haswell) {
69190       if (devinfo->is_g4x) {
69208 _3DSTATE_SAMPLE_PATTERN_8xSample0YOffset_start(const struct gen_device_info *devinfo)
69210    switch (devinfo->gen) {
69216       if (devinfo->is_haswell) {
69224       if (devinfo->is_g4x) {
69245 _3DSTATE_SAMPLE_PATTERN_8xSample1XOffset_bits(const struct gen_device_info *devinfo)
69247    switch (devinfo->gen) {
69253       if (devinfo->is_haswell) {
69261       if (devinfo->is_g4x) {
69279 _3DSTATE_SAMPLE_PATTERN_8xSample1XOffset_start(const struct gen_device_info *devinfo)
69281    switch (devinfo->gen) {
69287       if (devinfo->is_haswell) {
69295       if (devinfo->is_g4x) {
69316 _3DSTATE_SAMPLE_PATTERN_8xSample1YOffset_bits(const struct gen_device_info *devinfo)
69318    switch (devinfo->gen) {
69324       if (devinfo->is_haswell) {
69332       if (devinfo->is_g4x) {
69350 _3DSTATE_SAMPLE_PATTERN_8xSample1YOffset_start(const struct gen_device_info *devinfo)
69352    switch (devinfo->gen) {
69358       if (devinfo->is_haswell) {
69366       if (devinfo->is_g4x) {
69387 _3DSTATE_SAMPLE_PATTERN_8xSample2XOffset_bits(const struct gen_device_info *devinfo)
69389    switch (devinfo->gen) {
69395       if (devinfo->is_haswell) {
69403       if (devinfo->is_g4x) {
69421 _3DSTATE_SAMPLE_PATTERN_8xSample2XOffset_start(const struct gen_device_info *devinfo)
69423    switch (devinfo->gen) {
69429       if (devinfo->is_haswell) {
69437       if (devinfo->is_g4x) {
69458 _3DSTATE_SAMPLE_PATTERN_8xSample2YOffset_bits(const struct gen_device_info *devinfo)
69460    switch (devinfo->gen) {
69466       if (devinfo->is_haswell) {
69474       if (devinfo->is_g4x) {
69492 _3DSTATE_SAMPLE_PATTERN_8xSample2YOffset_start(const struct gen_device_info *devinfo)
69494    switch (devinfo->gen) {
69500       if (devinfo->is_haswell) {
69508       if (devinfo->is_g4x) {
69529 _3DSTATE_SAMPLE_PATTERN_8xSample3XOffset_bits(const struct gen_device_info *devinfo)
69531    switch (devinfo->gen) {
69537       if (devinfo->is_haswell) {
69545       if (devinfo->is_g4x) {
69563 _3DSTATE_SAMPLE_PATTERN_8xSample3XOffset_start(const struct gen_device_info *devinfo)
69565    switch (devinfo->gen) {
69571       if (devinfo->is_haswell) {
69579       if (devinfo->is_g4x) {
69600 _3DSTATE_SAMPLE_PATTERN_8xSample3YOffset_bits(const struct gen_device_info *devinfo)
69602    switch (devinfo->gen) {
69608       if (devinfo->is_haswell) {
69616       if (devinfo->is_g4x) {
69634 _3DSTATE_SAMPLE_PATTERN_8xSample3YOffset_start(const struct gen_device_info *devinfo)
69636    switch (devinfo->gen) {
69642       if (devinfo->is_haswell) {
69650       if (devinfo->is_g4x) {
69671 _3DSTATE_SAMPLE_PATTERN_8xSample4XOffset_bits(const struct gen_device_info *devinfo)
69673    switch (devinfo->gen) {
69679       if (devinfo->is_haswell) {
69687       if (devinfo->is_g4x) {
69705 _3DSTATE_SAMPLE_PATTERN_8xSample4XOffset_start(const struct gen_device_info *devinfo)
69707    switch (devinfo->gen) {
69713       if (devinfo->is_haswell) {
69721       if (devinfo->is_g4x) {
69742 _3DSTATE_SAMPLE_PATTERN_8xSample4YOffset_bits(const struct gen_device_info *devinfo)
69744    switch (devinfo->gen) {
69750       if (devinfo->is_haswell) {
69758       if (devinfo->is_g4x) {
69776 _3DSTATE_SAMPLE_PATTERN_8xSample4YOffset_start(const struct gen_device_info *devinfo)
69778    switch (devinfo->gen) {
69784       if (devinfo->is_haswell) {
69792       if (devinfo->is_g4x) {
69813 _3DSTATE_SAMPLE_PATTERN_8xSample5XOffset_bits(const struct gen_device_info *devinfo)
69815    switch (devinfo->gen) {
69821       if (devinfo->is_haswell) {
69829       if (devinfo->is_g4x) {
69847 _3DSTATE_SAMPLE_PATTERN_8xSample5XOffset_start(const struct gen_device_info *devinfo)
69849    switch (devinfo->gen) {
69855       if (devinfo->is_haswell) {
69863       if (devinfo->is_g4x) {
69884 _3DSTATE_SAMPLE_PATTERN_8xSample5YOffset_bits(const struct gen_device_info *devinfo)
69886    switch (devinfo->gen) {
69892       if (devinfo->is_haswell) {
69900       if (devinfo->is_g4x) {
69918 _3DSTATE_SAMPLE_PATTERN_8xSample5YOffset_start(const struct gen_device_info *devinfo)
69920    switch (devinfo->gen) {
69926       if (devinfo->is_haswell) {
69934       if (devinfo->is_g4x) {
69955 _3DSTATE_SAMPLE_PATTERN_8xSample6XOffset_bits(const struct gen_device_info *devinfo)
69957    switch (devinfo->gen) {
69963       if (devinfo->is_haswell) {
69971       if (devinfo->is_g4x) {
69989 _3DSTATE_SAMPLE_PATTERN_8xSample6XOffset_start(const struct gen_device_info *devinfo)
69991    switch (devinfo->gen) {
69997       if (devinfo->is_haswell) {
70005       if (devinfo->is_g4x) {
70026 _3DSTATE_SAMPLE_PATTERN_8xSample6YOffset_bits(const struct gen_device_info *devinfo)
70028    switch (devinfo->gen) {
70034       if (devinfo->is_haswell) {
70042       if (devinfo->is_g4x) {
70060 _3DSTATE_SAMPLE_PATTERN_8xSample6YOffset_start(const struct gen_device_info *devinfo)
70062    switch (devinfo->gen) {
70068       if (devinfo->is_haswell) {
70076       if (devinfo->is_g4x) {
70097 _3DSTATE_SAMPLE_PATTERN_8xSample7XOffset_bits(const struct gen_device_info *devinfo)
70099    switch (devinfo->gen) {
70105       if (devinfo->is_haswell) {
70113       if (devinfo->is_g4x) {
70131 _3DSTATE_SAMPLE_PATTERN_8xSample7XOffset_start(const struct gen_device_info *devinfo)
70133    switch (devinfo->gen) {
70139       if (devinfo->is_haswell) {
70147       if (devinfo->is_g4x) {
70168 _3DSTATE_SAMPLE_PATTERN_8xSample7YOffset_bits(const struct gen_device_info *devinfo)
70170    switch (devinfo->gen) {
70176       if (devinfo->is_haswell) {
70184       if (devinfo->is_g4x) {
70202 _3DSTATE_SAMPLE_PATTERN_8xSample7YOffset_start(const struct gen_device_info *devinfo)
70204    switch (devinfo->gen) {
70210       if (devinfo->is_haswell) {
70218       if (devinfo->is_g4x) {
70239 _3DSTATE_SAMPLE_PATTERN_CommandSubType_bits(const struct gen_device_info *devinfo)
70241    switch (devinfo->gen) {
70247       if (devinfo->is_haswell) {
70255       if (devinfo->is_g4x) {
70273 _3DSTATE_SAMPLE_PATTERN_CommandSubType_start(const struct gen_device_info *devinfo)
70275    switch (devinfo->gen) {
70281       if (devinfo->is_haswell) {
70289       if (devinfo->is_g4x) {
70310 _3DSTATE_SAMPLE_PATTERN_CommandType_bits(const struct gen_device_info *devinfo)
70312    switch (devinfo->gen) {
70318       if (devinfo->is_haswell) {
70326       if (devinfo->is_g4x) {
70344 _3DSTATE_SAMPLE_PATTERN_CommandType_start(const struct gen_device_info *devinfo)
70346    switch (devinfo->gen) {
70352       if (devinfo->is_haswell) {
70360       if (devinfo->is_g4x) {
70381 _3DSTATE_SAMPLE_PATTERN_DWordLength_bits(const struct gen_device_info *devinfo)
70383    switch (devinfo->gen) {
70389       if (devinfo->is_haswell) {
70397       if (devinfo->is_g4x) {
70415 _3DSTATE_SAMPLE_PATTERN_DWordLength_start(const struct gen_device_info *devinfo)
70417    switch (devinfo->gen) {
70423       if (devinfo->is_haswell) {
70431       if (devinfo->is_g4x) {
70454 _3DSTATE_SBE_length(const struct gen_device_info *devinfo)
70456    switch (devinfo->gen) {
70462       if (devinfo->is_haswell) {
70470       if (devinfo->is_g4x) {
70493 _3DSTATE_SBE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
70495    switch (devinfo->gen) {
70501       if (devinfo->is_haswell) {
70509       if (devinfo->is_g4x) {
70529 _3DSTATE_SBE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
70531    switch (devinfo->gen) {
70537       if (devinfo->is_haswell) {
70545       if (devinfo->is_g4x) {
70568 _3DSTATE_SBE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
70570    switch (devinfo->gen) {
70576       if (devinfo->is_haswell) {
70584       if (devinfo->is_g4x) {
70604 _3DSTATE_SBE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
70606    switch (devinfo->gen) {
70612       if (devinfo->is_haswell) {
70620       if (devinfo->is_g4x) {
70639 _3DSTATE_SBE_Attribute_bits(const struct gen_device_info *devinfo)
70641    switch (devinfo->gen) {
70647       if (devinfo->is_haswell) {
70655       if (devinfo->is_g4x) {
70671 _3DSTATE_SBE_Attribute_start(const struct gen_device_info *devinfo)
70673    switch (devinfo->gen) {
70679       if (devinfo->is_haswell) {
70687       if (devinfo->is_g4x) {
70706 _3DSTATE_SBE_Attribute0WrapShortestEnables_bits(const struct gen_device_info *devinfo)
70708    switch (devinfo->gen) {
70714       if (devinfo->is_haswell) {
70722       if (devinfo->is_g4x) {
70738 _3DSTATE_SBE_Attribute0WrapShortestEnables_start(const struct gen_device_info *devinfo)
70740    switch (devinfo->gen) {
70746       if (devinfo->is_haswell) {
70754       if (devinfo->is_g4x) {
70773 _3DSTATE_SBE_Attribute1WrapShortestEnables_bits(const struct gen_device_info *devinfo)
70775    switch (devinfo->gen) {
70781       if (devinfo->is_haswell) {
70789       if (devinfo->is_g4x) {
70805 _3DSTATE_SBE_Attribute1WrapShortestEnables_start(const struct gen_device_info *devinfo)
70807    switch (devinfo->gen) {
70813       if (devinfo->is_haswell) {
70821       if (devinfo->is_g4x) {
70840 _3DSTATE_SBE_Attribute10WrapShortestEnables_bits(const struct gen_device_info *devinfo)
70842    switch (devinfo->gen) {
70848       if (devinfo->is_haswell) {
70856       if (devinfo->is_g4x) {
70872 _3DSTATE_SBE_Attribute10WrapShortestEnables_start(const struct gen_device_info *devinfo)
70874    switch (devinfo->gen) {
70880       if (devinfo->is_haswell) {
70888       if (devinfo->is_g4x) {
70907 _3DSTATE_SBE_Attribute11WrapShortestEnables_bits(const struct gen_device_info *devinfo)
70909    switch (devinfo->gen) {
70915       if (devinfo->is_haswell) {
70923       if (devinfo->is_g4x) {
70939 _3DSTATE_SBE_Attribute11WrapShortestEnables_start(const struct gen_device_info *devinfo)
70941    switch (devinfo->gen) {
70947       if (devinfo->is_haswell) {
70955       if (devinfo->is_g4x) {
70974 _3DSTATE_SBE_Attribute12WrapShortestEnables_bits(const struct gen_device_info *devinfo)
70976    switch (devinfo->gen) {
70982       if (devinfo->is_haswell) {
70990       if (devinfo->is_g4x) {
71006 _3DSTATE_SBE_Attribute12WrapShortestEnables_start(const struct gen_device_info *devinfo)
71008    switch (devinfo->gen) {
71014       if (devinfo->is_haswell) {
71022       if (devinfo->is_g4x) {
71041 _3DSTATE_SBE_Attribute13WrapShortestEnables_bits(const struct gen_device_info *devinfo)
71043    switch (devinfo->gen) {
71049       if (devinfo->is_haswell) {
71057       if (devinfo->is_g4x) {
71073 _3DSTATE_SBE_Attribute13WrapShortestEnables_start(const struct gen_device_info *devinfo)
71075    switch (devinfo->gen) {
71081       if (devinfo->is_haswell) {
71089       if (devinfo->is_g4x) {
71108 _3DSTATE_SBE_Attribute14WrapShortestEnables_bits(const struct gen_device_info *devinfo)
71110    switch (devinfo->gen) {
71116       if (devinfo->is_haswell) {
71124       if (devinfo->is_g4x) {
71140 _3DSTATE_SBE_Attribute14WrapShortestEnables_start(const struct gen_device_info *devinfo)
71142    switch (devinfo->gen) {
71148       if (devinfo->is_haswell) {
71156       if (devinfo->is_g4x) {
71175 _3DSTATE_SBE_Attribute15WrapShortestEnables_bits(const struct gen_device_info *devinfo)
71177    switch (devinfo->gen) {
71183       if (devinfo->is_haswell) {
71191       if (devinfo->is_g4x) {
71207 _3DSTATE_SBE_Attribute15WrapShortestEnables_start(const struct gen_device_info *devinfo)
71209    switch (devinfo->gen) {
71215       if (devinfo->is_haswell) {
71223       if (devinfo->is_g4x) {
71242 _3DSTATE_SBE_Attribute2WrapShortestEnables_bits(const struct gen_device_info *devinfo)
71244    switch (devinfo->gen) {
71250       if (devinfo->is_haswell) {
71258       if (devinfo->is_g4x) {
71274 _3DSTATE_SBE_Attribute2WrapShortestEnables_start(const struct gen_device_info *devinfo)
71276    switch (devinfo->gen) {
71282       if (devinfo->is_haswell) {
71290       if (devinfo->is_g4x) {
71309 _3DSTATE_SBE_Attribute3WrapShortestEnables_bits(const struct gen_device_info *devinfo)
71311    switch (devinfo->gen) {
71317       if (devinfo->is_haswell) {
71325       if (devinfo->is_g4x) {
71341 _3DSTATE_SBE_Attribute3WrapShortestEnables_start(const struct gen_device_info *devinfo)
71343    switch (devinfo->gen) {
71349       if (devinfo->is_haswell) {
71357       if (devinfo->is_g4x) {
71376 _3DSTATE_SBE_Attribute4WrapShortestEnables_bits(const struct gen_device_info *devinfo)
71378    switch (devinfo->gen) {
71384       if (devinfo->is_haswell) {
71392       if (devinfo->is_g4x) {
71408 _3DSTATE_SBE_Attribute4WrapShortestEnables_start(const struct gen_device_info *devinfo)
71410    switch (devinfo->gen) {
71416       if (devinfo->is_haswell) {
71424       if (devinfo->is_g4x) {
71443 _3DSTATE_SBE_Attribute5WrapShortestEnables_bits(const struct gen_device_info *devinfo)
71445    switch (devinfo->gen) {
71451       if (devinfo->is_haswell) {
71459       if (devinfo->is_g4x) {
71475 _3DSTATE_SBE_Attribute5WrapShortestEnables_start(const struct gen_device_info *devinfo)
71477    switch (devinfo->gen) {
71483       if (devinfo->is_haswell) {
71491       if (devinfo->is_g4x) {
71510 _3DSTATE_SBE_Attribute6WrapShortestEnables_bits(const struct gen_device_info *devinfo)
71512    switch (devinfo->gen) {
71518       if (devinfo->is_haswell) {
71526       if (devinfo->is_g4x) {
71542 _3DSTATE_SBE_Attribute6WrapShortestEnables_start(const struct gen_device_info *devinfo)
71544    switch (devinfo->gen) {
71550       if (devinfo->is_haswell) {
71558       if (devinfo->is_g4x) {
71577 _3DSTATE_SBE_Attribute7WrapShortestEnables_bits(const struct gen_device_info *devinfo)
71579    switch (devinfo->gen) {
71585       if (devinfo->is_haswell) {
71593       if (devinfo->is_g4x) {
71609 _3DSTATE_SBE_Attribute7WrapShortestEnables_start(const struct gen_device_info *devinfo)
71611    switch (devinfo->gen) {
71617       if (devinfo->is_haswell) {
71625       if (devinfo->is_g4x) {
71644 _3DSTATE_SBE_Attribute8WrapShortestEnables_bits(const struct gen_device_info *devinfo)
71646    switch (devinfo->gen) {
71652       if (devinfo->is_haswell) {
71660       if (devinfo->is_g4x) {
71676 _3DSTATE_SBE_Attribute8WrapShortestEnables_start(const struct gen_device_info *devinfo)
71678    switch (devinfo->gen) {
71684       if (devinfo->is_haswell) {
71692       if (devinfo->is_g4x) {
71711 _3DSTATE_SBE_Attribute9WrapShortestEnables_bits(const struct gen_device_info *devinfo)
71713    switch (devinfo->gen) {
71719       if (devinfo->is_haswell) {
71727       if (devinfo->is_g4x) {
71743 _3DSTATE_SBE_Attribute9WrapShortestEnables_start(const struct gen_device_info *devinfo)
71745    switch (devinfo->gen) {
71751       if (devinfo->is_haswell) {
71759       if (devinfo->is_g4x) {
71779 _3DSTATE_SBE_AttributeActiveComponentFormat_bits(const struct gen_device_info *devinfo)
71781    switch (devinfo->gen) {
71787       if (devinfo->is_haswell) {
71795       if (devinfo->is_g4x) {
71812 _3DSTATE_SBE_AttributeActiveComponentFormat_start(const struct gen_device_info *devinfo)
71814    switch (devinfo->gen) {
71820       if (devinfo->is_haswell) {
71828       if (devinfo->is_g4x) {
71847 _3DSTATE_SBE_AttributeSwizzleControlMode_bits(const struct gen_device_info *devinfo)
71849    switch (devinfo->gen) {
71855       if (devinfo->is_haswell) {
71863       if (devinfo->is_g4x) {
71879 _3DSTATE_SBE_AttributeSwizzleControlMode_start(const struct gen_device_info *devinfo)
71881    switch (devinfo->gen) {
71887       if (devinfo->is_haswell) {
71895       if (devinfo->is_g4x) {
71918 _3DSTATE_SBE_AttributeSwizzleEnable_bits(const struct gen_device_info *devinfo)
71920    switch (devinfo->gen) {
71926       if (devinfo->is_haswell) {
71934       if (devinfo->is_g4x) {
71954 _3DSTATE_SBE_AttributeSwizzleEnable_start(const struct gen_device_info *devinfo)
71956    switch (devinfo->gen) {
71962       if (devinfo->is_haswell) {
71970       if (devinfo->is_g4x) {
71993 _3DSTATE_SBE_CommandSubType_bits(const struct gen_device_info *devinfo)
71995    switch (devinfo->gen) {
72001       if (devinfo->is_haswell) {
72009       if (devinfo->is_g4x) {
72029 _3DSTATE_SBE_CommandSubType_start(const struct gen_device_info *devinfo)
72031    switch (devinfo->gen) {
72037       if (devinfo->is_haswell) {
72045       if (devinfo->is_g4x) {
72068 _3DSTATE_SBE_CommandType_bits(const struct gen_device_info *devinfo)
72070    switch (devinfo->gen) {
72076       if (devinfo->is_haswell) {
72084       if (devinfo->is_g4x) {
72104 _3DSTATE_SBE_CommandType_start(const struct gen_device_info *devinfo)
72106    switch (devinfo->gen) {
72112       if (devinfo->is_haswell) {
72120       if (devinfo->is_g4x) {
72143 _3DSTATE_SBE_ConstantInterpolationEnable_bits(const struct gen_device_info *devinfo)
72145    switch (devinfo->gen) {
72151       if (devinfo->is_haswell) {
72159       if (devinfo->is_g4x) {
72179 _3DSTATE_SBE_ConstantInterpolationEnable_start(const struct gen_device_info *devinfo)
72181    switch (devinfo->gen) {
72187       if (devinfo->is_haswell) {
72195       if (devinfo->is_g4x) {
72218 _3DSTATE_SBE_DWordLength_bits(const struct gen_device_info *devinfo)
72220    switch (devinfo->gen) {
72226       if (devinfo->is_haswell) {
72234       if (devinfo->is_g4x) {
72254 _3DSTATE_SBE_DWordLength_start(const struct gen_device_info *devinfo)
72256    switch (devinfo->gen) {
72262       if (devinfo->is_haswell) {
72270       if (devinfo->is_g4x) {
72291 _3DSTATE_SBE_ForceVertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
72293    switch (devinfo->gen) {
72299       if (devinfo->is_haswell) {
72307       if (devinfo->is_g4x) {
72325 _3DSTATE_SBE_ForceVertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
72327    switch (devinfo->gen) {
72333       if (devinfo->is_haswell) {
72341       if (devinfo->is_g4x) {
72362 _3DSTATE_SBE_ForceVertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
72364    switch (devinfo->gen) {
72370       if (devinfo->is_haswell) {
72378       if (devinfo->is_g4x) {
72396 _3DSTATE_SBE_ForceVertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
72398    switch (devinfo->gen) {
72404       if (devinfo->is_haswell) {
72412       if (devinfo->is_g4x) {
72435 _3DSTATE_SBE_NumberofSFOutputAttributes_bits(const struct gen_device_info *devinfo)
72437    switch (devinfo->gen) {
72443       if (devinfo->is_haswell) {
72451       if (devinfo->is_g4x) {
72471 _3DSTATE_SBE_NumberofSFOutputAttributes_start(const struct gen_device_info *devinfo)
72473    switch (devinfo->gen) {
72479       if (devinfo->is_haswell) {
72487       if (devinfo->is_g4x) {
72510 _3DSTATE_SBE_PointSpriteTextureCoordinateEnable_bits(const struct gen_device_info *devinfo)
72512    switch (devinfo->gen) {
72518       if (devinfo->is_haswell) {
72526       if (devinfo->is_g4x) {
72546 _3DSTATE_SBE_PointSpriteTextureCoordinateEnable_start(const struct gen_device_info *devinfo)
72548    switch (devinfo->gen) {
72554       if (devinfo->is_haswell) {
72562       if (devinfo->is_g4x) {
72585 _3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_bits(const struct gen_device_info *devinfo)
72587    switch (devinfo->gen) {
72593       if (devinfo->is_haswell) {
72601       if (devinfo->is_g4x) {
72621 _3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_start(const struct gen_device_info *devinfo)
72623    switch (devinfo->gen) {
72629       if (devinfo->is_haswell) {
72637       if (devinfo->is_g4x) {
72658 _3DSTATE_SBE_PrimitiveIDOverrideAttributeSelect_bits(const struct gen_device_info *devinfo)
72660    switch (devinfo->gen) {
72666       if (devinfo->is_haswell) {
72674       if (devinfo->is_g4x) {
72692 _3DSTATE_SBE_PrimitiveIDOverrideAttributeSelect_start(const struct gen_device_info *devinfo)
72694    switch (devinfo->gen) {
72700       if (devinfo->is_haswell) {
72708       if (devinfo->is_g4x) {
72729 _3DSTATE_SBE_PrimitiveIDOverrideComponentW_bits(const struct gen_device_info *devinfo)
72731    switch (devinfo->gen) {
72737       if (devinfo->is_haswell) {
72745       if (devinfo->is_g4x) {
72763 _3DSTATE_SBE_PrimitiveIDOverrideComponentW_start(const struct gen_device_info *devinfo)
72765    switch (devinfo->gen) {
72771       if (devinfo->is_haswell) {
72779       if (devinfo->is_g4x) {
72800 _3DSTATE_SBE_PrimitiveIDOverrideComponentX_bits(const struct gen_device_info *devinfo)
72802    switch (devinfo->gen) {
72808       if (devinfo->is_haswell) {
72816       if (devinfo->is_g4x) {
72834 _3DSTATE_SBE_PrimitiveIDOverrideComponentX_start(const struct gen_device_info *devinfo)
72836    switch (devinfo->gen) {
72842       if (devinfo->is_haswell) {
72850       if (devinfo->is_g4x) {
72871 _3DSTATE_SBE_PrimitiveIDOverrideComponentY_bits(const struct gen_device_info *devinfo)
72873    switch (devinfo->gen) {
72879       if (devinfo->is_haswell) {
72887       if (devinfo->is_g4x) {
72905 _3DSTATE_SBE_PrimitiveIDOverrideComponentY_start(const struct gen_device_info *devinfo)
72907    switch (devinfo->gen) {
72913       if (devinfo->is_haswell) {
72921       if (devinfo->is_g4x) {
72942 _3DSTATE_SBE_PrimitiveIDOverrideComponentZ_bits(const struct gen_device_info *devinfo)
72944    switch (devinfo->gen) {
72950       if (devinfo->is_haswell) {
72958       if (devinfo->is_g4x) {
72976 _3DSTATE_SBE_PrimitiveIDOverrideComponentZ_start(const struct gen_device_info *devinfo)
72978    switch (devinfo->gen) {
72984       if (devinfo->is_haswell) {
72992       if (devinfo->is_g4x) {
73015 _3DSTATE_SBE_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
73017    switch (devinfo->gen) {
73023       if (devinfo->is_haswell) {
73031       if (devinfo->is_g4x) {
73051 _3DSTATE_SBE_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
73053    switch (devinfo->gen) {
73059       if (devinfo->is_haswell) {
73067       if (devinfo->is_g4x) {
73090 _3DSTATE_SBE_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
73092    switch (devinfo->gen) {
73098       if (devinfo->is_haswell) {
73106       if (devinfo->is_g4x) {
73126 _3DSTATE_SBE_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
73128    switch (devinfo->gen) {
73134       if (devinfo->is_haswell) {
73142       if (devinfo->is_g4x) {
73163 _3DSTATE_SBE_SWIZ_length(const struct gen_device_info *devinfo)
73165    switch (devinfo->gen) {
73171       if (devinfo->is_haswell) {
73179       if (devinfo->is_g4x) {
73200 _3DSTATE_SBE_SWIZ_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
73202    switch (devinfo->gen) {
73208       if (devinfo->is_haswell) {
73216       if (devinfo->is_g4x) {
73234 _3DSTATE_SBE_SWIZ_3DCommandOpcode_start(const struct gen_device_info *devinfo)
73236    switch (devinfo->gen) {
73242       if (devinfo->is_haswell) {
73250       if (devinfo->is_g4x) {
73271 _3DSTATE_SBE_SWIZ_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
73273    switch (devinfo->gen) {
73279       if (devinfo->is_haswell) {
73287       if (devinfo->is_g4x) {
73305 _3DSTATE_SBE_SWIZ_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
73307    switch (devinfo->gen) {
73313       if (devinfo->is_haswell) {
73321       if (devinfo->is_g4x) {
73342 _3DSTATE_SBE_SWIZ_Attribute_bits(const struct gen_device_info *devinfo)
73344    switch (devinfo->gen) {
73350       if (devinfo->is_haswell) {
73358       if (devinfo->is_g4x) {
73376 _3DSTATE_SBE_SWIZ_Attribute_start(const struct gen_device_info *devinfo)
73378    switch (devinfo->gen) {
73384       if (devinfo->is_haswell) {
73392       if (devinfo->is_g4x) {
73413 _3DSTATE_SBE_SWIZ_AttributeWrapShortestEnables_bits(const struct gen_device_info *devinfo)
73415    switch (devinfo->gen) {
73421       if (devinfo->is_haswell) {
73429       if (devinfo->is_g4x) {
73447 _3DSTATE_SBE_SWIZ_AttributeWrapShortestEnables_start(const struct gen_device_info *devinfo)
73449    switch (devinfo->gen) {
73455       if (devinfo->is_haswell) {
73463       if (devinfo->is_g4x) {
73484 _3DSTATE_SBE_SWIZ_CommandSubType_bits(const struct gen_device_info *devinfo)
73486    switch (devinfo->gen) {
73492       if (devinfo->is_haswell) {
73500       if (devinfo->is_g4x) {
73518 _3DSTATE_SBE_SWIZ_CommandSubType_start(const struct gen_device_info *devinfo)
73520    switch (devinfo->gen) {
73526       if (devinfo->is_haswell) {
73534       if (devinfo->is_g4x) {
73555 _3DSTATE_SBE_SWIZ_CommandType_bits(const struct gen_device_info *devinfo)
73557    switch (devinfo->gen) {
73563       if (devinfo->is_haswell) {
73571       if (devinfo->is_g4x) {
73589 _3DSTATE_SBE_SWIZ_CommandType_start(const struct gen_device_info *devinfo)
73591    switch (devinfo->gen) {
73597       if (devinfo->is_haswell) {
73605       if (devinfo->is_g4x) {
73626 _3DSTATE_SBE_SWIZ_DWordLength_bits(const struct gen_device_info *devinfo)
73628    switch (devinfo->gen) {
73634       if (devinfo->is_haswell) {
73642       if (devinfo->is_g4x) {
73660 _3DSTATE_SBE_SWIZ_DWordLength_start(const struct gen_device_info *devinfo)
73662    switch (devinfo->gen) {
73668       if (devinfo->is_haswell) {
73676       if (devinfo->is_g4x) {
73700 _3DSTATE_SCISSOR_STATE_POINTERS_length(const struct gen_device_info *devinfo)
73702    switch (devinfo->gen) {
73708       if (devinfo->is_haswell) {
73716       if (devinfo->is_g4x) {
73740 _3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
73742    switch (devinfo->gen) {
73748       if (devinfo->is_haswell) {
73756       if (devinfo->is_g4x) {
73777 _3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
73779    switch (devinfo->gen) {
73785       if (devinfo->is_haswell) {
73793       if (devinfo->is_g4x) {
73817 _3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
73819    switch (devinfo->gen) {
73825       if (devinfo->is_haswell) {
73833       if (devinfo->is_g4x) {
73854 _3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
73856    switch (devinfo->gen) {
73862       if (devinfo->is_haswell) {
73870       if (devinfo->is_g4x) {
73894 _3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
73896    switch (devinfo->gen) {
73902       if (devinfo->is_haswell) {
73910       if (devinfo->is_g4x) {
73931 _3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
73933    switch (devinfo->gen) {
73939       if (devinfo->is_haswell) {
73947       if (devinfo->is_g4x) {
73971 _3DSTATE_SCISSOR_STATE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
73973    switch (devinfo->gen) {
73979       if (devinfo->is_haswell) {
73987       if (devinfo->is_g4x) {
74008 _3DSTATE_SCISSOR_STATE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
74010    switch (devinfo->gen) {
74016       if (devinfo->is_haswell) {
74024       if (devinfo->is_g4x) {
74048 _3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
74050    switch (devinfo->gen) {
74056       if (devinfo->is_haswell) {
74064       if (devinfo->is_g4x) {
74085 _3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
74087    switch (devinfo->gen) {
74093       if (devinfo->is_haswell) {
74101       if (devinfo->is_g4x) {
74125 _3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_bits(const struct gen_device_info *devinfo)
74127    switch (devinfo->gen) {
74133       if (devinfo->is_haswell) {
74141       if (devinfo->is_g4x) {
74162 _3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_start(const struct gen_device_info *devinfo)
74164    switch (devinfo->gen) {
74170       if (devinfo->is_haswell) {
74178       if (devinfo->is_g4x) {
74202 _3DSTATE_SF_length(const struct gen_device_info *devinfo)
74204    switch (devinfo->gen) {
74210       if (devinfo->is_haswell) {
74218       if (devinfo->is_g4x) {
74242 _3DSTATE_SF_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
74244    switch (devinfo->gen) {
74250       if (devinfo->is_haswell) {
74258       if (devinfo->is_g4x) {
74279 _3DSTATE_SF_3DCommandOpcode_start(const struct gen_device_info *devinfo)
74281    switch (devinfo->gen) {
74287       if (devinfo->is_haswell) {
74295       if (devinfo->is_g4x) {
74319 _3DSTATE_SF_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
74321    switch (devinfo->gen) {
74327       if (devinfo->is_haswell) {
74335       if (devinfo->is_g4x) {
74356 _3DSTATE_SF_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
74358    switch (devinfo->gen) {
74364       if (devinfo->is_haswell) {
74372       if (devinfo->is_g4x) {
74396 _3DSTATE_SF_AALineDistanceMode_bits(const struct gen_device_info *devinfo)
74398    switch (devinfo->gen) {
74404       if (devinfo->is_haswell) {
74412       if (devinfo->is_g4x) {
74433 _3DSTATE_SF_AALineDistanceMode_start(const struct gen_device_info *devinfo)
74435    switch (devinfo->gen) {
74441       if (devinfo->is_haswell) {
74449       if (devinfo->is_g4x) {
74469 _3DSTATE_SF_AntiAliasingEnable_bits(const struct gen_device_info *devinfo)
74471    switch (devinfo->gen) {
74477       if (devinfo->is_haswell) {
74485       if (devinfo->is_g4x) {
74502 _3DSTATE_SF_AntiAliasingEnable_start(const struct gen_device_info *devinfo)
74504    switch (devinfo->gen) {
74510       if (devinfo->is_haswell) {
74518       if (devinfo->is_g4x) {
74536 _3DSTATE_SF_Attribute_bits(const struct gen_device_info *devinfo)
74538    switch (devinfo->gen) {
74544       if (devinfo->is_haswell) {
74552       if (devinfo->is_g4x) {
74567 _3DSTATE_SF_Attribute_start(const struct gen_device_info *devinfo)
74569    switch (devinfo->gen) {
74575       if (devinfo->is_haswell) {
74583       if (devinfo->is_g4x) {
74601 _3DSTATE_SF_Attribute0WrapShortestEnables_bits(const struct gen_device_info *devinfo)
74603    switch (devinfo->gen) {
74609       if (devinfo->is_haswell) {
74617       if (devinfo->is_g4x) {
74632 _3DSTATE_SF_Attribute0WrapShortestEnables_start(const struct gen_device_info *devinfo)
74634    switch (devinfo->gen) {
74640       if (devinfo->is_haswell) {
74648       if (devinfo->is_g4x) {
74666 _3DSTATE_SF_Attribute1WrapShortestEnables_bits(const struct gen_device_info *devinfo)
74668    switch (devinfo->gen) {
74674       if (devinfo->is_haswell) {
74682       if (devinfo->is_g4x) {
74697 _3DSTATE_SF_Attribute1WrapShortestEnables_start(const struct gen_device_info *devinfo)
74699    switch (devinfo->gen) {
74705       if (devinfo->is_haswell) {
74713       if (devinfo->is_g4x) {
74731 _3DSTATE_SF_Attribute10WrapShortestEnables_bits(const struct gen_device_info *devinfo)
74733    switch (devinfo->gen) {
74739       if (devinfo->is_haswell) {
74747       if (devinfo->is_g4x) {
74762 _3DSTATE_SF_Attribute10WrapShortestEnables_start(const struct gen_device_info *devinfo)
74764    switch (devinfo->gen) {
74770       if (devinfo->is_haswell) {
74778       if (devinfo->is_g4x) {
74796 _3DSTATE_SF_Attribute11WrapShortestEnables_bits(const struct gen_device_info *devinfo)
74798    switch (devinfo->gen) {
74804       if (devinfo->is_haswell) {
74812       if (devinfo->is_g4x) {
74827 _3DSTATE_SF_Attribute11WrapShortestEnables_start(const struct gen_device_info *devinfo)
74829    switch (devinfo->gen) {
74835       if (devinfo->is_haswell) {
74843       if (devinfo->is_g4x) {
74861 _3DSTATE_SF_Attribute12WrapShortestEnables_bits(const struct gen_device_info *devinfo)
74863    switch (devinfo->gen) {
74869       if (devinfo->is_haswell) {
74877       if (devinfo->is_g4x) {
74892 _3DSTATE_SF_Attribute12WrapShortestEnables_start(const struct gen_device_info *devinfo)
74894    switch (devinfo->gen) {
74900       if (devinfo->is_haswell) {
74908       if (devinfo->is_g4x) {
74926 _3DSTATE_SF_Attribute13WrapShortestEnables_bits(const struct gen_device_info *devinfo)
74928    switch (devinfo->gen) {
74934       if (devinfo->is_haswell) {
74942       if (devinfo->is_g4x) {
74957 _3DSTATE_SF_Attribute13WrapShortestEnables_start(const struct gen_device_info *devinfo)
74959    switch (devinfo->gen) {
74965       if (devinfo->is_haswell) {
74973       if (devinfo->is_g4x) {
74991 _3DSTATE_SF_Attribute14WrapShortestEnables_bits(const struct gen_device_info *devinfo)
74993    switch (devinfo->gen) {
74999       if (devinfo->is_haswell) {
75007       if (devinfo->is_g4x) {
75022 _3DSTATE_SF_Attribute14WrapShortestEnables_start(const struct gen_device_info *devinfo)
75024    switch (devinfo->gen) {
75030       if (devinfo->is_haswell) {
75038       if (devinfo->is_g4x) {
75056 _3DSTATE_SF_Attribute15WrapShortestEnables_bits(const struct gen_device_info *devinfo)
75058    switch (devinfo->gen) {
75064       if (devinfo->is_haswell) {
75072       if (devinfo->is_g4x) {
75087 _3DSTATE_SF_Attribute15WrapShortestEnables_start(const struct gen_device_info *devinfo)
75089    switch (devinfo->gen) {
75095       if (devinfo->is_haswell) {
75103       if (devinfo->is_g4x) {
75121 _3DSTATE_SF_Attribute2WrapShortestEnables_bits(const struct gen_device_info *devinfo)
75123    switch (devinfo->gen) {
75129       if (devinfo->is_haswell) {
75137       if (devinfo->is_g4x) {
75152 _3DSTATE_SF_Attribute2WrapShortestEnables_start(const struct gen_device_info *devinfo)
75154    switch (devinfo->gen) {
75160       if (devinfo->is_haswell) {
75168       if (devinfo->is_g4x) {
75186 _3DSTATE_SF_Attribute3WrapShortestEnables_bits(const struct gen_device_info *devinfo)
75188    switch (devinfo->gen) {
75194       if (devinfo->is_haswell) {
75202       if (devinfo->is_g4x) {
75217 _3DSTATE_SF_Attribute3WrapShortestEnables_start(const struct gen_device_info *devinfo)
75219    switch (devinfo->gen) {
75225       if (devinfo->is_haswell) {
75233       if (devinfo->is_g4x) {
75251 _3DSTATE_SF_Attribute4WrapShortestEnables_bits(const struct gen_device_info *devinfo)
75253    switch (devinfo->gen) {
75259       if (devinfo->is_haswell) {
75267       if (devinfo->is_g4x) {
75282 _3DSTATE_SF_Attribute4WrapShortestEnables_start(const struct gen_device_info *devinfo)
75284    switch (devinfo->gen) {
75290       if (devinfo->is_haswell) {
75298       if (devinfo->is_g4x) {
75316 _3DSTATE_SF_Attribute5WrapShortestEnables_bits(const struct gen_device_info *devinfo)
75318    switch (devinfo->gen) {
75324       if (devinfo->is_haswell) {
75332       if (devinfo->is_g4x) {
75347 _3DSTATE_SF_Attribute5WrapShortestEnables_start(const struct gen_device_info *devinfo)
75349    switch (devinfo->gen) {
75355       if (devinfo->is_haswell) {
75363       if (devinfo->is_g4x) {
75381 _3DSTATE_SF_Attribute6WrapShortestEnables_bits(const struct gen_device_info *devinfo)
75383    switch (devinfo->gen) {
75389       if (devinfo->is_haswell) {
75397       if (devinfo->is_g4x) {
75412 _3DSTATE_SF_Attribute6WrapShortestEnables_start(const struct gen_device_info *devinfo)
75414    switch (devinfo->gen) {
75420       if (devinfo->is_haswell) {
75428       if (devinfo->is_g4x) {
75446 _3DSTATE_SF_Attribute7WrapShortestEnables_bits(const struct gen_device_info *devinfo)
75448    switch (devinfo->gen) {
75454       if (devinfo->is_haswell) {
75462       if (devinfo->is_g4x) {
75477 _3DSTATE_SF_Attribute7WrapShortestEnables_start(const struct gen_device_info *devinfo)
75479    switch (devinfo->gen) {
75485       if (devinfo->is_haswell) {
75493       if (devinfo->is_g4x) {
75511 _3DSTATE_SF_Attribute8WrapShortestEnables_bits(const struct gen_device_info *devinfo)
75513    switch (devinfo->gen) {
75519       if (devinfo->is_haswell) {
75527       if (devinfo->is_g4x) {
75542 _3DSTATE_SF_Attribute8WrapShortestEnables_start(const struct gen_device_info *devinfo)
75544    switch (devinfo->gen) {
75550       if (devinfo->is_haswell) {
75558       if (devinfo->is_g4x) {
75576 _3DSTATE_SF_Attribute9WrapShortestEnables_bits(const struct gen_device_info *devinfo)
75578    switch (devinfo->gen) {
75584       if (devinfo->is_haswell) {
75592       if (devinfo->is_g4x) {
75607 _3DSTATE_SF_Attribute9WrapShortestEnables_start(const struct gen_device_info *devinfo)
75609    switch (devinfo->gen) {
75615       if (devinfo->is_haswell) {
75623       if (devinfo->is_g4x) {
75641 _3DSTATE_SF_AttributeSwizzleEnable_bits(const struct gen_device_info *devinfo)
75643    switch (devinfo->gen) {
75649       if (devinfo->is_haswell) {
75657       if (devinfo->is_g4x) {
75672 _3DSTATE_SF_AttributeSwizzleEnable_start(const struct gen_device_info *devinfo)
75674    switch (devinfo->gen) {
75680       if (devinfo->is_haswell) {
75688       if (devinfo->is_g4x) {
75708 _3DSTATE_SF_BackFaceFillMode_bits(const struct gen_device_info *devinfo)
75710    switch (devinfo->gen) {
75716       if (devinfo->is_haswell) {
75724       if (devinfo->is_g4x) {
75741 _3DSTATE_SF_BackFaceFillMode_start(const struct gen_device_info *devinfo)
75743    switch (devinfo->gen) {
75749       if (devinfo->is_haswell) {
75757       if (devinfo->is_g4x) {
75775 _3DSTATE_SF_CHVLineWidth_bits(const struct gen_device_info *devinfo)
75777    switch (devinfo->gen) {
75783       if (devinfo->is_haswell) {
75791       if (devinfo->is_g4x) {
75806 _3DSTATE_SF_CHVLineWidth_start(const struct gen_device_info *devinfo)
75808    switch (devinfo->gen) {
75814       if (devinfo->is_haswell) {
75822       if (devinfo->is_g4x) {
75846 _3DSTATE_SF_CommandSubType_bits(const struct gen_device_info *devinfo)
75848    switch (devinfo->gen) {
75854       if (devinfo->is_haswell) {
75862       if (devinfo->is_g4x) {
75883 _3DSTATE_SF_CommandSubType_start(const struct gen_device_info *devinfo)
75885    switch (devinfo->gen) {
75891       if (devinfo->is_haswell) {
75899       if (devinfo->is_g4x) {
75923 _3DSTATE_SF_CommandType_bits(const struct gen_device_info *devinfo)
75925    switch (devinfo->gen) {
75931       if (devinfo->is_haswell) {
75939       if (devinfo->is_g4x) {
75960 _3DSTATE_SF_CommandType_start(const struct gen_device_info *devinfo)
75962    switch (devinfo->gen) {
75968       if (devinfo->is_haswell) {
75976       if (devinfo->is_g4x) {
75994 _3DSTATE_SF_ConstantInterpolationEnable_bits(const struct gen_device_info *devinfo)
75996    switch (devinfo->gen) {
76002       if (devinfo->is_haswell) {
76010       if (devinfo->is_g4x) {
76025 _3DSTATE_SF_ConstantInterpolationEnable_start(const struct gen_device_info *devinfo)
76027    switch (devinfo->gen) {
76033       if (devinfo->is_haswell) {
76041       if (devinfo->is_g4x) {
76061 _3DSTATE_SF_CullMode_bits(const struct gen_device_info *devinfo)
76063    switch (devinfo->gen) {
76069       if (devinfo->is_haswell) {
76077       if (devinfo->is_g4x) {
76094 _3DSTATE_SF_CullMode_start(const struct gen_device_info *devinfo)
76096    switch (devinfo->gen) {
76102       if (devinfo->is_haswell) {
76110       if (devinfo->is_g4x) {
76134 _3DSTATE_SF_DWordLength_bits(const struct gen_device_info *devinfo)
76136    switch (devinfo->gen) {
76142       if (devinfo->is_haswell) {
76150       if (devinfo->is_g4x) {
76171 _3DSTATE_SF_DWordLength_start(const struct gen_device_info *devinfo)
76173    switch (devinfo->gen) {
76179       if (devinfo->is_haswell) {
76187       if (devinfo->is_g4x) {
76206 _3DSTATE_SF_DepthBufferSurfaceFormat_bits(const struct gen_device_info *devinfo)
76208    switch (devinfo->gen) {
76214       if (devinfo->is_haswell) {
76222       if (devinfo->is_g4x) {
76238 _3DSTATE_SF_DepthBufferSurfaceFormat_start(const struct gen_device_info *devinfo)
76240    switch (devinfo->gen) {
76246       if (devinfo->is_haswell) {
76254       if (devinfo->is_g4x) {
76274 _3DSTATE_SF_FrontWinding_bits(const struct gen_device_info *devinfo)
76276    switch (devinfo->gen) {
76282       if (devinfo->is_haswell) {
76290       if (devinfo->is_g4x) {
76307 _3DSTATE_SF_FrontWinding_start(const struct gen_device_info *devinfo)
76309    switch (devinfo->gen) {
76315       if (devinfo->is_haswell) {
76323       if (devinfo->is_g4x) {
76343 _3DSTATE_SF_FrontFaceFillMode_bits(const struct gen_device_info *devinfo)
76345    switch (devinfo->gen) {
76351       if (devinfo->is_haswell) {
76359       if (devinfo->is_g4x) {
76376 _3DSTATE_SF_FrontFaceFillMode_start(const struct gen_device_info *devinfo)
76378    switch (devinfo->gen) {
76384       if (devinfo->is_haswell) {
76392       if (devinfo->is_g4x) {
76412 _3DSTATE_SF_GlobalDepthOffsetClamp_bits(const struct gen_device_info *devinfo)
76414    switch (devinfo->gen) {
76420       if (devinfo->is_haswell) {
76428       if (devinfo->is_g4x) {
76445 _3DSTATE_SF_GlobalDepthOffsetClamp_start(const struct gen_device_info *devinfo)
76447    switch (devinfo->gen) {
76453       if (devinfo->is_haswell) {
76461       if (devinfo->is_g4x) {
76481 _3DSTATE_SF_GlobalDepthOffsetConstant_bits(const struct gen_device_info *devinfo)
76483    switch (devinfo->gen) {
76489       if (devinfo->is_haswell) {
76497       if (devinfo->is_g4x) {
76514 _3DSTATE_SF_GlobalDepthOffsetConstant_start(const struct gen_device_info *devinfo)
76516    switch (devinfo->gen) {
76522       if (devinfo->is_haswell) {
76530       if (devinfo->is_g4x) {
76550 _3DSTATE_SF_GlobalDepthOffsetEnablePoint_bits(const struct gen_device_info *devinfo)
76552    switch (devinfo->gen) {
76558       if (devinfo->is_haswell) {
76566       if (devinfo->is_g4x) {
76583 _3DSTATE_SF_GlobalDepthOffsetEnablePoint_start(const struct gen_device_info *devinfo)
76585    switch (devinfo->gen) {
76591       if (devinfo->is_haswell) {
76599       if (devinfo->is_g4x) {
76619 _3DSTATE_SF_GlobalDepthOffsetEnableSolid_bits(const struct gen_device_info *devinfo)
76621    switch (devinfo->gen) {
76627       if (devinfo->is_haswell) {
76635       if (devinfo->is_g4x) {
76652 _3DSTATE_SF_GlobalDepthOffsetEnableSolid_start(const struct gen_device_info *devinfo)
76654    switch (devinfo->gen) {
76660       if (devinfo->is_haswell) {
76668       if (devinfo->is_g4x) {
76688 _3DSTATE_SF_GlobalDepthOffsetEnableWireframe_bits(const struct gen_device_info *devinfo)
76690    switch (devinfo->gen) {
76696       if (devinfo->is_haswell) {
76704       if (devinfo->is_g4x) {
76721 _3DSTATE_SF_GlobalDepthOffsetEnableWireframe_start(const struct gen_device_info *devinfo)
76723    switch (devinfo->gen) {
76729       if (devinfo->is_haswell) {
76737       if (devinfo->is_g4x) {
76757 _3DSTATE_SF_GlobalDepthOffsetScale_bits(const struct gen_device_info *devinfo)
76759    switch (devinfo->gen) {
76765       if (devinfo->is_haswell) {
76773       if (devinfo->is_g4x) {
76790 _3DSTATE_SF_GlobalDepthOffsetScale_start(const struct gen_device_info *devinfo)
76792    switch (devinfo->gen) {
76798       if (devinfo->is_haswell) {
76806       if (devinfo->is_g4x) {
76830 _3DSTATE_SF_LastPixelEnable_bits(const struct gen_device_info *devinfo)
76832    switch (devinfo->gen) {
76838       if (devinfo->is_haswell) {
76846       if (devinfo->is_g4x) {
76867 _3DSTATE_SF_LastPixelEnable_start(const struct gen_device_info *devinfo)
76869    switch (devinfo->gen) {
76875       if (devinfo->is_haswell) {
76883       if (devinfo->is_g4x) {
76907 _3DSTATE_SF_LegacyGlobalDepthBiasEnable_bits(const struct gen_device_info *devinfo)
76909    switch (devinfo->gen) {
76915       if (devinfo->is_haswell) {
76923       if (devinfo->is_g4x) {
76944 _3DSTATE_SF_LegacyGlobalDepthBiasEnable_start(const struct gen_device_info *devinfo)
76946    switch (devinfo->gen) {
76952       if (devinfo->is_haswell) {
76960       if (devinfo->is_g4x) {
76984 _3DSTATE_SF_LineEndCapAntialiasingRegionWidth_bits(const struct gen_device_info *devinfo)
76986    switch (devinfo->gen) {
76992       if (devinfo->is_haswell) {
77000       if (devinfo->is_g4x) {
77021 _3DSTATE_SF_LineEndCapAntialiasingRegionWidth_start(const struct gen_device_info *devinfo)
77023    switch (devinfo->gen) {
77029       if (devinfo->is_haswell) {
77037       if (devinfo->is_g4x) {
77055 _3DSTATE_SF_LineStippleEnable_bits(const struct gen_device_info *devinfo)
77057    switch (devinfo->gen) {
77063       if (devinfo->is_haswell) {
77071       if (devinfo->is_g4x) {
77086 _3DSTATE_SF_LineStippleEnable_start(const struct gen_device_info *devinfo)
77088    switch (devinfo->gen) {
77094       if (devinfo->is_haswell) {
77102       if (devinfo->is_g4x) {
77126 _3DSTATE_SF_LineStripListProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
77128    switch (devinfo->gen) {
77134       if (devinfo->is_haswell) {
77142       if (devinfo->is_g4x) {
77163 _3DSTATE_SF_LineStripListProvokingVertexSelect_start(const struct gen_device_info *devinfo)
77165    switch (devinfo->gen) {
77171       if (devinfo->is_haswell) {
77179       if (devinfo->is_g4x) {
77203 _3DSTATE_SF_LineWidth_bits(const struct gen_device_info *devinfo)
77205    switch (devinfo->gen) {
77211       if (devinfo->is_haswell) {
77219       if (devinfo->is_g4x) {
77240 _3DSTATE_SF_LineWidth_start(const struct gen_device_info *devinfo)
77242    switch (devinfo->gen) {
77248       if (devinfo->is_haswell) {
77256       if (devinfo->is_g4x) {
77276 _3DSTATE_SF_MultisampleRasterizationMode_bits(const struct gen_device_info *devinfo)
77278    switch (devinfo->gen) {
77284       if (devinfo->is_haswell) {
77292       if (devinfo->is_g4x) {
77309 _3DSTATE_SF_MultisampleRasterizationMode_start(const struct gen_device_info *devinfo)
77311    switch (devinfo->gen) {
77317       if (devinfo->is_haswell) {
77325       if (devinfo->is_g4x) {
77343 _3DSTATE_SF_NumberofSFOutputAttributes_bits(const struct gen_device_info *devinfo)
77345    switch (devinfo->gen) {
77351       if (devinfo->is_haswell) {
77359       if (devinfo->is_g4x) {
77374 _3DSTATE_SF_NumberofSFOutputAttributes_start(const struct gen_device_info *devinfo)
77376    switch (devinfo->gen) {
77382       if (devinfo->is_haswell) {
77390       if (devinfo->is_g4x) {
77408 _3DSTATE_SF_PointSpriteTextureCoordinateEnable_bits(const struct gen_device_info *devinfo)
77410    switch (devinfo->gen) {
77416       if (devinfo->is_haswell) {
77424       if (devinfo->is_g4x) {
77439 _3DSTATE_SF_PointSpriteTextureCoordinateEnable_start(const struct gen_device_info *devinfo)
77441    switch (devinfo->gen) {
77447       if (devinfo->is_haswell) {
77455       if (devinfo->is_g4x) {
77473 _3DSTATE_SF_PointSpriteTextureCoordinateOrigin_bits(const struct gen_device_info *devinfo)
77475    switch (devinfo->gen) {
77481       if (devinfo->is_haswell) {
77489       if (devinfo->is_g4x) {
77504 _3DSTATE_SF_PointSpriteTextureCoordinateOrigin_start(const struct gen_device_info *devinfo)
77506    switch (devinfo->gen) {
77512       if (devinfo->is_haswell) {
77520       if (devinfo->is_g4x) {
77544 _3DSTATE_SF_PointWidth_bits(const struct gen_device_info *devinfo)
77546    switch (devinfo->gen) {
77552       if (devinfo->is_haswell) {
77560       if (devinfo->is_g4x) {
77581 _3DSTATE_SF_PointWidth_start(const struct gen_device_info *devinfo)
77583    switch (devinfo->gen) {
77589       if (devinfo->is_haswell) {
77597       if (devinfo->is_g4x) {
77621 _3DSTATE_SF_PointWidthSource_bits(const struct gen_device_info *devinfo)
77623    switch (devinfo->gen) {
77629       if (devinfo->is_haswell) {
77637       if (devinfo->is_g4x) {
77658 _3DSTATE_SF_PointWidthSource_start(const struct gen_device_info *devinfo)
77660    switch (devinfo->gen) {
77666       if (devinfo->is_haswell) {
77674       if (devinfo->is_g4x) {
77692 _3DSTATE_SF_RTIndependentRasterizationEnable_bits(const struct gen_device_info *devinfo)
77694    switch (devinfo->gen) {
77700       if (devinfo->is_haswell) {
77708       if (devinfo->is_g4x) {
77723 _3DSTATE_SF_RTIndependentRasterizationEnable_start(const struct gen_device_info *devinfo)
77725    switch (devinfo->gen) {
77731       if (devinfo->is_haswell) {
77739       if (devinfo->is_g4x) {
77759 _3DSTATE_SF_ScissorRectangleEnable_bits(const struct gen_device_info *devinfo)
77761    switch (devinfo->gen) {
77767       if (devinfo->is_haswell) {
77775       if (devinfo->is_g4x) {
77792 _3DSTATE_SF_ScissorRectangleEnable_start(const struct gen_device_info *devinfo)
77794    switch (devinfo->gen) {
77800       if (devinfo->is_haswell) {
77808       if (devinfo->is_g4x) {
77829 _3DSTATE_SF_SmoothPointEnable_bits(const struct gen_device_info *devinfo)
77831    switch (devinfo->gen) {
77837       if (devinfo->is_haswell) {
77845       if (devinfo->is_g4x) {
77863 _3DSTATE_SF_SmoothPointEnable_start(const struct gen_device_info *devinfo)
77865    switch (devinfo->gen) {
77871       if (devinfo->is_haswell) {
77879       if (devinfo->is_g4x) {
77903 _3DSTATE_SF_StatisticsEnable_bits(const struct gen_device_info *devinfo)
77905    switch (devinfo->gen) {
77911       if (devinfo->is_haswell) {
77919       if (devinfo->is_g4x) {
77940 _3DSTATE_SF_StatisticsEnable_start(const struct gen_device_info *devinfo)
77942    switch (devinfo->gen) {
77948       if (devinfo->is_haswell) {
77956       if (devinfo->is_g4x) {
77980 _3DSTATE_SF_TriangleFanProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
77982    switch (devinfo->gen) {
77988       if (devinfo->is_haswell) {
77996       if (devinfo->is_g4x) {
78017 _3DSTATE_SF_TriangleFanProvokingVertexSelect_start(const struct gen_device_info *devinfo)
78019    switch (devinfo->gen) {
78025       if (devinfo->is_haswell) {
78033       if (devinfo->is_g4x) {
78057 _3DSTATE_SF_TriangleStripListProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
78059    switch (devinfo->gen) {
78065       if (devinfo->is_haswell) {
78073       if (devinfo->is_g4x) {
78094 _3DSTATE_SF_TriangleStripListProvokingVertexSelect_start(const struct gen_device_info *devinfo)
78096    switch (devinfo->gen) {
78102       if (devinfo->is_haswell) {
78110       if (devinfo->is_g4x) {
78134 _3DSTATE_SF_VertexSubPixelPrecisionSelect_bits(const struct gen_device_info *devinfo)
78136    switch (devinfo->gen) {
78142       if (devinfo->is_haswell) {
78150       if (devinfo->is_g4x) {
78171 _3DSTATE_SF_VertexSubPixelPrecisionSelect_start(const struct gen_device_info *devinfo)
78173    switch (devinfo->gen) {
78179       if (devinfo->is_haswell) {
78187       if (devinfo->is_g4x) {
78205 _3DSTATE_SF_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
78207    switch (devinfo->gen) {
78213       if (devinfo->is_haswell) {
78221       if (devinfo->is_g4x) {
78236 _3DSTATE_SF_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
78238    switch (devinfo->gen) {
78244       if (devinfo->is_haswell) {
78252       if (devinfo->is_g4x) {
78270 _3DSTATE_SF_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
78272    switch (devinfo->gen) {
78278       if (devinfo->is_haswell) {
78286       if (devinfo->is_g4x) {
78301 _3DSTATE_SF_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
78303    switch (devinfo->gen) {
78309       if (devinfo->is_haswell) {
78317       if (devinfo->is_g4x) {
78341 _3DSTATE_SF_ViewportTransformEnable_bits(const struct gen_device_info *devinfo)
78343    switch (devinfo->gen) {
78349       if (devinfo->is_haswell) {
78357       if (devinfo->is_g4x) {
78378 _3DSTATE_SF_ViewportTransformEnable_start(const struct gen_device_info *devinfo)
78380    switch (devinfo->gen) {
78386       if (devinfo->is_haswell) {
78394       if (devinfo->is_g4x) {
78417 _3DSTATE_SO_BUFFER_length(const struct gen_device_info *devinfo)
78419    switch (devinfo->gen) {
78425       if (devinfo->is_haswell) {
78433       if (devinfo->is_g4x) {
78456 _3DSTATE_SO_BUFFER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
78458    switch (devinfo->gen) {
78464       if (devinfo->is_haswell) {
78472       if (devinfo->is_g4x) {
78492 _3DSTATE_SO_BUFFER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
78494    switch (devinfo->gen) {
78500       if (devinfo->is_haswell) {
78508       if (devinfo->is_g4x) {
78531 _3DSTATE_SO_BUFFER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
78533    switch (devinfo->gen) {
78539       if (devinfo->is_haswell) {
78547       if (devinfo->is_g4x) {
78567 _3DSTATE_SO_BUFFER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
78569    switch (devinfo->gen) {
78575       if (devinfo->is_haswell) {
78583       if (devinfo->is_g4x) {
78606 _3DSTATE_SO_BUFFER_CommandSubType_bits(const struct gen_device_info *devinfo)
78608    switch (devinfo->gen) {
78614       if (devinfo->is_haswell) {
78622       if (devinfo->is_g4x) {
78642 _3DSTATE_SO_BUFFER_CommandSubType_start(const struct gen_device_info *devinfo)
78644    switch (devinfo->gen) {
78650       if (devinfo->is_haswell) {
78658       if (devinfo->is_g4x) {
78681 _3DSTATE_SO_BUFFER_CommandType_bits(const struct gen_device_info *devinfo)
78683    switch (devinfo->gen) {
78689       if (devinfo->is_haswell) {
78697       if (devinfo->is_g4x) {
78717 _3DSTATE_SO_BUFFER_CommandType_start(const struct gen_device_info *devinfo)
78719    switch (devinfo->gen) {
78725       if (devinfo->is_haswell) {
78733       if (devinfo->is_g4x) {
78756 _3DSTATE_SO_BUFFER_DWordLength_bits(const struct gen_device_info *devinfo)
78758    switch (devinfo->gen) {
78764       if (devinfo->is_haswell) {
78772       if (devinfo->is_g4x) {
78792 _3DSTATE_SO_BUFFER_DWordLength_start(const struct gen_device_info *devinfo)
78794    switch (devinfo->gen) {
78800       if (devinfo->is_haswell) {
78808       if (devinfo->is_g4x) {
78831 _3DSTATE_SO_BUFFER_MOCS_bits(const struct gen_device_info *devinfo)
78833    switch (devinfo->gen) {
78839       if (devinfo->is_haswell) {
78847       if (devinfo->is_g4x) {
78867 _3DSTATE_SO_BUFFER_MOCS_start(const struct gen_device_info *devinfo)
78869    switch (devinfo->gen) {
78875       if (devinfo->is_haswell) {
78883       if (devinfo->is_g4x) {
78904 _3DSTATE_SO_BUFFER_SOBufferEnable_bits(const struct gen_device_info *devinfo)
78906    switch (devinfo->gen) {
78912       if (devinfo->is_haswell) {
78920       if (devinfo->is_g4x) {
78938 _3DSTATE_SO_BUFFER_SOBufferEnable_start(const struct gen_device_info *devinfo)
78940    switch (devinfo->gen) {
78946       if (devinfo->is_haswell) {
78954       if (devinfo->is_g4x) {
78977 _3DSTATE_SO_BUFFER_SOBufferIndex_bits(const struct gen_device_info *devinfo)
78979    switch (devinfo->gen) {
78985       if (devinfo->is_haswell) {
78993       if (devinfo->is_g4x) {
79013 _3DSTATE_SO_BUFFER_SOBufferIndex_start(const struct gen_device_info *devinfo)
79015    switch (devinfo->gen) {
79021       if (devinfo->is_haswell) {
79029       if (devinfo->is_g4x) {
79050 _3DSTATE_SO_BUFFER_StreamOffset_bits(const struct gen_device_info *devinfo)
79052    switch (devinfo->gen) {
79058       if (devinfo->is_haswell) {
79066       if (devinfo->is_g4x) {
79084 _3DSTATE_SO_BUFFER_StreamOffset_start(const struct gen_device_info *devinfo)
79086    switch (devinfo->gen) {
79092       if (devinfo->is_haswell) {
79100       if (devinfo->is_g4x) {
79121 _3DSTATE_SO_BUFFER_StreamOffsetWriteEnable_bits(const struct gen_device_info *devinfo)
79123    switch (devinfo->gen) {
79129       if (devinfo->is_haswell) {
79137       if (devinfo->is_g4x) {
79155 _3DSTATE_SO_BUFFER_StreamOffsetWriteEnable_start(const struct gen_device_info *devinfo)
79157    switch (devinfo->gen) {
79163       if (devinfo->is_haswell) {
79171       if (devinfo->is_g4x) {
79192 _3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddress_bits(const struct gen_device_info *devinfo)
79194    switch (devinfo->gen) {
79200       if (devinfo->is_haswell) {
79208       if (devinfo->is_g4x) {
79226 _3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddress_start(const struct gen_device_info *devinfo)
79228    switch (devinfo->gen) {
79234       if (devinfo->is_haswell) {
79242       if (devinfo->is_g4x) {
79263 _3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddressEnable_bits(const struct gen_device_info *devinfo)
79265    switch (devinfo->gen) {
79271       if (devinfo->is_haswell) {
79279       if (devinfo->is_g4x) {
79297 _3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddressEnable_start(const struct gen_device_info *devinfo)
79299    switch (devinfo->gen) {
79305       if (devinfo->is_haswell) {
79313       if (devinfo->is_g4x) {
79336 _3DSTATE_SO_BUFFER_SurfaceBaseAddress_bits(const struct gen_device_info *devinfo)
79338    switch (devinfo->gen) {
79344       if (devinfo->is_haswell) {
79352       if (devinfo->is_g4x) {
79372 _3DSTATE_SO_BUFFER_SurfaceBaseAddress_start(const struct gen_device_info *devinfo)
79374    switch (devinfo->gen) {
79380       if (devinfo->is_haswell) {
79388       if (devinfo->is_g4x) {
79407 _3DSTATE_SO_BUFFER_SurfaceEndAddress_bits(const struct gen_device_info *devinfo)
79409    switch (devinfo->gen) {
79415       if (devinfo->is_haswell) {
79423       if (devinfo->is_g4x) {
79439 _3DSTATE_SO_BUFFER_SurfaceEndAddress_start(const struct gen_device_info *devinfo)
79441    switch (devinfo->gen) {
79447       if (devinfo->is_haswell) {
79455       if (devinfo->is_g4x) {
79474 _3DSTATE_SO_BUFFER_SurfacePitch_bits(const struct gen_device_info *devinfo)
79476    switch (devinfo->gen) {
79482       if (devinfo->is_haswell) {
79490       if (devinfo->is_g4x) {
79506 _3DSTATE_SO_BUFFER_SurfacePitch_start(const struct gen_device_info *devinfo)
79508    switch (devinfo->gen) {
79514       if (devinfo->is_haswell) {
79522       if (devinfo->is_g4x) {
79543 _3DSTATE_SO_BUFFER_SurfaceSize_bits(const struct gen_device_info *devinfo)
79545    switch (devinfo->gen) {
79551       if (devinfo->is_haswell) {
79559       if (devinfo->is_g4x) {
79577 _3DSTATE_SO_BUFFER_SurfaceSize_start(const struct gen_device_info *devinfo)
79579    switch (devinfo->gen) {
79585       if (devinfo->is_haswell) {
79593       if (devinfo->is_g4x) {
79622 _3DSTATE_SO_DECL_LIST_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
79624    switch (devinfo->gen) {
79630       if (devinfo->is_haswell) {
79638       if (devinfo->is_g4x) {
79658 _3DSTATE_SO_DECL_LIST_3DCommandOpcode_start(const struct gen_device_info *devinfo)
79660    switch (devinfo->gen) {
79666       if (devinfo->is_haswell) {
79674       if (devinfo->is_g4x) {
79697 _3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
79699    switch (devinfo->gen) {
79705       if (devinfo->is_haswell) {
79713       if (devinfo->is_g4x) {
79733 _3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
79735    switch (devinfo->gen) {
79741       if (devinfo->is_haswell) {
79749       if (devinfo->is_g4x) {
79772 _3DSTATE_SO_DECL_LIST_CommandSubType_bits(const struct gen_device_info *devinfo)
79774    switch (devinfo->gen) {
79780       if (devinfo->is_haswell) {
79788       if (devinfo->is_g4x) {
79808 _3DSTATE_SO_DECL_LIST_CommandSubType_start(const struct gen_device_info *devinfo)
79810    switch (devinfo->gen) {
79816       if (devinfo->is_haswell) {
79824       if (devinfo->is_g4x) {
79847 _3DSTATE_SO_DECL_LIST_CommandType_bits(const struct gen_device_info *devinfo)
79849    switch (devinfo->gen) {
79855       if (devinfo->is_haswell) {
79863       if (devinfo->is_g4x) {
79883 _3DSTATE_SO_DECL_LIST_CommandType_start(const struct gen_device_info *devinfo)
79885    switch (devinfo->gen) {
79891       if (devinfo->is_haswell) {
79899       if (devinfo->is_g4x) {
79922 _3DSTATE_SO_DECL_LIST_DWordLength_bits(const struct gen_device_info *devinfo)
79924    switch (devinfo->gen) {
79930       if (devinfo->is_haswell) {
79938       if (devinfo->is_g4x) {
79958 _3DSTATE_SO_DECL_LIST_DWordLength_start(const struct gen_device_info *devinfo)
79960    switch (devinfo->gen) {
79966       if (devinfo->is_haswell) {
79974       if (devinfo->is_g4x) {
79997 _3DSTATE_SO_DECL_LIST_Entry_bits(const struct gen_device_info *devinfo)
79999    switch (devinfo->gen) {
80005       if (devinfo->is_haswell) {
80013       if (devinfo->is_g4x) {
80033 _3DSTATE_SO_DECL_LIST_Entry_start(const struct gen_device_info *devinfo)
80035    switch (devinfo->gen) {
80041       if (devinfo->is_haswell) {
80049       if (devinfo->is_g4x) {
80072 _3DSTATE_SO_DECL_LIST_NumEntries0_bits(const struct gen_device_info *devinfo)
80074    switch (devinfo->gen) {
80080       if (devinfo->is_haswell) {
80088       if (devinfo->is_g4x) {
80108 _3DSTATE_SO_DECL_LIST_NumEntries0_start(const struct gen_device_info *devinfo)
80110    switch (devinfo->gen) {
80116       if (devinfo->is_haswell) {
80124       if (devinfo->is_g4x) {
80147 _3DSTATE_SO_DECL_LIST_NumEntries1_bits(const struct gen_device_info *devinfo)
80149    switch (devinfo->gen) {
80155       if (devinfo->is_haswell) {
80163       if (devinfo->is_g4x) {
80183 _3DSTATE_SO_DECL_LIST_NumEntries1_start(const struct gen_device_info *devinfo)
80185    switch (devinfo->gen) {
80191       if (devinfo->is_haswell) {
80199       if (devinfo->is_g4x) {
80222 _3DSTATE_SO_DECL_LIST_NumEntries2_bits(const struct gen_device_info *devinfo)
80224    switch (devinfo->gen) {
80230       if (devinfo->is_haswell) {
80238       if (devinfo->is_g4x) {
80258 _3DSTATE_SO_DECL_LIST_NumEntries2_start(const struct gen_device_info *devinfo)
80260    switch (devinfo->gen) {
80266       if (devinfo->is_haswell) {
80274       if (devinfo->is_g4x) {
80297 _3DSTATE_SO_DECL_LIST_NumEntries3_bits(const struct gen_device_info *devinfo)
80299    switch (devinfo->gen) {
80305       if (devinfo->is_haswell) {
80313       if (devinfo->is_g4x) {
80333 _3DSTATE_SO_DECL_LIST_NumEntries3_start(const struct gen_device_info *devinfo)
80335    switch (devinfo->gen) {
80341       if (devinfo->is_haswell) {
80349       if (devinfo->is_g4x) {
80372 _3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_bits(const struct gen_device_info *devinfo)
80374    switch (devinfo->gen) {
80380       if (devinfo->is_haswell) {
80388       if (devinfo->is_g4x) {
80408 _3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_start(const struct gen_device_info *devinfo)
80410    switch (devinfo->gen) {
80416       if (devinfo->is_haswell) {
80424       if (devinfo->is_g4x) {
80447 _3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_bits(const struct gen_device_info *devinfo)
80449    switch (devinfo->gen) {
80455       if (devinfo->is_haswell) {
80463       if (devinfo->is_g4x) {
80483 _3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_start(const struct gen_device_info *devinfo)
80485    switch (devinfo->gen) {
80491       if (devinfo->is_haswell) {
80499       if (devinfo->is_g4x) {
80522 _3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_bits(const struct gen_device_info *devinfo)
80524    switch (devinfo->gen) {
80530       if (devinfo->is_haswell) {
80538       if (devinfo->is_g4x) {
80558 _3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_start(const struct gen_device_info *devinfo)
80560    switch (devinfo->gen) {
80566       if (devinfo->is_haswell) {
80574       if (devinfo->is_g4x) {
80597 _3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_bits(const struct gen_device_info *devinfo)
80599    switch (devinfo->gen) {
80605       if (devinfo->is_haswell) {
80613       if (devinfo->is_g4x) {
80633 _3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_start(const struct gen_device_info *devinfo)
80635    switch (devinfo->gen) {
80641       if (devinfo->is_haswell) {
80649       if (devinfo->is_g4x) {
80674 _3DSTATE_STENCIL_BUFFER_length(const struct gen_device_info *devinfo)
80676    switch (devinfo->gen) {
80682       if (devinfo->is_haswell) {
80690       if (devinfo->is_g4x) {
80715 _3DSTATE_STENCIL_BUFFER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
80717    switch (devinfo->gen) {
80723       if (devinfo->is_haswell) {
80731       if (devinfo->is_g4x) {
80753 _3DSTATE_STENCIL_BUFFER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
80755    switch (devinfo->gen) {
80761       if (devinfo->is_haswell) {
80769       if (devinfo->is_g4x) {
80794 _3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
80796    switch (devinfo->gen) {
80802       if (devinfo->is_haswell) {
80810       if (devinfo->is_g4x) {
80832 _3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
80834    switch (devinfo->gen) {
80840       if (devinfo->is_haswell) {
80848       if (devinfo->is_g4x) {
80873 _3DSTATE_STENCIL_BUFFER_CommandSubType_bits(const struct gen_device_info *devinfo)
80875    switch (devinfo->gen) {
80881       if (devinfo->is_haswell) {
80889       if (devinfo->is_g4x) {
80911 _3DSTATE_STENCIL_BUFFER_CommandSubType_start(const struct gen_device_info *devinfo)
80913    switch (devinfo->gen) {
80919       if (devinfo->is_haswell) {
80927       if (devinfo->is_g4x) {
80952 _3DSTATE_STENCIL_BUFFER_CommandType_bits(const struct gen_device_info *devinfo)
80954    switch (devinfo->gen) {
80960       if (devinfo->is_haswell) {
80968       if (devinfo->is_g4x) {
80990 _3DSTATE_STENCIL_BUFFER_CommandType_start(const struct gen_device_info *devinfo)
80992    switch (devinfo->gen) {
80998       if (devinfo->is_haswell) {
81006       if (devinfo->is_g4x) {
81031 _3DSTATE_STENCIL_BUFFER_DWordLength_bits(const struct gen_device_info *devinfo)
81033    switch (devinfo->gen) {
81039       if (devinfo->is_haswell) {
81047       if (devinfo->is_g4x) {
81069 _3DSTATE_STENCIL_BUFFER_DWordLength_start(const struct gen_device_info *devinfo)
81071    switch (devinfo->gen) {
81077       if (devinfo->is_haswell) {
81085       if (devinfo->is_g4x) {
81109 _3DSTATE_STENCIL_BUFFER_MOCS_bits(const struct gen_device_info *devinfo)
81111    switch (devinfo->gen) {
81117       if (devinfo->is_haswell) {
81125       if (devinfo->is_g4x) {
81146 _3DSTATE_STENCIL_BUFFER_MOCS_start(const struct gen_device_info *devinfo)
81148    switch (devinfo->gen) {
81154       if (devinfo->is_haswell) {
81162       if (devinfo->is_g4x) {
81184 _3DSTATE_STENCIL_BUFFER_StencilBufferEnable_bits(const struct gen_device_info *devinfo)
81186    switch (devinfo->gen) {
81192       if (devinfo->is_haswell) {
81200       if (devinfo->is_g4x) {
81219 _3DSTATE_STENCIL_BUFFER_StencilBufferEnable_start(const struct gen_device_info *devinfo)
81221    switch (devinfo->gen) {
81227       if (devinfo->is_haswell) {
81235       if (devinfo->is_g4x) {
81260 _3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_bits(const struct gen_device_info *devinfo)
81262    switch (devinfo->gen) {
81268       if (devinfo->is_haswell) {
81276       if (devinfo->is_g4x) {
81298 _3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_start(const struct gen_device_info *devinfo)
81300    switch (devinfo->gen) {
81306       if (devinfo->is_haswell) {
81314       if (devinfo->is_g4x) {
81339 _3DSTATE_STENCIL_BUFFER_SurfacePitch_bits(const struct gen_device_info *devinfo)
81341    switch (devinfo->gen) {
81347       if (devinfo->is_haswell) {
81355       if (devinfo->is_g4x) {
81377 _3DSTATE_STENCIL_BUFFER_SurfacePitch_start(const struct gen_device_info *devinfo)
81379    switch (devinfo->gen) {
81385       if (devinfo->is_haswell) {
81393       if (devinfo->is_g4x) {
81414 _3DSTATE_STENCIL_BUFFER_SurfaceQPitch_bits(const struct gen_device_info *devinfo)
81416    switch (devinfo->gen) {
81422       if (devinfo->is_haswell) {
81430       if (devinfo->is_g4x) {
81448 _3DSTATE_STENCIL_BUFFER_SurfaceQPitch_start(const struct gen_device_info *devinfo)
81450    switch (devinfo->gen) {
81456       if (devinfo->is_haswell) {
81464       if (devinfo->is_g4x) {
81487 _3DSTATE_STREAMOUT_length(const struct gen_device_info *devinfo)
81489    switch (devinfo->gen) {
81495       if (devinfo->is_haswell) {
81503       if (devinfo->is_g4x) {
81526 _3DSTATE_STREAMOUT_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
81528    switch (devinfo->gen) {
81534       if (devinfo->is_haswell) {
81542       if (devinfo->is_g4x) {
81562 _3DSTATE_STREAMOUT_3DCommandOpcode_start(const struct gen_device_info *devinfo)
81564    switch (devinfo->gen) {
81570       if (devinfo->is_haswell) {
81578       if (devinfo->is_g4x) {
81601 _3DSTATE_STREAMOUT_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
81603    switch (devinfo->gen) {
81609       if (devinfo->is_haswell) {
81617       if (devinfo->is_g4x) {
81637 _3DSTATE_STREAMOUT_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
81639    switch (devinfo->gen) {
81645       if (devinfo->is_haswell) {
81653       if (devinfo->is_g4x) {
81674 _3DSTATE_STREAMOUT_Buffer0SurfacePitch_bits(const struct gen_device_info *devinfo)
81676    switch (devinfo->gen) {
81682       if (devinfo->is_haswell) {
81690       if (devinfo->is_g4x) {
81708 _3DSTATE_STREAMOUT_Buffer0SurfacePitch_start(const struct gen_device_info *devinfo)
81710    switch (devinfo->gen) {
81716       if (devinfo->is_haswell) {
81724       if (devinfo->is_g4x) {
81745 _3DSTATE_STREAMOUT_Buffer1SurfacePitch_bits(const struct gen_device_info *devinfo)
81747    switch (devinfo->gen) {
81753       if (devinfo->is_haswell) {
81761       if (devinfo->is_g4x) {
81779 _3DSTATE_STREAMOUT_Buffer1SurfacePitch_start(const struct gen_device_info *devinfo)
81781    switch (devinfo->gen) {
81787       if (devinfo->is_haswell) {
81795       if (devinfo->is_g4x) {
81816 _3DSTATE_STREAMOUT_Buffer2SurfacePitch_bits(const struct gen_device_info *devinfo)
81818    switch (devinfo->gen) {
81824       if (devinfo->is_haswell) {
81832       if (devinfo->is_g4x) {
81850 _3DSTATE_STREAMOUT_Buffer2SurfacePitch_start(const struct gen_device_info *devinfo)
81852    switch (devinfo->gen) {
81858       if (devinfo->is_haswell) {
81866       if (devinfo->is_g4x) {
81887 _3DSTATE_STREAMOUT_Buffer3SurfacePitch_bits(const struct gen_device_info *devinfo)
81889    switch (devinfo->gen) {
81895       if (devinfo->is_haswell) {
81903       if (devinfo->is_g4x) {
81921 _3DSTATE_STREAMOUT_Buffer3SurfacePitch_start(const struct gen_device_info *devinfo)
81923    switch (devinfo->gen) {
81929       if (devinfo->is_haswell) {
81937       if (devinfo->is_g4x) {
81960 _3DSTATE_STREAMOUT_CommandSubType_bits(const struct gen_device_info *devinfo)
81962    switch (devinfo->gen) {
81968       if (devinfo->is_haswell) {
81976       if (devinfo->is_g4x) {
81996 _3DSTATE_STREAMOUT_CommandSubType_start(const struct gen_device_info *devinfo)
81998    switch (devinfo->gen) {
82004       if (devinfo->is_haswell) {
82012       if (devinfo->is_g4x) {
82035 _3DSTATE_STREAMOUT_CommandType_bits(const struct gen_device_info *devinfo)
82037    switch (devinfo->gen) {
82043       if (devinfo->is_haswell) {
82051       if (devinfo->is_g4x) {
82071 _3DSTATE_STREAMOUT_CommandType_start(const struct gen_device_info *devinfo)
82073    switch (devinfo->gen) {
82079       if (devinfo->is_haswell) {
82087       if (devinfo->is_g4x) {
82110 _3DSTATE_STREAMOUT_DWordLength_bits(const struct gen_device_info *devinfo)
82112    switch (devinfo->gen) {
82118       if (devinfo->is_haswell) {
82126       if (devinfo->is_g4x) {
82146 _3DSTATE_STREAMOUT_DWordLength_start(const struct gen_device_info *devinfo)
82148    switch (devinfo->gen) {
82154       if (devinfo->is_haswell) {
82162       if (devinfo->is_g4x) {
82183 _3DSTATE_STREAMOUT_ForceRendering_bits(const struct gen_device_info *devinfo)
82185    switch (devinfo->gen) {
82191       if (devinfo->is_haswell) {
82199       if (devinfo->is_g4x) {
82217 _3DSTATE_STREAMOUT_ForceRendering_start(const struct gen_device_info *devinfo)
82219    switch (devinfo->gen) {
82225       if (devinfo->is_haswell) {
82233       if (devinfo->is_g4x) {
82256 _3DSTATE_STREAMOUT_RenderStreamSelect_bits(const struct gen_device_info *devinfo)
82258    switch (devinfo->gen) {
82264       if (devinfo->is_haswell) {
82272       if (devinfo->is_g4x) {
82292 _3DSTATE_STREAMOUT_RenderStreamSelect_start(const struct gen_device_info *devinfo)
82294    switch (devinfo->gen) {
82300       if (devinfo->is_haswell) {
82308       if (devinfo->is_g4x) {
82331 _3DSTATE_STREAMOUT_RenderingDisable_bits(const struct gen_device_info *devinfo)
82333    switch (devinfo->gen) {
82339       if (devinfo->is_haswell) {
82347       if (devinfo->is_g4x) {
82367 _3DSTATE_STREAMOUT_RenderingDisable_start(const struct gen_device_info *devinfo)
82369    switch (devinfo->gen) {
82375       if (devinfo->is_haswell) {
82383       if (devinfo->is_g4x) {
82406 _3DSTATE_STREAMOUT_ReorderMode_bits(const struct gen_device_info *devinfo)
82408    switch (devinfo->gen) {
82414       if (devinfo->is_haswell) {
82422       if (devinfo->is_g4x) {
82442 _3DSTATE_STREAMOUT_ReorderMode_start(const struct gen_device_info *devinfo)
82444    switch (devinfo->gen) {
82450       if (devinfo->is_haswell) {
82458       if (devinfo->is_g4x) {
82477 _3DSTATE_STREAMOUT_SOBufferEnable0_bits(const struct gen_device_info *devinfo)
82479    switch (devinfo->gen) {
82485       if (devinfo->is_haswell) {
82493       if (devinfo->is_g4x) {
82509 _3DSTATE_STREAMOUT_SOBufferEnable0_start(const struct gen_device_info *devinfo)
82511    switch (devinfo->gen) {
82517       if (devinfo->is_haswell) {
82525       if (devinfo->is_g4x) {
82544 _3DSTATE_STREAMOUT_SOBufferEnable1_bits(const struct gen_device_info *devinfo)
82546    switch (devinfo->gen) {
82552       if (devinfo->is_haswell) {
82560       if (devinfo->is_g4x) {
82576 _3DSTATE_STREAMOUT_SOBufferEnable1_start(const struct gen_device_info *devinfo)
82578    switch (devinfo->gen) {
82584       if (devinfo->is_haswell) {
82592       if (devinfo->is_g4x) {
82611 _3DSTATE_STREAMOUT_SOBufferEnable2_bits(const struct gen_device_info *devinfo)
82613    switch (devinfo->gen) {
82619       if (devinfo->is_haswell) {
82627       if (devinfo->is_g4x) {
82643 _3DSTATE_STREAMOUT_SOBufferEnable2_start(const struct gen_device_info *devinfo)
82645    switch (devinfo->gen) {
82651       if (devinfo->is_haswell) {
82659       if (devinfo->is_g4x) {
82678 _3DSTATE_STREAMOUT_SOBufferEnable3_bits(const struct gen_device_info *devinfo)
82680    switch (devinfo->gen) {
82686       if (devinfo->is_haswell) {
82694       if (devinfo->is_g4x) {
82710 _3DSTATE_STREAMOUT_SOBufferEnable3_start(const struct gen_device_info *devinfo)
82712    switch (devinfo->gen) {
82718       if (devinfo->is_haswell) {
82726       if (devinfo->is_g4x) {
82749 _3DSTATE_STREAMOUT_SOFunctionEnable_bits(const struct gen_device_info *devinfo)
82751    switch (devinfo->gen) {
82757       if (devinfo->is_haswell) {
82765       if (devinfo->is_g4x) {
82785 _3DSTATE_STREAMOUT_SOFunctionEnable_start(const struct gen_device_info *devinfo)
82787    switch (devinfo->gen) {
82793       if (devinfo->is_haswell) {
82801       if (devinfo->is_g4x) {
82824 _3DSTATE_STREAMOUT_SOStatisticsEnable_bits(const struct gen_device_info *devinfo)
82826    switch (devinfo->gen) {
82832       if (devinfo->is_haswell) {
82840       if (devinfo->is_g4x) {
82860 _3DSTATE_STREAMOUT_SOStatisticsEnable_start(const struct gen_device_info *devinfo)
82862    switch (devinfo->gen) {
82868       if (devinfo->is_haswell) {
82876       if (devinfo->is_g4x) {
82899 _3DSTATE_STREAMOUT_Stream0VertexReadLength_bits(const struct gen_device_info *devinfo)
82901    switch (devinfo->gen) {
82907       if (devinfo->is_haswell) {
82915       if (devinfo->is_g4x) {
82935 _3DSTATE_STREAMOUT_Stream0VertexReadLength_start(const struct gen_device_info *devinfo)
82937    switch (devinfo->gen) {
82943       if (devinfo->is_haswell) {
82951       if (devinfo->is_g4x) {
82974 _3DSTATE_STREAMOUT_Stream0VertexReadOffset_bits(const struct gen_device_info *devinfo)
82976    switch (devinfo->gen) {
82982       if (devinfo->is_haswell) {
82990       if (devinfo->is_g4x) {
83010 _3DSTATE_STREAMOUT_Stream0VertexReadOffset_start(const struct gen_device_info *devinfo)
83012    switch (devinfo->gen) {
83018       if (devinfo->is_haswell) {
83026       if (devinfo->is_g4x) {
83049 _3DSTATE_STREAMOUT_Stream1VertexReadLength_bits(const struct gen_device_info *devinfo)
83051    switch (devinfo->gen) {
83057       if (devinfo->is_haswell) {
83065       if (devinfo->is_g4x) {
83085 _3DSTATE_STREAMOUT_Stream1VertexReadLength_start(const struct gen_device_info *devinfo)
83087    switch (devinfo->gen) {
83093       if (devinfo->is_haswell) {
83101       if (devinfo->is_g4x) {
83124 _3DSTATE_STREAMOUT_Stream1VertexReadOffset_bits(const struct gen_device_info *devinfo)
83126    switch (devinfo->gen) {
83132       if (devinfo->is_haswell) {
83140       if (devinfo->is_g4x) {
83160 _3DSTATE_STREAMOUT_Stream1VertexReadOffset_start(const struct gen_device_info *devinfo)
83162    switch (devinfo->gen) {
83168       if (devinfo->is_haswell) {
83176       if (devinfo->is_g4x) {
83199 _3DSTATE_STREAMOUT_Stream2VertexReadLength_bits(const struct gen_device_info *devinfo)
83201    switch (devinfo->gen) {
83207       if (devinfo->is_haswell) {
83215       if (devinfo->is_g4x) {
83235 _3DSTATE_STREAMOUT_Stream2VertexReadLength_start(const struct gen_device_info *devinfo)
83237    switch (devinfo->gen) {
83243       if (devinfo->is_haswell) {
83251       if (devinfo->is_g4x) {
83274 _3DSTATE_STREAMOUT_Stream2VertexReadOffset_bits(const struct gen_device_info *devinfo)
83276    switch (devinfo->gen) {
83282       if (devinfo->is_haswell) {
83290       if (devinfo->is_g4x) {
83310 _3DSTATE_STREAMOUT_Stream2VertexReadOffset_start(const struct gen_device_info *devinfo)
83312    switch (devinfo->gen) {
83318       if (devinfo->is_haswell) {
83326       if (devinfo->is_g4x) {
83349 _3DSTATE_STREAMOUT_Stream3VertexReadLength_bits(const struct gen_device_info *devinfo)
83351    switch (devinfo->gen) {
83357       if (devinfo->is_haswell) {
83365       if (devinfo->is_g4x) {
83385 _3DSTATE_STREAMOUT_Stream3VertexReadLength_start(const struct gen_device_info *devinfo)
83387    switch (devinfo->gen) {
83393       if (devinfo->is_haswell) {
83401       if (devinfo->is_g4x) {
83424 _3DSTATE_STREAMOUT_Stream3VertexReadOffset_bits(const struct gen_device_info *devinfo)
83426    switch (devinfo->gen) {
83432       if (devinfo->is_haswell) {
83440       if (devinfo->is_g4x) {
83460 _3DSTATE_STREAMOUT_Stream3VertexReadOffset_start(const struct gen_device_info *devinfo)
83462    switch (devinfo->gen) {
83468       if (devinfo->is_haswell) {
83476       if (devinfo->is_g4x) {
83499 _3DSTATE_TE_length(const struct gen_device_info *devinfo)
83501    switch (devinfo->gen) {
83507       if (devinfo->is_haswell) {
83515       if (devinfo->is_g4x) {
83538 _3DSTATE_TE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
83540    switch (devinfo->gen) {
83546       if (devinfo->is_haswell) {
83554       if (devinfo->is_g4x) {
83574 _3DSTATE_TE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
83576    switch (devinfo->gen) {
83582       if (devinfo->is_haswell) {
83590       if (devinfo->is_g4x) {
83613 _3DSTATE_TE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
83615    switch (devinfo->gen) {
83621       if (devinfo->is_haswell) {
83629       if (devinfo->is_g4x) {
83649 _3DSTATE_TE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
83651    switch (devinfo->gen) {
83657       if (devinfo->is_haswell) {
83665       if (devinfo->is_g4x) {
83688 _3DSTATE_TE_CommandSubType_bits(const struct gen_device_info *devinfo)
83690    switch (devinfo->gen) {
83696       if (devinfo->is_haswell) {
83704       if (devinfo->is_g4x) {
83724 _3DSTATE_TE_CommandSubType_start(const struct gen_device_info *devinfo)
83726    switch (devinfo->gen) {
83732       if (devinfo->is_haswell) {
83740       if (devinfo->is_g4x) {
83763 _3DSTATE_TE_CommandType_bits(const struct gen_device_info *devinfo)
83765    switch (devinfo->gen) {
83771       if (devinfo->is_haswell) {
83779       if (devinfo->is_g4x) {
83799 _3DSTATE_TE_CommandType_start(const struct gen_device_info *devinfo)
83801    switch (devinfo->gen) {
83807       if (devinfo->is_haswell) {
83815       if (devinfo->is_g4x) {
83838 _3DSTATE_TE_DWordLength_bits(const struct gen_device_info *devinfo)
83840    switch (devinfo->gen) {
83846       if (devinfo->is_haswell) {
83854       if (devinfo->is_g4x) {
83874 _3DSTATE_TE_DWordLength_start(const struct gen_device_info *devinfo)
83876    switch (devinfo->gen) {
83882       if (devinfo->is_haswell) {
83890       if (devinfo->is_g4x) {
83913 _3DSTATE_TE_MaximumTessellationFactorNotOdd_bits(const struct gen_device_info *devinfo)
83915    switch (devinfo->gen) {
83921       if (devinfo->is_haswell) {
83929       if (devinfo->is_g4x) {
83949 _3DSTATE_TE_MaximumTessellationFactorNotOdd_start(const struct gen_device_info *devinfo)
83951    switch (devinfo->gen) {
83957       if (devinfo->is_haswell) {
83965       if (devinfo->is_g4x) {
83988 _3DSTATE_TE_MaximumTessellationFactorOdd_bits(const struct gen_device_info *devinfo)
83990    switch (devinfo->gen) {
83996       if (devinfo->is_haswell) {
84004       if (devinfo->is_g4x) {
84024 _3DSTATE_TE_MaximumTessellationFactorOdd_start(const struct gen_device_info *devinfo)
84026    switch (devinfo->gen) {
84032       if (devinfo->is_haswell) {
84040       if (devinfo->is_g4x) {
84063 _3DSTATE_TE_OutputTopology_bits(const struct gen_device_info *devinfo)
84065    switch (devinfo->gen) {
84071       if (devinfo->is_haswell) {
84079       if (devinfo->is_g4x) {
84099 _3DSTATE_TE_OutputTopology_start(const struct gen_device_info *devinfo)
84101    switch (devinfo->gen) {
84107       if (devinfo->is_haswell) {
84115       if (devinfo->is_g4x) {
84138 _3DSTATE_TE_Partitioning_bits(const struct gen_device_info *devinfo)
84140    switch (devinfo->gen) {
84146       if (devinfo->is_haswell) {
84154       if (devinfo->is_g4x) {
84174 _3DSTATE_TE_Partitioning_start(const struct gen_device_info *devinfo)
84176    switch (devinfo->gen) {
84182       if (devinfo->is_haswell) {
84190       if (devinfo->is_g4x) {
84213 _3DSTATE_TE_TEDomain_bits(const struct gen_device_info *devinfo)
84215    switch (devinfo->gen) {
84221       if (devinfo->is_haswell) {
84229       if (devinfo->is_g4x) {
84249 _3DSTATE_TE_TEDomain_start(const struct gen_device_info *devinfo)
84251    switch (devinfo->gen) {
84257       if (devinfo->is_haswell) {
84265       if (devinfo->is_g4x) {
84288 _3DSTATE_TE_TEEnable_bits(const struct gen_device_info *devinfo)
84290    switch (devinfo->gen) {
84296       if (devinfo->is_haswell) {
84304       if (devinfo->is_g4x) {
84324 _3DSTATE_TE_TEEnable_start(const struct gen_device_info *devinfo)
84326    switch (devinfo->gen) {
84332       if (devinfo->is_haswell) {
84340       if (devinfo->is_g4x) {
84363 _3DSTATE_TE_TEMode_bits(const struct gen_device_info *devinfo)
84365    switch (devinfo->gen) {
84371       if (devinfo->is_haswell) {
84379       if (devinfo->is_g4x) {
84399 _3DSTATE_TE_TEMode_start(const struct gen_device_info *devinfo)
84401    switch (devinfo->gen) {
84407       if (devinfo->is_haswell) {
84415       if (devinfo->is_g4x) {
84433 _3DSTATE_URB_length(const struct gen_device_info *devinfo)
84435    switch (devinfo->gen) {
84441       if (devinfo->is_haswell) {
84449       if (devinfo->is_g4x) {
84467 _3DSTATE_URB_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
84469    switch (devinfo->gen) {
84475       if (devinfo->is_haswell) {
84483       if (devinfo->is_g4x) {
84498 _3DSTATE_URB_3DCommandOpcode_start(const struct gen_device_info *devinfo)
84500    switch (devinfo->gen) {
84506       if (devinfo->is_haswell) {
84514       if (devinfo->is_g4x) {
84532 _3DSTATE_URB_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
84534    switch (devinfo->gen) {
84540       if (devinfo->is_haswell) {
84548       if (devinfo->is_g4x) {
84563 _3DSTATE_URB_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
84565    switch (devinfo->gen) {
84571       if (devinfo->is_haswell) {
84579       if (devinfo->is_g4x) {
84597 _3DSTATE_URB_CommandSubType_bits(const struct gen_device_info *devinfo)
84599    switch (devinfo->gen) {
84605       if (devinfo->is_haswell) {
84613       if (devinfo->is_g4x) {
84628 _3DSTATE_URB_CommandSubType_start(const struct gen_device_info *devinfo)
84630    switch (devinfo->gen) {
84636       if (devinfo->is_haswell) {
84644       if (devinfo->is_g4x) {
84662 _3DSTATE_URB_CommandType_bits(const struct gen_device_info *devinfo)
84664    switch (devinfo->gen) {
84670       if (devinfo->is_haswell) {
84678       if (devinfo->is_g4x) {
84693 _3DSTATE_URB_CommandType_start(const struct gen_device_info *devinfo)
84695    switch (devinfo->gen) {
84701       if (devinfo->is_haswell) {
84709       if (devinfo->is_g4x) {
84727 _3DSTATE_URB_DWordLength_bits(const struct gen_device_info *devinfo)
84729    switch (devinfo->gen) {
84735       if (devinfo->is_haswell) {
84743       if (devinfo->is_g4x) {
84758 _3DSTATE_URB_DWordLength_start(const struct gen_device_info *devinfo)
84760    switch (devinfo->gen) {
84766       if (devinfo->is_haswell) {
84774       if (devinfo->is_g4x) {
84792 _3DSTATE_URB_GSNumberofURBEntries_bits(const struct gen_device_info *devinfo)
84794    switch (devinfo->gen) {
84800       if (devinfo->is_haswell) {
84808       if (devinfo->is_g4x) {
84823 _3DSTATE_URB_GSNumberofURBEntries_start(const struct gen_device_info *devinfo)
84825    switch (devinfo->gen) {
84831       if (devinfo->is_haswell) {
84839       if (devinfo->is_g4x) {
84857 _3DSTATE_URB_GSURBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
84859    switch (devinfo->gen) {
84865       if (devinfo->is_haswell) {
84873       if (devinfo->is_g4x) {
84888 _3DSTATE_URB_GSURBEntryAllocationSize_start(const struct gen_device_info *devinfo)
84890    switch (devinfo->gen) {
84896       if (devinfo->is_haswell) {
84904       if (devinfo->is_g4x) {
84922 _3DSTATE_URB_VSNumberofURBEntries_bits(const struct gen_device_info *devinfo)
84924    switch (devinfo->gen) {
84930       if (devinfo->is_haswell) {
84938       if (devinfo->is_g4x) {
84953 _3DSTATE_URB_VSNumberofURBEntries_start(const struct gen_device_info *devinfo)
84955    switch (devinfo->gen) {
84961       if (devinfo->is_haswell) {
84969       if (devinfo->is_g4x) {
84987 _3DSTATE_URB_VSURBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
84989    switch (devinfo->gen) {
84995       if (devinfo->is_haswell) {
85003       if (devinfo->is_g4x) {
85018 _3DSTATE_URB_VSURBEntryAllocationSize_start(const struct gen_device_info *devinfo)
85020    switch (devinfo->gen) {
85026       if (devinfo->is_haswell) {
85034       if (devinfo->is_g4x) {
85054 _3DSTATE_URB_CLEAR_length(const struct gen_device_info *devinfo)
85056    switch (devinfo->gen) {
85062       if (devinfo->is_haswell) {
85070       if (devinfo->is_g4x) {
85090 _3DSTATE_URB_CLEAR_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
85092    switch (devinfo->gen) {
85098       if (devinfo->is_haswell) {
85106       if (devinfo->is_g4x) {
85123 _3DSTATE_URB_CLEAR_3DCommandOpcode_start(const struct gen_device_info *devinfo)
85125    switch (devinfo->gen) {
85131       if (devinfo->is_haswell) {
85139       if (devinfo->is_g4x) {
85159 _3DSTATE_URB_CLEAR_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
85161    switch (devinfo->gen) {
85167       if (devinfo->is_haswell) {
85175       if (devinfo->is_g4x) {
85192 _3DSTATE_URB_CLEAR_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
85194    switch (devinfo->gen) {
85200       if (devinfo->is_haswell) {
85208       if (devinfo->is_g4x) {
85228 _3DSTATE_URB_CLEAR_CommandSubType_bits(const struct gen_device_info *devinfo)
85230    switch (devinfo->gen) {
85236       if (devinfo->is_haswell) {
85244       if (devinfo->is_g4x) {
85261 _3DSTATE_URB_CLEAR_CommandSubType_start(const struct gen_device_info *devinfo)
85263    switch (devinfo->gen) {
85269       if (devinfo->is_haswell) {
85277       if (devinfo->is_g4x) {
85297 _3DSTATE_URB_CLEAR_CommandType_bits(const struct gen_device_info *devinfo)
85299    switch (devinfo->gen) {
85305       if (devinfo->is_haswell) {
85313       if (devinfo->is_g4x) {
85330 _3DSTATE_URB_CLEAR_CommandType_start(const struct gen_device_info *devinfo)
85332    switch (devinfo->gen) {
85338       if (devinfo->is_haswell) {
85346       if (devinfo->is_g4x) {
85366 _3DSTATE_URB_CLEAR_DWordLength_bits(const struct gen_device_info *devinfo)
85368    switch (devinfo->gen) {
85374       if (devinfo->is_haswell) {
85382       if (devinfo->is_g4x) {
85399 _3DSTATE_URB_CLEAR_DWordLength_start(const struct gen_device_info *devinfo)
85401    switch (devinfo->gen) {
85407       if (devinfo->is_haswell) {
85415       if (devinfo->is_g4x) {
85435 _3DSTATE_URB_CLEAR_URBAddress_bits(const struct gen_device_info *devinfo)
85437    switch (devinfo->gen) {
85443       if (devinfo->is_haswell) {
85451       if (devinfo->is_g4x) {
85468 _3DSTATE_URB_CLEAR_URBAddress_start(const struct gen_device_info *devinfo)
85470    switch (devinfo->gen) {
85476       if (devinfo->is_haswell) {
85484       if (devinfo->is_g4x) {
85504 _3DSTATE_URB_CLEAR_URBClearLength_bits(const struct gen_device_info *devinfo)
85506    switch (devinfo->gen) {
85512       if (devinfo->is_haswell) {
85520       if (devinfo->is_g4x) {
85537 _3DSTATE_URB_CLEAR_URBClearLength_start(const struct gen_device_info *devinfo)
85539    switch (devinfo->gen) {
85545       if (devinfo->is_haswell) {
85553       if (devinfo->is_g4x) {
85576 _3DSTATE_URB_DS_length(const struct gen_device_info *devinfo)
85578    switch (devinfo->gen) {
85584       if (devinfo->is_haswell) {
85592       if (devinfo->is_g4x) {
85615 _3DSTATE_URB_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
85617    switch (devinfo->gen) {
85623       if (devinfo->is_haswell) {
85631       if (devinfo->is_g4x) {
85651 _3DSTATE_URB_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
85653    switch (devinfo->gen) {
85659       if (devinfo->is_haswell) {
85667       if (devinfo->is_g4x) {
85690 _3DSTATE_URB_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
85692    switch (devinfo->gen) {
85698       if (devinfo->is_haswell) {
85706       if (devinfo->is_g4x) {
85726 _3DSTATE_URB_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
85728    switch (devinfo->gen) {
85734       if (devinfo->is_haswell) {
85742       if (devinfo->is_g4x) {
85765 _3DSTATE_URB_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
85767    switch (devinfo->gen) {
85773       if (devinfo->is_haswell) {
85781       if (devinfo->is_g4x) {
85801 _3DSTATE_URB_DS_CommandSubType_start(const struct gen_device_info *devinfo)
85803    switch (devinfo->gen) {
85809       if (devinfo->is_haswell) {
85817       if (devinfo->is_g4x) {
85840 _3DSTATE_URB_DS_CommandType_bits(const struct gen_device_info *devinfo)
85842    switch (devinfo->gen) {
85848       if (devinfo->is_haswell) {
85856       if (devinfo->is_g4x) {
85876 _3DSTATE_URB_DS_CommandType_start(const struct gen_device_info *devinfo)
85878    switch (devinfo->gen) {
85884       if (devinfo->is_haswell) {
85892       if (devinfo->is_g4x) {
85915 _3DSTATE_URB_DS_DSNumberofURBEntries_bits(const struct gen_device_info *devinfo)
85917    switch (devinfo->gen) {
85923       if (devinfo->is_haswell) {
85931       if (devinfo->is_g4x) {
85951 _3DSTATE_URB_DS_DSNumberofURBEntries_start(const struct gen_device_info *devinfo)
85953    switch (devinfo->gen) {
85959       if (devinfo->is_haswell) {
85967       if (devinfo->is_g4x) {
85990 _3DSTATE_URB_DS_DSURBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
85992    switch (devinfo->gen) {
85998       if (devinfo->is_haswell) {
86006       if (devinfo->is_g4x) {
86026 _3DSTATE_URB_DS_DSURBEntryAllocationSize_start(const struct gen_device_info *devinfo)
86028    switch (devinfo->gen) {
86034       if (devinfo->is_haswell) {
86042       if (devinfo->is_g4x) {
86065 _3DSTATE_URB_DS_DSURBStartingAddress_bits(const struct gen_device_info *devinfo)
86067    switch (devinfo->gen) {
86073       if (devinfo->is_haswell) {
86081       if (devinfo->is_g4x) {
86101 _3DSTATE_URB_DS_DSURBStartingAddress_start(const struct gen_device_info *devinfo)
86103    switch (devinfo->gen) {
86109       if (devinfo->is_haswell) {
86117       if (devinfo->is_g4x) {
86140 _3DSTATE_URB_DS_DWordLength_bits(const struct gen_device_info *devinfo)
86142    switch (devinfo->gen) {
86148       if (devinfo->is_haswell) {
86156       if (devinfo->is_g4x) {
86176 _3DSTATE_URB_DS_DWordLength_start(const struct gen_device_info *devinfo)
86178    switch (devinfo->gen) {
86184       if (devinfo->is_haswell) {
86192       if (devinfo->is_g4x) {
86215 _3DSTATE_URB_GS_length(const struct gen_device_info *devinfo)
86217    switch (devinfo->gen) {
86223       if (devinfo->is_haswell) {
86231       if (devinfo->is_g4x) {
86254 _3DSTATE_URB_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
86256    switch (devinfo->gen) {
86262       if (devinfo->is_haswell) {
86270       if (devinfo->is_g4x) {
86290 _3DSTATE_URB_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
86292    switch (devinfo->gen) {
86298       if (devinfo->is_haswell) {
86306       if (devinfo->is_g4x) {
86329 _3DSTATE_URB_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
86331    switch (devinfo->gen) {
86337       if (devinfo->is_haswell) {
86345       if (devinfo->is_g4x) {
86365 _3DSTATE_URB_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
86367    switch (devinfo->gen) {
86373       if (devinfo->is_haswell) {
86381       if (devinfo->is_g4x) {
86404 _3DSTATE_URB_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
86406    switch (devinfo->gen) {
86412       if (devinfo->is_haswell) {
86420       if (devinfo->is_g4x) {
86440 _3DSTATE_URB_GS_CommandSubType_start(const struct gen_device_info *devinfo)
86442    switch (devinfo->gen) {
86448       if (devinfo->is_haswell) {
86456       if (devinfo->is_g4x) {
86479 _3DSTATE_URB_GS_CommandType_bits(const struct gen_device_info *devinfo)
86481    switch (devinfo->gen) {
86487       if (devinfo->is_haswell) {
86495       if (devinfo->is_g4x) {
86515 _3DSTATE_URB_GS_CommandType_start(const struct gen_device_info *devinfo)
86517    switch (devinfo->gen) {
86523       if (devinfo->is_haswell) {
86531       if (devinfo->is_g4x) {
86554 _3DSTATE_URB_GS_DWordLength_bits(const struct gen_device_info *devinfo)
86556    switch (devinfo->gen) {
86562       if (devinfo->is_haswell) {
86570       if (devinfo->is_g4x) {
86590 _3DSTATE_URB_GS_DWordLength_start(const struct gen_device_info *devinfo)
86592    switch (devinfo->gen) {
86598       if (devinfo->is_haswell) {
86606       if (devinfo->is_g4x) {
86629 _3DSTATE_URB_GS_GSNumberofURBEntries_bits(const struct gen_device_info *devinfo)
86631    switch (devinfo->gen) {
86637       if (devinfo->is_haswell) {
86645       if (devinfo->is_g4x) {
86665 _3DSTATE_URB_GS_GSNumberofURBEntries_start(const struct gen_device_info *devinfo)
86667    switch (devinfo->gen) {
86673       if (devinfo->is_haswell) {
86681       if (devinfo->is_g4x) {
86704 _3DSTATE_URB_GS_GSURBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
86706    switch (devinfo->gen) {
86712       if (devinfo->is_haswell) {
86720       if (devinfo->is_g4x) {
86740 _3DSTATE_URB_GS_GSURBEntryAllocationSize_start(const struct gen_device_info *devinfo)
86742    switch (devinfo->gen) {
86748       if (devinfo->is_haswell) {
86756       if (devinfo->is_g4x) {
86779 _3DSTATE_URB_GS_GSURBStartingAddress_bits(const struct gen_device_info *devinfo)
86781    switch (devinfo->gen) {
86787       if (devinfo->is_haswell) {
86795       if (devinfo->is_g4x) {
86815 _3DSTATE_URB_GS_GSURBStartingAddress_start(const struct gen_device_info *devinfo)
86817    switch (devinfo->gen) {
86823       if (devinfo->is_haswell) {
86831       if (devinfo->is_g4x) {
86854 _3DSTATE_URB_HS_length(const struct gen_device_info *devinfo)
86856    switch (devinfo->gen) {
86862       if (devinfo->is_haswell) {
86870       if (devinfo->is_g4x) {
86893 _3DSTATE_URB_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
86895    switch (devinfo->gen) {
86901       if (devinfo->is_haswell) {
86909       if (devinfo->is_g4x) {
86929 _3DSTATE_URB_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
86931    switch (devinfo->gen) {
86937       if (devinfo->is_haswell) {
86945       if (devinfo->is_g4x) {
86968 _3DSTATE_URB_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
86970    switch (devinfo->gen) {
86976       if (devinfo->is_haswell) {
86984       if (devinfo->is_g4x) {
87004 _3DSTATE_URB_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
87006    switch (devinfo->gen) {
87012       if (devinfo->is_haswell) {
87020       if (devinfo->is_g4x) {
87043 _3DSTATE_URB_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
87045    switch (devinfo->gen) {
87051       if (devinfo->is_haswell) {
87059       if (devinfo->is_g4x) {
87079 _3DSTATE_URB_HS_CommandSubType_start(const struct gen_device_info *devinfo)
87081    switch (devinfo->gen) {
87087       if (devinfo->is_haswell) {
87095       if (devinfo->is_g4x) {
87118 _3DSTATE_URB_HS_CommandType_bits(const struct gen_device_info *devinfo)
87120    switch (devinfo->gen) {
87126       if (devinfo->is_haswell) {
87134       if (devinfo->is_g4x) {
87154 _3DSTATE_URB_HS_CommandType_start(const struct gen_device_info *devinfo)
87156    switch (devinfo->gen) {
87162       if (devinfo->is_haswell) {
87170       if (devinfo->is_g4x) {
87193 _3DSTATE_URB_HS_DWordLength_bits(const struct gen_device_info *devinfo)
87195    switch (devinfo->gen) {
87201       if (devinfo->is_haswell) {
87209       if (devinfo->is_g4x) {
87229 _3DSTATE_URB_HS_DWordLength_start(const struct gen_device_info *devinfo)
87231    switch (devinfo->gen) {
87237       if (devinfo->is_haswell) {
87245       if (devinfo->is_g4x) {
87268 _3DSTATE_URB_HS_HSNumberofURBEntries_bits(const struct gen_device_info *devinfo)
87270    switch (devinfo->gen) {
87276       if (devinfo->is_haswell) {
87284       if (devinfo->is_g4x) {
87304 _3DSTATE_URB_HS_HSNumberofURBEntries_start(const struct gen_device_info *devinfo)
87306    switch (devinfo->gen) {
87312       if (devinfo->is_haswell) {
87320       if (devinfo->is_g4x) {
87343 _3DSTATE_URB_HS_HSURBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
87345    switch (devinfo->gen) {
87351       if (devinfo->is_haswell) {
87359       if (devinfo->is_g4x) {
87379 _3DSTATE_URB_HS_HSURBEntryAllocationSize_start(const struct gen_device_info *devinfo)
87381    switch (devinfo->gen) {
87387       if (devinfo->is_haswell) {
87395       if (devinfo->is_g4x) {
87418 _3DSTATE_URB_HS_HSURBStartingAddress_bits(const struct gen_device_info *devinfo)
87420    switch (devinfo->gen) {
87426       if (devinfo->is_haswell) {
87434       if (devinfo->is_g4x) {
87454 _3DSTATE_URB_HS_HSURBStartingAddress_start(const struct gen_device_info *devinfo)
87456    switch (devinfo->gen) {
87462       if (devinfo->is_haswell) {
87470       if (devinfo->is_g4x) {
87493 _3DSTATE_URB_VS_length(const struct gen_device_info *devinfo)
87495    switch (devinfo->gen) {
87501       if (devinfo->is_haswell) {
87509       if (devinfo->is_g4x) {
87532 _3DSTATE_URB_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
87534    switch (devinfo->gen) {
87540       if (devinfo->is_haswell) {
87548       if (devinfo->is_g4x) {
87568 _3DSTATE_URB_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
87570    switch (devinfo->gen) {
87576       if (devinfo->is_haswell) {
87584       if (devinfo->is_g4x) {
87607 _3DSTATE_URB_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
87609    switch (devinfo->gen) {
87615       if (devinfo->is_haswell) {
87623       if (devinfo->is_g4x) {
87643 _3DSTATE_URB_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
87645    switch (devinfo->gen) {
87651       if (devinfo->is_haswell) {
87659       if (devinfo->is_g4x) {
87682 _3DSTATE_URB_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
87684    switch (devinfo->gen) {
87690       if (devinfo->is_haswell) {
87698       if (devinfo->is_g4x) {
87718 _3DSTATE_URB_VS_CommandSubType_start(const struct gen_device_info *devinfo)
87720    switch (devinfo->gen) {
87726       if (devinfo->is_haswell) {
87734       if (devinfo->is_g4x) {
87757 _3DSTATE_URB_VS_CommandType_bits(const struct gen_device_info *devinfo)
87759    switch (devinfo->gen) {
87765       if (devinfo->is_haswell) {
87773       if (devinfo->is_g4x) {
87793 _3DSTATE_URB_VS_CommandType_start(const struct gen_device_info *devinfo)
87795    switch (devinfo->gen) {
87801       if (devinfo->is_haswell) {
87809       if (devinfo->is_g4x) {
87832 _3DSTATE_URB_VS_DWordLength_bits(const struct gen_device_info *devinfo)
87834    switch (devinfo->gen) {
87840       if (devinfo->is_haswell) {
87848       if (devinfo->is_g4x) {
87868 _3DSTATE_URB_VS_DWordLength_start(const struct gen_device_info *devinfo)
87870    switch (devinfo->gen) {
87876       if (devinfo->is_haswell) {
87884       if (devinfo->is_g4x) {
87907 _3DSTATE_URB_VS_VSNumberofURBEntries_bits(const struct gen_device_info *devinfo)
87909    switch (devinfo->gen) {
87915       if (devinfo->is_haswell) {
87923       if (devinfo->is_g4x) {
87943 _3DSTATE_URB_VS_VSNumberofURBEntries_start(const struct gen_device_info *devinfo)
87945    switch (devinfo->gen) {
87951       if (devinfo->is_haswell) {
87959       if (devinfo->is_g4x) {
87982 _3DSTATE_URB_VS_VSURBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
87984    switch (devinfo->gen) {
87990       if (devinfo->is_haswell) {
87998       if (devinfo->is_g4x) {
88018 _3DSTATE_URB_VS_VSURBEntryAllocationSize_start(const struct gen_device_info *devinfo)
88020    switch (devinfo->gen) {
88026       if (devinfo->is_haswell) {
88034       if (devinfo->is_g4x) {
88057 _3DSTATE_URB_VS_VSURBStartingAddress_bits(const struct gen_device_info *devinfo)
88059    switch (devinfo->gen) {
88065       if (devinfo->is_haswell) {
88073       if (devinfo->is_g4x) {
88093 _3DSTATE_URB_VS_VSURBStartingAddress_start(const struct gen_device_info *devinfo)
88095    switch (devinfo->gen) {
88101       if (devinfo->is_haswell) {
88109       if (devinfo->is_g4x) {
88142 _3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
88144    switch (devinfo->gen) {
88150       if (devinfo->is_haswell) {
88158       if (devinfo->is_g4x) {
88182 _3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
88184    switch (devinfo->gen) {
88190       if (devinfo->is_haswell) {
88198       if (devinfo->is_g4x) {
88225 _3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
88227    switch (devinfo->gen) {
88233       if (devinfo->is_haswell) {
88241       if (devinfo->is_g4x) {
88265 _3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
88267    switch (devinfo->gen) {
88273       if (devinfo->is_haswell) {
88281       if (devinfo->is_g4x) {
88308 _3DSTATE_VERTEX_BUFFERS_CommandSubType_bits(const struct gen_device_info *devinfo)
88310    switch (devinfo->gen) {
88316       if (devinfo->is_haswell) {
88324       if (devinfo->is_g4x) {
88348 _3DSTATE_VERTEX_BUFFERS_CommandSubType_start(const struct gen_device_info *devinfo)
88350    switch (devinfo->gen) {
88356       if (devinfo->is_haswell) {
88364       if (devinfo->is_g4x) {
88391 _3DSTATE_VERTEX_BUFFERS_CommandType_bits(const struct gen_device_info *devinfo)
88393    switch (devinfo->gen) {
88399       if (devinfo->is_haswell) {
88407       if (devinfo->is_g4x) {
88431 _3DSTATE_VERTEX_BUFFERS_CommandType_start(const struct gen_device_info *devinfo)
88433    switch (devinfo->gen) {
88439       if (devinfo->is_haswell) {
88447       if (devinfo->is_g4x) {
88474 _3DSTATE_VERTEX_BUFFERS_DWordLength_bits(const struct gen_device_info *devinfo)
88476    switch (devinfo->gen) {
88482       if (devinfo->is_haswell) {
88490       if (devinfo->is_g4x) {
88514 _3DSTATE_VERTEX_BUFFERS_DWordLength_start(const struct gen_device_info *devinfo)
88516    switch (devinfo->gen) {
88522       if (devinfo->is_haswell) {
88530       if (devinfo->is_g4x) {
88557 _3DSTATE_VERTEX_BUFFERS_VertexBufferState_bits(const struct gen_device_info *devinfo)
88559    switch (devinfo->gen) {
88565       if (devinfo->is_haswell) {
88573       if (devinfo->is_g4x) {
88597 _3DSTATE_VERTEX_BUFFERS_VertexBufferState_start(const struct gen_device_info *devinfo)
88599    switch (devinfo->gen) {
88605       if (devinfo->is_haswell) {
88613       if (devinfo->is_g4x) {
88646 _3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
88648    switch (devinfo->gen) {
88654       if (devinfo->is_haswell) {
88662       if (devinfo->is_g4x) {
88686 _3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
88688    switch (devinfo->gen) {
88694       if (devinfo->is_haswell) {
88702       if (devinfo->is_g4x) {
88729 _3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
88731    switch (devinfo->gen) {
88737       if (devinfo->is_haswell) {
88745       if (devinfo->is_g4x) {
88769 _3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
88771    switch (devinfo->gen) {
88777       if (devinfo->is_haswell) {
88785       if (devinfo->is_g4x) {
88812 _3DSTATE_VERTEX_ELEMENTS_CommandSubType_bits(const struct gen_device_info *devinfo)
88814    switch (devinfo->gen) {
88820       if (devinfo->is_haswell) {
88828       if (devinfo->is_g4x) {
88852 _3DSTATE_VERTEX_ELEMENTS_CommandSubType_start(const struct gen_device_info *devinfo)
88854    switch (devinfo->gen) {
88860       if (devinfo->is_haswell) {
88868       if (devinfo->is_g4x) {
88895 _3DSTATE_VERTEX_ELEMENTS_CommandType_bits(const struct gen_device_info *devinfo)
88897    switch (devinfo->gen) {
88903       if (devinfo->is_haswell) {
88911       if (devinfo->is_g4x) {
88935 _3DSTATE_VERTEX_ELEMENTS_CommandType_start(const struct gen_device_info *devinfo)
88937    switch (devinfo->gen) {
88943       if (devinfo->is_haswell) {
88951       if (devinfo->is_g4x) {
88978 _3DSTATE_VERTEX_ELEMENTS_DWordLength_bits(const struct gen_device_info *devinfo)
88980    switch (devinfo->gen) {
88986       if (devinfo->is_haswell) {
88994       if (devinfo->is_g4x) {
89018 _3DSTATE_VERTEX_ELEMENTS_DWordLength_start(const struct gen_device_info *devinfo)
89020    switch (devinfo->gen) {
89026       if (devinfo->is_haswell) {
89034       if (devinfo->is_g4x) {
89061 _3DSTATE_VERTEX_ELEMENTS_Element_bits(const struct gen_device_info *devinfo)
89063    switch (devinfo->gen) {
89069       if (devinfo->is_haswell) {
89077       if (devinfo->is_g4x) {
89101 _3DSTATE_VERTEX_ELEMENTS_Element_start(const struct gen_device_info *devinfo)
89103    switch (devinfo->gen) {
89109       if (devinfo->is_haswell) {
89117       if (devinfo->is_g4x) {
89139 _3DSTATE_VF_length(const struct gen_device_info *devinfo)
89141    switch (devinfo->gen) {
89147       if (devinfo->is_haswell) {
89155       if (devinfo->is_g4x) {
89177 _3DSTATE_VF_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
89179    switch (devinfo->gen) {
89185       if (devinfo->is_haswell) {
89193       if (devinfo->is_g4x) {
89212 _3DSTATE_VF_3DCommandOpcode_start(const struct gen_device_info *devinfo)
89214    switch (devinfo->gen) {
89220       if (devinfo->is_haswell) {
89228       if (devinfo->is_g4x) {
89250 _3DSTATE_VF_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
89252    switch (devinfo->gen) {
89258       if (devinfo->is_haswell) {
89266       if (devinfo->is_g4x) {
89285 _3DSTATE_VF_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
89287    switch (devinfo->gen) {
89293       if (devinfo->is_haswell) {
89301       if (devinfo->is_g4x) {
89323 _3DSTATE_VF_CommandSubType_bits(const struct gen_device_info *devinfo)
89325    switch (devinfo->gen) {
89331       if (devinfo->is_haswell) {
89339       if (devinfo->is_g4x) {
89358 _3DSTATE_VF_CommandSubType_start(const struct gen_device_info *devinfo)
89360    switch (devinfo->gen) {
89366       if (devinfo->is_haswell) {
89374       if (devinfo->is_g4x) {
89396 _3DSTATE_VF_CommandType_bits(const struct gen_device_info *devinfo)
89398    switch (devinfo->gen) {
89404       if (devinfo->is_haswell) {
89412       if (devinfo->is_g4x) {
89431 _3DSTATE_VF_CommandType_start(const struct gen_device_info *devinfo)
89433    switch (devinfo->gen) {
89439       if (devinfo->is_haswell) {
89447       if (devinfo->is_g4x) {
89467 _3DSTATE_VF_ComponentPackingEnable_bits(const struct gen_device_info *devinfo)
89469    switch (devinfo->gen) {
89475       if (devinfo->is_haswell) {
89483       if (devinfo->is_g4x) {
89500 _3DSTATE_VF_ComponentPackingEnable_start(const struct gen_device_info *devinfo)
89502    switch (devinfo->gen) {
89508       if (devinfo->is_haswell) {
89516       if (devinfo->is_g4x) {
89538 _3DSTATE_VF_CutIndex_bits(const struct gen_device_info *devinfo)
89540    switch (devinfo->gen) {
89546       if (devinfo->is_haswell) {
89554       if (devinfo->is_g4x) {
89573 _3DSTATE_VF_CutIndex_start(const struct gen_device_info *devinfo)
89575    switch (devinfo->gen) {
89581       if (devinfo->is_haswell) {
89589       if (devinfo->is_g4x) {
89611 _3DSTATE_VF_DWordLength_bits(const struct gen_device_info *devinfo)
89613    switch (devinfo->gen) {
89619       if (devinfo->is_haswell) {
89627       if (devinfo->is_g4x) {
89646 _3DSTATE_VF_DWordLength_start(const struct gen_device_info *devinfo)
89648    switch (devinfo->gen) {
89654       if (devinfo->is_haswell) {
89662       if (devinfo->is_g4x) {
89684 _3DSTATE_VF_IndexedDrawCutIndexEnable_bits(const struct gen_device_info *devinfo)
89686    switch (devinfo->gen) {
89692       if (devinfo->is_haswell) {
89700       if (devinfo->is_g4x) {
89719 _3DSTATE_VF_IndexedDrawCutIndexEnable_start(const struct gen_device_info *devinfo)
89721    switch (devinfo->gen) {
89727       if (devinfo->is_haswell) {
89735       if (devinfo->is_g4x) {
89755 _3DSTATE_VF_SequentialDrawCutIndexEnable_bits(const struct gen_device_info *devinfo)
89757    switch (devinfo->gen) {
89763       if (devinfo->is_haswell) {
89771       if (devinfo->is_g4x) {
89788 _3DSTATE_VF_SequentialDrawCutIndexEnable_start(const struct gen_device_info *devinfo)
89790    switch (devinfo->gen) {
89796       if (devinfo->is_haswell) {
89804       if (devinfo->is_g4x) {
89823 _3DSTATE_VF_VertexIDOffsetEnable_bits(const struct gen_device_info *devinfo)
89825    switch (devinfo->gen) {
89831       if (devinfo->is_haswell) {
89839       if (devinfo->is_g4x) {
89855 _3DSTATE_VF_VertexIDOffsetEnable_start(const struct gen_device_info *devinfo)
89857    switch (devinfo->gen) {
89863       if (devinfo->is_haswell) {
89871       if (devinfo->is_g4x) {
89891 _3DSTATE_VF_COMPONENT_PACKING_length(const struct gen_device_info *devinfo)
89893    switch (devinfo->gen) {
89899       if (devinfo->is_haswell) {
89907       if (devinfo->is_g4x) {
89927 _3DSTATE_VF_COMPONENT_PACKING_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
89929    switch (devinfo->gen) {
89935       if (devinfo->is_haswell) {
89943       if (devinfo->is_g4x) {
89960 _3DSTATE_VF_COMPONENT_PACKING_3DCommandOpcode_start(const struct gen_device_info *devinfo)
89962    switch (devinfo->gen) {
89968       if (devinfo->is_haswell) {
89976       if (devinfo->is_g4x) {
89996 _3DSTATE_VF_COMPONENT_PACKING_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
89998    switch (devinfo->gen) {
90004       if (devinfo->is_haswell) {
90012       if (devinfo->is_g4x) {
90029 _3DSTATE_VF_COMPONENT_PACKING_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
90031    switch (devinfo->gen) {
90037       if (devinfo->is_haswell) {
90045       if (devinfo->is_g4x) {
90065 _3DSTATE_VF_COMPONENT_PACKING_CommandSubType_bits(const struct gen_device_info *devinfo)
90067    switch (devinfo->gen) {
90073       if (devinfo->is_haswell) {
90081       if (devinfo->is_g4x) {
90098 _3DSTATE_VF_COMPONENT_PACKING_CommandSubType_start(const struct gen_device_info *devinfo)
90100    switch (devinfo->gen) {
90106       if (devinfo->is_haswell) {
90114       if (devinfo->is_g4x) {
90134 _3DSTATE_VF_COMPONENT_PACKING_CommandType_bits(const struct gen_device_info *devinfo)
90136    switch (devinfo->gen) {
90142       if (devinfo->is_haswell) {
90150       if (devinfo->is_g4x) {
90167 _3DSTATE_VF_COMPONENT_PACKING_CommandType_start(const struct gen_device_info *devinfo)
90169    switch (devinfo->gen) {
90175       if (devinfo->is_haswell) {
90183       if (devinfo->is_g4x) {
90203 _3DSTATE_VF_COMPONENT_PACKING_DWordLength_bits(const struct gen_device_info *devinfo)
90205    switch (devinfo->gen) {
90211       if (devinfo->is_haswell) {
90219       if (devinfo->is_g4x) {
90236 _3DSTATE_VF_COMPONENT_PACKING_DWordLength_start(const struct gen_device_info *devinfo)
90238    switch (devinfo->gen) {
90244       if (devinfo->is_haswell) {
90252       if (devinfo->is_g4x) {
90272 _3DSTATE_VF_COMPONENT_PACKING_VertexElement00Enables_bits(const struct gen_device_info *devinfo)
90274    switch (devinfo->gen) {
90280       if (devinfo->is_haswell) {
90288       if (devinfo->is_g4x) {
90305 _3DSTATE_VF_COMPONENT_PACKING_VertexElement00Enables_start(const struct gen_device_info *devinfo)
90307    switch (devinfo->gen) {
90313       if (devinfo->is_haswell) {
90321       if (devinfo->is_g4x) {
90341 _3DSTATE_VF_COMPONENT_PACKING_VertexElement01Enables_bits(const struct gen_device_info *devinfo)
90343    switch (devinfo->gen) {
90349       if (devinfo->is_haswell) {
90357       if (devinfo->is_g4x) {
90374 _3DSTATE_VF_COMPONENT_PACKING_VertexElement01Enables_start(const struct gen_device_info *devinfo)
90376    switch (devinfo->gen) {
90382       if (devinfo->is_haswell) {
90390       if (devinfo->is_g4x) {
90410 _3DSTATE_VF_COMPONENT_PACKING_VertexElement02Enables_bits(const struct gen_device_info *devinfo)
90412    switch (devinfo->gen) {
90418       if (devinfo->is_haswell) {
90426       if (devinfo->is_g4x) {
90443 _3DSTATE_VF_COMPONENT_PACKING_VertexElement02Enables_start(const struct gen_device_info *devinfo)
90445    switch (devinfo->gen) {
90451       if (devinfo->is_haswell) {
90459       if (devinfo->is_g4x) {
90479 _3DSTATE_VF_COMPONENT_PACKING_VertexElement03Enables_bits(const struct gen_device_info *devinfo)
90481    switch (devinfo->gen) {
90487       if (devinfo->is_haswell) {
90495       if (devinfo->is_g4x) {
90512 _3DSTATE_VF_COMPONENT_PACKING_VertexElement03Enables_start(const struct gen_device_info *devinfo)
90514    switch (devinfo->gen) {
90520       if (devinfo->is_haswell) {
90528       if (devinfo->is_g4x) {
90548 _3DSTATE_VF_COMPONENT_PACKING_VertexElement04Enables_bits(const struct gen_device_info *devinfo)
90550    switch (devinfo->gen) {
90556       if (devinfo->is_haswell) {
90564       if (devinfo->is_g4x) {
90581 _3DSTATE_VF_COMPONENT_PACKING_VertexElement04Enables_start(const struct gen_device_info *devinfo)
90583    switch (devinfo->gen) {
90589       if (devinfo->is_haswell) {
90597       if (devinfo->is_g4x) {
90617 _3DSTATE_VF_COMPONENT_PACKING_VertexElement05Enables_bits(const struct gen_device_info *devinfo)
90619    switch (devinfo->gen) {
90625       if (devinfo->is_haswell) {
90633       if (devinfo->is_g4x) {
90650 _3DSTATE_VF_COMPONENT_PACKING_VertexElement05Enables_start(const struct gen_device_info *devinfo)
90652    switch (devinfo->gen) {
90658       if (devinfo->is_haswell) {
90666       if (devinfo->is_g4x) {
90686 _3DSTATE_VF_COMPONENT_PACKING_VertexElement06Enables_bits(const struct gen_device_info *devinfo)
90688    switch (devinfo->gen) {
90694       if (devinfo->is_haswell) {
90702       if (devinfo->is_g4x) {
90719 _3DSTATE_VF_COMPONENT_PACKING_VertexElement06Enables_start(const struct gen_device_info *devinfo)
90721    switch (devinfo->gen) {
90727       if (devinfo->is_haswell) {
90735       if (devinfo->is_g4x) {
90755 _3DSTATE_VF_COMPONENT_PACKING_VertexElement07Enables_bits(const struct gen_device_info *devinfo)
90757    switch (devinfo->gen) {
90763       if (devinfo->is_haswell) {
90771       if (devinfo->is_g4x) {
90788 _3DSTATE_VF_COMPONENT_PACKING_VertexElement07Enables_start(const struct gen_device_info *devinfo)
90790    switch (devinfo->gen) {
90796       if (devinfo->is_haswell) {
90804       if (devinfo->is_g4x) {
90824 _3DSTATE_VF_COMPONENT_PACKING_VertexElement08Enables_bits(const struct gen_device_info *devinfo)
90826    switch (devinfo->gen) {
90832       if (devinfo->is_haswell) {
90840       if (devinfo->is_g4x) {
90857 _3DSTATE_VF_COMPONENT_PACKING_VertexElement08Enables_start(const struct gen_device_info *devinfo)
90859    switch (devinfo->gen) {
90865       if (devinfo->is_haswell) {
90873       if (devinfo->is_g4x) {
90893 _3DSTATE_VF_COMPONENT_PACKING_VertexElement09Enables_bits(const struct gen_device_info *devinfo)
90895    switch (devinfo->gen) {
90901       if (devinfo->is_haswell) {
90909       if (devinfo->is_g4x) {
90926 _3DSTATE_VF_COMPONENT_PACKING_VertexElement09Enables_start(const struct gen_device_info *devinfo)
90928    switch (devinfo->gen) {
90934       if (devinfo->is_haswell) {
90942       if (devinfo->is_g4x) {
90962 _3DSTATE_VF_COMPONENT_PACKING_VertexElement10Enables_bits(const struct gen_device_info *devinfo)
90964    switch (devinfo->gen) {
90970       if (devinfo->is_haswell) {
90978       if (devinfo->is_g4x) {
90995 _3DSTATE_VF_COMPONENT_PACKING_VertexElement10Enables_start(const struct gen_device_info *devinfo)
90997    switch (devinfo->gen) {
91003       if (devinfo->is_haswell) {
91011       if (devinfo->is_g4x) {
91031 _3DSTATE_VF_COMPONENT_PACKING_VertexElement11Enables_bits(const struct gen_device_info *devinfo)
91033    switch (devinfo->gen) {
91039       if (devinfo->is_haswell) {
91047       if (devinfo->is_g4x) {
91064 _3DSTATE_VF_COMPONENT_PACKING_VertexElement11Enables_start(const struct gen_device_info *devinfo)
91066    switch (devinfo->gen) {
91072       if (devinfo->is_haswell) {
91080       if (devinfo->is_g4x) {
91100 _3DSTATE_VF_COMPONENT_PACKING_VertexElement12Enables_bits(const struct gen_device_info *devinfo)
91102    switch (devinfo->gen) {
91108       if (devinfo->is_haswell) {
91116       if (devinfo->is_g4x) {
91133 _3DSTATE_VF_COMPONENT_PACKING_VertexElement12Enables_start(const struct gen_device_info *devinfo)
91135    switch (devinfo->gen) {
91141       if (devinfo->is_haswell) {
91149       if (devinfo->is_g4x) {
91169 _3DSTATE_VF_COMPONENT_PACKING_VertexElement13Enables_bits(const struct gen_device_info *devinfo)
91171    switch (devinfo->gen) {
91177       if (devinfo->is_haswell) {
91185       if (devinfo->is_g4x) {
91202 _3DSTATE_VF_COMPONENT_PACKING_VertexElement13Enables_start(const struct gen_device_info *devinfo)
91204    switch (devinfo->gen) {
91210       if (devinfo->is_haswell) {
91218       if (devinfo->is_g4x) {
91238 _3DSTATE_VF_COMPONENT_PACKING_VertexElement14Enables_bits(const struct gen_device_info *devinfo)
91240    switch (devinfo->gen) {
91246       if (devinfo->is_haswell) {
91254       if (devinfo->is_g4x) {
91271 _3DSTATE_VF_COMPONENT_PACKING_VertexElement14Enables_start(const struct gen_device_info *devinfo)
91273    switch (devinfo->gen) {
91279       if (devinfo->is_haswell) {
91287       if (devinfo->is_g4x) {
91307 _3DSTATE_VF_COMPONENT_PACKING_VertexElement15Enables_bits(const struct gen_device_info *devinfo)
91309    switch (devinfo->gen) {
91315       if (devinfo->is_haswell) {
91323       if (devinfo->is_g4x) {
91340 _3DSTATE_VF_COMPONENT_PACKING_VertexElement15Enables_start(const struct gen_device_info *devinfo)
91342    switch (devinfo->gen) {
91348       if (devinfo->is_haswell) {
91356       if (devinfo->is_g4x) {
91376 _3DSTATE_VF_COMPONENT_PACKING_VertexElement16Enables_bits(const struct gen_device_info *devinfo)
91378    switch (devinfo->gen) {
91384       if (devinfo->is_haswell) {
91392       if (devinfo->is_g4x) {
91409 _3DSTATE_VF_COMPONENT_PACKING_VertexElement16Enables_start(const struct gen_device_info *devinfo)
91411    switch (devinfo->gen) {
91417       if (devinfo->is_haswell) {
91425       if (devinfo->is_g4x) {
91445 _3DSTATE_VF_COMPONENT_PACKING_VertexElement17Enables_bits(const struct gen_device_info *devinfo)
91447    switch (devinfo->gen) {
91453       if (devinfo->is_haswell) {
91461       if (devinfo->is_g4x) {
91478 _3DSTATE_VF_COMPONENT_PACKING_VertexElement17Enables_start(const struct gen_device_info *devinfo)
91480    switch (devinfo->gen) {
91486       if (devinfo->is_haswell) {
91494       if (devinfo->is_g4x) {
91514 _3DSTATE_VF_COMPONENT_PACKING_VertexElement18Enables_bits(const struct gen_device_info *devinfo)
91516    switch (devinfo->gen) {
91522       if (devinfo->is_haswell) {
91530       if (devinfo->is_g4x) {
91547 _3DSTATE_VF_COMPONENT_PACKING_VertexElement18Enables_start(const struct gen_device_info *devinfo)
91549    switch (devinfo->gen) {
91555       if (devinfo->is_haswell) {
91563       if (devinfo->is_g4x) {
91583 _3DSTATE_VF_COMPONENT_PACKING_VertexElement19Enables_bits(const struct gen_device_info *devinfo)
91585    switch (devinfo->gen) {
91591       if (devinfo->is_haswell) {
91599       if (devinfo->is_g4x) {
91616 _3DSTATE_VF_COMPONENT_PACKING_VertexElement19Enables_start(const struct gen_device_info *devinfo)
91618    switch (devinfo->gen) {
91624       if (devinfo->is_haswell) {
91632       if (devinfo->is_g4x) {
91652 _3DSTATE_VF_COMPONENT_PACKING_VertexElement20Enables_bits(const struct gen_device_info *devinfo)
91654    switch (devinfo->gen) {
91660       if (devinfo->is_haswell) {
91668       if (devinfo->is_g4x) {
91685 _3DSTATE_VF_COMPONENT_PACKING_VertexElement20Enables_start(const struct gen_device_info *devinfo)
91687    switch (devinfo->gen) {
91693       if (devinfo->is_haswell) {
91701       if (devinfo->is_g4x) {
91721 _3DSTATE_VF_COMPONENT_PACKING_VertexElement21Enables_bits(const struct gen_device_info *devinfo)
91723    switch (devinfo->gen) {
91729       if (devinfo->is_haswell) {
91737       if (devinfo->is_g4x) {
91754 _3DSTATE_VF_COMPONENT_PACKING_VertexElement21Enables_start(const struct gen_device_info *devinfo)
91756    switch (devinfo->gen) {
91762       if (devinfo->is_haswell) {
91770       if (devinfo->is_g4x) {
91790 _3DSTATE_VF_COMPONENT_PACKING_VertexElement22Enables_bits(const struct gen_device_info *devinfo)
91792    switch (devinfo->gen) {
91798       if (devinfo->is_haswell) {
91806       if (devinfo->is_g4x) {
91823 _3DSTATE_VF_COMPONENT_PACKING_VertexElement22Enables_start(const struct gen_device_info *devinfo)
91825    switch (devinfo->gen) {
91831       if (devinfo->is_haswell) {
91839       if (devinfo->is_g4x) {
91859 _3DSTATE_VF_COMPONENT_PACKING_VertexElement23Enables_bits(const struct gen_device_info *devinfo)
91861    switch (devinfo->gen) {
91867       if (devinfo->is_haswell) {
91875       if (devinfo->is_g4x) {
91892 _3DSTATE_VF_COMPONENT_PACKING_VertexElement23Enables_start(const struct gen_device_info *devinfo)
91894    switch (devinfo->gen) {
91900       if (devinfo->is_haswell) {
91908       if (devinfo->is_g4x) {
91928 _3DSTATE_VF_COMPONENT_PACKING_VertexElement24Enables_bits(const struct gen_device_info *devinfo)
91930    switch (devinfo->gen) {
91936       if (devinfo->is_haswell) {
91944       if (devinfo->is_g4x) {
91961 _3DSTATE_VF_COMPONENT_PACKING_VertexElement24Enables_start(const struct gen_device_info *devinfo)
91963    switch (devinfo->gen) {
91969       if (devinfo->is_haswell) {
91977       if (devinfo->is_g4x) {
91997 _3DSTATE_VF_COMPONENT_PACKING_VertexElement25Enables_bits(const struct gen_device_info *devinfo)
91999    switch (devinfo->gen) {
92005       if (devinfo->is_haswell) {
92013       if (devinfo->is_g4x) {
92030 _3DSTATE_VF_COMPONENT_PACKING_VertexElement25Enables_start(const struct gen_device_info *devinfo)
92032    switch (devinfo->gen) {
92038       if (devinfo->is_haswell) {
92046       if (devinfo->is_g4x) {
92066 _3DSTATE_VF_COMPONENT_PACKING_VertexElement26Enables_bits(const struct gen_device_info *devinfo)
92068    switch (devinfo->gen) {
92074       if (devinfo->is_haswell) {
92082       if (devinfo->is_g4x) {
92099 _3DSTATE_VF_COMPONENT_PACKING_VertexElement26Enables_start(const struct gen_device_info *devinfo)
92101    switch (devinfo->gen) {
92107       if (devinfo->is_haswell) {
92115       if (devinfo->is_g4x) {
92135 _3DSTATE_VF_COMPONENT_PACKING_VertexElement27Enables_bits(const struct gen_device_info *devinfo)
92137    switch (devinfo->gen) {
92143       if (devinfo->is_haswell) {
92151       if (devinfo->is_g4x) {
92168 _3DSTATE_VF_COMPONENT_PACKING_VertexElement27Enables_start(const struct gen_device_info *devinfo)
92170    switch (devinfo->gen) {
92176       if (devinfo->is_haswell) {
92184       if (devinfo->is_g4x) {
92204 _3DSTATE_VF_COMPONENT_PACKING_VertexElement28Enables_bits(const struct gen_device_info *devinfo)
92206    switch (devinfo->gen) {
92212       if (devinfo->is_haswell) {
92220       if (devinfo->is_g4x) {
92237 _3DSTATE_VF_COMPONENT_PACKING_VertexElement28Enables_start(const struct gen_device_info *devinfo)
92239    switch (devinfo->gen) {
92245       if (devinfo->is_haswell) {
92253       if (devinfo->is_g4x) {
92273 _3DSTATE_VF_COMPONENT_PACKING_VertexElement29Enables_bits(const struct gen_device_info *devinfo)
92275    switch (devinfo->gen) {
92281       if (devinfo->is_haswell) {
92289       if (devinfo->is_g4x) {
92306 _3DSTATE_VF_COMPONENT_PACKING_VertexElement29Enables_start(const struct gen_device_info *devinfo)
92308    switch (devinfo->gen) {
92314       if (devinfo->is_haswell) {
92322       if (devinfo->is_g4x) {
92342 _3DSTATE_VF_COMPONENT_PACKING_VertexElement30Enables_bits(const struct gen_device_info *devinfo)
92344    switch (devinfo->gen) {
92350       if (devinfo->is_haswell) {
92358       if (devinfo->is_g4x) {
92375 _3DSTATE_VF_COMPONENT_PACKING_VertexElement30Enables_start(const struct gen_device_info *devinfo)
92377    switch (devinfo->gen) {
92383       if (devinfo->is_haswell) {
92391       if (devinfo->is_g4x) {
92411 _3DSTATE_VF_COMPONENT_PACKING_VertexElement31Enables_bits(const struct gen_device_info *devinfo)
92413    switch (devinfo->gen) {
92419       if (devinfo->is_haswell) {
92427       if (devinfo->is_g4x) {
92444 _3DSTATE_VF_COMPONENT_PACKING_VertexElement31Enables_start(const struct gen_device_info *devinfo)
92446    switch (devinfo->gen) {
92452       if (devinfo->is_haswell) {
92460       if (devinfo->is_g4x) {
92481 _3DSTATE_VF_INSTANCING_length(const struct gen_device_info *devinfo)
92483    switch (devinfo->gen) {
92489       if (devinfo->is_haswell) {
92497       if (devinfo->is_g4x) {
92518 _3DSTATE_VF_INSTANCING_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
92520    switch (devinfo->gen) {
92526       if (devinfo->is_haswell) {
92534       if (devinfo->is_g4x) {
92552 _3DSTATE_VF_INSTANCING_3DCommandOpcode_start(const struct gen_device_info *devinfo)
92554    switch (devinfo->gen) {
92560       if (devinfo->is_haswell) {
92568       if (devinfo->is_g4x) {
92589 _3DSTATE_VF_INSTANCING_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
92591    switch (devinfo->gen) {
92597       if (devinfo->is_haswell) {
92605       if (devinfo->is_g4x) {
92623 _3DSTATE_VF_INSTANCING_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
92625    switch (devinfo->gen) {
92631       if (devinfo->is_haswell) {
92639       if (devinfo->is_g4x) {
92660 _3DSTATE_VF_INSTANCING_CommandSubType_bits(const struct gen_device_info *devinfo)
92662    switch (devinfo->gen) {
92668       if (devinfo->is_haswell) {
92676       if (devinfo->is_g4x) {
92694 _3DSTATE_VF_INSTANCING_CommandSubType_start(const struct gen_device_info *devinfo)
92696    switch (devinfo->gen) {
92702       if (devinfo->is_haswell) {
92710       if (devinfo->is_g4x) {
92731 _3DSTATE_VF_INSTANCING_CommandType_bits(const struct gen_device_info *devinfo)
92733    switch (devinfo->gen) {
92739       if (devinfo->is_haswell) {
92747       if (devinfo->is_g4x) {
92765 _3DSTATE_VF_INSTANCING_CommandType_start(const struct gen_device_info *devinfo)
92767    switch (devinfo->gen) {
92773       if (devinfo->is_haswell) {
92781       if (devinfo->is_g4x) {
92802 _3DSTATE_VF_INSTANCING_DWordLength_bits(const struct gen_device_info *devinfo)
92804    switch (devinfo->gen) {
92810       if (devinfo->is_haswell) {
92818       if (devinfo->is_g4x) {
92836 _3DSTATE_VF_INSTANCING_DWordLength_start(const struct gen_device_info *devinfo)
92838    switch (devinfo->gen) {
92844       if (devinfo->is_haswell) {
92852       if (devinfo->is_g4x) {
92873 _3DSTATE_VF_INSTANCING_InstanceDataStepRate_bits(const struct gen_device_info *devinfo)
92875    switch (devinfo->gen) {
92881       if (devinfo->is_haswell) {
92889       if (devinfo->is_g4x) {
92907 _3DSTATE_VF_INSTANCING_InstanceDataStepRate_start(const struct gen_device_info *devinfo)
92909    switch (devinfo->gen) {
92915       if (devinfo->is_haswell) {
92923       if (devinfo->is_g4x) {
92944 _3DSTATE_VF_INSTANCING_InstancingEnable_bits(const struct gen_device_info *devinfo)
92946    switch (devinfo->gen) {
92952       if (devinfo->is_haswell) {
92960       if (devinfo->is_g4x) {
92978 _3DSTATE_VF_INSTANCING_InstancingEnable_start(const struct gen_device_info *devinfo)
92980    switch (devinfo->gen) {
92986       if (devinfo->is_haswell) {
92994       if (devinfo->is_g4x) {
93015 _3DSTATE_VF_INSTANCING_VertexElementIndex_bits(const struct gen_device_info *devinfo)
93017    switch (devinfo->gen) {
93023       if (devinfo->is_haswell) {
93031       if (devinfo->is_g4x) {
93049 _3DSTATE_VF_INSTANCING_VertexElementIndex_start(const struct gen_device_info *devinfo)
93051    switch (devinfo->gen) {
93057       if (devinfo->is_haswell) {
93065       if (devinfo->is_g4x) {
93086 _3DSTATE_VF_SGVS_length(const struct gen_device_info *devinfo)
93088    switch (devinfo->gen) {
93094       if (devinfo->is_haswell) {
93102       if (devinfo->is_g4x) {
93123 _3DSTATE_VF_SGVS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
93125    switch (devinfo->gen) {
93131       if (devinfo->is_haswell) {
93139       if (devinfo->is_g4x) {
93157 _3DSTATE_VF_SGVS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
93159    switch (devinfo->gen) {
93165       if (devinfo->is_haswell) {
93173       if (devinfo->is_g4x) {
93194 _3DSTATE_VF_SGVS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
93196    switch (devinfo->gen) {
93202       if (devinfo->is_haswell) {
93210       if (devinfo->is_g4x) {
93228 _3DSTATE_VF_SGVS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
93230    switch (devinfo->gen) {
93236       if (devinfo->is_haswell) {
93244       if (devinfo->is_g4x) {
93265 _3DSTATE_VF_SGVS_CommandSubType_bits(const struct gen_device_info *devinfo)
93267    switch (devinfo->gen) {
93273       if (devinfo->is_haswell) {
93281       if (devinfo->is_g4x) {
93299 _3DSTATE_VF_SGVS_CommandSubType_start(const struct gen_device_info *devinfo)
93301    switch (devinfo->gen) {
93307       if (devinfo->is_haswell) {
93315       if (devinfo->is_g4x) {
93336 _3DSTATE_VF_SGVS_CommandType_bits(const struct gen_device_info *devinfo)
93338    switch (devinfo->gen) {
93344       if (devinfo->is_haswell) {
93352       if (devinfo->is_g4x) {
93370 _3DSTATE_VF_SGVS_CommandType_start(const struct gen_device_info *devinfo)
93372    switch (devinfo->gen) {
93378       if (devinfo->is_haswell) {
93386       if (devinfo->is_g4x) {
93407 _3DSTATE_VF_SGVS_DWordLength_bits(const struct gen_device_info *devinfo)
93409    switch (devinfo->gen) {
93415       if (devinfo->is_haswell) {
93423       if (devinfo->is_g4x) {
93441 _3DSTATE_VF_SGVS_DWordLength_start(const struct gen_device_info *devinfo)
93443    switch (devinfo->gen) {
93449       if (devinfo->is_haswell) {
93457       if (devinfo->is_g4x) {
93478 _3DSTATE_VF_SGVS_InstanceIDComponentNumber_bits(const struct gen_device_info *devinfo)
93480    switch (devinfo->gen) {
93486       if (devinfo->is_haswell) {
93494       if (devinfo->is_g4x) {
93512 _3DSTATE_VF_SGVS_InstanceIDComponentNumber_start(const struct gen_device_info *devinfo)
93514    switch (devinfo->gen) {
93520       if (devinfo->is_haswell) {
93528       if (devinfo->is_g4x) {
93549 _3DSTATE_VF_SGVS_InstanceIDElementOffset_bits(const struct gen_device_info *devinfo)
93551    switch (devinfo->gen) {
93557       if (devinfo->is_haswell) {
93565       if (devinfo->is_g4x) {
93583 _3DSTATE_VF_SGVS_InstanceIDElementOffset_start(const struct gen_device_info *devinfo)
93585    switch (devinfo->gen) {
93591       if (devinfo->is_haswell) {
93599       if (devinfo->is_g4x) {
93620 _3DSTATE_VF_SGVS_InstanceIDEnable_bits(const struct gen_device_info *devinfo)
93622    switch (devinfo->gen) {
93628       if (devinfo->is_haswell) {
93636       if (devinfo->is_g4x) {
93654 _3DSTATE_VF_SGVS_InstanceIDEnable_start(const struct gen_device_info *devinfo)
93656    switch (devinfo->gen) {
93662       if (devinfo->is_haswell) {
93670       if (devinfo->is_g4x) {
93691 _3DSTATE_VF_SGVS_VertexIDComponentNumber_bits(const struct gen_device_info *devinfo)
93693    switch (devinfo->gen) {
93699       if (devinfo->is_haswell) {
93707       if (devinfo->is_g4x) {
93725 _3DSTATE_VF_SGVS_VertexIDComponentNumber_start(const struct gen_device_info *devinfo)
93727    switch (devinfo->gen) {
93733       if (devinfo->is_haswell) {
93741       if (devinfo->is_g4x) {
93762 _3DSTATE_VF_SGVS_VertexIDElementOffset_bits(const struct gen_device_info *devinfo)
93764    switch (devinfo->gen) {
93770       if (devinfo->is_haswell) {
93778       if (devinfo->is_g4x) {
93796 _3DSTATE_VF_SGVS_VertexIDElementOffset_start(const struct gen_device_info *devinfo)
93798    switch (devinfo->gen) {
93804       if (devinfo->is_haswell) {
93812       if (devinfo->is_g4x) {
93833 _3DSTATE_VF_SGVS_VertexIDEnable_bits(const struct gen_device_info *devinfo)
93835    switch (devinfo->gen) {
93841       if (devinfo->is_haswell) {
93849       if (devinfo->is_g4x) {
93867 _3DSTATE_VF_SGVS_VertexIDEnable_start(const struct gen_device_info *devinfo)
93869    switch (devinfo->gen) {
93875       if (devinfo->is_haswell) {
93883       if (devinfo->is_g4x) {
93902 _3DSTATE_VF_SGVS_2_length(const struct gen_device_info *devinfo)
93904    switch (devinfo->gen) {
93910       if (devinfo->is_haswell) {
93918       if (devinfo->is_g4x) {
93937 _3DSTATE_VF_SGVS_2_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
93939    switch (devinfo->gen) {
93945       if (devinfo->is_haswell) {
93953       if (devinfo->is_g4x) {
93969 _3DSTATE_VF_SGVS_2_3DCommandOpcode_start(const struct gen_device_info *devinfo)
93971    switch (devinfo->gen) {
93977       if (devinfo->is_haswell) {
93985       if (devinfo->is_g4x) {
94004 _3DSTATE_VF_SGVS_2_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
94006    switch (devinfo->gen) {
94012       if (devinfo->is_haswell) {
94020       if (devinfo->is_g4x) {
94036 _3DSTATE_VF_SGVS_2_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
94038    switch (devinfo->gen) {
94044       if (devinfo->is_haswell) {
94052       if (devinfo->is_g4x) {
94071 _3DSTATE_VF_SGVS_2_CommandSubType_bits(const struct gen_device_info *devinfo)
94073    switch (devinfo->gen) {
94079       if (devinfo->is_haswell) {
94087       if (devinfo->is_g4x) {
94103 _3DSTATE_VF_SGVS_2_CommandSubType_start(const struct gen_device_info *devinfo)
94105    switch (devinfo->gen) {
94111       if (devinfo->is_haswell) {
94119       if (devinfo->is_g4x) {
94138 _3DSTATE_VF_SGVS_2_CommandType_bits(const struct gen_device_info *devinfo)
94140    switch (devinfo->gen) {
94146       if (devinfo->is_haswell) {
94154       if (devinfo->is_g4x) {
94170 _3DSTATE_VF_SGVS_2_CommandType_start(const struct gen_device_info *devinfo)
94172    switch (devinfo->gen) {
94178       if (devinfo->is_haswell) {
94186       if (devinfo->is_g4x) {
94205 _3DSTATE_VF_SGVS_2_DWordLength_bits(const struct gen_device_info *devinfo)
94207    switch (devinfo->gen) {
94213       if (devinfo->is_haswell) {
94221       if (devinfo->is_g4x) {
94237 _3DSTATE_VF_SGVS_2_DWordLength_start(const struct gen_device_info *devinfo)
94239    switch (devinfo->gen) {
94245       if (devinfo->is_haswell) {
94253       if (devinfo->is_g4x) {
94272 _3DSTATE_VF_SGVS_2_XP0ComponentNumber_bits(const struct gen_device_info *devinfo)
94274    switch (devinfo->gen) {
94280       if (devinfo->is_haswell) {
94288       if (devinfo->is_g4x) {
94304 _3DSTATE_VF_SGVS_2_XP0ComponentNumber_start(const struct gen_device_info *devinfo)
94306    switch (devinfo->gen) {
94312       if (devinfo->is_haswell) {
94320       if (devinfo->is_g4x) {
94339 _3DSTATE_VF_SGVS_2_XP0ElementOffset_bits(const struct gen_device_info *devinfo)
94341    switch (devinfo->gen) {
94347       if (devinfo->is_haswell) {
94355       if (devinfo->is_g4x) {
94371 _3DSTATE_VF_SGVS_2_XP0ElementOffset_start(const struct gen_device_info *devinfo)
94373    switch (devinfo->gen) {
94379       if (devinfo->is_haswell) {
94387       if (devinfo->is_g4x) {
94406 _3DSTATE_VF_SGVS_2_XP0Enable_bits(const struct gen_device_info *devinfo)
94408    switch (devinfo->gen) {
94414       if (devinfo->is_haswell) {
94422       if (devinfo->is_g4x) {
94438 _3DSTATE_VF_SGVS_2_XP0Enable_start(const struct gen_device_info *devinfo)
94440    switch (devinfo->gen) {
94446       if (devinfo->is_haswell) {
94454       if (devinfo->is_g4x) {
94473 _3DSTATE_VF_SGVS_2_XP0SourceSelect_bits(const struct gen_device_info *devinfo)
94475    switch (devinfo->gen) {
94481       if (devinfo->is_haswell) {
94489       if (devinfo->is_g4x) {
94505 _3DSTATE_VF_SGVS_2_XP0SourceSelect_start(const struct gen_device_info *devinfo)
94507    switch (devinfo->gen) {
94513       if (devinfo->is_haswell) {
94521       if (devinfo->is_g4x) {
94540 _3DSTATE_VF_SGVS_2_XP1ComponentNumber_bits(const struct gen_device_info *devinfo)
94542    switch (devinfo->gen) {
94548       if (devinfo->is_haswell) {
94556       if (devinfo->is_g4x) {
94572 _3DSTATE_VF_SGVS_2_XP1ComponentNumber_start(const struct gen_device_info *devinfo)
94574    switch (devinfo->gen) {
94580       if (devinfo->is_haswell) {
94588       if (devinfo->is_g4x) {
94607 _3DSTATE_VF_SGVS_2_XP1ElementOffset_bits(const struct gen_device_info *devinfo)
94609    switch (devinfo->gen) {
94615       if (devinfo->is_haswell) {
94623       if (devinfo->is_g4x) {
94639 _3DSTATE_VF_SGVS_2_XP1ElementOffset_start(const struct gen_device_info *devinfo)
94641    switch (devinfo->gen) {
94647       if (devinfo->is_haswell) {
94655       if (devinfo->is_g4x) {
94674 _3DSTATE_VF_SGVS_2_XP1Enable_bits(const struct gen_device_info *devinfo)
94676    switch (devinfo->gen) {
94682       if (devinfo->is_haswell) {
94690       if (devinfo->is_g4x) {
94706 _3DSTATE_VF_SGVS_2_XP1Enable_start(const struct gen_device_info *devinfo)
94708    switch (devinfo->gen) {
94714       if (devinfo->is_haswell) {
94722       if (devinfo->is_g4x) {
94741 _3DSTATE_VF_SGVS_2_XP1SourceSelect_bits(const struct gen_device_info *devinfo)
94743    switch (devinfo->gen) {
94749       if (devinfo->is_haswell) {
94757       if (devinfo->is_g4x) {
94773 _3DSTATE_VF_SGVS_2_XP1SourceSelect_start(const struct gen_device_info *devinfo)
94775    switch (devinfo->gen) {
94781       if (devinfo->is_haswell) {
94789       if (devinfo->is_g4x) {
94808 _3DSTATE_VF_SGVS_2_XP2ComponentNumber_bits(const struct gen_device_info *devinfo)
94810    switch (devinfo->gen) {
94816       if (devinfo->is_haswell) {
94824       if (devinfo->is_g4x) {
94840 _3DSTATE_VF_SGVS_2_XP2ComponentNumber_start(const struct gen_device_info *devinfo)
94842    switch (devinfo->gen) {
94848       if (devinfo->is_haswell) {
94856       if (devinfo->is_g4x) {
94875 _3DSTATE_VF_SGVS_2_XP2ElementOffset_bits(const struct gen_device_info *devinfo)
94877    switch (devinfo->gen) {
94883       if (devinfo->is_haswell) {
94891       if (devinfo->is_g4x) {
94907 _3DSTATE_VF_SGVS_2_XP2ElementOffset_start(const struct gen_device_info *devinfo)
94909    switch (devinfo->gen) {
94915       if (devinfo->is_haswell) {
94923       if (devinfo->is_g4x) {
94942 _3DSTATE_VF_SGVS_2_XP2Enable_bits(const struct gen_device_info *devinfo)
94944    switch (devinfo->gen) {
94950       if (devinfo->is_haswell) {
94958       if (devinfo->is_g4x) {
94974 _3DSTATE_VF_SGVS_2_XP2Enable_start(const struct gen_device_info *devinfo)
94976    switch (devinfo->gen) {
94982       if (devinfo->is_haswell) {
94990       if (devinfo->is_g4x) {
95017 _3DSTATE_VF_STATISTICS_length(const struct gen_device_info *devinfo)
95019    switch (devinfo->gen) {
95025       if (devinfo->is_haswell) {
95033       if (devinfo->is_g4x) {
95060 _3DSTATE_VF_STATISTICS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
95062    switch (devinfo->gen) {
95068       if (devinfo->is_haswell) {
95076       if (devinfo->is_g4x) {
95100 _3DSTATE_VF_STATISTICS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
95102    switch (devinfo->gen) {
95108       if (devinfo->is_haswell) {
95116       if (devinfo->is_g4x) {
95143 _3DSTATE_VF_STATISTICS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
95145    switch (devinfo->gen) {
95151       if (devinfo->is_haswell) {
95159       if (devinfo->is_g4x) {
95183 _3DSTATE_VF_STATISTICS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
95185    switch (devinfo->gen) {
95191       if (devinfo->is_haswell) {
95199       if (devinfo->is_g4x) {
95226 _3DSTATE_VF_STATISTICS_CommandSubType_bits(const struct gen_device_info *devinfo)
95228    switch (devinfo->gen) {
95234       if (devinfo->is_haswell) {
95242       if (devinfo->is_g4x) {
95266 _3DSTATE_VF_STATISTICS_CommandSubType_start(const struct gen_device_info *devinfo)
95268    switch (devinfo->gen) {
95274       if (devinfo->is_haswell) {
95282       if (devinfo->is_g4x) {
95309 _3DSTATE_VF_STATISTICS_CommandType_bits(const struct gen_device_info *devinfo)
95311    switch (devinfo->gen) {
95317       if (devinfo->is_haswell) {
95325       if (devinfo->is_g4x) {
95349 _3DSTATE_VF_STATISTICS_CommandType_start(const struct gen_device_info *devinfo)
95351    switch (devinfo->gen) {
95357       if (devinfo->is_haswell) {
95365       if (devinfo->is_g4x) {
95392 _3DSTATE_VF_STATISTICS_StatisticsEnable_bits(const struct gen_device_info *devinfo)
95394    switch (devinfo->gen) {
95400       if (devinfo->is_haswell) {
95408       if (devinfo->is_g4x) {
95432 _3DSTATE_VF_STATISTICS_StatisticsEnable_start(const struct gen_device_info *devinfo)
95434    switch (devinfo->gen) {
95440       if (devinfo->is_haswell) {
95448       if (devinfo->is_g4x) {
95469 _3DSTATE_VF_TOPOLOGY_length(const struct gen_device_info *devinfo)
95471    switch (devinfo->gen) {
95477       if (devinfo->is_haswell) {
95485       if (devinfo->is_g4x) {
95506 _3DSTATE_VF_TOPOLOGY_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
95508    switch (devinfo->gen) {
95514       if (devinfo->is_haswell) {
95522       if (devinfo->is_g4x) {
95540 _3DSTATE_VF_TOPOLOGY_3DCommandOpcode_start(const struct gen_device_info *devinfo)
95542    switch (devinfo->gen) {
95548       if (devinfo->is_haswell) {
95556       if (devinfo->is_g4x) {
95577 _3DSTATE_VF_TOPOLOGY_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
95579    switch (devinfo->gen) {
95585       if (devinfo->is_haswell) {
95593       if (devinfo->is_g4x) {
95611 _3DSTATE_VF_TOPOLOGY_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
95613    switch (devinfo->gen) {
95619       if (devinfo->is_haswell) {
95627       if (devinfo->is_g4x) {
95648 _3DSTATE_VF_TOPOLOGY_CommandSubType_bits(const struct gen_device_info *devinfo)
95650    switch (devinfo->gen) {
95656       if (devinfo->is_haswell) {
95664       if (devinfo->is_g4x) {
95682 _3DSTATE_VF_TOPOLOGY_CommandSubType_start(const struct gen_device_info *devinfo)
95684    switch (devinfo->gen) {
95690       if (devinfo->is_haswell) {
95698       if (devinfo->is_g4x) {
95719 _3DSTATE_VF_TOPOLOGY_CommandType_bits(const struct gen_device_info *devinfo)
95721    switch (devinfo->gen) {
95727       if (devinfo->is_haswell) {
95735       if (devinfo->is_g4x) {
95753 _3DSTATE_VF_TOPOLOGY_CommandType_start(const struct gen_device_info *devinfo)
95755    switch (devinfo->gen) {
95761       if (devinfo->is_haswell) {
95769       if (devinfo->is_g4x) {
95790 _3DSTATE_VF_TOPOLOGY_DWordLength_bits(const struct gen_device_info *devinfo)
95792    switch (devinfo->gen) {
95798       if (devinfo->is_haswell) {
95806       if (devinfo->is_g4x) {
95824 _3DSTATE_VF_TOPOLOGY_DWordLength_start(const struct gen_device_info *devinfo)
95826    switch (devinfo->gen) {
95832       if (devinfo->is_haswell) {
95840       if (devinfo->is_g4x) {
95861 _3DSTATE_VF_TOPOLOGY_PrimitiveTopologyType_bits(const struct gen_device_info *devinfo)
95863    switch (devinfo->gen) {
95869       if (devinfo->is_haswell) {
95877       if (devinfo->is_g4x) {
95895 _3DSTATE_VF_TOPOLOGY_PrimitiveTopologyType_start(const struct gen_device_info *devinfo)
95897    switch (devinfo->gen) {
95903       if (devinfo->is_haswell) {
95911       if (devinfo->is_g4x) {
95929 _3DSTATE_VIEWPORT_STATE_POINTERS_length(const struct gen_device_info *devinfo)
95931    switch (devinfo->gen) {
95937       if (devinfo->is_haswell) {
95945       if (devinfo->is_g4x) {
95963 _3DSTATE_VIEWPORT_STATE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
95965    switch (devinfo->gen) {
95971       if (devinfo->is_haswell) {
95979       if (devinfo->is_g4x) {
95994 _3DSTATE_VIEWPORT_STATE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
95996    switch (devinfo->gen) {
96002       if (devinfo->is_haswell) {
96010       if (devinfo->is_g4x) {
96028 _3DSTATE_VIEWPORT_STATE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
96030    switch (devinfo->gen) {
96036       if (devinfo->is_haswell) {
96044       if (devinfo->is_g4x) {
96059 _3DSTATE_VIEWPORT_STATE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
96061    switch (devinfo->gen) {
96067       if (devinfo->is_haswell) {
96075       if (devinfo->is_g4x) {
96093 _3DSTATE_VIEWPORT_STATE_POINTERS_CCViewportStateChange_bits(const struct gen_device_info *devinfo)
96095    switch (devinfo->gen) {
96101       if (devinfo->is_haswell) {
96109       if (devinfo->is_g4x) {
96124 _3DSTATE_VIEWPORT_STATE_POINTERS_CCViewportStateChange_start(const struct gen_device_info *devinfo)
96126    switch (devinfo->gen) {
96132       if (devinfo->is_haswell) {
96140       if (devinfo->is_g4x) {
96158 _3DSTATE_VIEWPORT_STATE_POINTERS_CLIPViewportStateChange_bits(const struct gen_device_info *devinfo)
96160    switch (devinfo->gen) {
96166       if (devinfo->is_haswell) {
96174       if (devinfo->is_g4x) {
96189 _3DSTATE_VIEWPORT_STATE_POINTERS_CLIPViewportStateChange_start(const struct gen_device_info *devinfo)
96191    switch (devinfo->gen) {
96197       if (devinfo->is_haswell) {
96205       if (devinfo->is_g4x) {
96223 _3DSTATE_VIEWPORT_STATE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
96225    switch (devinfo->gen) {
96231       if (devinfo->is_haswell) {
96239       if (devinfo->is_g4x) {
96254 _3DSTATE_VIEWPORT_STATE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
96256    switch (devinfo->gen) {
96262       if (devinfo->is_haswell) {
96270       if (devinfo->is_g4x) {
96288 _3DSTATE_VIEWPORT_STATE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
96290    switch (devinfo->gen) {
96296       if (devinfo->is_haswell) {
96304       if (devinfo->is_g4x) {
96319 _3DSTATE_VIEWPORT_STATE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
96321    switch (devinfo->gen) {
96327       if (devinfo->is_haswell) {
96335       if (devinfo->is_g4x) {
96353 _3DSTATE_VIEWPORT_STATE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
96355    switch (devinfo->gen) {
96361       if (devinfo->is_haswell) {
96369       if (devinfo->is_g4x) {
96384 _3DSTATE_VIEWPORT_STATE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
96386    switch (devinfo->gen) {
96392       if (devinfo->is_haswell) {
96400       if (devinfo->is_g4x) {
96418 _3DSTATE_VIEWPORT_STATE_POINTERS_PointertoCC_VIEWPORT_bits(const struct gen_device_info *devinfo)
96420    switch (devinfo->gen) {
96426       if (devinfo->is_haswell) {
96434       if (devinfo->is_g4x) {
96449 _3DSTATE_VIEWPORT_STATE_POINTERS_PointertoCC_VIEWPORT_start(const struct gen_device_info *devinfo)
96451    switch (devinfo->gen) {
96457       if (devinfo->is_haswell) {
96465       if (devinfo->is_g4x) {
96483 _3DSTATE_VIEWPORT_STATE_POINTERS_PointertoCLIP_VIEWPORT_bits(const struct gen_device_info *devinfo)
96485    switch (devinfo->gen) {
96491       if (devinfo->is_haswell) {
96499       if (devinfo->is_g4x) {
96514 _3DSTATE_VIEWPORT_STATE_POINTERS_PointertoCLIP_VIEWPORT_start(const struct gen_device_info *devinfo)
96516    switch (devinfo->gen) {
96522       if (devinfo->is_haswell) {
96530       if (devinfo->is_g4x) {
96548 _3DSTATE_VIEWPORT_STATE_POINTERS_PointertoSF_VIEWPORT_bits(const struct gen_device_info *devinfo)
96550    switch (devinfo->gen) {
96556       if (devinfo->is_haswell) {
96564       if (devinfo->is_g4x) {
96579 _3DSTATE_VIEWPORT_STATE_POINTERS_PointertoSF_VIEWPORT_start(const struct gen_device_info *devinfo)
96581    switch (devinfo->gen) {
96587       if (devinfo->is_haswell) {
96595       if (devinfo->is_g4x) {
96613 _3DSTATE_VIEWPORT_STATE_POINTERS_SFViewportStateChange_bits(const struct gen_device_info *devinfo)
96615    switch (devinfo->gen) {
96621       if (devinfo->is_haswell) {
96629       if (devinfo->is_g4x) {
96644 _3DSTATE_VIEWPORT_STATE_POINTERS_SFViewportStateChange_start(const struct gen_device_info *devinfo)
96646    switch (devinfo->gen) {
96652       if (devinfo->is_haswell) {
96660       if (devinfo->is_g4x) {
96683 _3DSTATE_VIEWPORT_STATE_POINTERS_CC_length(const struct gen_device_info *devinfo)
96685    switch (devinfo->gen) {
96691       if (devinfo->is_haswell) {
96699       if (devinfo->is_g4x) {
96722 _3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
96724    switch (devinfo->gen) {
96730       if (devinfo->is_haswell) {
96738       if (devinfo->is_g4x) {
96758 _3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_start(const struct gen_device_info *devinfo)
96760    switch (devinfo->gen) {
96766       if (devinfo->is_haswell) {
96774       if (devinfo->is_g4x) {
96797 _3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
96799    switch (devinfo->gen) {
96805       if (devinfo->is_haswell) {
96813       if (devinfo->is_g4x) {
96833 _3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
96835    switch (devinfo->gen) {
96841       if (devinfo->is_haswell) {
96849       if (devinfo->is_g4x) {
96872 _3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_bits(const struct gen_device_info *devinfo)
96874    switch (devinfo->gen) {
96880       if (devinfo->is_haswell) {
96888       if (devinfo->is_g4x) {
96908 _3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_start(const struct gen_device_info *devinfo)
96910    switch (devinfo->gen) {
96916       if (devinfo->is_haswell) {
96924       if (devinfo->is_g4x) {
96947 _3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_bits(const struct gen_device_info *devinfo)
96949    switch (devinfo->gen) {
96955       if (devinfo->is_haswell) {
96963       if (devinfo->is_g4x) {
96983 _3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_start(const struct gen_device_info *devinfo)
96985    switch (devinfo->gen) {
96991       if (devinfo->is_haswell) {
96999       if (devinfo->is_g4x) {
97022 _3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_bits(const struct gen_device_info *devinfo)
97024    switch (devinfo->gen) {
97030       if (devinfo->is_haswell) {
97038       if (devinfo->is_g4x) {
97058 _3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_start(const struct gen_device_info *devinfo)
97060    switch (devinfo->gen) {
97066       if (devinfo->is_haswell) {
97074       if (devinfo->is_g4x) {
97097 _3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_bits(const struct gen_device_info *devinfo)
97099    switch (devinfo->gen) {
97105       if (devinfo->is_haswell) {
97113       if (devinfo->is_g4x) {
97133 _3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_start(const struct gen_device_info *devinfo)
97135    switch (devinfo->gen) {
97141       if (devinfo->is_haswell) {
97149       if (devinfo->is_g4x) {
97172 _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length(const struct gen_device_info *devinfo)
97174    switch (devinfo->gen) {
97180       if (devinfo->is_haswell) {
97188       if (devinfo->is_g4x) {
97211 _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
97213    switch (devinfo->gen) {
97219       if (devinfo->is_haswell) {
97227       if (devinfo->is_g4x) {
97247 _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_start(const struct gen_device_info *devinfo)
97249    switch (devinfo->gen) {
97255       if (devinfo->is_haswell) {
97263       if (devinfo->is_g4x) {
97286 _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
97288    switch (devinfo->gen) {
97294       if (devinfo->is_haswell) {
97302       if (devinfo->is_g4x) {
97322 _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
97324    switch (devinfo->gen) {
97330       if (devinfo->is_haswell) {
97338       if (devinfo->is_g4x) {
97361 _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_bits(const struct gen_device_info *devinfo)
97363    switch (devinfo->gen) {
97369       if (devinfo->is_haswell) {
97377       if (devinfo->is_g4x) {
97397 _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_start(const struct gen_device_info *devinfo)
97399    switch (devinfo->gen) {
97405       if (devinfo->is_haswell) {
97413       if (devinfo->is_g4x) {
97436 _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_bits(const struct gen_device_info *devinfo)
97438    switch (devinfo->gen) {
97444       if (devinfo->is_haswell) {
97452       if (devinfo->is_g4x) {
97472 _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_start(const struct gen_device_info *devinfo)
97474    switch (devinfo->gen) {
97480       if (devinfo->is_haswell) {
97488       if (devinfo->is_g4x) {
97511 _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_bits(const struct gen_device_info *devinfo)
97513    switch (devinfo->gen) {
97519       if (devinfo->is_haswell) {
97527       if (devinfo->is_g4x) {
97547 _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_start(const struct gen_device_info *devinfo)
97549    switch (devinfo->gen) {
97555       if (devinfo->is_haswell) {
97563       if (devinfo->is_g4x) {
97586 _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_bits(const struct gen_device_info *devinfo)
97588    switch (devinfo->gen) {
97594       if (devinfo->is_haswell) {
97602       if (devinfo->is_g4x) {
97622 _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_start(const struct gen_device_info *devinfo)
97624    switch (devinfo->gen) {
97630       if (devinfo->is_haswell) {
97638       if (devinfo->is_g4x) {
97662 _3DSTATE_VS_length(const struct gen_device_info *devinfo)
97664    switch (devinfo->gen) {
97670       if (devinfo->is_haswell) {
97678       if (devinfo->is_g4x) {
97702 _3DSTATE_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
97704    switch (devinfo->gen) {
97710       if (devinfo->is_haswell) {
97718       if (devinfo->is_g4x) {
97739 _3DSTATE_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
97741    switch (devinfo->gen) {
97747       if (devinfo->is_haswell) {
97755       if (devinfo->is_g4x) {
97779 _3DSTATE_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
97781    switch (devinfo->gen) {
97787       if (devinfo->is_haswell) {
97795       if (devinfo->is_g4x) {
97816 _3DSTATE_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
97818    switch (devinfo->gen) {
97824       if (devinfo->is_haswell) {
97832       if (devinfo->is_g4x) {
97853 _3DSTATE_VS_AccessesUAV_bits(const struct gen_device_info *devinfo)
97855    switch (devinfo->gen) {
97861       if (devinfo->is_haswell) {
97869       if (devinfo->is_g4x) {
97887 _3DSTATE_VS_AccessesUAV_start(const struct gen_device_info *devinfo)
97889    switch (devinfo->gen) {
97895       if (devinfo->is_haswell) {
97903       if (devinfo->is_g4x) {
97927 _3DSTATE_VS_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
97929    switch (devinfo->gen) {
97935       if (devinfo->is_haswell) {
97943       if (devinfo->is_g4x) {
97964 _3DSTATE_VS_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
97966    switch (devinfo->gen) {
97972       if (devinfo->is_haswell) {
97980       if (devinfo->is_g4x) {
98004 _3DSTATE_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
98006    switch (devinfo->gen) {
98012       if (devinfo->is_haswell) {
98020       if (devinfo->is_g4x) {
98041 _3DSTATE_VS_CommandSubType_start(const struct gen_device_info *devinfo)
98043    switch (devinfo->gen) {
98049       if (devinfo->is_haswell) {
98057       if (devinfo->is_g4x) {
98081 _3DSTATE_VS_CommandType_bits(const struct gen_device_info *devinfo)
98083    switch (devinfo->gen) {
98089       if (devinfo->is_haswell) {
98097       if (devinfo->is_g4x) {
98118 _3DSTATE_VS_CommandType_start(const struct gen_device_info *devinfo)
98120    switch (devinfo->gen) {
98126       if (devinfo->is_haswell) {
98134       if (devinfo->is_g4x) {
98158 _3DSTATE_VS_DWordLength_bits(const struct gen_device_info *devinfo)
98160    switch (devinfo->gen) {
98166       if (devinfo->is_haswell) {
98174       if (devinfo->is_g4x) {
98195 _3DSTATE_VS_DWordLength_start(const struct gen_device_info *devinfo)
98197    switch (devinfo->gen) {
98203       if (devinfo->is_haswell) {
98211       if (devinfo->is_g4x) {
98235 _3DSTATE_VS_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
98237    switch (devinfo->gen) {
98243       if (devinfo->is_haswell) {
98251       if (devinfo->is_g4x) {
98272 _3DSTATE_VS_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
98274    switch (devinfo->gen) {
98280       if (devinfo->is_haswell) {
98288       if (devinfo->is_g4x) {
98312 _3DSTATE_VS_Enable_bits(const struct gen_device_info *devinfo)
98314    switch (devinfo->gen) {
98320       if (devinfo->is_haswell) {
98328       if (devinfo->is_g4x) {
98349 _3DSTATE_VS_Enable_start(const struct gen_device_info *devinfo)
98351    switch (devinfo->gen) {
98357       if (devinfo->is_haswell) {
98365       if (devinfo->is_g4x) {
98389 _3DSTATE_VS_FloatingPointMode_bits(const struct gen_device_info *devinfo)
98391    switch (devinfo->gen) {
98397       if (devinfo->is_haswell) {
98405       if (devinfo->is_g4x) {
98426 _3DSTATE_VS_FloatingPointMode_start(const struct gen_device_info *devinfo)
98428    switch (devinfo->gen) {
98434       if (devinfo->is_haswell) {
98442       if (devinfo->is_g4x) {
98466 _3DSTATE_VS_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
98468    switch (devinfo->gen) {
98474       if (devinfo->is_haswell) {
98482       if (devinfo->is_g4x) {
98503 _3DSTATE_VS_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
98505    switch (devinfo->gen) {
98511       if (devinfo->is_haswell) {
98519       if (devinfo->is_g4x) {
98543 _3DSTATE_VS_KernelStartPointer_bits(const struct gen_device_info *devinfo)
98545    switch (devinfo->gen) {
98551       if (devinfo->is_haswell) {
98559       if (devinfo->is_g4x) {
98580 _3DSTATE_VS_KernelStartPointer_start(const struct gen_device_info *devinfo)
98582    switch (devinfo->gen) {
98588       if (devinfo->is_haswell) {
98596       if (devinfo->is_g4x) {
98620 _3DSTATE_VS_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
98622    switch (devinfo->gen) {
98628       if (devinfo->is_haswell) {
98636       if (devinfo->is_g4x) {
98657 _3DSTATE_VS_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
98659    switch (devinfo->gen) {
98665       if (devinfo->is_haswell) {
98673       if (devinfo->is_g4x) {
98697 _3DSTATE_VS_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
98699    switch (devinfo->gen) {
98705       if (devinfo->is_haswell) {
98713       if (devinfo->is_g4x) {
98734 _3DSTATE_VS_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
98736    switch (devinfo->gen) {
98742       if (devinfo->is_haswell) {
98750       if (devinfo->is_g4x) {
98771 _3DSTATE_VS_SIMD8DispatchEnable_bits(const struct gen_device_info *devinfo)
98773    switch (devinfo->gen) {
98779       if (devinfo->is_haswell) {
98787       if (devinfo->is_g4x) {
98805 _3DSTATE_VS_SIMD8DispatchEnable_start(const struct gen_device_info *devinfo)
98807    switch (devinfo->gen) {
98813       if (devinfo->is_haswell) {
98821       if (devinfo->is_g4x) {
98840 _3DSTATE_VS_SIMD8SingleInstanceDispatchEnable_bits(const struct gen_device_info *devinfo)
98842    switch (devinfo->gen) {
98848       if (devinfo->is_haswell) {
98856       if (devinfo->is_g4x) {
98872 _3DSTATE_VS_SIMD8SingleInstanceDispatchEnable_start(const struct gen_device_info *devinfo)
98874    switch (devinfo->gen) {
98880       if (devinfo->is_haswell) {
98888       if (devinfo->is_g4x) {
98912 _3DSTATE_VS_SamplerCount_bits(const struct gen_device_info *devinfo)
98914    switch (devinfo->gen) {
98920       if (devinfo->is_haswell) {
98928       if (devinfo->is_g4x) {
98949 _3DSTATE_VS_SamplerCount_start(const struct gen_device_info *devinfo)
98951    switch (devinfo->gen) {
98957       if (devinfo->is_haswell) {
98965       if (devinfo->is_g4x) {
98989 _3DSTATE_VS_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
98991    switch (devinfo->gen) {
98997       if (devinfo->is_haswell) {
99005       if (devinfo->is_g4x) {
99026 _3DSTATE_VS_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
99028    switch (devinfo->gen) {
99034       if (devinfo->is_haswell) {
99042       if (devinfo->is_g4x) {
99065 _3DSTATE_VS_SingleVertexDispatch_bits(const struct gen_device_info *devinfo)
99067    switch (devinfo->gen) {
99073       if (devinfo->is_haswell) {
99081       if (devinfo->is_g4x) {
99101 _3DSTATE_VS_SingleVertexDispatch_start(const struct gen_device_info *devinfo)
99103    switch (devinfo->gen) {
99109       if (devinfo->is_haswell) {
99117       if (devinfo->is_g4x) {
99141 _3DSTATE_VS_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
99143    switch (devinfo->gen) {
99149       if (devinfo->is_haswell) {
99157       if (devinfo->is_g4x) {
99178 _3DSTATE_VS_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
99180    switch (devinfo->gen) {
99186       if (devinfo->is_haswell) {
99194       if (devinfo->is_g4x) {
99218 _3DSTATE_VS_StatisticsEnable_bits(const struct gen_device_info *devinfo)
99220    switch (devinfo->gen) {
99226       if (devinfo->is_haswell) {
99234       if (devinfo->is_g4x) {
99255 _3DSTATE_VS_StatisticsEnable_start(const struct gen_device_info *devinfo)
99257    switch (devinfo->gen) {
99263       if (devinfo->is_haswell) {
99271       if (devinfo->is_g4x) {
99292 _3DSTATE_VS_ThreadDispatchPriority_bits(const struct gen_device_info *devinfo)
99294    switch (devinfo->gen) {
99300       if (devinfo->is_haswell) {
99308       if (devinfo->is_g4x) {
99326 _3DSTATE_VS_ThreadDispatchPriority_start(const struct gen_device_info *devinfo)
99328    switch (devinfo->gen) {
99334       if (devinfo->is_haswell) {
99342       if (devinfo->is_g4x) {
99360 _3DSTATE_VS_ThreadPriority_bits(const struct gen_device_info *devinfo)
99362    switch (devinfo->gen) {
99368       if (devinfo->is_haswell) {
99376       if (devinfo->is_g4x) {
99391 _3DSTATE_VS_ThreadPriority_start(const struct gen_device_info *devinfo)
99393    switch (devinfo->gen) {
99399       if (devinfo->is_haswell) {
99407       if (devinfo->is_g4x) {
99428 _3DSTATE_VS_UserClipDistanceClipTestEnableBitmask_bits(const struct gen_device_info *devinfo)
99430    switch (devinfo->gen) {
99436       if (devinfo->is_haswell) {
99444       if (devinfo->is_g4x) {
99462 _3DSTATE_VS_UserClipDistanceClipTestEnableBitmask_start(const struct gen_device_info *devinfo)
99464    switch (devinfo->gen) {
99470       if (devinfo->is_haswell) {
99478       if (devinfo->is_g4x) {
99499 _3DSTATE_VS_UserClipDistanceCullTestEnableBitmask_bits(const struct gen_device_info *devinfo)
99501    switch (devinfo->gen) {
99507       if (devinfo->is_haswell) {
99515       if (devinfo->is_g4x) {
99533 _3DSTATE_VS_UserClipDistanceCullTestEnableBitmask_start(const struct gen_device_info *devinfo)
99535    switch (devinfo->gen) {
99541       if (devinfo->is_haswell) {
99549       if (devinfo->is_g4x) {
99567 _3DSTATE_VS_VSaccessesUAV_bits(const struct gen_device_info *devinfo)
99569    switch (devinfo->gen) {
99575       if (devinfo->is_haswell) {
99583       if (devinfo->is_g4x) {
99598 _3DSTATE_VS_VSaccessesUAV_start(const struct gen_device_info *devinfo)
99600    switch (devinfo->gen) {
99606       if (devinfo->is_haswell) {
99614       if (devinfo->is_g4x) {
99638 _3DSTATE_VS_VectorMaskEnable_bits(const struct gen_device_info *devinfo)
99640    switch (devinfo->gen) {
99646       if (devinfo->is_haswell) {
99654       if (devinfo->is_g4x) {
99675 _3DSTATE_VS_VectorMaskEnable_start(const struct gen_device_info *devinfo)
99677    switch (devinfo->gen) {
99683       if (devinfo->is_haswell) {
99691       if (devinfo->is_g4x) {
99715 _3DSTATE_VS_VertexCacheDisable_bits(const struct gen_device_info *devinfo)
99717    switch (devinfo->gen) {
99723       if (devinfo->is_haswell) {
99731       if (devinfo->is_g4x) {
99752 _3DSTATE_VS_VertexCacheDisable_start(const struct gen_device_info *devinfo)
99754    switch (devinfo->gen) {
99760       if (devinfo->is_haswell) {
99768       if (devinfo->is_g4x) {
99789 _3DSTATE_VS_VertexURBEntryOutputLength_bits(const struct gen_device_info *devinfo)
99791    switch (devinfo->gen) {
99797       if (devinfo->is_haswell) {
99805       if (devinfo->is_g4x) {
99823 _3DSTATE_VS_VertexURBEntryOutputLength_start(const struct gen_device_info *devinfo)
99825    switch (devinfo->gen) {
99831       if (devinfo->is_haswell) {
99839       if (devinfo->is_g4x) {
99860 _3DSTATE_VS_VertexURBEntryOutputReadOffset_bits(const struct gen_device_info *devinfo)
99862    switch (devinfo->gen) {
99868       if (devinfo->is_haswell) {
99876       if (devinfo->is_g4x) {
99894 _3DSTATE_VS_VertexURBEntryOutputReadOffset_start(const struct gen_device_info *devinfo)
99896    switch (devinfo->gen) {
99902       if (devinfo->is_haswell) {
99910       if (devinfo->is_g4x) {
99934 _3DSTATE_VS_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
99936    switch (devinfo->gen) {
99942       if (devinfo->is_haswell) {
99950       if (devinfo->is_g4x) {
99971 _3DSTATE_VS_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
99973    switch (devinfo->gen) {
99979       if (devinfo->is_haswell) {
99987       if (devinfo->is_g4x) {
100011 _3DSTATE_VS_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
100013    switch (devinfo->gen) {
100019       if (devinfo->is_haswell) {
100027       if (devinfo->is_g4x) {
100048 _3DSTATE_VS_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
100050    switch (devinfo->gen) {
100056       if (devinfo->is_haswell) {
100064       if (devinfo->is_g4x) {
100088 _3DSTATE_WM_length(const struct gen_device_info *devinfo)
100090    switch (devinfo->gen) {
100096       if (devinfo->is_haswell) {
100104       if (devinfo->is_g4x) {
100122 _3DSTATE_WM_16PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
100124    switch (devinfo->gen) {
100130       if (devinfo->is_haswell) {
100138       if (devinfo->is_g4x) {
100153 _3DSTATE_WM_16PixelDispatchEnable_start(const struct gen_device_info *devinfo)
100155    switch (devinfo->gen) {
100161       if (devinfo->is_haswell) {
100169       if (devinfo->is_g4x) {
100187 _3DSTATE_WM_32PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
100189    switch (devinfo->gen) {
100195       if (devinfo->is_haswell) {
100203       if (devinfo->is_g4x) {
100218 _3DSTATE_WM_32PixelDispatchEnable_start(const struct gen_device_info *devinfo)
100220    switch (devinfo->gen) {
100226       if (devinfo->is_haswell) {
100234       if (devinfo->is_g4x) {
100258 _3DSTATE_WM_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
100260    switch (devinfo->gen) {
100266       if (devinfo->is_haswell) {
100274       if (devinfo->is_g4x) {
100295 _3DSTATE_WM_3DCommandOpcode_start(const struct gen_device_info *devinfo)
100297    switch (devinfo->gen) {
100303       if (devinfo->is_haswell) {
100311       if (devinfo->is_g4x) {
100335 _3DSTATE_WM_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
100337    switch (devinfo->gen) {
100343       if (devinfo->is_haswell) {
100351       if (devinfo->is_g4x) {
100372 _3DSTATE_WM_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
100374    switch (devinfo->gen) {
100380       if (devinfo->is_haswell) {
100388       if (devinfo->is_g4x) {
100406 _3DSTATE_WM_8PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
100408    switch (devinfo->gen) {
100414       if (devinfo->is_haswell) {
100422       if (devinfo->is_g4x) {
100437 _3DSTATE_WM_8PixelDispatchEnable_start(const struct gen_device_info *devinfo)
100439    switch (devinfo->gen) {
100445       if (devinfo->is_haswell) {
100453       if (devinfo->is_g4x) {
100477 _3DSTATE_WM_BarycentricInterpolationMode_bits(const struct gen_device_info *devinfo)
100479    switch (devinfo->gen) {
100485       if (devinfo->is_haswell) {
100493       if (devinfo->is_g4x) {
100514 _3DSTATE_WM_BarycentricInterpolationMode_start(const struct gen_device_info *devinfo)
100516    switch (devinfo->gen) {
100522       if (devinfo->is_haswell) {
100530       if (devinfo->is_g4x) {
100548 _3DSTATE_WM_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
100550    switch (devinfo->gen) {
100556       if (devinfo->is_haswell) {
100564       if (devinfo->is_g4x) {
100579 _3DSTATE_WM_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
100581    switch (devinfo->gen) {
100587       if (devinfo->is_haswell) {
100595       if (devinfo->is_g4x) {
100619 _3DSTATE_WM_CommandSubType_bits(const struct gen_device_info *devinfo)
100621    switch (devinfo->gen) {
100627       if (devinfo->is_haswell) {
100635       if (devinfo->is_g4x) {
100656 _3DSTATE_WM_CommandSubType_start(const struct gen_device_info *devinfo)
100658    switch (devinfo->gen) {
100664       if (devinfo->is_haswell) {
100672       if (devinfo->is_g4x) {
100696 _3DSTATE_WM_CommandType_bits(const struct gen_device_info *devinfo)
100698    switch (devinfo->gen) {
100704       if (devinfo->is_haswell) {
100712       if (devinfo->is_g4x) {
100733 _3DSTATE_WM_CommandType_start(const struct gen_device_info *devinfo)
100735    switch (devinfo->gen) {
100741       if (devinfo->is_haswell) {
100749       if (devinfo->is_g4x) {
100773 _3DSTATE_WM_DWordLength_bits(const struct gen_device_info *devinfo)
100775    switch (devinfo->gen) {
100781       if (devinfo->is_haswell) {
100789       if (devinfo->is_g4x) {
100810 _3DSTATE_WM_DWordLength_start(const struct gen_device_info *devinfo)
100812    switch (devinfo->gen) {
100818       if (devinfo->is_haswell) {
100826       if (devinfo->is_g4x) {
100846 _3DSTATE_WM_DepthBufferClear_bits(const struct gen_device_info *devinfo)
100848    switch (devinfo->gen) {
100854       if (devinfo->is_haswell) {
100862       if (devinfo->is_g4x) {
100879 _3DSTATE_WM_DepthBufferClear_start(const struct gen_device_info *devinfo)
100881    switch (devinfo->gen) {
100887       if (devinfo->is_haswell) {
100895       if (devinfo->is_g4x) {
100915 _3DSTATE_WM_DepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
100917    switch (devinfo->gen) {
100923       if (devinfo->is_haswell) {
100931       if (devinfo->is_g4x) {
100948 _3DSTATE_WM_DepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
100950    switch (devinfo->gen) {
100956       if (devinfo->is_haswell) {
100964       if (devinfo->is_g4x) {
100982 _3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData0_bits(const struct gen_device_info *devinfo)
100984    switch (devinfo->gen) {
100990       if (devinfo->is_haswell) {
100998       if (devinfo->is_g4x) {
101013 _3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData0_start(const struct gen_device_info *devinfo)
101015    switch (devinfo->gen) {
101021       if (devinfo->is_haswell) {
101029       if (devinfo->is_g4x) {
101047 _3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData1_bits(const struct gen_device_info *devinfo)
101049    switch (devinfo->gen) {
101055       if (devinfo->is_haswell) {
101063       if (devinfo->is_g4x) {
101078 _3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData1_start(const struct gen_device_info *devinfo)
101080    switch (devinfo->gen) {
101086       if (devinfo->is_haswell) {
101094       if (devinfo->is_g4x) {
101112 _3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData2_bits(const struct gen_device_info *devinfo)
101114    switch (devinfo->gen) {
101120       if (devinfo->is_haswell) {
101128       if (devinfo->is_g4x) {
101143 _3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData2_start(const struct gen_device_info *devinfo)
101145    switch (devinfo->gen) {
101151       if (devinfo->is_haswell) {
101159       if (devinfo->is_g4x) {
101177 _3DSTATE_WM_DualSourceBlendEnable_bits(const struct gen_device_info *devinfo)
101179    switch (devinfo->gen) {
101185       if (devinfo->is_haswell) {
101193       if (devinfo->is_g4x) {
101208 _3DSTATE_WM_DualSourceBlendEnable_start(const struct gen_device_info *devinfo)
101210    switch (devinfo->gen) {
101216       if (devinfo->is_haswell) {
101224       if (devinfo->is_g4x) {
101247 _3DSTATE_WM_EarlyDepthStencilControl_bits(const struct gen_device_info *devinfo)
101249    switch (devinfo->gen) {
101255       if (devinfo->is_haswell) {
101263       if (devinfo->is_g4x) {
101283 _3DSTATE_WM_EarlyDepthStencilControl_start(const struct gen_device_info *devinfo)
101285    switch (devinfo->gen) {
101291       if (devinfo->is_haswell) {
101299       if (devinfo->is_g4x) {
101317 _3DSTATE_WM_FloatingPointMode_bits(const struct gen_device_info *devinfo)
101319    switch (devinfo->gen) {
101325       if (devinfo->is_haswell) {
101333       if (devinfo->is_g4x) {
101348 _3DSTATE_WM_FloatingPointMode_start(const struct gen_device_info *devinfo)
101350    switch (devinfo->gen) {
101356       if (devinfo->is_haswell) {
101364       if (devinfo->is_g4x) {
101385 _3DSTATE_WM_ForceKillPixelEnable_bits(const struct gen_device_info *devinfo)
101387    switch (devinfo->gen) {
101393       if (devinfo->is_haswell) {
101401       if (devinfo->is_g4x) {
101419 _3DSTATE_WM_ForceKillPixelEnable_start(const struct gen_device_info *devinfo)
101421    switch (devinfo->gen) {
101427       if (devinfo->is_haswell) {
101435       if (devinfo->is_g4x) {
101456 _3DSTATE_WM_ForceThreadDispatchEnable_bits(const struct gen_device_info *devinfo)
101458    switch (devinfo->gen) {
101464       if (devinfo->is_haswell) {
101472       if (devinfo->is_g4x) {
101490 _3DSTATE_WM_ForceThreadDispatchEnable_start(const struct gen_device_info *devinfo)
101492    switch (devinfo->gen) {
101498       if (devinfo->is_haswell) {
101506       if (devinfo->is_g4x) {
101526 _3DSTATE_WM_HierarchicalDepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
101528    switch (devinfo->gen) {
101534       if (devinfo->is_haswell) {
101542       if (devinfo->is_g4x) {
101559 _3DSTATE_WM_HierarchicalDepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
101561    switch (devinfo->gen) {
101567       if (devinfo->is_haswell) {
101575       if (devinfo->is_g4x) {
101593 _3DSTATE_WM_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
101595    switch (devinfo->gen) {
101601       if (devinfo->is_haswell) {
101609       if (devinfo->is_g4x) {
101624 _3DSTATE_WM_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
101626    switch (devinfo->gen) {
101632       if (devinfo->is_haswell) {
101640       if (devinfo->is_g4x) {
101658 _3DSTATE_WM_KernelStartPointer0_bits(const struct gen_device_info *devinfo)
101660    switch (devinfo->gen) {
101666       if (devinfo->is_haswell) {
101674       if (devinfo->is_g4x) {
101689 _3DSTATE_WM_KernelStartPointer0_start(const struct gen_device_info *devinfo)
101691    switch (devinfo->gen) {
101697       if (devinfo->is_haswell) {
101705       if (devinfo->is_g4x) {
101723 _3DSTATE_WM_KernelStartPointer1_bits(const struct gen_device_info *devinfo)
101725    switch (devinfo->gen) {
101731       if (devinfo->is_haswell) {
101739       if (devinfo->is_g4x) {
101754 _3DSTATE_WM_KernelStartPointer1_start(const struct gen_device_info *devinfo)
101756    switch (devinfo->gen) {
101762       if (devinfo->is_haswell) {
101770       if (devinfo->is_g4x) {
101788 _3DSTATE_WM_KernelStartPointer2_bits(const struct gen_device_info *devinfo)
101790    switch (devinfo->gen) {
101796       if (devinfo->is_haswell) {
101804       if (devinfo->is_g4x) {
101819 _3DSTATE_WM_KernelStartPointer2_start(const struct gen_device_info *devinfo)
101821    switch (devinfo->gen) {
101827       if (devinfo->is_haswell) {
101835       if (devinfo->is_g4x) {
101856 _3DSTATE_WM_LegacyDepthBufferClearEnable_bits(const struct gen_device_info *devinfo)
101858    switch (devinfo->gen) {
101864       if (devinfo->is_haswell) {
101872       if (devinfo->is_g4x) {
101890 _3DSTATE_WM_LegacyDepthBufferClearEnable_start(const struct gen_device_info *devinfo)
101892    switch (devinfo->gen) {
101898       if (devinfo->is_haswell) {
101906       if (devinfo->is_g4x) {
101927 _3DSTATE_WM_LegacyDepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
101929    switch (devinfo->gen) {
101935       if (devinfo->is_haswell) {
101943       if (devinfo->is_g4x) {
101961 _3DSTATE_WM_LegacyDepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
101963    switch (devinfo->gen) {
101969       if (devinfo->is_haswell) {
101977       if (devinfo->is_g4x) {
102001 _3DSTATE_WM_LegacyDiamondLineRasterization_bits(const struct gen_device_info *devinfo)
102003    switch (devinfo->gen) {
102009       if (devinfo->is_haswell) {
102017       if (devinfo->is_g4x) {
102038 _3DSTATE_WM_LegacyDiamondLineRasterization_start(const struct gen_device_info *devinfo)
102040    switch (devinfo->gen) {
102046       if (devinfo->is_haswell) {
102054       if (devinfo->is_g4x) {
102075 _3DSTATE_WM_LegacyHierarchicalDepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
102077    switch (devinfo->gen) {
102083       if (devinfo->is_haswell) {
102091       if (devinfo->is_g4x) {
102109 _3DSTATE_WM_LegacyHierarchicalDepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
102111    switch (devinfo->gen) {
102117       if (devinfo->is_haswell) {
102125       if (devinfo->is_g4x) {
102149 _3DSTATE_WM_LineAntialiasingRegionWidth_bits(const struct gen_device_info *devinfo)
102151    switch (devinfo->gen) {
102157       if (devinfo->is_haswell) {
102165       if (devinfo->is_g4x) {
102186 _3DSTATE_WM_LineAntialiasingRegionWidth_start(const struct gen_device_info *devinfo)
102188    switch (devinfo->gen) {
102194       if (devinfo->is_haswell) {
102202       if (devinfo->is_g4x) {
102226 _3DSTATE_WM_LineEndCapAntialiasingRegionWidth_bits(const struct gen_device_info *devinfo)
102228    switch (devinfo->gen) {
102234       if (devinfo->is_haswell) {
102242       if (devinfo->is_g4x) {
102263 _3DSTATE_WM_LineEndCapAntialiasingRegionWidth_start(const struct gen_device_info *devinfo)
102265    switch (devinfo->gen) {
102271       if (devinfo->is_haswell) {
102279       if (devinfo->is_g4x) {
102303 _3DSTATE_WM_LineStippleEnable_bits(const struct gen_device_info *devinfo)
102305    switch (devinfo->gen) {
102311       if (devinfo->is_haswell) {
102319       if (devinfo->is_g4x) {
102340 _3DSTATE_WM_LineStippleEnable_start(const struct gen_device_info *devinfo)
102342    switch (devinfo->gen) {
102348       if (devinfo->is_haswell) {
102356       if (devinfo->is_g4x) {
102374 _3DSTATE_WM_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
102376    switch (devinfo->gen) {
102382       if (devinfo->is_haswell) {
102390       if (devinfo->is_g4x) {
102405 _3DSTATE_WM_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
102407    switch (devinfo->gen) {
102413       if (devinfo->is_haswell) {
102421       if (devinfo->is_g4x) {
102439 _3DSTATE_WM_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
102441    switch (devinfo->gen) {
102447       if (devinfo->is_haswell) {
102455       if (devinfo->is_g4x) {
102470 _3DSTATE_WM_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
102472    switch (devinfo->gen) {
102478       if (devinfo->is_haswell) {
102486       if (devinfo->is_g4x) {
102506 _3DSTATE_WM_MultisampleDispatchMode_bits(const struct gen_device_info *devinfo)
102508    switch (devinfo->gen) {
102514       if (devinfo->is_haswell) {
102522       if (devinfo->is_g4x) {
102539 _3DSTATE_WM_MultisampleDispatchMode_start(const struct gen_device_info *devinfo)
102541    switch (devinfo->gen) {
102547       if (devinfo->is_haswell) {
102555       if (devinfo->is_g4x) {
102575 _3DSTATE_WM_MultisampleRasterizationMode_bits(const struct gen_device_info *devinfo)
102577    switch (devinfo->gen) {
102583       if (devinfo->is_haswell) {
102591       if (devinfo->is_g4x) {
102608 _3DSTATE_WM_MultisampleRasterizationMode_start(const struct gen_device_info *devinfo)
102610    switch (devinfo->gen) {
102616       if (devinfo->is_haswell) {
102624       if (devinfo->is_g4x) {
102642 _3DSTATE_WM_NumberofSFOutputAttributes_bits(const struct gen_device_info *devinfo)
102644    switch (devinfo->gen) {
102650       if (devinfo->is_haswell) {
102658       if (devinfo->is_g4x) {
102673 _3DSTATE_WM_NumberofSFOutputAttributes_start(const struct gen_device_info *devinfo)
102675    switch (devinfo->gen) {
102681       if (devinfo->is_haswell) {
102689       if (devinfo->is_g4x) {
102707 _3DSTATE_WM_PSUAVonly_bits(const struct gen_device_info *devinfo)
102709    switch (devinfo->gen) {
102715       if (devinfo->is_haswell) {
102723       if (devinfo->is_g4x) {
102738 _3DSTATE_WM_PSUAVonly_start(const struct gen_device_info *devinfo)
102740    switch (devinfo->gen) {
102746       if (devinfo->is_haswell) {
102754       if (devinfo->is_g4x) {
102772 _3DSTATE_WM_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
102774    switch (devinfo->gen) {
102780       if (devinfo->is_haswell) {
102788       if (devinfo->is_g4x) {
102803 _3DSTATE_WM_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
102805    switch (devinfo->gen) {
102811       if (devinfo->is_haswell) {
102819       if (devinfo->is_g4x) {
102837 _3DSTATE_WM_PixelShaderComputedDepth_bits(const struct gen_device_info *devinfo)
102839    switch (devinfo->gen) {
102845       if (devinfo->is_haswell) {
102853       if (devinfo->is_g4x) {
102868 _3DSTATE_WM_PixelShaderComputedDepth_start(const struct gen_device_info *devinfo)
102870    switch (devinfo->gen) {
102876       if (devinfo->is_haswell) {
102884       if (devinfo->is_g4x) {
102903 _3DSTATE_WM_PixelShaderComputedDepthMode_bits(const struct gen_device_info *devinfo)
102905    switch (devinfo->gen) {
102911       if (devinfo->is_haswell) {
102919       if (devinfo->is_g4x) {
102935 _3DSTATE_WM_PixelShaderComputedDepthMode_start(const struct gen_device_info *devinfo)
102937    switch (devinfo->gen) {
102943       if (devinfo->is_haswell) {
102951       if (devinfo->is_g4x) {
102971 _3DSTATE_WM_PixelShaderKillsPixel_bits(const struct gen_device_info *devinfo)
102973    switch (devinfo->gen) {
102979       if (devinfo->is_haswell) {
102987       if (devinfo->is_g4x) {
103004 _3DSTATE_WM_PixelShaderKillsPixel_start(const struct gen_device_info *devinfo)
103006    switch (devinfo->gen) {
103012       if (devinfo->is_haswell) {
103020       if (devinfo->is_g4x) {
103039 _3DSTATE_WM_PixelShaderUsesInputCoverageMask_bits(const struct gen_device_info *devinfo)
103041    switch (devinfo->gen) {
103047       if (devinfo->is_haswell) {
103055       if (devinfo->is_g4x) {
103071 _3DSTATE_WM_PixelShaderUsesInputCoverageMask_start(const struct gen_device_info *devinfo)
103073    switch (devinfo->gen) {
103079       if (devinfo->is_haswell) {
103087       if (devinfo->is_g4x) {
103107 _3DSTATE_WM_PixelShaderUsesSourceDepth_bits(const struct gen_device_info *devinfo)
103109    switch (devinfo->gen) {
103115       if (devinfo->is_haswell) {
103123       if (devinfo->is_g4x) {
103140 _3DSTATE_WM_PixelShaderUsesSourceDepth_start(const struct gen_device_info *devinfo)
103142    switch (devinfo->gen) {
103148       if (devinfo->is_haswell) {
103156       if (devinfo->is_g4x) {
103176 _3DSTATE_WM_PixelShaderUsesSourceW_bits(const struct gen_device_info *devinfo)
103178    switch (devinfo->gen) {
103184       if (devinfo->is_haswell) {
103192       if (devinfo->is_g4x) {
103209 _3DSTATE_WM_PixelShaderUsesSourceW_start(const struct gen_device_info *devinfo)
103211    switch (devinfo->gen) {
103217       if (devinfo->is_haswell) {
103225       if (devinfo->is_g4x) {
103249 _3DSTATE_WM_PointRasterizationRule_bits(const struct gen_device_info *devinfo)
103251    switch (devinfo->gen) {
103257       if (devinfo->is_haswell) {
103265       if (devinfo->is_g4x) {
103286 _3DSTATE_WM_PointRasterizationRule_start(const struct gen_device_info *devinfo)
103288    switch (devinfo->gen) {
103294       if (devinfo->is_haswell) {
103302       if (devinfo->is_g4x) {
103326 _3DSTATE_WM_PolygonStippleEnable_bits(const struct gen_device_info *devinfo)
103328    switch (devinfo->gen) {
103334       if (devinfo->is_haswell) {
103342       if (devinfo->is_g4x) {
103363 _3DSTATE_WM_PolygonStippleEnable_start(const struct gen_device_info *devinfo)
103365    switch (devinfo->gen) {
103371       if (devinfo->is_haswell) {
103379       if (devinfo->is_g4x) {
103397 _3DSTATE_WM_PositionXYOffsetSelect_bits(const struct gen_device_info *devinfo)
103399    switch (devinfo->gen) {
103405       if (devinfo->is_haswell) {
103413       if (devinfo->is_g4x) {
103428 _3DSTATE_WM_PositionXYOffsetSelect_start(const struct gen_device_info *devinfo)
103430    switch (devinfo->gen) {
103436       if (devinfo->is_haswell) {
103444       if (devinfo->is_g4x) {
103468 _3DSTATE_WM_PositionZWInterpolationMode_bits(const struct gen_device_info *devinfo)
103470    switch (devinfo->gen) {
103476       if (devinfo->is_haswell) {
103484       if (devinfo->is_g4x) {
103505 _3DSTATE_WM_PositionZWInterpolationMode_start(const struct gen_device_info *devinfo)
103507    switch (devinfo->gen) {
103513       if (devinfo->is_haswell) {
103521       if (devinfo->is_g4x) {
103539 _3DSTATE_WM_RTIndependentRasterizationEnable_bits(const struct gen_device_info *devinfo)
103541    switch (devinfo->gen) {
103547       if (devinfo->is_haswell) {
103555       if (devinfo->is_g4x) {
103570 _3DSTATE_WM_RTIndependentRasterizationEnable_start(const struct gen_device_info *devinfo)
103572    switch (devinfo->gen) {
103578       if (devinfo->is_haswell) {
103586       if (devinfo->is_g4x) {
103604 _3DSTATE_WM_SamplerCount_bits(const struct gen_device_info *devinfo)
103606    switch (devinfo->gen) {
103612       if (devinfo->is_haswell) {
103620       if (devinfo->is_g4x) {
103635 _3DSTATE_WM_SamplerCount_start(const struct gen_device_info *devinfo)
103637    switch (devinfo->gen) {
103643       if (devinfo->is_haswell) {
103651       if (devinfo->is_g4x) {
103669 _3DSTATE_WM_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
103671    switch (devinfo->gen) {
103677       if (devinfo->is_haswell) {
103685       if (devinfo->is_g4x) {
103700 _3DSTATE_WM_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
103702    switch (devinfo->gen) {
103708       if (devinfo->is_haswell) {
103716       if (devinfo->is_g4x) {
103734 _3DSTATE_WM_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
103736    switch (devinfo->gen) {
103742       if (devinfo->is_haswell) {
103750       if (devinfo->is_g4x) {
103765 _3DSTATE_WM_SingleProgramFlow_start(const struct gen_device_info *devinfo)
103767    switch (devinfo->gen) {
103773       if (devinfo->is_haswell) {
103781       if (devinfo->is_g4x) {
103799 _3DSTATE_WM_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
103801    switch (devinfo->gen) {
103807       if (devinfo->is_haswell) {
103815       if (devinfo->is_g4x) {
103830 _3DSTATE_WM_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
103832    switch (devinfo->gen) {
103838       if (devinfo->is_haswell) {
103846       if (devinfo->is_g4x) {
103870 _3DSTATE_WM_StatisticsEnable_bits(const struct gen_device_info *devinfo)
103872    switch (devinfo->gen) {
103878       if (devinfo->is_haswell) {
103886       if (devinfo->is_g4x) {
103907 _3DSTATE_WM_StatisticsEnable_start(const struct gen_device_info *devinfo)
103909    switch (devinfo->gen) {
103915       if (devinfo->is_haswell) {
103923       if (devinfo->is_g4x) {
103943 _3DSTATE_WM_ThreadDispatchEnable_bits(const struct gen_device_info *devinfo)
103945    switch (devinfo->gen) {
103951       if (devinfo->is_haswell) {
103959       if (devinfo->is_g4x) {
103976 _3DSTATE_WM_ThreadDispatchEnable_start(const struct gen_device_info *devinfo)
103978    switch (devinfo->gen) {
103984       if (devinfo->is_haswell) {
103992       if (devinfo->is_g4x) {
104010 _3DSTATE_WM_ThreadPriority_bits(const struct gen_device_info *devinfo)
104012    switch (devinfo->gen) {
104018       if (devinfo->is_haswell) {
104026       if (devinfo->is_g4x) {
104041 _3DSTATE_WM_ThreadPriority_start(const struct gen_device_info *devinfo)
104043    switch (devinfo->gen) {
104049       if (devinfo->is_haswell) {
104057       if (devinfo->is_g4x) {
104075 _3DSTATE_WM_VectorMaskEnable_bits(const struct gen_device_info *devinfo)
104077    switch (devinfo->gen) {
104083       if (devinfo->is_haswell) {
104091       if (devinfo->is_g4x) {
104106 _3DSTATE_WM_VectorMaskEnable_start(const struct gen_device_info *devinfo)
104108    switch (devinfo->gen) {
104114       if (devinfo->is_haswell) {
104122       if (devinfo->is_g4x) {
104140 _3DSTATE_WM_oMaskPresenttoRenderTarget_bits(const struct gen_device_info *devinfo)
104142    switch (devinfo->gen) {
104148       if (devinfo->is_haswell) {
104156       if (devinfo->is_g4x) {
104171 _3DSTATE_WM_oMaskPresenttoRenderTarget_start(const struct gen_device_info *devinfo)
104173    switch (devinfo->gen) {
104179       if (devinfo->is_haswell) {
104187       if (devinfo->is_g4x) {
104208 _3DSTATE_WM_CHROMAKEY_length(const struct gen_device_info *devinfo)
104210    switch (devinfo->gen) {
104216       if (devinfo->is_haswell) {
104224       if (devinfo->is_g4x) {
104245 _3DSTATE_WM_CHROMAKEY_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
104247    switch (devinfo->gen) {
104253       if (devinfo->is_haswell) {
104261       if (devinfo->is_g4x) {
104279 _3DSTATE_WM_CHROMAKEY_3DCommandOpcode_start(const struct gen_device_info *devinfo)
104281    switch (devinfo->gen) {
104287       if (devinfo->is_haswell) {
104295       if (devinfo->is_g4x) {
104316 _3DSTATE_WM_CHROMAKEY_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
104318    switch (devinfo->gen) {
104324       if (devinfo->is_haswell) {
104332       if (devinfo->is_g4x) {
104350 _3DSTATE_WM_CHROMAKEY_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
104352    switch (devinfo->gen) {
104358       if (devinfo->is_haswell) {
104366       if (devinfo->is_g4x) {
104387 _3DSTATE_WM_CHROMAKEY_ChromaKeyKillEnable_bits(const struct gen_device_info *devinfo)
104389    switch (devinfo->gen) {
104395       if (devinfo->is_haswell) {
104403       if (devinfo->is_g4x) {
104421 _3DSTATE_WM_CHROMAKEY_ChromaKeyKillEnable_start(const struct gen_device_info *devinfo)
104423    switch (devinfo->gen) {
104429       if (devinfo->is_haswell) {
104437       if (devinfo->is_g4x) {
104458 _3DSTATE_WM_CHROMAKEY_CommandSubType_bits(const struct gen_device_info *devinfo)
104460    switch (devinfo->gen) {
104466       if (devinfo->is_haswell) {
104474       if (devinfo->is_g4x) {
104492 _3DSTATE_WM_CHROMAKEY_CommandSubType_start(const struct gen_device_info *devinfo)
104494    switch (devinfo->gen) {
104500       if (devinfo->is_haswell) {
104508       if (devinfo->is_g4x) {
104529 _3DSTATE_WM_CHROMAKEY_CommandType_bits(const struct gen_device_info *devinfo)
104531    switch (devinfo->gen) {
104537       if (devinfo->is_haswell) {
104545       if (devinfo->is_g4x) {
104563 _3DSTATE_WM_CHROMAKEY_CommandType_start(const struct gen_device_info *devinfo)
104565    switch (devinfo->gen) {
104571       if (devinfo->is_haswell) {
104579       if (devinfo->is_g4x) {
104600 _3DSTATE_WM_CHROMAKEY_DWordLength_bits(const struct gen_device_info *devinfo)
104602    switch (devinfo->gen) {
104608       if (devinfo->is_haswell) {
104616       if (devinfo->is_g4x) {
104634 _3DSTATE_WM_CHROMAKEY_DWordLength_start(const struct gen_device_info *devinfo)
104636    switch (devinfo->gen) {
104642       if (devinfo->is_haswell) {
104650       if (devinfo->is_g4x) {
104671 _3DSTATE_WM_DEPTH_STENCIL_length(const struct gen_device_info *devinfo)
104673    switch (devinfo->gen) {
104679       if (devinfo->is_haswell) {
104687       if (devinfo->is_g4x) {
104708 _3DSTATE_WM_DEPTH_STENCIL_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
104710    switch (devinfo->gen) {
104716       if (devinfo->is_haswell) {
104724       if (devinfo->is_g4x) {
104742 _3DSTATE_WM_DEPTH_STENCIL_3DCommandOpcode_start(const struct gen_device_info *devinfo)
104744    switch (devinfo->gen) {
104750       if (devinfo->is_haswell) {
104758       if (devinfo->is_g4x) {
104779 _3DSTATE_WM_DEPTH_STENCIL_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
104781    switch (devinfo->gen) {
104787       if (devinfo->is_haswell) {
104795       if (devinfo->is_g4x) {
104813 _3DSTATE_WM_DEPTH_STENCIL_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
104815    switch (devinfo->gen) {
104821       if (devinfo->is_haswell) {
104829       if (devinfo->is_g4x) {
104850 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilFailOp_bits(const struct gen_device_info *devinfo)
104852    switch (devinfo->gen) {
104858       if (devinfo->is_haswell) {
104866       if (devinfo->is_g4x) {
104884 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilFailOp_start(const struct gen_device_info *devinfo)
104886    switch (devinfo->gen) {
104892       if (devinfo->is_haswell) {
104900       if (devinfo->is_g4x) {
104921 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthFailOp_bits(const struct gen_device_info *devinfo)
104923    switch (devinfo->gen) {
104929       if (devinfo->is_haswell) {
104937       if (devinfo->is_g4x) {
104955 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthFailOp_start(const struct gen_device_info *devinfo)
104957    switch (devinfo->gen) {
104963       if (devinfo->is_haswell) {
104971       if (devinfo->is_g4x) {
104992 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthPassOp_bits(const struct gen_device_info *devinfo)
104994    switch (devinfo->gen) {
105000       if (devinfo->is_haswell) {
105008       if (devinfo->is_g4x) {
105026 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthPassOp_start(const struct gen_device_info *devinfo)
105028    switch (devinfo->gen) {
105034       if (devinfo->is_haswell) {
105042       if (devinfo->is_g4x) {
105062 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilReferenceValue_bits(const struct gen_device_info *devinfo)
105064    switch (devinfo->gen) {
105070       if (devinfo->is_haswell) {
105078       if (devinfo->is_g4x) {
105095 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilReferenceValue_start(const struct gen_device_info *devinfo)
105097    switch (devinfo->gen) {
105103       if (devinfo->is_haswell) {
105111       if (devinfo->is_g4x) {
105132 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestFunction_bits(const struct gen_device_info *devinfo)
105134    switch (devinfo->gen) {
105140       if (devinfo->is_haswell) {
105148       if (devinfo->is_g4x) {
105166 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestFunction_start(const struct gen_device_info *devinfo)
105168    switch (devinfo->gen) {
105174       if (devinfo->is_haswell) {
105182       if (devinfo->is_g4x) {
105203 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestMask_bits(const struct gen_device_info *devinfo)
105205    switch (devinfo->gen) {
105211       if (devinfo->is_haswell) {
105219       if (devinfo->is_g4x) {
105237 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestMask_start(const struct gen_device_info *devinfo)
105239    switch (devinfo->gen) {
105245       if (devinfo->is_haswell) {
105253       if (devinfo->is_g4x) {
105274 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilWriteMask_bits(const struct gen_device_info *devinfo)
105276    switch (devinfo->gen) {
105282       if (devinfo->is_haswell) {
105290       if (devinfo->is_g4x) {
105308 _3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilWriteMask_start(const struct gen_device_info *devinfo)
105310    switch (devinfo->gen) {
105316       if (devinfo->is_haswell) {
105324       if (devinfo->is_g4x) {
105345 _3DSTATE_WM_DEPTH_STENCIL_CommandSubType_bits(const struct gen_device_info *devinfo)
105347    switch (devinfo->gen) {
105353       if (devinfo->is_haswell) {
105361       if (devinfo->is_g4x) {
105379 _3DSTATE_WM_DEPTH_STENCIL_CommandSubType_start(const struct gen_device_info *devinfo)
105381    switch (devinfo->gen) {
105387       if (devinfo->is_haswell) {
105395       if (devinfo->is_g4x) {
105416 _3DSTATE_WM_DEPTH_STENCIL_CommandType_bits(const struct gen_device_info *devinfo)
105418    switch (devinfo->gen) {
105424       if (devinfo->is_haswell) {
105432       if (devinfo->is_g4x) {
105450 _3DSTATE_WM_DEPTH_STENCIL_CommandType_start(const struct gen_device_info *devinfo)
105452    switch (devinfo->gen) {
105458       if (devinfo->is_haswell) {
105466       if (devinfo->is_g4x) {
105487 _3DSTATE_WM_DEPTH_STENCIL_DWordLength_bits(const struct gen_device_info *devinfo)
105489    switch (devinfo->gen) {
105495       if (devinfo->is_haswell) {
105503       if (devinfo->is_g4x) {
105521 _3DSTATE_WM_DEPTH_STENCIL_DWordLength_start(const struct gen_device_info *devinfo)
105523    switch (devinfo->gen) {
105529       if (devinfo->is_haswell) {
105537       if (devinfo->is_g4x) {
105558 _3DSTATE_WM_DEPTH_STENCIL_DepthBufferWriteEnable_bits(const struct gen_device_info *devinfo)
105560    switch (devinfo->gen) {
105566       if (devinfo->is_haswell) {
105574       if (devinfo->is_g4x) {
105592 _3DSTATE_WM_DEPTH_STENCIL_DepthBufferWriteEnable_start(const struct gen_device_info *devinfo)
105594    switch (devinfo->gen) {
105600       if (devinfo->is_haswell) {
105608       if (devinfo->is_g4x) {
105629 _3DSTATE_WM_DEPTH_STENCIL_DepthTestEnable_bits(const struct gen_device_info *devinfo)
105631    switch (devinfo->gen) {
105637       if (devinfo->is_haswell) {
105645       if (devinfo->is_g4x) {
105663 _3DSTATE_WM_DEPTH_STENCIL_DepthTestEnable_start(const struct gen_device_info *devinfo)
105665    switch (devinfo->gen) {
105671       if (devinfo->is_haswell) {
105679       if (devinfo->is_g4x) {
105700 _3DSTATE_WM_DEPTH_STENCIL_DepthTestFunction_bits(const struct gen_device_info *devinfo)
105702    switch (devinfo->gen) {
105708       if (devinfo->is_haswell) {
105716       if (devinfo->is_g4x) {
105734 _3DSTATE_WM_DEPTH_STENCIL_DepthTestFunction_start(const struct gen_device_info *devinfo)
105736    switch (devinfo->gen) {
105742       if (devinfo->is_haswell) {
105750       if (devinfo->is_g4x) {
105771 _3DSTATE_WM_DEPTH_STENCIL_DoubleSidedStencilEnable_bits(const struct gen_device_info *devinfo)
105773    switch (devinfo->gen) {
105779       if (devinfo->is_haswell) {
105787       if (devinfo->is_g4x) {
105805 _3DSTATE_WM_DEPTH_STENCIL_DoubleSidedStencilEnable_start(const struct gen_device_info *devinfo)
105807    switch (devinfo->gen) {
105813       if (devinfo->is_haswell) {
105821       if (devinfo->is_g4x) {
105842 _3DSTATE_WM_DEPTH_STENCIL_StencilBufferWriteEnable_bits(const struct gen_device_info *devinfo)
105844    switch (devinfo->gen) {
105850       if (devinfo->is_haswell) {
105858       if (devinfo->is_g4x) {
105876 _3DSTATE_WM_DEPTH_STENCIL_StencilBufferWriteEnable_start(const struct gen_device_info *devinfo)
105878    switch (devinfo->gen) {
105884       if (devinfo->is_haswell) {
105892       if (devinfo->is_g4x) {
105913 _3DSTATE_WM_DEPTH_STENCIL_StencilFailOp_bits(const struct gen_device_info *devinfo)
105915    switch (devinfo->gen) {
105921       if (devinfo->is_haswell) {
105929       if (devinfo->is_g4x) {
105947 _3DSTATE_WM_DEPTH_STENCIL_StencilFailOp_start(const struct gen_device_info *devinfo)
105949    switch (devinfo->gen) {
105955       if (devinfo->is_haswell) {
105963       if (devinfo->is_g4x) {
105984 _3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthFailOp_bits(const struct gen_device_info *devinfo)
105986    switch (devinfo->gen) {
105992       if (devinfo->is_haswell) {
106000       if (devinfo->is_g4x) {
106018 _3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthFailOp_start(const struct gen_device_info *devinfo)
106020    switch (devinfo->gen) {
106026       if (devinfo->is_haswell) {
106034       if (devinfo->is_g4x) {
106055 _3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthPassOp_bits(const struct gen_device_info *devinfo)
106057    switch (devinfo->gen) {
106063       if (devinfo->is_haswell) {
106071       if (devinfo->is_g4x) {
106089 _3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthPassOp_start(const struct gen_device_info *devinfo)
106091    switch (devinfo->gen) {
106097       if (devinfo->is_haswell) {
106105       if (devinfo->is_g4x) {
106125 _3DSTATE_WM_DEPTH_STENCIL_StencilReferenceValue_bits(const struct gen_device_info *devinfo)
106127    switch (devinfo->gen) {
106133       if (devinfo->is_haswell) {
106141       if (devinfo->is_g4x) {
106158 _3DSTATE_WM_DEPTH_STENCIL_StencilReferenceValue_start(const struct gen_device_info *devinfo)
106160    switch (devinfo->gen) {
106166       if (devinfo->is_haswell) {
106174       if (devinfo->is_g4x) {
106195 _3DSTATE_WM_DEPTH_STENCIL_StencilTestEnable_bits(const struct gen_device_info *devinfo)
106197    switch (devinfo->gen) {
106203       if (devinfo->is_haswell) {
106211       if (devinfo->is_g4x) {
106229 _3DSTATE_WM_DEPTH_STENCIL_StencilTestEnable_start(const struct gen_device_info *devinfo)
106231    switch (devinfo->gen) {
106237       if (devinfo->is_haswell) {
106245       if (devinfo->is_g4x) {
106266 _3DSTATE_WM_DEPTH_STENCIL_StencilTestFunction_bits(const struct gen_device_info *devinfo)
106268    switch (devinfo->gen) {
106274       if (devinfo->is_haswell) {
106282       if (devinfo->is_g4x) {
106300 _3DSTATE_WM_DEPTH_STENCIL_StencilTestFunction_start(const struct gen_device_info *devinfo)
106302    switch (devinfo->gen) {
106308       if (devinfo->is_haswell) {
106316       if (devinfo->is_g4x) {
106337 _3DSTATE_WM_DEPTH_STENCIL_StencilTestMask_bits(const struct gen_device_info *devinfo)
106339    switch (devinfo->gen) {
106345       if (devinfo->is_haswell) {
106353       if (devinfo->is_g4x) {
106371 _3DSTATE_WM_DEPTH_STENCIL_StencilTestMask_start(const struct gen_device_info *devinfo)
106373    switch (devinfo->gen) {
106379       if (devinfo->is_haswell) {
106387       if (devinfo->is_g4x) {
106408 _3DSTATE_WM_DEPTH_STENCIL_StencilWriteMask_bits(const struct gen_device_info *devinfo)
106410    switch (devinfo->gen) {
106416       if (devinfo->is_haswell) {
106424       if (devinfo->is_g4x) {
106442 _3DSTATE_WM_DEPTH_STENCIL_StencilWriteMask_start(const struct gen_device_info *devinfo)
106444    switch (devinfo->gen) {
106450       if (devinfo->is_haswell) {
106458       if (devinfo->is_g4x) {
106479 _3DSTATE_WM_HZ_OP_length(const struct gen_device_info *devinfo)
106481    switch (devinfo->gen) {
106487       if (devinfo->is_haswell) {
106495       if (devinfo->is_g4x) {
106516 _3DSTATE_WM_HZ_OP_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
106518    switch (devinfo->gen) {
106524       if (devinfo->is_haswell) {
106532       if (devinfo->is_g4x) {
106550 _3DSTATE_WM_HZ_OP_3DCommandOpcode_start(const struct gen_device_info *devinfo)
106552    switch (devinfo->gen) {
106558       if (devinfo->is_haswell) {
106566       if (devinfo->is_g4x) {
106587 _3DSTATE_WM_HZ_OP_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
106589    switch (devinfo->gen) {
106595       if (devinfo->is_haswell) {
106603       if (devinfo->is_g4x) {
106621 _3DSTATE_WM_HZ_OP_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
106623    switch (devinfo->gen) {
106629       if (devinfo->is_haswell) {
106637       if (devinfo->is_g4x) {
106658 _3DSTATE_WM_HZ_OP_ClearRectangleXMax_bits(const struct gen_device_info *devinfo)
106660    switch (devinfo->gen) {
106666       if (devinfo->is_haswell) {
106674       if (devinfo->is_g4x) {
106692 _3DSTATE_WM_HZ_OP_ClearRectangleXMax_start(const struct gen_device_info *devinfo)
106694    switch (devinfo->gen) {
106700       if (devinfo->is_haswell) {
106708       if (devinfo->is_g4x) {
106729 _3DSTATE_WM_HZ_OP_ClearRectangleXMin_bits(const struct gen_device_info *devinfo)
106731    switch (devinfo->gen) {
106737       if (devinfo->is_haswell) {
106745       if (devinfo->is_g4x) {
106763 _3DSTATE_WM_HZ_OP_ClearRectangleXMin_start(const struct gen_device_info *devinfo)
106765    switch (devinfo->gen) {
106771       if (devinfo->is_haswell) {
106779       if (devinfo->is_g4x) {
106800 _3DSTATE_WM_HZ_OP_ClearRectangleYMax_bits(const struct gen_device_info *devinfo)
106802    switch (devinfo->gen) {
106808       if (devinfo->is_haswell) {
106816       if (devinfo->is_g4x) {
106834 _3DSTATE_WM_HZ_OP_ClearRectangleYMax_start(const struct gen_device_info *devinfo)
106836    switch (devinfo->gen) {
106842       if (devinfo->is_haswell) {
106850       if (devinfo->is_g4x) {
106871 _3DSTATE_WM_HZ_OP_ClearRectangleYMin_bits(const struct gen_device_info *devinfo)
106873    switch (devinfo->gen) {
106879       if (devinfo->is_haswell) {
106887       if (devinfo->is_g4x) {
106905 _3DSTATE_WM_HZ_OP_ClearRectangleYMin_start(const struct gen_device_info *devinfo)
106907    switch (devinfo->gen) {
106913       if (devinfo->is_haswell) {
106921       if (devinfo->is_g4x) {
106942 _3DSTATE_WM_HZ_OP_CommandSubType_bits(const struct gen_device_info *devinfo)
106944    switch (devinfo->gen) {
106950       if (devinfo->is_haswell) {
106958       if (devinfo->is_g4x) {
106976 _3DSTATE_WM_HZ_OP_CommandSubType_start(const struct gen_device_info *devinfo)
106978    switch (devinfo->gen) {
106984       if (devinfo->is_haswell) {
106992       if (devinfo->is_g4x) {
107013 _3DSTATE_WM_HZ_OP_CommandType_bits(const struct gen_device_info *devinfo)
107015    switch (devinfo->gen) {
107021       if (devinfo->is_haswell) {
107029       if (devinfo->is_g4x) {
107047 _3DSTATE_WM_HZ_OP_CommandType_start(const struct gen_device_info *devinfo)
107049    switch (devinfo->gen) {
107055       if (devinfo->is_haswell) {
107063       if (devinfo->is_g4x) {
107084 _3DSTATE_WM_HZ_OP_DWordLength_bits(const struct gen_device_info *devinfo)
107086    switch (devinfo->gen) {
107092       if (devinfo->is_haswell) {
107100       if (devinfo->is_g4x) {
107118 _3DSTATE_WM_HZ_OP_DWordLength_start(const struct gen_device_info *devinfo)
107120    switch (devinfo->gen) {
107126       if (devinfo->is_haswell) {
107134       if (devinfo->is_g4x) {
107155 _3DSTATE_WM_HZ_OP_DepthBufferClearEnable_bits(const struct gen_device_info *devinfo)
107157    switch (devinfo->gen) {
107163       if (devinfo->is_haswell) {
107171       if (devinfo->is_g4x) {
107189 _3DSTATE_WM_HZ_OP_DepthBufferClearEnable_start(const struct gen_device_info *devinfo)
107191    switch (devinfo->gen) {
107197       if (devinfo->is_haswell) {
107205       if (devinfo->is_g4x) {
107226 _3DSTATE_WM_HZ_OP_DepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
107228    switch (devinfo->gen) {
107234       if (devinfo->is_haswell) {
107242       if (devinfo->is_g4x) {
107260 _3DSTATE_WM_HZ_OP_DepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
107262    switch (devinfo->gen) {
107268       if (devinfo->is_haswell) {
107276       if (devinfo->is_g4x) {
107297 _3DSTATE_WM_HZ_OP_FullSurfaceDepthandStencilClear_bits(const struct gen_device_info *devinfo)
107299    switch (devinfo->gen) {
107305       if (devinfo->is_haswell) {
107313       if (devinfo->is_g4x) {
107331 _3DSTATE_WM_HZ_OP_FullSurfaceDepthandStencilClear_start(const struct gen_device_info *devinfo)
107333    switch (devinfo->gen) {
107339       if (devinfo->is_haswell) {
107347       if (devinfo->is_g4x) {
107368 _3DSTATE_WM_HZ_OP_HierarchicalDepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
107370    switch (devinfo->gen) {
107376       if (devinfo->is_haswell) {
107384       if (devinfo->is_g4x) {
107402 _3DSTATE_WM_HZ_OP_HierarchicalDepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
107404    switch (devinfo->gen) {
107410       if (devinfo->is_haswell) {
107418       if (devinfo->is_g4x) {
107439 _3DSTATE_WM_HZ_OP_NumberofMultisamples_bits(const struct gen_device_info *devinfo)
107441    switch (devinfo->gen) {
107447       if (devinfo->is_haswell) {
107455       if (devinfo->is_g4x) {
107473 _3DSTATE_WM_HZ_OP_NumberofMultisamples_start(const struct gen_device_info *devinfo)
107475    switch (devinfo->gen) {
107481       if (devinfo->is_haswell) {
107489       if (devinfo->is_g4x) {
107510 _3DSTATE_WM_HZ_OP_PixelPositionOffsetEnable_bits(const struct gen_device_info *devinfo)
107512    switch (devinfo->gen) {
107518       if (devinfo->is_haswell) {
107526       if (devinfo->is_g4x) {
107544 _3DSTATE_WM_HZ_OP_PixelPositionOffsetEnable_start(const struct gen_device_info *devinfo)
107546    switch (devinfo->gen) {
107552       if (devinfo->is_haswell) {
107560       if (devinfo->is_g4x) {
107581 _3DSTATE_WM_HZ_OP_SampleMask_bits(const struct gen_device_info *devinfo)
107583    switch (devinfo->gen) {
107589       if (devinfo->is_haswell) {
107597       if (devinfo->is_g4x) {
107615 _3DSTATE_WM_HZ_OP_SampleMask_start(const struct gen_device_info *devinfo)
107617    switch (devinfo->gen) {
107623       if (devinfo->is_haswell) {
107631       if (devinfo->is_g4x) {
107652 _3DSTATE_WM_HZ_OP_ScissorRectangleEnable_bits(const struct gen_device_info *devinfo)
107654    switch (devinfo->gen) {
107660       if (devinfo->is_haswell) {
107668       if (devinfo->is_g4x) {
107686 _3DSTATE_WM_HZ_OP_ScissorRectangleEnable_start(const struct gen_device_info *devinfo)
107688    switch (devinfo->gen) {
107694       if (devinfo->is_haswell) {
107702       if (devinfo->is_g4x) {
107723 _3DSTATE_WM_HZ_OP_StencilBufferClearEnable_bits(const struct gen_device_info *devinfo)
107725    switch (devinfo->gen) {
107731       if (devinfo->is_haswell) {
107739       if (devinfo->is_g4x) {
107757 _3DSTATE_WM_HZ_OP_StencilBufferClearEnable_start(const struct gen_device_info *devinfo)
107759    switch (devinfo->gen) {
107765       if (devinfo->is_haswell) {
107773       if (devinfo->is_g4x) {
107794 _3DSTATE_WM_HZ_OP_StencilClearValue_bits(const struct gen_device_info *devinfo)
107796    switch (devinfo->gen) {
107802       if (devinfo->is_haswell) {
107810       if (devinfo->is_g4x) {
107828 _3DSTATE_WM_HZ_OP_StencilClearValue_start(const struct gen_device_info *devinfo)
107830    switch (devinfo->gen) {
107836       if (devinfo->is_haswell) {
107844       if (devinfo->is_g4x) {
107863 ACTHD_UDW_length(const struct gen_device_info *devinfo)
107865    switch (devinfo->gen) {
107871       if (devinfo->is_haswell) {
107879       if (devinfo->is_g4x) {
107898 ACTHD_UDW_HeadPointerUpperDWORD_bits(const struct gen_device_info *devinfo)
107900    switch (devinfo->gen) {
107906       if (devinfo->is_haswell) {
107914       if (devinfo->is_g4x) {
107930 ACTHD_UDW_HeadPointerUpperDWORD_start(const struct gen_device_info *devinfo)
107932    switch (devinfo->gen) {
107938       if (devinfo->is_haswell) {
107946       if (devinfo->is_g4x) {
107965 BCS_ACTHD_UDW_length(const struct gen_device_info *devinfo)
107967    switch (devinfo->gen) {
107973       if (devinfo->is_haswell) {
107981       if (devinfo->is_g4x) {
108000 BCS_ACTHD_UDW_HeadPointerUpperDWORD_bits(const struct gen_device_info *devinfo)
108002    switch (devinfo->gen) {
108008       if (devinfo->is_haswell) {
108016       if (devinfo->is_g4x) {
108032 BCS_ACTHD_UDW_HeadPointerUpperDWORD_start(const struct gen_device_info *devinfo)
108034    switch (devinfo->gen) {
108040       if (devinfo->is_haswell) {
108048       if (devinfo->is_g4x) {
108068 BCS_FAULT_REG_length(const struct gen_device_info *devinfo)
108070    switch (devinfo->gen) {
108076       if (devinfo->is_haswell) {
108084       if (devinfo->is_g4x) {
108104 BCS_FAULT_REG_FaultType_bits(const struct gen_device_info *devinfo)
108106    switch (devinfo->gen) {
108112       if (devinfo->is_haswell) {
108120       if (devinfo->is_g4x) {
108137 BCS_FAULT_REG_FaultType_start(const struct gen_device_info *devinfo)
108139    switch (devinfo->gen) {
108145       if (devinfo->is_haswell) {
108153       if (devinfo->is_g4x) {
108173 BCS_FAULT_REG_GTTSEL_bits(const struct gen_device_info *devinfo)
108175    switch (devinfo->gen) {
108181       if (devinfo->is_haswell) {
108189       if (devinfo->is_g4x) {
108206 BCS_FAULT_REG_GTTSEL_start(const struct gen_device_info *devinfo)
108208    switch (devinfo->gen) {
108214       if (devinfo->is_haswell) {
108222       if (devinfo->is_g4x) {
108242 BCS_FAULT_REG_SRCIDofFault_bits(const struct gen_device_info *devinfo)
108244    switch (devinfo->gen) {
108250       if (devinfo->is_haswell) {
108258       if (devinfo->is_g4x) {
108275 BCS_FAULT_REG_SRCIDofFault_start(const struct gen_device_info *devinfo)
108277    switch (devinfo->gen) {
108283       if (devinfo->is_haswell) {
108291       if (devinfo->is_g4x) {
108311 BCS_FAULT_REG_ValidBit_bits(const struct gen_device_info *devinfo)
108313    switch (devinfo->gen) {
108319       if (devinfo->is_haswell) {
108327       if (devinfo->is_g4x) {
108344 BCS_FAULT_REG_ValidBit_start(const struct gen_device_info *devinfo)
108346    switch (devinfo->gen) {
108352       if (devinfo->is_haswell) {
108360       if (devinfo->is_g4x) {
108380 BCS_FAULT_REG_VirtualAddressofFault_bits(const struct gen_device_info *devinfo)
108382    switch (devinfo->gen) {
108388       if (devinfo->is_haswell) {
108396       if (devinfo->is_g4x) {
108413 BCS_FAULT_REG_VirtualAddressofFault_start(const struct gen_device_info *devinfo)
108415    switch (devinfo->gen) {
108421       if (devinfo->is_haswell) {
108429       if (devinfo->is_g4x) {
108453 BCS_INSTDONE_length(const struct gen_device_info *devinfo)
108455    switch (devinfo->gen) {
108461       if (devinfo->is_haswell) {
108469       if (devinfo->is_g4x) {
108493 BCS_INSTDONE_BCSDone_bits(const struct gen_device_info *devinfo)
108495    switch (devinfo->gen) {
108501       if (devinfo->is_haswell) {
108509       if (devinfo->is_g4x) {
108530 BCS_INSTDONE_BCSDone_start(const struct gen_device_info *devinfo)
108532    switch (devinfo->gen) {
108538       if (devinfo->is_haswell) {
108546       if (devinfo->is_g4x) {
108570 BCS_INSTDONE_BlitterIDLE_bits(const struct gen_device_info *devinfo)
108572    switch (devinfo->gen) {
108578       if (devinfo->is_haswell) {
108586       if (devinfo->is_g4x) {
108607 BCS_INSTDONE_BlitterIDLE_start(const struct gen_device_info *devinfo)
108609    switch (devinfo->gen) {
108615       if (devinfo->is_haswell) {
108623       if (devinfo->is_g4x) {
108647 BCS_INSTDONE_GABIDLE_bits(const struct gen_device_info *devinfo)
108649    switch (devinfo->gen) {
108655       if (devinfo->is_haswell) {
108663       if (devinfo->is_g4x) {
108684 BCS_INSTDONE_GABIDLE_start(const struct gen_device_info *devinfo)
108686    switch (devinfo->gen) {
108692       if (devinfo->is_haswell) {
108700       if (devinfo->is_g4x) {
108724 BCS_INSTDONE_RingEnable_bits(const struct gen_device_info *devinfo)
108726    switch (devinfo->gen) {
108732       if (devinfo->is_haswell) {
108740       if (devinfo->is_g4x) {
108761 BCS_INSTDONE_RingEnable_start(const struct gen_device_info *devinfo)
108763    switch (devinfo->gen) {
108769       if (devinfo->is_haswell) {
108777       if (devinfo->is_g4x) {
108799 BCS_RING_BUFFER_CTL_length(const struct gen_device_info *devinfo)
108801    switch (devinfo->gen) {
108807       if (devinfo->is_haswell) {
108815       if (devinfo->is_g4x) {
108837 BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits(const struct gen_device_info *devinfo)
108839    switch (devinfo->gen) {
108845       if (devinfo->is_haswell) {
108853       if (devinfo->is_g4x) {
108872 BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start(const struct gen_device_info *devinfo)
108874    switch (devinfo->gen) {
108880       if (devinfo->is_haswell) {
108888       if (devinfo->is_g4x) {
108910 BCS_RING_BUFFER_CTL_BufferLengthinpages1_bits(const struct gen_device_info *devinfo)
108912    switch (devinfo->gen) {
108918       if (devinfo->is_haswell) {
108926       if (devinfo->is_g4x) {
108945 BCS_RING_BUFFER_CTL_BufferLengthinpages1_start(const struct gen_device_info *devinfo)
108947    switch (devinfo->gen) {
108953       if (devinfo->is_haswell) {
108961       if (devinfo->is_g4x) {
108983 BCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits(const struct gen_device_info *devinfo)
108985    switch (devinfo->gen) {
108991       if (devinfo->is_haswell) {
108999       if (devinfo->is_g4x) {
109018 BCS_RING_BUFFER_CTL_DisableRegisterAccesses_start(const struct gen_device_info *devinfo)
109020    switch (devinfo->gen) {
109026       if (devinfo->is_haswell) {
109034       if (devinfo->is_g4x) {
109056 BCS_RING_BUFFER_CTL_RBWait_bits(const struct gen_device_info *devinfo)
109058    switch (devinfo->gen) {
109064       if (devinfo->is_haswell) {
109072       if (devinfo->is_g4x) {
109091 BCS_RING_BUFFER_CTL_RBWait_start(const struct gen_device_info *devinfo)
109093    switch (devinfo->gen) {
109099       if (devinfo->is_haswell) {
109107       if (devinfo->is_g4x) {
109129 BCS_RING_BUFFER_CTL_RingBufferEnable_bits(const struct gen_device_info *devinfo)
109131    switch (devinfo->gen) {
109137       if (devinfo->is_haswell) {
109145       if (devinfo->is_g4x) {
109164 BCS_RING_BUFFER_CTL_RingBufferEnable_start(const struct gen_device_info *devinfo)
109166    switch (devinfo->gen) {
109172       if (devinfo->is_haswell) {
109180       if (devinfo->is_g4x) {
109202 BCS_RING_BUFFER_CTL_SemaphoreWait_bits(const struct gen_device_info *devinfo)
109204    switch (devinfo->gen) {
109210       if (devinfo->is_haswell) {
109218       if (devinfo->is_g4x) {
109237 BCS_RING_BUFFER_CTL_SemaphoreWait_start(const struct gen_device_info *devinfo)
109239    switch (devinfo->gen) {
109245       if (devinfo->is_haswell) {
109253       if (devinfo->is_g4x) {
109275 BINDING_TABLE_EDIT_ENTRY_length(const struct gen_device_info *devinfo)
109277    switch (devinfo->gen) {
109283       if (devinfo->is_haswell) {
109291       if (devinfo->is_g4x) {
109313 BINDING_TABLE_EDIT_ENTRY_BindingTableIndex_bits(const struct gen_device_info *devinfo)
109315    switch (devinfo->gen) {
109321       if (devinfo->is_haswell) {
109329       if (devinfo->is_g4x) {
109348 BINDING_TABLE_EDIT_ENTRY_BindingTableIndex_start(const struct gen_device_info *devinfo)
109350    switch (devinfo->gen) {
109356       if (devinfo->is_haswell) {
109364       if (devinfo->is_g4x) {
109386 BINDING_TABLE_EDIT_ENTRY_SurfaceStatePointer_bits(const struct gen_device_info *devinfo)
109388    switch (devinfo->gen) {
109394       if (devinfo->is_haswell) {
109402       if (devinfo->is_g4x) {
109421 BINDING_TABLE_EDIT_ENTRY_SurfaceStatePointer_start(const struct gen_device_info *devinfo)
109423    switch (devinfo->gen) {
109429       if (devinfo->is_haswell) {
109437       if (devinfo->is_g4x) {
109461 BINDING_TABLE_STATE_length(const struct gen_device_info *devinfo)
109463    switch (devinfo->gen) {
109469       if (devinfo->is_haswell) {
109477       if (devinfo->is_g4x) {
109501 BINDING_TABLE_STATE_SurfaceStatePointer_bits(const struct gen_device_info *devinfo)
109503    switch (devinfo->gen) {
109509       if (devinfo->is_haswell) {
109517       if (devinfo->is_g4x) {
109538 BINDING_TABLE_STATE_SurfaceStatePointer_start(const struct gen_device_info *devinfo)
109540    switch (devinfo->gen) {
109546       if (devinfo->is_haswell) {
109554       if (devinfo->is_g4x) {
109578 BLEND_STATE_length(const struct gen_device_info *devinfo)
109580    switch (devinfo->gen) {
109586       if (devinfo->is_haswell) {
109594       if (devinfo->is_g4x) {
109615 BLEND_STATE_AlphaTestEnable_bits(const struct gen_device_info *devinfo)
109617    switch (devinfo->gen) {
109623       if (devinfo->is_haswell) {
109631       if (devinfo->is_g4x) {
109649 BLEND_STATE_AlphaTestEnable_start(const struct gen_device_info *devinfo)
109651    switch (devinfo->gen) {
109657       if (devinfo->is_haswell) {
109665       if (devinfo->is_g4x) {
109686 BLEND_STATE_AlphaTestFunction_bits(const struct gen_device_info *devinfo)
109688    switch (devinfo->gen) {
109694       if (devinfo->is_haswell) {
109702       if (devinfo->is_g4x) {
109720 BLEND_STATE_AlphaTestFunction_start(const struct gen_device_info *devinfo)
109722    switch (devinfo->gen) {
109728       if (devinfo->is_haswell) {
109736       if (devinfo->is_g4x) {
109757 BLEND_STATE_AlphaToCoverageDitherEnable_bits(const struct gen_device_info *devinfo)
109759    switch (devinfo->gen) {
109765       if (devinfo->is_haswell) {
109773       if (devinfo->is_g4x) {
109791 BLEND_STATE_AlphaToCoverageDitherEnable_start(const struct gen_device_info *devinfo)
109793    switch (devinfo->gen) {
109799       if (devinfo->is_haswell) {
109807       if (devinfo->is_g4x) {
109828 BLEND_STATE_AlphaToCoverageEnable_bits(const struct gen_device_info *devinfo)
109830    switch (devinfo->gen) {
109836       if (devinfo->is_haswell) {
109844       if (devinfo->is_g4x) {
109862 BLEND_STATE_AlphaToCoverageEnable_start(const struct gen_device_info *devinfo)
109864    switch (devinfo->gen) {
109870       if (devinfo->is_haswell) {
109878       if (devinfo->is_g4x) {
109899 BLEND_STATE_AlphaToOneEnable_bits(const struct gen_device_info *devinfo)
109901    switch (devinfo->gen) {
109907       if (devinfo->is_haswell) {
109915       if (devinfo->is_g4x) {
109933 BLEND_STATE_AlphaToOneEnable_start(const struct gen_device_info *devinfo)
109935    switch (devinfo->gen) {
109941       if (devinfo->is_haswell) {
109949       if (devinfo->is_g4x) {
109970 BLEND_STATE_ColorDitherEnable_bits(const struct gen_device_info *devinfo)
109972    switch (devinfo->gen) {
109978       if (devinfo->is_haswell) {
109986       if (devinfo->is_g4x) {
110004 BLEND_STATE_ColorDitherEnable_start(const struct gen_device_info *devinfo)
110006    switch (devinfo->gen) {
110012       if (devinfo->is_haswell) {
110020       if (devinfo->is_g4x) {
110044 BLEND_STATE_Entry_bits(const struct gen_device_info *devinfo)
110046    switch (devinfo->gen) {
110052       if (devinfo->is_haswell) {
110060       if (devinfo->is_g4x) {
110081 BLEND_STATE_Entry_start(const struct gen_device_info *devinfo)
110083    switch (devinfo->gen) {
110089       if (devinfo->is_haswell) {
110097       if (devinfo->is_g4x) {
110118 BLEND_STATE_IndependentAlphaBlendEnable_bits(const struct gen_device_info *devinfo)
110120    switch (devinfo->gen) {
110126       if (devinfo->is_haswell) {
110134       if (devinfo->is_g4x) {
110152 BLEND_STATE_IndependentAlphaBlendEnable_start(const struct gen_device_info *devinfo)
110154    switch (devinfo->gen) {
110160       if (devinfo->is_haswell) {
110168       if (devinfo->is_g4x) {
110189 BLEND_STATE_XDitherOffset_bits(const struct gen_device_info *devinfo)
110191    switch (devinfo->gen) {
110197       if (devinfo->is_haswell) {
110205       if (devinfo->is_g4x) {
110223 BLEND_STATE_XDitherOffset_start(const struct gen_device_info *devinfo)
110225    switch (devinfo->gen) {
110231       if (devinfo->is_haswell) {
110239       if (devinfo->is_g4x) {
110260 BLEND_STATE_YDitherOffset_bits(const struct gen_device_info *devinfo)
110262    switch (devinfo->gen) {
110268       if (devinfo->is_haswell) {
110276       if (devinfo->is_g4x) {
110294 BLEND_STATE_YDitherOffset_start(const struct gen_device_info *devinfo)
110296    switch (devinfo->gen) {
110302       if (devinfo->is_haswell) {
110310       if (devinfo->is_g4x) {
110334 BLEND_STATE_ENTRY_length(const struct gen_device_info *devinfo)
110336    switch (devinfo->gen) {
110342       if (devinfo->is_haswell) {
110350       if (devinfo->is_g4x) {
110374 BLEND_STATE_ENTRY_AlphaBlendFunction_bits(const struct gen_device_info *devinfo)
110376    switch (devinfo->gen) {
110382       if (devinfo->is_haswell) {
110390       if (devinfo->is_g4x) {
110411 BLEND_STATE_ENTRY_AlphaBlendFunction_start(const struct gen_device_info *devinfo)
110413    switch (devinfo->gen) {
110419       if (devinfo->is_haswell) {
110427       if (devinfo->is_g4x) {
110447 BLEND_STATE_ENTRY_AlphaTestEnable_bits(const struct gen_device_info *devinfo)
110449    switch (devinfo->gen) {
110455       if (devinfo->is_haswell) {
110463       if (devinfo->is_g4x) {
110480 BLEND_STATE_ENTRY_AlphaTestEnable_start(const struct gen_device_info *devinfo)
110482    switch (devinfo->gen) {
110488       if (devinfo->is_haswell) {
110496       if (devinfo->is_g4x) {
110516 BLEND_STATE_ENTRY_AlphaTestFunction_bits(const struct gen_device_info *devinfo)
110518    switch (devinfo->gen) {
110524       if (devinfo->is_haswell) {
110532       if (devinfo->is_g4x) {
110549 BLEND_STATE_ENTRY_AlphaTestFunction_start(const struct gen_device_info *devinfo)
110551    switch (devinfo->gen) {
110557       if (devinfo->is_haswell) {
110565       if (devinfo->is_g4x) {
110585 BLEND_STATE_ENTRY_AlphaToCoverageDitherEnable_bits(const struct gen_device_info *devinfo)
110587    switch (devinfo->gen) {
110593       if (devinfo->is_haswell) {
110601       if (devinfo->is_g4x) {
110618 BLEND_STATE_ENTRY_AlphaToCoverageDitherEnable_start(const struct gen_device_info *devinfo)
110620    switch (devinfo->gen) {
110626       if (devinfo->is_haswell) {
110634       if (devinfo->is_g4x) {
110654 BLEND_STATE_ENTRY_AlphaToCoverageEnable_bits(const struct gen_device_info *devinfo)
110656    switch (devinfo->gen) {
110662       if (devinfo->is_haswell) {
110670       if (devinfo->is_g4x) {
110687 BLEND_STATE_ENTRY_AlphaToCoverageEnable_start(const struct gen_device_info *devinfo)
110689    switch (devinfo->gen) {
110695       if (devinfo->is_haswell) {
110703       if (devinfo->is_g4x) {
110723 BLEND_STATE_ENTRY_AlphaToOneEnable_bits(const struct gen_device_info *devinfo)
110725    switch (devinfo->gen) {
110731       if (devinfo->is_haswell) {
110739       if (devinfo->is_g4x) {
110756 BLEND_STATE_ENTRY_AlphaToOneEnable_start(const struct gen_device_info *devinfo)
110758    switch (devinfo->gen) {
110764       if (devinfo->is_haswell) {
110772       if (devinfo->is_g4x) {
110796 BLEND_STATE_ENTRY_ColorBlendFunction_bits(const struct gen_device_info *devinfo)
110798    switch (devinfo->gen) {
110804       if (devinfo->is_haswell) {
110812       if (devinfo->is_g4x) {
110833 BLEND_STATE_ENTRY_ColorBlendFunction_start(const struct gen_device_info *devinfo)
110835    switch (devinfo->gen) {
110841       if (devinfo->is_haswell) {
110849       if (devinfo->is_g4x) {
110873 BLEND_STATE_ENTRY_ColorBufferBlendEnable_bits(const struct gen_device_info *devinfo)
110875    switch (devinfo->gen) {
110881       if (devinfo->is_haswell) {
110889       if (devinfo->is_g4x) {
110910 BLEND_STATE_ENTRY_ColorBufferBlendEnable_start(const struct gen_device_info *devinfo)
110912    switch (devinfo->gen) {
110918       if (devinfo->is_haswell) {
110926       if (devinfo->is_g4x) {
110950 BLEND_STATE_ENTRY_ColorClampRange_bits(const struct gen_device_info *devinfo)
110952    switch (devinfo->gen) {
110958       if (devinfo->is_haswell) {
110966       if (devinfo->is_g4x) {
110987 BLEND_STATE_ENTRY_ColorClampRange_start(const struct gen_device_info *devinfo)
110989    switch (devinfo->gen) {
110995       if (devinfo->is_haswell) {
111003       if (devinfo->is_g4x) {
111023 BLEND_STATE_ENTRY_ColorDitherEnable_bits(const struct gen_device_info *devinfo)
111025    switch (devinfo->gen) {
111031       if (devinfo->is_haswell) {
111039       if (devinfo->is_g4x) {
111056 BLEND_STATE_ENTRY_ColorDitherEnable_start(const struct gen_device_info *devinfo)
111058    switch (devinfo->gen) {
111064       if (devinfo->is_haswell) {
111072       if (devinfo->is_g4x) {
111096 BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_bits(const struct gen_device_info *devinfo)
111098    switch (devinfo->gen) {
111104       if (devinfo->is_haswell) {
111112       if (devinfo->is_g4x) {
111133 BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_start(const struct gen_device_info *devinfo)
111135    switch (devinfo->gen) {
111141       if (devinfo->is_haswell) {
111149       if (devinfo->is_g4x) {
111173 BLEND_STATE_ENTRY_DestinationBlendFactor_bits(const struct gen_device_info *devinfo)
111175    switch (devinfo->gen) {
111181       if (devinfo->is_haswell) {
111189       if (devinfo->is_g4x) {
111210 BLEND_STATE_ENTRY_DestinationBlendFactor_start(const struct gen_device_info *devinfo)
111212    switch (devinfo->gen) {
111218       if (devinfo->is_haswell) {
111226       if (devinfo->is_g4x) {
111246 BLEND_STATE_ENTRY_IndependentAlphaBlendEnable_bits(const struct gen_device_info *devinfo)
111248    switch (devinfo->gen) {
111254       if (devinfo->is_haswell) {
111262       if (devinfo->is_g4x) {
111279 BLEND_STATE_ENTRY_IndependentAlphaBlendEnable_start(const struct gen_device_info *devinfo)
111281    switch (devinfo->gen) {
111287       if (devinfo->is_haswell) {
111295       if (devinfo->is_g4x) {
111319 BLEND_STATE_ENTRY_LogicOpEnable_bits(const struct gen_device_info *devinfo)
111321    switch (devinfo->gen) {
111327       if (devinfo->is_haswell) {
111335       if (devinfo->is_g4x) {
111356 BLEND_STATE_ENTRY_LogicOpEnable_start(const struct gen_device_info *devinfo)
111358    switch (devinfo->gen) {
111364       if (devinfo->is_haswell) {
111372       if (devinfo->is_g4x) {
111396 BLEND_STATE_ENTRY_LogicOpFunction_bits(const struct gen_device_info *devinfo)
111398    switch (devinfo->gen) {
111404       if (devinfo->is_haswell) {
111412       if (devinfo->is_g4x) {
111433 BLEND_STATE_ENTRY_LogicOpFunction_start(const struct gen_device_info *devinfo)
111435    switch (devinfo->gen) {
111441       if (devinfo->is_haswell) {
111449       if (devinfo->is_g4x) {
111473 BLEND_STATE_ENTRY_PostBlendColorClampEnable_bits(const struct gen_device_info *devinfo)
111475    switch (devinfo->gen) {
111481       if (devinfo->is_haswell) {
111489       if (devinfo->is_g4x) {
111510 BLEND_STATE_ENTRY_PostBlendColorClampEnable_start(const struct gen_device_info *devinfo)
111512    switch (devinfo->gen) {
111518       if (devinfo->is_haswell) {
111526       if (devinfo->is_g4x) {
111550 BLEND_STATE_ENTRY_PreBlendColorClampEnable_bits(const struct gen_device_info *devinfo)
111552    switch (devinfo->gen) {
111558       if (devinfo->is_haswell) {
111566       if (devinfo->is_g4x) {
111587 BLEND_STATE_ENTRY_PreBlendColorClampEnable_start(const struct gen_device_info *devinfo)
111589    switch (devinfo->gen) {
111595       if (devinfo->is_haswell) {
111603       if (devinfo->is_g4x) {
111624 BLEND_STATE_ENTRY_PreBlendSourceOnlyClampEnable_bits(const struct gen_device_info *devinfo)
111626    switch (devinfo->gen) {
111632       if (devinfo->is_haswell) {
111640       if (devinfo->is_g4x) {
111658 BLEND_STATE_ENTRY_PreBlendSourceOnlyClampEnable_start(const struct gen_device_info *devinfo)
111660    switch (devinfo->gen) {
111666       if (devinfo->is_haswell) {
111674       if (devinfo->is_g4x) {
111698 BLEND_STATE_ENTRY_SourceAlphaBlendFactor_bits(const struct gen_device_info *devinfo)
111700    switch (devinfo->gen) {
111706       if (devinfo->is_haswell) {
111714       if (devinfo->is_g4x) {
111735 BLEND_STATE_ENTRY_SourceAlphaBlendFactor_start(const struct gen_device_info *devinfo)
111737    switch (devinfo->gen) {
111743       if (devinfo->is_haswell) {
111751       if (devinfo->is_g4x) {
111775 BLEND_STATE_ENTRY_SourceBlendFactor_bits(const struct gen_device_info *devinfo)
111777    switch (devinfo->gen) {
111783       if (devinfo->is_haswell) {
111791       if (devinfo->is_g4x) {
111812 BLEND_STATE_ENTRY_SourceBlendFactor_start(const struct gen_device_info *devinfo)
111814    switch (devinfo->gen) {
111820       if (devinfo->is_haswell) {
111828       if (devinfo->is_g4x) {
111852 BLEND_STATE_ENTRY_WriteDisableAlpha_bits(const struct gen_device_info *devinfo)
111854    switch (devinfo->gen) {
111860       if (devinfo->is_haswell) {
111868       if (devinfo->is_g4x) {
111889 BLEND_STATE_ENTRY_WriteDisableAlpha_start(const struct gen_device_info *devinfo)
111891    switch (devinfo->gen) {
111897       if (devinfo->is_haswell) {
111905       if (devinfo->is_g4x) {
111929 BLEND_STATE_ENTRY_WriteDisableBlue_bits(const struct gen_device_info *devinfo)
111931    switch (devinfo->gen) {
111937       if (devinfo->is_haswell) {
111945       if (devinfo->is_g4x) {
111966 BLEND_STATE_ENTRY_WriteDisableBlue_start(const struct gen_device_info *devinfo)
111968    switch (devinfo->gen) {
111974       if (devinfo->is_haswell) {
111982       if (devinfo->is_g4x) {
112006 BLEND_STATE_ENTRY_WriteDisableGreen_bits(const struct gen_device_info *devinfo)
112008    switch (devinfo->gen) {
112014       if (devinfo->is_haswell) {
112022       if (devinfo->is_g4x) {
112043 BLEND_STATE_ENTRY_WriteDisableGreen_start(const struct gen_device_info *devinfo)
112045    switch (devinfo->gen) {
112051       if (devinfo->is_haswell) {
112059       if (devinfo->is_g4x) {
112083 BLEND_STATE_ENTRY_WriteDisableRed_bits(const struct gen_device_info *devinfo)
112085    switch (devinfo->gen) {
112091       if (devinfo->is_haswell) {
112099       if (devinfo->is_g4x) {
112120 BLEND_STATE_ENTRY_WriteDisableRed_start(const struct gen_device_info *devinfo)
112122    switch (devinfo->gen) {
112128       if (devinfo->is_haswell) {
112136       if (devinfo->is_g4x) {
112156 BLEND_STATE_ENTRY_XDitherOffset_bits(const struct gen_device_info *devinfo)
112158    switch (devinfo->gen) {
112164       if (devinfo->is_haswell) {
112172       if (devinfo->is_g4x) {
112189 BLEND_STATE_ENTRY_XDitherOffset_start(const struct gen_device_info *devinfo)
112191    switch (devinfo->gen) {
112197       if (devinfo->is_haswell) {
112205       if (devinfo->is_g4x) {
112225 BLEND_STATE_ENTRY_YDitherOffset_bits(const struct gen_device_info *devinfo)
112227    switch (devinfo->gen) {
112233       if (devinfo->is_haswell) {
112241       if (devinfo->is_g4x) {
112258 BLEND_STATE_ENTRY_YDitherOffset_start(const struct gen_device_info *devinfo)
112260    switch (devinfo->gen) {
112266       if (devinfo->is_haswell) {
112274       if (devinfo->is_g4x) {
112294 CACHE_MODE_0_length(const struct gen_device_info *devinfo)
112296    switch (devinfo->gen) {
112302       if (devinfo->is_haswell) {
112310       if (devinfo->is_g4x) {
112330 CACHE_MODE_0_Disableclockgatinginthepixelbackend_bits(const struct gen_device_info *devinfo)
112332    switch (devinfo->gen) {
112338       if (devinfo->is_haswell) {
112346       if (devinfo->is_g4x) {
112363 CACHE_MODE_0_Disableclockgatinginthepixelbackend_start(const struct gen_device_info *devinfo)
112365    switch (devinfo->gen) {
112371       if (devinfo->is_haswell) {
112379       if (devinfo->is_g4x) {
112399 CACHE_MODE_0_DisableclockgatinginthepixelbackendMask_bits(const struct gen_device_info *devinfo)
112401    switch (devinfo->gen) {
112407       if (devinfo->is_haswell) {
112415       if (devinfo->is_g4x) {
112432 CACHE_MODE_0_DisableclockgatinginthepixelbackendMask_start(const struct gen_device_info *devinfo)
112434    switch (devinfo->gen) {
112440       if (devinfo->is_haswell) {
112448       if (devinfo->is_g4x) {
112468 CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisable_bits(const struct gen_device_info *devinfo)
112470    switch (devinfo->gen) {
112476       if (devinfo->is_haswell) {
112484       if (devinfo->is_g4x) {
112501 CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisable_start(const struct gen_device_info *devinfo)
112503    switch (devinfo->gen) {
112509       if (devinfo->is_haswell) {
112517       if (devinfo->is_g4x) {
112537 CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisableMask_bits(const struct gen_device_info *devinfo)
112539    switch (devinfo->gen) {
112545       if (devinfo->is_haswell) {
112553       if (devinfo->is_g4x) {
112570 CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisableMask_start(const struct gen_device_info *devinfo)
112572    switch (devinfo->gen) {
112578       if (devinfo->is_haswell) {
112586       if (devinfo->is_g4x) {
112606 CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLC_bits(const struct gen_device_info *devinfo)
112608    switch (devinfo->gen) {
112614       if (devinfo->is_haswell) {
112622       if (devinfo->is_g4x) {
112639 CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLC_start(const struct gen_device_info *devinfo)
112641    switch (devinfo->gen) {
112647       if (devinfo->is_haswell) {
112655       if (devinfo->is_g4x) {
112675 CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLCMask_bits(const struct gen_device_info *devinfo)
112677    switch (devinfo->gen) {
112683       if (devinfo->is_haswell) {
112691       if (devinfo->is_g4x) {
112708 CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLCMask_start(const struct gen_device_info *devinfo)
112710    switch (devinfo->gen) {
112716       if (devinfo->is_haswell) {
112724       if (devinfo->is_g4x) {
112744 CACHE_MODE_0_Nulltilefixdisable_bits(const struct gen_device_info *devinfo)
112746    switch (devinfo->gen) {
112752       if (devinfo->is_haswell) {
112760       if (devinfo->is_g4x) {
112777 CACHE_MODE_0_Nulltilefixdisable_start(const struct gen_device_info *devinfo)
112779    switch (devinfo->gen) {
112785       if (devinfo->is_haswell) {
112793       if (devinfo->is_g4x) {
112813 CACHE_MODE_0_NulltilefixdisableMask_bits(const struct gen_device_info *devinfo)
112815    switch (devinfo->gen) {
112821       if (devinfo->is_haswell) {
112829       if (devinfo->is_g4x) {
112846 CACHE_MODE_0_NulltilefixdisableMask_start(const struct gen_device_info *devinfo)
112848    switch (devinfo->gen) {
112854       if (devinfo->is_haswell) {
112862       if (devinfo->is_g4x) {
112882 CACHE_MODE_0_RCCEvictionPolicy_bits(const struct gen_device_info *devinfo)
112884    switch (devinfo->gen) {
112890       if (devinfo->is_haswell) {
112898       if (devinfo->is_g4x) {
112915 CACHE_MODE_0_RCCEvictionPolicy_start(const struct gen_device_info *devinfo)
112917    switch (devinfo->gen) {
112923       if (devinfo->is_haswell) {
112931       if (devinfo->is_g4x) {
112951 CACHE_MODE_0_RCCEvictionPolicyMask_bits(const struct gen_device_info *devinfo)
112953    switch (devinfo->gen) {
112959       if (devinfo->is_haswell) {
112967       if (devinfo->is_g4x) {
112984 CACHE_MODE_0_RCCEvictionPolicyMask_start(const struct gen_device_info *devinfo)
112986    switch (devinfo->gen) {
112992       if (devinfo->is_haswell) {
113000       if (devinfo->is_g4x) {
113020 CACHE_MODE_0_STCPMAOptimizationEnable_bits(const struct gen_device_info *devinfo)
113022    switch (devinfo->gen) {
113028       if (devinfo->is_haswell) {
113036       if (devinfo->is_g4x) {
113053 CACHE_MODE_0_STCPMAOptimizationEnable_start(const struct gen_device_info *devinfo)
113055    switch (devinfo->gen) {
113061       if (devinfo->is_haswell) {
113069       if (devinfo->is_g4x) {
113089 CACHE_MODE_0_STCPMAOptimizationEnableMask_bits(const struct gen_device_info *devinfo)
113091    switch (devinfo->gen) {
113097       if (devinfo->is_haswell) {
113105       if (devinfo->is_g4x) {
113122 CACHE_MODE_0_STCPMAOptimizationEnableMask_start(const struct gen_device_info *devinfo)
113124    switch (devinfo->gen) {
113130       if (devinfo->is_haswell) {
113138       if (devinfo->is_g4x) {
113158 CACHE_MODE_0_SamplerL2Disable_bits(const struct gen_device_info *devinfo)
113160    switch (devinfo->gen) {
113166       if (devinfo->is_haswell) {
113174       if (devinfo->is_g4x) {
113191 CACHE_MODE_0_SamplerL2Disable_start(const struct gen_device_info *devinfo)
113193    switch (devinfo->gen) {
113199       if (devinfo->is_haswell) {
113207       if (devinfo->is_g4x) {
113227 CACHE_MODE_0_SamplerL2DisableMask_bits(const struct gen_device_info *devinfo)
113229    switch (devinfo->gen) {
113235       if (devinfo->is_haswell) {
113243       if (devinfo->is_g4x) {
113260 CACHE_MODE_0_SamplerL2DisableMask_start(const struct gen_device_info *devinfo)
113262    switch (devinfo->gen) {
113268       if (devinfo->is_haswell) {
113276       if (devinfo->is_g4x) {
113296 CACHE_MODE_0_SamplerL2RequestArbitration_bits(const struct gen_device_info *devinfo)
113298    switch (devinfo->gen) {
113304       if (devinfo->is_haswell) {
113312       if (devinfo->is_g4x) {
113329 CACHE_MODE_0_SamplerL2RequestArbitration_start(const struct gen_device_info *devinfo)
113331    switch (devinfo->gen) {
113337       if (devinfo->is_haswell) {
113345       if (devinfo->is_g4x) {
113365 CACHE_MODE_0_SamplerL2RequestArbitrationMask_bits(const struct gen_device_info *devinfo)
113367    switch (devinfo->gen) {
113373       if (devinfo->is_haswell) {
113381       if (devinfo->is_g4x) {
113398 CACHE_MODE_0_SamplerL2RequestArbitrationMask_start(const struct gen_device_info *devinfo)
113400    switch (devinfo->gen) {
113406       if (devinfo->is_haswell) {
113414       if (devinfo->is_g4x) {
113434 CACHE_MODE_0_SamplerL2TLBPrefetchEnable_bits(const struct gen_device_info *devinfo)
113436    switch (devinfo->gen) {
113442       if (devinfo->is_haswell) {
113450       if (devinfo->is_g4x) {
113467 CACHE_MODE_0_SamplerL2TLBPrefetchEnable_start(const struct gen_device_info *devinfo)
113469    switch (devinfo->gen) {
113475       if (devinfo->is_haswell) {
113483       if (devinfo->is_g4x) {
113503 CACHE_MODE_0_SamplerL2TLBPrefetchEnableMask_bits(const struct gen_device_info *devinfo)
113505    switch (devinfo->gen) {
113511       if (devinfo->is_haswell) {
113519       if (devinfo->is_g4x) {
113536 CACHE_MODE_0_SamplerL2TLBPrefetchEnableMask_start(const struct gen_device_info *devinfo)
113538    switch (devinfo->gen) {
113544       if (devinfo->is_haswell) {
113552       if (devinfo->is_g4x) {
113572 CACHE_MODE_0_SamplerSetRemappingfor3DDisable_bits(const struct gen_device_info *devinfo)
113574    switch (devinfo->gen) {
113580       if (devinfo->is_haswell) {
113588       if (devinfo->is_g4x) {
113605 CACHE_MODE_0_SamplerSetRemappingfor3DDisable_start(const struct gen_device_info *devinfo)
113607    switch (devinfo->gen) {
113613       if (devinfo->is_haswell) {
113621       if (devinfo->is_g4x) {
113641 CACHE_MODE_0_SamplerSetRemappingfor3DDisableMask_bits(const struct gen_device_info *devinfo)
113643    switch (devinfo->gen) {
113649       if (devinfo->is_haswell) {
113657       if (devinfo->is_g4x) {
113674 CACHE_MODE_0_SamplerSetRemappingfor3DDisableMask_start(const struct gen_device_info *devinfo)
113676    switch (devinfo->gen) {
113682       if (devinfo->is_haswell) {
113690       if (devinfo->is_g4x) {
113711 CACHE_MODE_1_length(const struct gen_device_info *devinfo)
113713    switch (devinfo->gen) {
113719       if (devinfo->is_haswell) {
113727       if (devinfo->is_g4x) {
113746 CACHE_MODE_1_4X4RCPFESTCOptimizationDisable_bits(const struct gen_device_info *devinfo)
113748    switch (devinfo->gen) {
113754       if (devinfo->is_haswell) {
113762       if (devinfo->is_g4x) {
113778 CACHE_MODE_1_4X4RCPFESTCOptimizationDisable_start(const struct gen_device_info *devinfo)
113780    switch (devinfo->gen) {
113786       if (devinfo->is_haswell) {
113794       if (devinfo->is_g4x) {
113813 CACHE_MODE_1_4X4RCPFESTCOptimizationDisableMask_bits(const struct gen_device_info *devinfo)
113815    switch (devinfo->gen) {
113821       if (devinfo->is_haswell) {
113829       if (devinfo->is_g4x) {
113845 CACHE_MODE_1_4X4RCPFESTCOptimizationDisableMask_start(const struct gen_device_info *devinfo)
113847    switch (devinfo->gen) {
113853       if (devinfo->is_haswell) {
113861       if (devinfo->is_g4x) {
113881 CACHE_MODE_1_BlendOptimizationFixDisable_bits(const struct gen_device_info *devinfo)
113883    switch (devinfo->gen) {
113889       if (devinfo->is_haswell) {
113897       if (devinfo->is_g4x) {
113914 CACHE_MODE_1_BlendOptimizationFixDisable_start(const struct gen_device_info *devinfo)
113916    switch (devinfo->gen) {
113922       if (devinfo->is_haswell) {
113930       if (devinfo->is_g4x) {
113950 CACHE_MODE_1_BlendOptimizationFixDisableMask_bits(const struct gen_device_info *devinfo)
113952    switch (devinfo->gen) {
113958       if (devinfo->is_haswell) {
113966       if (devinfo->is_g4x) {
113983 CACHE_MODE_1_BlendOptimizationFixDisableMask_start(const struct gen_device_info *devinfo)
113985    switch (devinfo->gen) {
113991       if (devinfo->is_haswell) {
113999       if (devinfo->is_g4x) {
114019 CACHE_MODE_1_ColorCompressionDisable_bits(const struct gen_device_info *devinfo)
114021    switch (devinfo->gen) {
114027       if (devinfo->is_haswell) {
114035       if (devinfo->is_g4x) {
114052 CACHE_MODE_1_ColorCompressionDisable_start(const struct gen_device_info *devinfo)
114054    switch (devinfo->gen) {
114060       if (devinfo->is_haswell) {
114068       if (devinfo->is_g4x) {
114088 CACHE_MODE_1_ColorCompressionDisableMask_bits(const struct gen_device_info *devinfo)
114090    switch (devinfo->gen) {
114096       if (devinfo->is_haswell) {
114104       if (devinfo->is_g4x) {
114121 CACHE_MODE_1_ColorCompressionDisableMask_start(const struct gen_device_info *devinfo)
114123    switch (devinfo->gen) {
114129       if (devinfo->is_haswell) {
114137       if (devinfo->is_g4x) {
114156 CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisable_bits(const struct gen_device_info *devinfo)
114158    switch (devinfo->gen) {
114164       if (devinfo->is_haswell) {
114172       if (devinfo->is_g4x) {
114188 CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisable_start(const struct gen_device_info *devinfo)
114190    switch (devinfo->gen) {
114196       if (devinfo->is_haswell) {
114204       if (devinfo->is_g4x) {
114223 CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisableMask_bits(const struct gen_device_info *devinfo)
114225    switch (devinfo->gen) {
114231       if (devinfo->is_haswell) {
114239       if (devinfo->is_g4x) {
114255 CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisableMask_start(const struct gen_device_info *devinfo)
114257    switch (devinfo->gen) {
114263       if (devinfo->is_haswell) {
114271       if (devinfo->is_g4x) {
114289 CACHE_MODE_1_FloatBlendOptimizationEnable_bits(const struct gen_device_info *devinfo)
114291    switch (devinfo->gen) {
114297       if (devinfo->is_haswell) {
114305       if (devinfo->is_g4x) {
114320 CACHE_MODE_1_FloatBlendOptimizationEnable_start(const struct gen_device_info *devinfo)
114322    switch (devinfo->gen) {
114328       if (devinfo->is_haswell) {
114336       if (devinfo->is_g4x) {
114354 CACHE_MODE_1_FloatBlendOptimizationEnableMask_bits(const struct gen_device_info *devinfo)
114356    switch (devinfo->gen) {
114362       if (devinfo->is_haswell) {
114370       if (devinfo->is_g4x) {
114385 CACHE_MODE_1_FloatBlendOptimizationEnableMask_start(const struct gen_device_info *devinfo)
114387    switch (devinfo->gen) {
114393       if (devinfo->is_haswell) {
114401       if (devinfo->is_g4x) {
114420 CACHE_MODE_1_HIZEvictionPolicy_bits(const struct gen_device_info *devinfo)
114422    switch (devinfo->gen) {
114428       if (devinfo->is_haswell) {
114436       if (devinfo->is_g4x) {
114452 CACHE_MODE_1_HIZEvictionPolicy_start(const struct gen_device_info *devinfo)
114454    switch (devinfo->gen) {
114460       if (devinfo->is_haswell) {
114468       if (devinfo->is_g4x) {
114487 CACHE_MODE_1_HIZEvictionPolicyMask_bits(const struct gen_device_info *devinfo)
114489    switch (devinfo->gen) {
114495       if (devinfo->is_haswell) {
114503       if (devinfo->is_g4x) {
114519 CACHE_MODE_1_HIZEvictionPolicyMask_start(const struct gen_device_info *devinfo)
114521    switch (devinfo->gen) {
114527       if (devinfo->is_haswell) {
114535       if (devinfo->is_g4x) {
114556 CACHE_MODE_1_MCSCacheDisable_bits(const struct gen_device_info *devinfo)
114558    switch (devinfo->gen) {
114564       if (devinfo->is_haswell) {
114572       if (devinfo->is_g4x) {
114590 CACHE_MODE_1_MCSCacheDisable_start(const struct gen_device_info *devinfo)
114592    switch (devinfo->gen) {
114598       if (devinfo->is_haswell) {
114606       if (devinfo->is_g4x) {
114627 CACHE_MODE_1_MCSCacheDisableMask_bits(const struct gen_device_info *devinfo)
114629    switch (devinfo->gen) {
114635       if (devinfo->is_haswell) {
114643       if (devinfo->is_g4x) {
114661 CACHE_MODE_1_MCSCacheDisableMask_start(const struct gen_device_info *devinfo)
114663    switch (devinfo->gen) {
114669       if (devinfo->is_haswell) {
114677       if (devinfo->is_g4x) {
114697 CACHE_MODE_1_MSCRAWHazardAvoidanceBit_bits(const struct gen_device_info *devinfo)
114699    switch (devinfo->gen) {
114705       if (devinfo->is_haswell) {
114713       if (devinfo->is_g4x) {
114730 CACHE_MODE_1_MSCRAWHazardAvoidanceBit_start(const struct gen_device_info *devinfo)
114732    switch (devinfo->gen) {
114738       if (devinfo->is_haswell) {
114746       if (devinfo->is_g4x) {
114766 CACHE_MODE_1_MSCRAWHazardAvoidanceBitMask_bits(const struct gen_device_info *devinfo)
114768    switch (devinfo->gen) {
114774       if (devinfo->is_haswell) {
114782       if (devinfo->is_g4x) {
114799 CACHE_MODE_1_MSCRAWHazardAvoidanceBitMask_start(const struct gen_device_info *devinfo)
114801    switch (devinfo->gen) {
114807       if (devinfo->is_haswell) {
114815       if (devinfo->is_g4x) {
114833 CACHE_MODE_1_MSCResolveOptimizationDisable_bits(const struct gen_device_info *devinfo)
114835    switch (devinfo->gen) {
114841       if (devinfo->is_haswell) {
114849       if (devinfo->is_g4x) {
114864 CACHE_MODE_1_MSCResolveOptimizationDisable_start(const struct gen_device_info *devinfo)
114866    switch (devinfo->gen) {
114872       if (devinfo->is_haswell) {
114880       if (devinfo->is_g4x) {
114898 CACHE_MODE_1_MSCResolveOptimizationDisableMask_bits(const struct gen_device_info *devinfo)
114900    switch (devinfo->gen) {
114906       if (devinfo->is_haswell) {
114914       if (devinfo->is_g4x) {
114929 CACHE_MODE_1_MSCResolveOptimizationDisableMask_start(const struct gen_device_info *devinfo)
114931    switch (devinfo->gen) {
114937       if (devinfo->is_haswell) {
114945       if (devinfo->is_g4x) {
114966 CACHE_MODE_1_NPEarlyZFailsDisable_bits(const struct gen_device_info *devinfo)
114968    switch (devinfo->gen) {
114974       if (devinfo->is_haswell) {
114982       if (devinfo->is_g4x) {
115000 CACHE_MODE_1_NPEarlyZFailsDisable_start(const struct gen_device_info *devinfo)
115002    switch (devinfo->gen) {
115008       if (devinfo->is_haswell) {
115016       if (devinfo->is_g4x) {
115037 CACHE_MODE_1_NPEarlyZFailsDisableMask_bits(const struct gen_device_info *devinfo)
115039    switch (devinfo->gen) {
115045       if (devinfo->is_haswell) {
115053       if (devinfo->is_g4x) {
115071 CACHE_MODE_1_NPEarlyZFailsDisableMask_start(const struct gen_device_info *devinfo)
115073    switch (devinfo->gen) {
115079       if (devinfo->is_haswell) {
115087       if (devinfo->is_g4x) {
115106 CACHE_MODE_1_NPPMAFixEnable_bits(const struct gen_device_info *devinfo)
115108    switch (devinfo->gen) {
115114       if (devinfo->is_haswell) {
115122       if (devinfo->is_g4x) {
115138 CACHE_MODE_1_NPPMAFixEnable_start(const struct gen_device_info *devinfo)
115140    switch (devinfo->gen) {
115146       if (devinfo->is_haswell) {
115154       if (devinfo->is_g4x) {
115173 CACHE_MODE_1_NPPMAFixEnableMask_bits(const struct gen_device_info *devinfo)
115175    switch (devinfo->gen) {
115181       if (devinfo->is_haswell) {
115189       if (devinfo->is_g4x) {
115205 CACHE_MODE_1_NPPMAFixEnableMask_start(const struct gen_device_info *devinfo)
115207    switch (devinfo->gen) {
115213       if (devinfo->is_haswell) {
115221       if (devinfo->is_g4x) {
115241 CACHE_MODE_1_PartialResolveDisableInVC_bits(const struct gen_device_info *devinfo)
115243    switch (devinfo->gen) {
115249       if (devinfo->is_haswell) {
115257       if (devinfo->is_g4x) {
115274 CACHE_MODE_1_PartialResolveDisableInVC_start(const struct gen_device_info *devinfo)
115276    switch (devinfo->gen) {
115282       if (devinfo->is_haswell) {
115290       if (devinfo->is_g4x) {
115310 CACHE_MODE_1_PartialResolveDisableInVCMask_bits(const struct gen_device_info *devinfo)
115312    switch (devinfo->gen) {
115318       if (devinfo->is_haswell) {
115326       if (devinfo->is_g4x) {
115343 CACHE_MODE_1_PartialResolveDisableInVCMask_start(const struct gen_device_info *devinfo)
115345    switch (devinfo->gen) {
115351       if (devinfo->is_haswell) {
115359       if (devinfo->is_g4x) {
115378 CACHE_MODE_1_RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisable_bits(const struct gen_device_info *devinfo)
115380    switch (devinfo->gen) {
115386       if (devinfo->is_haswell) {
115394       if (devinfo->is_g4x) {
115410 CACHE_MODE_1_RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisable_start(const struct gen_device_info *devinfo)
115412    switch (devinfo->gen) {
115418       if (devinfo->is_haswell) {
115426       if (devinfo->is_g4x) {
115445 CACHE_MODE_1_RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisableMask_bits(const struct gen_device_info *devinfo)
115447    switch (devinfo->gen) {
115453       if (devinfo->is_haswell) {
115461       if (devinfo->is_g4x) {
115477 CACHE_MODE_1_RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisableMask_start(const struct gen_device_info *devinfo)
115479    switch (devinfo->gen) {
115485       if (devinfo->is_haswell) {
115493       if (devinfo->is_g4x) {
115512 CACHE_MODE_1_RCZReadafterexpansioncontrolfix2_bits(const struct gen_device_info *devinfo)
115514    switch (devinfo->gen) {
115520       if (devinfo->is_haswell) {
115528       if (devinfo->is_g4x) {
115544 CACHE_MODE_1_RCZReadafterexpansioncontrolfix2_start(const struct gen_device_info *devinfo)
115546    switch (devinfo->gen) {
115552       if (devinfo->is_haswell) {
115560       if (devinfo->is_g4x) {
115579 CACHE_MODE_1_RCZReadafterexpansioncontrolfix2Mask_bits(const struct gen_device_info *devinfo)
115581    switch (devinfo->gen) {
115587       if (devinfo->is_haswell) {
115595       if (devinfo->is_g4x) {
115611 CACHE_MODE_1_RCZReadafterexpansioncontrolfix2Mask_start(const struct gen_device_info *devinfo)
115613    switch (devinfo->gen) {
115619       if (devinfo->is_haswell) {
115627       if (devinfo->is_g4x) {
115646 CACHE_MODE_1_SamplerCacheSetXORselection_bits(const struct gen_device_info *devinfo)
115648    switch (devinfo->gen) {
115654       if (devinfo->is_haswell) {
115662       if (devinfo->is_g4x) {
115678 CACHE_MODE_1_SamplerCacheSetXORselection_start(const struct gen_device_info *devinfo)
115680    switch (devinfo->gen) {
115686       if (devinfo->is_haswell) {
115694       if (devinfo->is_g4x) {
115713 CACHE_MODE_1_SamplerCacheSetXORselectionMask_bits(const struct gen_device_info *devinfo)
115715    switch (devinfo->gen) {
115721       if (devinfo->is_haswell) {
115729       if (devinfo->is_g4x) {
115745 CACHE_MODE_1_SamplerCacheSetXORselectionMask_start(const struct gen_device_info *devinfo)
115747    switch (devinfo->gen) {
115753       if (devinfo->is_haswell) {
115761       if (devinfo->is_g4x) {
115780 CACHE_MODE_SS_length(const struct gen_device_info *devinfo)
115782    switch (devinfo->gen) {
115788       if (devinfo->is_haswell) {
115796       if (devinfo->is_g4x) {
115815 CACHE_MODE_SS_FloatBlendOptimizationEnable_bits(const struct gen_device_info *devinfo)
115817    switch (devinfo->gen) {
115823       if (devinfo->is_haswell) {
115831       if (devinfo->is_g4x) {
115847 CACHE_MODE_SS_FloatBlendOptimizationEnable_start(const struct gen_device_info *devinfo)
115849    switch (devinfo->gen) {
115855       if (devinfo->is_haswell) {
115863       if (devinfo->is_g4x) {
115882 CACHE_MODE_SS_FloatBlendOptimizationEnableMask_bits(const struct gen_device_info *devinfo)
115884    switch (devinfo->gen) {
115890       if (devinfo->is_haswell) {
115898       if (devinfo->is_g4x) {
115914 CACHE_MODE_SS_FloatBlendOptimizationEnableMask_start(const struct gen_device_info *devinfo)
115916    switch (devinfo->gen) {
115922       if (devinfo->is_haswell) {
115930       if (devinfo->is_g4x) {
115949 CACHE_MODE_SS_InstructionLevel1CacheDisable_bits(const struct gen_device_info *devinfo)
115951    switch (devinfo->gen) {
115957       if (devinfo->is_haswell) {
115965       if (devinfo->is_g4x) {
115981 CACHE_MODE_SS_InstructionLevel1CacheDisable_start(const struct gen_device_info *devinfo)
115983    switch (devinfo->gen) {
115989       if (devinfo->is_haswell) {
115997       if (devinfo->is_g4x) {
116016 CACHE_MODE_SS_InstructionLevel1CacheDisableMask_bits(const struct gen_device_info *devinfo)
116018    switch (devinfo->gen) {
116024       if (devinfo->is_haswell) {
116032       if (devinfo->is_g4x) {
116048 CACHE_MODE_SS_InstructionLevel1CacheDisableMask_start(const struct gen_device_info *devinfo)
116050    switch (devinfo->gen) {
116056       if (devinfo->is_haswell) {
116064       if (devinfo->is_g4x) {
116083 CACHE_MODE_SS_InstructionLevel1CacheandInFlightQueueDisable_bits(const struct gen_device_info *devinfo)
116085    switch (devinfo->gen) {
116091       if (devinfo->is_haswell) {
116099       if (devinfo->is_g4x) {
116115 CACHE_MODE_SS_InstructionLevel1CacheandInFlightQueueDisable_start(const struct gen_device_info *devinfo)
116117    switch (devinfo->gen) {
116123       if (devinfo->is_haswell) {
116131       if (devinfo->is_g4x) {
116150 CACHE_MODE_SS_InstructionLevel1CacheandInFlightQueueDisableMask_bits(const struct gen_device_info *devinfo)
116152    switch (devinfo->gen) {
116158       if (devinfo->is_haswell) {
116166       if (devinfo->is_g4x) {
116182 CACHE_MODE_SS_InstructionLevel1CacheandInFlightQueueDisableMask_start(const struct gen_device_info *devinfo)
116184    switch (devinfo->gen) {
116190       if (devinfo->is_haswell) {
116198       if (devinfo->is_g4x) {
116217 CACHE_MODE_SS_PerSampleBlendOptDisable_bits(const struct gen_device_info *devinfo)
116219    switch (devinfo->gen) {
116225       if (devinfo->is_haswell) {
116233       if (devinfo->is_g4x) {
116249 CACHE_MODE_SS_PerSampleBlendOptDisable_start(const struct gen_device_info *devinfo)
116251    switch (devinfo->gen) {
116257       if (devinfo->is_haswell) {
116265       if (devinfo->is_g4x) {
116284 CACHE_MODE_SS_PerSampleBlendOptDisableMask_bits(const struct gen_device_info *devinfo)
116286    switch (devinfo->gen) {
116292       if (devinfo->is_haswell) {
116300       if (devinfo->is_g4x) {
116316 CACHE_MODE_SS_PerSampleBlendOptDisableMask_start(const struct gen_device_info *devinfo)
116318    switch (devinfo->gen) {
116324       if (devinfo->is_haswell) {
116332       if (devinfo->is_g4x) {
116359 CC_VIEWPORT_length(const struct gen_device_info *devinfo)
116361    switch (devinfo->gen) {
116367       if (devinfo->is_haswell) {
116375       if (devinfo->is_g4x) {
116402 CC_VIEWPORT_MaximumDepth_bits(const struct gen_device_info *devinfo)
116404    switch (devinfo->gen) {
116410       if (devinfo->is_haswell) {
116418       if (devinfo->is_g4x) {
116442 CC_VIEWPORT_MaximumDepth_start(const struct gen_device_info *devinfo)
116444    switch (devinfo->gen) {
116450       if (devinfo->is_haswell) {
116458       if (devinfo->is_g4x) {
116485 CC_VIEWPORT_MinimumDepth_bits(const struct gen_device_info *devinfo)
116487    switch (devinfo->gen) {
116493       if (devinfo->is_haswell) {
116501       if (devinfo->is_g4x) {
116525 CC_VIEWPORT_MinimumDepth_start(const struct gen_device_info *devinfo)
116527    switch (devinfo->gen) {
116533       if (devinfo->is_haswell) {
116541       if (devinfo->is_g4x) {
116559 CHICKEN3_length(const struct gen_device_info *devinfo)
116561    switch (devinfo->gen) {
116567       if (devinfo->is_haswell) {
116575       if (devinfo->is_g4x) {
116593 CHICKEN3_L3AtomicDisable_bits(const struct gen_device_info *devinfo)
116595    switch (devinfo->gen) {
116601       if (devinfo->is_haswell) {
116609       if (devinfo->is_g4x) {
116624 CHICKEN3_L3AtomicDisable_start(const struct gen_device_info *devinfo)
116626    switch (devinfo->gen) {
116632       if (devinfo->is_haswell) {
116640       if (devinfo->is_g4x) {
116658 CHICKEN3_L3AtomicDisableMask_bits(const struct gen_device_info *devinfo)
116660    switch (devinfo->gen) {
116666       if (devinfo->is_haswell) {
116674       if (devinfo->is_g4x) {
116689 CHICKEN3_L3AtomicDisableMask_start(const struct gen_device_info *devinfo)
116691    switch (devinfo->gen) {
116697       if (devinfo->is_haswell) {
116705       if (devinfo->is_g4x) {
116724 CHROMA_FILTER_COEFFICIENTS_ARRAY_length(const struct gen_device_info *devinfo)
116726    switch (devinfo->gen) {
116732       if (devinfo->is_haswell) {
116740       if (devinfo->is_g4x) {
116759 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1XFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
116761    switch (devinfo->gen) {
116767       if (devinfo->is_haswell) {
116775       if (devinfo->is_g4x) {
116791 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1XFilterCoefficientn2_start(const struct gen_device_info *devinfo)
116793    switch (devinfo->gen) {
116799       if (devinfo->is_haswell) {
116807       if (devinfo->is_g4x) {
116826 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1XFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
116828    switch (devinfo->gen) {
116834       if (devinfo->is_haswell) {
116842       if (devinfo->is_g4x) {
116858 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1XFilterCoefficientn3_start(const struct gen_device_info *devinfo)
116860    switch (devinfo->gen) {
116866       if (devinfo->is_haswell) {
116874       if (devinfo->is_g4x) {
116893 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1XFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
116895    switch (devinfo->gen) {
116901       if (devinfo->is_haswell) {
116909       if (devinfo->is_g4x) {
116925 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1XFilterCoefficientn4_start(const struct gen_device_info *devinfo)
116927    switch (devinfo->gen) {
116933       if (devinfo->is_haswell) {
116941       if (devinfo->is_g4x) {
116960 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1XFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
116962    switch (devinfo->gen) {
116968       if (devinfo->is_haswell) {
116976       if (devinfo->is_g4x) {
116992 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1XFilterCoefficientn5_start(const struct gen_device_info *devinfo)
116994    switch (devinfo->gen) {
117000       if (devinfo->is_haswell) {
117008       if (devinfo->is_g4x) {
117027 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1YFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
117029    switch (devinfo->gen) {
117035       if (devinfo->is_haswell) {
117043       if (devinfo->is_g4x) {
117059 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1YFilterCoefficientn2_start(const struct gen_device_info *devinfo)
117061    switch (devinfo->gen) {
117067       if (devinfo->is_haswell) {
117075       if (devinfo->is_g4x) {
117094 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1YFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
117096    switch (devinfo->gen) {
117102       if (devinfo->is_haswell) {
117110       if (devinfo->is_g4x) {
117126 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1YFilterCoefficientn3_start(const struct gen_device_info *devinfo)
117128    switch (devinfo->gen) {
117134       if (devinfo->is_haswell) {
117142       if (devinfo->is_g4x) {
117161 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1YFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
117163    switch (devinfo->gen) {
117169       if (devinfo->is_haswell) {
117177       if (devinfo->is_g4x) {
117193 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1YFilterCoefficientn4_start(const struct gen_device_info *devinfo)
117195    switch (devinfo->gen) {
117201       if (devinfo->is_haswell) {
117209       if (devinfo->is_g4x) {
117228 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1YFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
117230    switch (devinfo->gen) {
117236       if (devinfo->is_haswell) {
117244       if (devinfo->is_g4x) {
117260 CHROMA_FILTER_COEFFICIENTS_ARRAY_Table1YFilterCoefficientn5_start(const struct gen_device_info *devinfo)
117262    switch (devinfo->gen) {
117268       if (devinfo->is_haswell) {
117276       if (devinfo->is_g4x) {
117295 CLEAR_COLOR_length(const struct gen_device_info *devinfo)
117297    switch (devinfo->gen) {
117303       if (devinfo->is_haswell) {
117311       if (devinfo->is_g4x) {
117329 CLEAR_COLOR_ConvertedClearValueHiLow_bits(const struct gen_device_info *devinfo)
117331    switch (devinfo->gen) {
117337       if (devinfo->is_haswell) {
117345       if (devinfo->is_g4x) {
117360 CLEAR_COLOR_ConvertedClearValueHiLow_start(const struct gen_device_info *devinfo)
117362    switch (devinfo->gen) {
117368       if (devinfo->is_haswell) {
117376       if (devinfo->is_g4x) {
117395 CLEAR_COLOR_RawClearColorAlpha_bits(const struct gen_device_info *devinfo)
117397    switch (devinfo->gen) {
117403       if (devinfo->is_haswell) {
117411       if (devinfo->is_g4x) {
117427 CLEAR_COLOR_RawClearColorAlpha_start(const struct gen_device_info *devinfo)
117429    switch (devinfo->gen) {
117435       if (devinfo->is_haswell) {
117443       if (devinfo->is_g4x) {
117462 CLEAR_COLOR_RawClearColorBlue_bits(const struct gen_device_info *devinfo)
117464    switch (devinfo->gen) {
117470       if (devinfo->is_haswell) {
117478       if (devinfo->is_g4x) {
117494 CLEAR_COLOR_RawClearColorBlue_start(const struct gen_device_info *devinfo)
117496    switch (devinfo->gen) {
117502       if (devinfo->is_haswell) {
117510       if (devinfo->is_g4x) {
117529 CLEAR_COLOR_RawClearColorGreen_bits(const struct gen_device_info *devinfo)
117531    switch (devinfo->gen) {
117537       if (devinfo->is_haswell) {
117545       if (devinfo->is_g4x) {
117561 CLEAR_COLOR_RawClearColorGreen_start(const struct gen_device_info *devinfo)
117563    switch (devinfo->gen) {
117569       if (devinfo->is_haswell) {
117577       if (devinfo->is_g4x) {
117596 CLEAR_COLOR_RawClearColorRed_bits(const struct gen_device_info *devinfo)
117598    switch (devinfo->gen) {
117604       if (devinfo->is_haswell) {
117612       if (devinfo->is_g4x) {
117628 CLEAR_COLOR_RawClearColorRed_start(const struct gen_device_info *devinfo)
117630    switch (devinfo->gen) {
117636       if (devinfo->is_haswell) {
117644       if (devinfo->is_g4x) {
117664 CLIP_STATE_length(const struct gen_device_info *devinfo)
117666    switch (devinfo->gen) {
117672       if (devinfo->is_haswell) {
117680       if (devinfo->is_g4x) {
117700 CLIP_STATE_APIMode_bits(const struct gen_device_info *devinfo)
117702    switch (devinfo->gen) {
117708       if (devinfo->is_haswell) {
117716       if (devinfo->is_g4x) {
117733 CLIP_STATE_APIMode_start(const struct gen_device_info *devinfo)
117735    switch (devinfo->gen) {
117741       if (devinfo->is_haswell) {
117749       if (devinfo->is_g4x) {
117769 CLIP_STATE_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
117771    switch (devinfo->gen) {
117777       if (devinfo->is_haswell) {
117785       if (devinfo->is_g4x) {
117802 CLIP_STATE_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
117804    switch (devinfo->gen) {
117810       if (devinfo->is_haswell) {
117818       if (devinfo->is_g4x) {
117838 CLIP_STATE_ClipMode_bits(const struct gen_device_info *devinfo)
117840    switch (devinfo->gen) {
117846       if (devinfo->is_haswell) {
117854       if (devinfo->is_g4x) {
117871 CLIP_STATE_ClipMode_start(const struct gen_device_info *devinfo)
117873    switch (devinfo->gen) {
117879       if (devinfo->is_haswell) {
117887       if (devinfo->is_g4x) {
117906 CLIP_STATE_ClipperStatisticsEnable_bits(const struct gen_device_info *devinfo)
117908    switch (devinfo->gen) {
117914       if (devinfo->is_haswell) {
117922       if (devinfo->is_g4x) {
117938 CLIP_STATE_ClipperStatisticsEnable_start(const struct gen_device_info *devinfo)
117940    switch (devinfo->gen) {
117946       if (devinfo->is_haswell) {
117954       if (devinfo->is_g4x) {
117974 CLIP_STATE_ClipperViewportStatePointer_bits(const struct gen_device_info *devinfo)
117976    switch (devinfo->gen) {
117982       if (devinfo->is_haswell) {
117990       if (devinfo->is_g4x) {
118007 CLIP_STATE_ClipperViewportStatePointer_start(const struct gen_device_info *devinfo)
118009    switch (devinfo->gen) {
118015       if (devinfo->is_haswell) {
118023       if (devinfo->is_g4x) {
118043 CLIP_STATE_ConstantURBEntryReadLength_bits(const struct gen_device_info *devinfo)
118045    switch (devinfo->gen) {
118051       if (devinfo->is_haswell) {
118059       if (devinfo->is_g4x) {
118076 CLIP_STATE_ConstantURBEntryReadLength_start(const struct gen_device_info *devinfo)
118078    switch (devinfo->gen) {
118084       if (devinfo->is_haswell) {
118092       if (devinfo->is_g4x) {
118112 CLIP_STATE_ConstantURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
118114    switch (devinfo->gen) {
118120       if (devinfo->is_haswell) {
118128       if (devinfo->is_g4x) {
118145 CLIP_STATE_ConstantURBEntryReadOffset_start(const struct gen_device_info *devinfo)
118147    switch (devinfo->gen) {
118153       if (devinfo->is_haswell) {
118161       if (devinfo->is_g4x) {
118181 CLIP_STATE_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
118183    switch (devinfo->gen) {
118189       if (devinfo->is_haswell) {
118197       if (devinfo->is_g4x) {
118214 CLIP_STATE_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
118216    switch (devinfo->gen) {
118222       if (devinfo->is_haswell) {
118230       if (devinfo->is_g4x) {
118250 CLIP_STATE_FloatingPointMode_bits(const struct gen_device_info *devinfo)
118252    switch (devinfo->gen) {
118258       if (devinfo->is_haswell) {
118266       if (devinfo->is_g4x) {
118283 CLIP_STATE_FloatingPointMode_start(const struct gen_device_info *devinfo)
118285    switch (devinfo->gen) {
118291       if (devinfo->is_haswell) {
118299       if (devinfo->is_g4x) {
118319 CLIP_STATE_GRFRegisterCount_bits(const struct gen_device_info *devinfo)
118321    switch (devinfo->gen) {
118327       if (devinfo->is_haswell) {
118335       if (devinfo->is_g4x) {
118352 CLIP_STATE_GRFRegisterCount_start(const struct gen_device_info *devinfo)
118354    switch (devinfo->gen) {
118360       if (devinfo->is_haswell) {
118368       if (devinfo->is_g4x) {
118387 CLIP_STATE_GSOutputObjectStatisticsEnable_bits(const struct gen_device_info *devinfo)
118389    switch (devinfo->gen) {
118395       if (devinfo->is_haswell) {
118403       if (devinfo->is_g4x) {
118419 CLIP_STATE_GSOutputObjectStatisticsEnable_start(const struct gen_device_info *devinfo)
118421    switch (devinfo->gen) {
118427       if (devinfo->is_haswell) {
118435       if (devinfo->is_g4x) {
118455 CLIP_STATE_GuardbandClipTestEnable_bits(const struct gen_device_info *devinfo)
118457    switch (devinfo->gen) {
118463       if (devinfo->is_haswell) {
118471       if (devinfo->is_g4x) {
118488 CLIP_STATE_GuardbandClipTestEnable_start(const struct gen_device_info *devinfo)
118490    switch (devinfo->gen) {
118496       if (devinfo->is_haswell) {
118504       if (devinfo->is_g4x) {
118524 CLIP_STATE_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
118526    switch (devinfo->gen) {
118532       if (devinfo->is_haswell) {
118540       if (devinfo->is_g4x) {
118557 CLIP_STATE_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
118559    switch (devinfo->gen) {
118565       if (devinfo->is_haswell) {
118573       if (devinfo->is_g4x) {
118593 CLIP_STATE_KernelStartPointer_bits(const struct gen_device_info *devinfo)
118595    switch (devinfo->gen) {
118601       if (devinfo->is_haswell) {
118609       if (devinfo->is_g4x) {
118626 CLIP_STATE_KernelStartPointer_start(const struct gen_device_info *devinfo)
118628    switch (devinfo->gen) {
118634       if (devinfo->is_haswell) {
118642       if (devinfo->is_g4x) {
118662 CLIP_STATE_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
118664    switch (devinfo->gen) {
118670       if (devinfo->is_haswell) {
118678       if (devinfo->is_g4x) {
118695 CLIP_STATE_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
118697    switch (devinfo->gen) {
118703       if (devinfo->is_haswell) {
118711       if (devinfo->is_g4x) {
118731 CLIP_STATE_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
118733    switch (devinfo->gen) {
118739       if (devinfo->is_haswell) {
118747       if (devinfo->is_g4x) {
118764 CLIP_STATE_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
118766    switch (devinfo->gen) {
118772       if (devinfo->is_haswell) {
118780       if (devinfo->is_g4x) {
118799 CLIP_STATE_NegativeWClipTestEnable_bits(const struct gen_device_info *devinfo)
118801    switch (devinfo->gen) {
118807       if (devinfo->is_haswell) {
118815       if (devinfo->is_g4x) {
118831 CLIP_STATE_NegativeWClipTestEnable_start(const struct gen_device_info *devinfo)
118833    switch (devinfo->gen) {
118839       if (devinfo->is_haswell) {
118847       if (devinfo->is_g4x) {
118867 CLIP_STATE_NumberofURBEntries_bits(const struct gen_device_info *devinfo)
118869    switch (devinfo->gen) {
118875       if (devinfo->is_haswell) {
118883       if (devinfo->is_g4x) {
118900 CLIP_STATE_NumberofURBEntries_start(const struct gen_device_info *devinfo)
118902    switch (devinfo->gen) {
118908       if (devinfo->is_haswell) {
118916       if (devinfo->is_g4x) {
118936 CLIP_STATE_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
118938    switch (devinfo->gen) {
118944       if (devinfo->is_haswell) {
118952       if (devinfo->is_g4x) {
118969 CLIP_STATE_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
118971    switch (devinfo->gen) {
118977       if (devinfo->is_haswell) {
118985       if (devinfo->is_g4x) {
119005 CLIP_STATE_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
119007    switch (devinfo->gen) {
119013       if (devinfo->is_haswell) {
119021       if (devinfo->is_g4x) {
119038 CLIP_STATE_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
119040    switch (devinfo->gen) {
119046       if (devinfo->is_haswell) {
119054       if (devinfo->is_g4x) {
119074 CLIP_STATE_ScreenSpaceViewportXMax_bits(const struct gen_device_info *devinfo)
119076    switch (devinfo->gen) {
119082       if (devinfo->is_haswell) {
119090       if (devinfo->is_g4x) {
119107 CLIP_STATE_ScreenSpaceViewportXMax_start(const struct gen_device_info *devinfo)
119109    switch (devinfo->gen) {
119115       if (devinfo->is_haswell) {
119123       if (devinfo->is_g4x) {
119143 CLIP_STATE_ScreenSpaceViewportXMin_bits(const struct gen_device_info *devinfo)
119145    switch (devinfo->gen) {
119151       if (devinfo->is_haswell) {
119159       if (devinfo->is_g4x) {
119176 CLIP_STATE_ScreenSpaceViewportXMin_start(const struct gen_device_info *devinfo)
119178    switch (devinfo->gen) {
119184       if (devinfo->is_haswell) {
119192       if (devinfo->is_g4x) {
119212 CLIP_STATE_ScreenSpaceViewportYMax_bits(const struct gen_device_info *devinfo)
119214    switch (devinfo->gen) {
119220       if (devinfo->is_haswell) {
119228       if (devinfo->is_g4x) {
119245 CLIP_STATE_ScreenSpaceViewportYMax_start(const struct gen_device_info *devinfo)
119247    switch (devinfo->gen) {
119253       if (devinfo->is_haswell) {
119261       if (devinfo->is_g4x) {
119281 CLIP_STATE_ScreenSpaceViewportYMin_bits(const struct gen_device_info *devinfo)
119283    switch (devinfo->gen) {
119289       if (devinfo->is_haswell) {
119297       if (devinfo->is_g4x) {
119314 CLIP_STATE_ScreenSpaceViewportYMin_start(const struct gen_device_info *devinfo)
119316    switch (devinfo->gen) {
119322       if (devinfo->is_haswell) {
119330       if (devinfo->is_g4x) {
119350 CLIP_STATE_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
119352    switch (devinfo->gen) {
119358       if (devinfo->is_haswell) {
119366       if (devinfo->is_g4x) {
119383 CLIP_STATE_SingleProgramFlow_start(const struct gen_device_info *devinfo)
119385    switch (devinfo->gen) {
119391       if (devinfo->is_haswell) {
119399       if (devinfo->is_g4x) {
119419 CLIP_STATE_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
119421    switch (devinfo->gen) {
119427       if (devinfo->is_haswell) {
119435       if (devinfo->is_g4x) {
119452 CLIP_STATE_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
119454    switch (devinfo->gen) {
119460       if (devinfo->is_haswell) {
119468       if (devinfo->is_g4x) {
119488 CLIP_STATE_ThreadPriority_bits(const struct gen_device_info *devinfo)
119490    switch (devinfo->gen) {
119496       if (devinfo->is_haswell) {
119504       if (devinfo->is_g4x) {
119521 CLIP_STATE_ThreadPriority_start(const struct gen_device_info *devinfo)
119523    switch (devinfo->gen) {
119529       if (devinfo->is_haswell) {
119537       if (devinfo->is_g4x) {
119557 CLIP_STATE_URBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
119559    switch (devinfo->gen) {
119565       if (devinfo->is_haswell) {
119573       if (devinfo->is_g4x) {
119590 CLIP_STATE_URBEntryAllocationSize_start(const struct gen_device_info *devinfo)
119592    switch (devinfo->gen) {
119598       if (devinfo->is_haswell) {
119606       if (devinfo->is_g4x) {
119626 CLIP_STATE_UserClipDistanceClipTestEnableBitmask_bits(const struct gen_device_info *devinfo)
119628    switch (devinfo->gen) {
119634       if (devinfo->is_haswell) {
119642       if (devinfo->is_g4x) {
119659 CLIP_STATE_UserClipDistanceClipTestEnableBitmask_start(const struct gen_device_info *devinfo)
119661    switch (devinfo->gen) {
119667       if (devinfo->is_haswell) {
119675       if (devinfo->is_g4x) {
119695 CLIP_STATE_UserClipFlagsMustClipEnable_bits(const struct gen_device_info *devinfo)
119697    switch (devinfo->gen) {
119703       if (devinfo->is_haswell) {
119711       if (devinfo->is_g4x) {
119728 CLIP_STATE_UserClipFlagsMustClipEnable_start(const struct gen_device_info *devinfo)
119730    switch (devinfo->gen) {
119736       if (devinfo->is_haswell) {
119744       if (devinfo->is_g4x) {
119764 CLIP_STATE_VertexPositionSpace_bits(const struct gen_device_info *devinfo)
119766    switch (devinfo->gen) {
119772       if (devinfo->is_haswell) {
119780       if (devinfo->is_g4x) {
119797 CLIP_STATE_VertexPositionSpace_start(const struct gen_device_info *devinfo)
119799    switch (devinfo->gen) {
119805       if (devinfo->is_haswell) {
119813       if (devinfo->is_g4x) {
119833 CLIP_STATE_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
119835    switch (devinfo->gen) {
119841       if (devinfo->is_haswell) {
119849       if (devinfo->is_g4x) {
119866 CLIP_STATE_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
119868    switch (devinfo->gen) {
119874       if (devinfo->is_haswell) {
119882       if (devinfo->is_g4x) {
119902 CLIP_STATE_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
119904    switch (devinfo->gen) {
119910       if (devinfo->is_haswell) {
119918       if (devinfo->is_g4x) {
119935 CLIP_STATE_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
119937    switch (devinfo->gen) {
119943       if (devinfo->is_haswell) {
119951       if (devinfo->is_g4x) {
119971 CLIP_STATE_ViewportXYClipTestEnable_bits(const struct gen_device_info *devinfo)
119973    switch (devinfo->gen) {
119979       if (devinfo->is_haswell) {
119987       if (devinfo->is_g4x) {
120004 CLIP_STATE_ViewportXYClipTestEnable_start(const struct gen_device_info *devinfo)
120006    switch (devinfo->gen) {
120012       if (devinfo->is_haswell) {
120020       if (devinfo->is_g4x) {
120040 CLIP_STATE_ViewportZClipTestEnable_bits(const struct gen_device_info *devinfo)
120042    switch (devinfo->gen) {
120048       if (devinfo->is_haswell) {
120056       if (devinfo->is_g4x) {
120073 CLIP_STATE_ViewportZClipTestEnable_start(const struct gen_device_info *devinfo)
120075    switch (devinfo->gen) {
120081       if (devinfo->is_haswell) {
120089       if (devinfo->is_g4x) {
120110 CLIP_VIEWPORT_length(const struct gen_device_info *devinfo)
120112    switch (devinfo->gen) {
120118       if (devinfo->is_haswell) {
120126       if (devinfo->is_g4x) {
120147 CLIP_VIEWPORT_XMaxClipGuardband_bits(const struct gen_device_info *devinfo)
120149    switch (devinfo->gen) {
120155       if (devinfo->is_haswell) {
120163       if (devinfo->is_g4x) {
120181 CLIP_VIEWPORT_XMaxClipGuardband_start(const struct gen_device_info *devinfo)
120183    switch (devinfo->gen) {
120189       if (devinfo->is_haswell) {
120197       if (devinfo->is_g4x) {
120218 CLIP_VIEWPORT_XMinClipGuardband_bits(const struct gen_device_info *devinfo)
120220    switch (devinfo->gen) {
120226       if (devinfo->is_haswell) {
120234       if (devinfo->is_g4x) {
120252 CLIP_VIEWPORT_XMinClipGuardband_start(const struct gen_device_info *devinfo)
120254    switch (devinfo->gen) {
120260       if (devinfo->is_haswell) {
120268       if (devinfo->is_g4x) {
120289 CLIP_VIEWPORT_YMaxClipGuardband_bits(const struct gen_device_info *devinfo)
120291    switch (devinfo->gen) {
120297       if (devinfo->is_haswell) {
120305       if (devinfo->is_g4x) {
120323 CLIP_VIEWPORT_YMaxClipGuardband_start(const struct gen_device_info *devinfo)
120325    switch (devinfo->gen) {
120331       if (devinfo->is_haswell) {
120339       if (devinfo->is_g4x) {
120360 CLIP_VIEWPORT_YMinClipGuardband_bits(const struct gen_device_info *devinfo)
120362    switch (devinfo->gen) {
120368       if (devinfo->is_haswell) {
120376       if (devinfo->is_g4x) {
120394 CLIP_VIEWPORT_YMinClipGuardband_start(const struct gen_device_info *devinfo)
120396    switch (devinfo->gen) {
120402       if (devinfo->is_haswell) {
120410       if (devinfo->is_g4x) {
120433 CL_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
120435    switch (devinfo->gen) {
120441       if (devinfo->is_haswell) {
120449       if (devinfo->is_g4x) {
120472 CL_INVOCATION_COUNT_CLInvocationCountReport_bits(const struct gen_device_info *devinfo)
120474    switch (devinfo->gen) {
120480       if (devinfo->is_haswell) {
120488       if (devinfo->is_g4x) {
120508 CL_INVOCATION_COUNT_CLInvocationCountReport_start(const struct gen_device_info *devinfo)
120510    switch (devinfo->gen) {
120516       if (devinfo->is_haswell) {
120524       if (devinfo->is_g4x) {
120547 CL_PRIMITIVES_COUNT_length(const struct gen_device_info *devinfo)
120549    switch (devinfo->gen) {
120555       if (devinfo->is_haswell) {
120563       if (devinfo->is_g4x) {
120586 CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_bits(const struct gen_device_info *devinfo)
120588    switch (devinfo->gen) {
120594       if (devinfo->is_haswell) {
120602       if (devinfo->is_g4x) {
120622 CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_start(const struct gen_device_info *devinfo)
120624    switch (devinfo->gen) {
120630       if (devinfo->is_haswell) {
120638       if (devinfo->is_g4x) {
120665 COLOR_CALC_STATE_length(const struct gen_device_info *devinfo)
120667    switch (devinfo->gen) {
120673       if (devinfo->is_haswell) {
120681       if (devinfo->is_g4x) {
120701 COLOR_CALC_STATE_AlphaBlendFunction_bits(const struct gen_device_info *devinfo)
120703    switch (devinfo->gen) {
120709       if (devinfo->is_haswell) {
120717       if (devinfo->is_g4x) {
120734 COLOR_CALC_STATE_AlphaBlendFunction_start(const struct gen_device_info *devinfo)
120736    switch (devinfo->gen) {
120742       if (devinfo->is_haswell) {
120750       if (devinfo->is_g4x) {
120777 COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_bits(const struct gen_device_info *devinfo)
120779    switch (devinfo->gen) {
120785       if (devinfo->is_haswell) {
120793       if (devinfo->is_g4x) {
120817 COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_start(const struct gen_device_info *devinfo)
120819    switch (devinfo->gen) {
120825       if (devinfo->is_haswell) {
120833       if (devinfo->is_g4x) {
120860 COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_bits(const struct gen_device_info *devinfo)
120862    switch (devinfo->gen) {
120868       if (devinfo->is_haswell) {
120876       if (devinfo->is_g4x) {
120900 COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_start(const struct gen_device_info *devinfo)
120902    switch (devinfo->gen) {
120908       if (devinfo->is_haswell) {
120916       if (devinfo->is_g4x) {
120936 COLOR_CALC_STATE_AlphaTestEnable_bits(const struct gen_device_info *devinfo)
120938    switch (devinfo->gen) {
120944       if (devinfo->is_haswell) {
120952       if (devinfo->is_g4x) {
120969 COLOR_CALC_STATE_AlphaTestEnable_start(const struct gen_device_info *devinfo)
120971    switch (devinfo->gen) {
120977       if (devinfo->is_haswell) {
120985       if (devinfo->is_g4x) {
121012 COLOR_CALC_STATE_AlphaTestFormat_bits(const struct gen_device_info *devinfo)
121014    switch (devinfo->gen) {
121020       if (devinfo->is_haswell) {
121028       if (devinfo->is_g4x) {
121052 COLOR_CALC_STATE_AlphaTestFormat_start(const struct gen_device_info *devinfo)
121054    switch (devinfo->gen) {
121060       if (devinfo->is_haswell) {
121068       if (devinfo->is_g4x) {
121088 COLOR_CALC_STATE_AlphaTestFunction_bits(const struct gen_device_info *devinfo)
121090    switch (devinfo->gen) {
121096       if (devinfo->is_haswell) {
121104       if (devinfo->is_g4x) {
121121 COLOR_CALC_STATE_AlphaTestFunction_start(const struct gen_device_info *devinfo)
121123    switch (devinfo->gen) {
121129       if (devinfo->is_haswell) {
121137       if (devinfo->is_g4x) {
121157 COLOR_CALC_STATE_BackfaceStencilFailOp_bits(const struct gen_device_info *devinfo)
121159    switch (devinfo->gen) {
121165       if (devinfo->is_haswell) {
121173       if (devinfo->is_g4x) {
121190 COLOR_CALC_STATE_BackfaceStencilFailOp_start(const struct gen_device_info *devinfo)
121192    switch (devinfo->gen) {
121198       if (devinfo->is_haswell) {
121206       if (devinfo->is_g4x) {
121226 COLOR_CALC_STATE_BackfaceStencilPassDepthFailOp_bits(const struct gen_device_info *devinfo)
121228    switch (devinfo->gen) {
121234       if (devinfo->is_haswell) {
121242       if (devinfo->is_g4x) {
121259 COLOR_CALC_STATE_BackfaceStencilPassDepthFailOp_start(const struct gen_device_info *devinfo)
121261    switch (devinfo->gen) {
121267       if (devinfo->is_haswell) {
121275       if (devinfo->is_g4x) {
121295 COLOR_CALC_STATE_BackfaceStencilPassDepthPassOp_bits(const struct gen_device_info *devinfo)
121297    switch (devinfo->gen) {
121303       if (devinfo->is_haswell) {
121311       if (devinfo->is_g4x) {
121328 COLOR_CALC_STATE_BackfaceStencilPassDepthPassOp_start(const struct gen_device_info *devinfo)
121330    switch (devinfo->gen) {
121336       if (devinfo->is_haswell) {
121344       if (devinfo->is_g4x) {
121368 COLOR_CALC_STATE_BackfaceStencilReferenceValue_bits(const struct gen_device_info *devinfo)
121370    switch (devinfo->gen) {
121376       if (devinfo->is_haswell) {
121384       if (devinfo->is_g4x) {
121405 COLOR_CALC_STATE_BackfaceStencilReferenceValue_start(const struct gen_device_info *devinfo)
121407    switch (devinfo->gen) {
121413       if (devinfo->is_haswell) {
121421       if (devinfo->is_g4x) {
121441 COLOR_CALC_STATE_BackfaceStencilTestFunction_bits(const struct gen_device_info *devinfo)
121443    switch (devinfo->gen) {
121449       if (devinfo->is_haswell) {
121457       if (devinfo->is_g4x) {
121474 COLOR_CALC_STATE_BackfaceStencilTestFunction_start(const struct gen_device_info *devinfo)
121476    switch (devinfo->gen) {
121482       if (devinfo->is_haswell) {
121490       if (devinfo->is_g4x) {
121510 COLOR_CALC_STATE_BackfaceStencilTestMask_bits(const struct gen_device_info *devinfo)
121512    switch (devinfo->gen) {
121518       if (devinfo->is_haswell) {
121526       if (devinfo->is_g4x) {
121543 COLOR_CALC_STATE_BackfaceStencilTestMask_start(const struct gen_device_info *devinfo)
121545    switch (devinfo->gen) {
121551       if (devinfo->is_haswell) {
121559       if (devinfo->is_g4x) {
121579 COLOR_CALC_STATE_BackfaceStencilWriteMask_bits(const struct gen_device_info *devinfo)
121581    switch (devinfo->gen) {
121587       if (devinfo->is_haswell) {
121595       if (devinfo->is_g4x) {
121612 COLOR_CALC_STATE_BackfaceStencilWriteMask_start(const struct gen_device_info *devinfo)
121614    switch (devinfo->gen) {
121620       if (devinfo->is_haswell) {
121628       if (devinfo->is_g4x) {
121652 COLOR_CALC_STATE_BlendConstantColorAlpha_bits(const struct gen_device_info *devinfo)
121654    switch (devinfo->gen) {
121660       if (devinfo->is_haswell) {
121668       if (devinfo->is_g4x) {
121689 COLOR_CALC_STATE_BlendConstantColorAlpha_start(const struct gen_device_info *devinfo)
121691    switch (devinfo->gen) {
121697       if (devinfo->is_haswell) {
121705       if (devinfo->is_g4x) {
121729 COLOR_CALC_STATE_BlendConstantColorBlue_bits(const struct gen_device_info *devinfo)
121731    switch (devinfo->gen) {
121737       if (devinfo->is_haswell) {
121745       if (devinfo->is_g4x) {
121766 COLOR_CALC_STATE_BlendConstantColorBlue_start(const struct gen_device_info *devinfo)
121768    switch (devinfo->gen) {
121774       if (devinfo->is_haswell) {
121782       if (devinfo->is_g4x) {
121806 COLOR_CALC_STATE_BlendConstantColorGreen_bits(const struct gen_device_info *devinfo)
121808    switch (devinfo->gen) {
121814       if (devinfo->is_haswell) {
121822       if (devinfo->is_g4x) {
121843 COLOR_CALC_STATE_BlendConstantColorGreen_start(const struct gen_device_info *devinfo)
121845    switch (devinfo->gen) {
121851       if (devinfo->is_haswell) {
121859       if (devinfo->is_g4x) {
121883 COLOR_CALC_STATE_BlendConstantColorRed_bits(const struct gen_device_info *devinfo)
121885    switch (devinfo->gen) {
121891       if (devinfo->is_haswell) {
121899       if (devinfo->is_g4x) {
121920 COLOR_CALC_STATE_BlendConstantColorRed_start(const struct gen_device_info *devinfo)
121922    switch (devinfo->gen) {
121928       if (devinfo->is_haswell) {
121936       if (devinfo->is_g4x) {
121956 COLOR_CALC_STATE_CCViewportStatePointer_bits(const struct gen_device_info *devinfo)
121958    switch (devinfo->gen) {
121964       if (devinfo->is_haswell) {
121972       if (devinfo->is_g4x) {
121989 COLOR_CALC_STATE_CCViewportStatePointer_start(const struct gen_device_info *devinfo)
121991    switch (devinfo->gen) {
121997       if (devinfo->is_haswell) {
122005       if (devinfo->is_g4x) {
122025 COLOR_CALC_STATE_ColorBlendFunction_bits(const struct gen_device_info *devinfo)
122027    switch (devinfo->gen) {
122033       if (devinfo->is_haswell) {
122041       if (devinfo->is_g4x) {
122058 COLOR_CALC_STATE_ColorBlendFunction_start(const struct gen_device_info *devinfo)
122060    switch (devinfo->gen) {
122066       if (devinfo->is_haswell) {
122074       if (devinfo->is_g4x) {
122094 COLOR_CALC_STATE_ColorBufferBlendEnable_bits(const struct gen_device_info *devinfo)
122096    switch (devinfo->gen) {
122102       if (devinfo->is_haswell) {
122110       if (devinfo->is_g4x) {
122127 COLOR_CALC_STATE_ColorBufferBlendEnable_start(const struct gen_device_info *devinfo)
122129    switch (devinfo->gen) {
122135       if (devinfo->is_haswell) {
122143       if (devinfo->is_g4x) {
122163 COLOR_CALC_STATE_ColorClampRange_bits(const struct gen_device_info *devinfo)
122165    switch (devinfo->gen) {
122171       if (devinfo->is_haswell) {
122179       if (devinfo->is_g4x) {
122196 COLOR_CALC_STATE_ColorClampRange_start(const struct gen_device_info *devinfo)
122198    switch (devinfo->gen) {
122204       if (devinfo->is_haswell) {
122212       if (devinfo->is_g4x) {
122232 COLOR_CALC_STATE_ColorDitherEnable_bits(const struct gen_device_info *devinfo)
122234    switch (devinfo->gen) {
122240       if (devinfo->is_haswell) {
122248       if (devinfo->is_g4x) {
122265 COLOR_CALC_STATE_ColorDitherEnable_start(const struct gen_device_info *devinfo)
122267    switch (devinfo->gen) {
122273       if (devinfo->is_haswell) {
122281       if (devinfo->is_g4x) {
122301 COLOR_CALC_STATE_DepthBufferWriteEnable_bits(const struct gen_device_info *devinfo)
122303    switch (devinfo->gen) {
122309       if (devinfo->is_haswell) {
122317       if (devinfo->is_g4x) {
122334 COLOR_CALC_STATE_DepthBufferWriteEnable_start(const struct gen_device_info *devinfo)
122336    switch (devinfo->gen) {
122342       if (devinfo->is_haswell) {
122350       if (devinfo->is_g4x) {
122370 COLOR_CALC_STATE_DepthTestEnable_bits(const struct gen_device_info *devinfo)
122372    switch (devinfo->gen) {
122378       if (devinfo->is_haswell) {
122386       if (devinfo->is_g4x) {
122403 COLOR_CALC_STATE_DepthTestEnable_start(const struct gen_device_info *devinfo)
122405    switch (devinfo->gen) {
122411       if (devinfo->is_haswell) {
122419       if (devinfo->is_g4x) {
122439 COLOR_CALC_STATE_DepthTestFunction_bits(const struct gen_device_info *devinfo)
122441    switch (devinfo->gen) {
122447       if (devinfo->is_haswell) {
122455       if (devinfo->is_g4x) {
122472 COLOR_CALC_STATE_DepthTestFunction_start(const struct gen_device_info *devinfo)
122474    switch (devinfo->gen) {
122480       if (devinfo->is_haswell) {
122488       if (devinfo->is_g4x) {
122508 COLOR_CALC_STATE_DestinationAlphaBlendFactor_bits(const struct gen_device_info *devinfo)
122510    switch (devinfo->gen) {
122516       if (devinfo->is_haswell) {
122524       if (devinfo->is_g4x) {
122541 COLOR_CALC_STATE_DestinationAlphaBlendFactor_start(const struct gen_device_info *devinfo)
122543    switch (devinfo->gen) {
122549       if (devinfo->is_haswell) {
122557       if (devinfo->is_g4x) {
122577 COLOR_CALC_STATE_DestinationBlendFactor_bits(const struct gen_device_info *devinfo)
122579    switch (devinfo->gen) {
122585       if (devinfo->is_haswell) {
122593       if (devinfo->is_g4x) {
122610 COLOR_CALC_STATE_DestinationBlendFactor_start(const struct gen_device_info *devinfo)
122612    switch (devinfo->gen) {
122618       if (devinfo->is_haswell) {
122626       if (devinfo->is_g4x) {
122646 COLOR_CALC_STATE_DoubleSidedStencilEnable_bits(const struct gen_device_info *devinfo)
122648    switch (devinfo->gen) {
122654       if (devinfo->is_haswell) {
122662       if (devinfo->is_g4x) {
122679 COLOR_CALC_STATE_DoubleSidedStencilEnable_start(const struct gen_device_info *devinfo)
122681    switch (devinfo->gen) {
122687       if (devinfo->is_haswell) {
122695       if (devinfo->is_g4x) {
122715 COLOR_CALC_STATE_IndependentAlphaBlendEnable_bits(const struct gen_device_info *devinfo)
122717    switch (devinfo->gen) {
122723       if (devinfo->is_haswell) {
122731       if (devinfo->is_g4x) {
122748 COLOR_CALC_STATE_IndependentAlphaBlendEnable_start(const struct gen_device_info *devinfo)
122750    switch (devinfo->gen) {
122756       if (devinfo->is_haswell) {
122764       if (devinfo->is_g4x) {
122784 COLOR_CALC_STATE_LogicOpEnable_bits(const struct gen_device_info *devinfo)
122786    switch (devinfo->gen) {
122792       if (devinfo->is_haswell) {
122800       if (devinfo->is_g4x) {
122817 COLOR_CALC_STATE_LogicOpEnable_start(const struct gen_device_info *devinfo)
122819    switch (devinfo->gen) {
122825       if (devinfo->is_haswell) {
122833       if (devinfo->is_g4x) {
122853 COLOR_CALC_STATE_LogicOpFunction_bits(const struct gen_device_info *devinfo)
122855    switch (devinfo->gen) {
122861       if (devinfo->is_haswell) {
122869       if (devinfo->is_g4x) {
122886 COLOR_CALC_STATE_LogicOpFunction_start(const struct gen_device_info *devinfo)
122888    switch (devinfo->gen) {
122894       if (devinfo->is_haswell) {
122902       if (devinfo->is_g4x) {
122922 COLOR_CALC_STATE_PostBlendColorClampEnable_bits(const struct gen_device_info *devinfo)
122924    switch (devinfo->gen) {
122930       if (devinfo->is_haswell) {
122938       if (devinfo->is_g4x) {
122955 COLOR_CALC_STATE_PostBlendColorClampEnable_start(const struct gen_device_info *devinfo)
122957    switch (devinfo->gen) {
122963       if (devinfo->is_haswell) {
122971       if (devinfo->is_g4x) {
122991 COLOR_CALC_STATE_PreBlendColorClampEnable_bits(const struct gen_device_info *devinfo)
122993    switch (devinfo->gen) {
122999       if (devinfo->is_haswell) {
123007       if (devinfo->is_g4x) {
123024 COLOR_CALC_STATE_PreBlendColorClampEnable_start(const struct gen_device_info *devinfo)
123026    switch (devinfo->gen) {
123032       if (devinfo->is_haswell) {
123040       if (devinfo->is_g4x) {
123067 COLOR_CALC_STATE_RoundDisableFunctionDisable_bits(const struct gen_device_info *devinfo)
123069    switch (devinfo->gen) {
123075       if (devinfo->is_haswell) {
123083       if (devinfo->is_g4x) {
123107 COLOR_CALC_STATE_RoundDisableFunctionDisable_start(const struct gen_device_info *devinfo)
123109    switch (devinfo->gen) {
123115       if (devinfo->is_haswell) {
123123       if (devinfo->is_g4x) {
123143 COLOR_CALC_STATE_SourceAlphaBlendFactor_bits(const struct gen_device_info *devinfo)
123145    switch (devinfo->gen) {
123151       if (devinfo->is_haswell) {
123159       if (devinfo->is_g4x) {
123176 COLOR_CALC_STATE_SourceAlphaBlendFactor_start(const struct gen_device_info *devinfo)
123178    switch (devinfo->gen) {
123184       if (devinfo->is_haswell) {
123192       if (devinfo->is_g4x) {
123212 COLOR_CALC_STATE_SourceBlendFactor_bits(const struct gen_device_info *devinfo)
123214    switch (devinfo->gen) {
123220       if (devinfo->is_haswell) {
123228       if (devinfo->is_g4x) {
123245 COLOR_CALC_STATE_SourceBlendFactor_start(const struct gen_device_info *devinfo)
123247    switch (devinfo->gen) {
123253       if (devinfo->is_haswell) {
123261       if (devinfo->is_g4x) {
123281 COLOR_CALC_STATE_StatisticsEnable_bits(const struct gen_device_info *devinfo)
123283    switch (devinfo->gen) {
123289       if (devinfo->is_haswell) {
123297       if (devinfo->is_g4x) {
123314 COLOR_CALC_STATE_StatisticsEnable_start(const struct gen_device_info *devinfo)
123316    switch (devinfo->gen) {
123322       if (devinfo->is_haswell) {
123330       if (devinfo->is_g4x) {
123350 COLOR_CALC_STATE_StencilBufferWriteEnable_bits(const struct gen_device_info *devinfo)
123352    switch (devinfo->gen) {
123358       if (devinfo->is_haswell) {
123366       if (devinfo->is_g4x) {
123383 COLOR_CALC_STATE_StencilBufferWriteEnable_start(const struct gen_device_info *devinfo)
123385    switch (devinfo->gen) {
123391       if (devinfo->is_haswell) {
123399       if (devinfo->is_g4x) {
123419 COLOR_CALC_STATE_StencilFailOp_bits(const struct gen_device_info *devinfo)
123421    switch (devinfo->gen) {
123427       if (devinfo->is_haswell) {
123435       if (devinfo->is_g4x) {
123452 COLOR_CALC_STATE_StencilFailOp_start(const struct gen_device_info *devinfo)
123454    switch (devinfo->gen) {
123460       if (devinfo->is_haswell) {
123468       if (devinfo->is_g4x) {
123488 COLOR_CALC_STATE_StencilPassDepthFailOp_bits(const struct gen_device_info *devinfo)
123490    switch (devinfo->gen) {
123496       if (devinfo->is_haswell) {
123504       if (devinfo->is_g4x) {
123521 COLOR_CALC_STATE_StencilPassDepthFailOp_start(const struct gen_device_info *devinfo)
123523    switch (devinfo->gen) {
123529       if (devinfo->is_haswell) {
123537       if (devinfo->is_g4x) {
123557 COLOR_CALC_STATE_StencilPassDepthPassOp_bits(const struct gen_device_info *devinfo)
123559    switch (devinfo->gen) {
123565       if (devinfo->is_haswell) {
123573       if (devinfo->is_g4x) {
123590 COLOR_CALC_STATE_StencilPassDepthPassOp_start(const struct gen_device_info *devinfo)
123592    switch (devinfo->gen) {
123598       if (devinfo->is_haswell) {
123606       if (devinfo->is_g4x) {
123630 COLOR_CALC_STATE_StencilReferenceValue_bits(const struct gen_device_info *devinfo)
123632    switch (devinfo->gen) {
123638       if (devinfo->is_haswell) {
123646       if (devinfo->is_g4x) {
123667 COLOR_CALC_STATE_StencilReferenceValue_start(const struct gen_device_info *devinfo)
123669    switch (devinfo->gen) {
123675       if (devinfo->is_haswell) {
123683       if (devinfo->is_g4x) {
123703 COLOR_CALC_STATE_StencilTestEnable_bits(const struct gen_device_info *devinfo)
123705    switch (devinfo->gen) {
123711       if (devinfo->is_haswell) {
123719       if (devinfo->is_g4x) {
123736 COLOR_CALC_STATE_StencilTestEnable_start(const struct gen_device_info *devinfo)
123738    switch (devinfo->gen) {
123744       if (devinfo->is_haswell) {
123752       if (devinfo->is_g4x) {
123772 COLOR_CALC_STATE_StencilTestFunction_bits(const struct gen_device_info *devinfo)
123774    switch (devinfo->gen) {
123780       if (devinfo->is_haswell) {
123788       if (devinfo->is_g4x) {
123805 COLOR_CALC_STATE_StencilTestFunction_start(const struct gen_device_info *devinfo)
123807    switch (devinfo->gen) {
123813       if (devinfo->is_haswell) {
123821       if (devinfo->is_g4x) {
123841 COLOR_CALC_STATE_StencilTestMask_bits(const struct gen_device_info *devinfo)
123843    switch (devinfo->gen) {
123849       if (devinfo->is_haswell) {
123857       if (devinfo->is_g4x) {
123874 COLOR_CALC_STATE_StencilTestMask_start(const struct gen_device_info *devinfo)
123876    switch (devinfo->gen) {
123882       if (devinfo->is_haswell) {
123890       if (devinfo->is_g4x) {
123910 COLOR_CALC_STATE_StencilWriteMask_bits(const struct gen_device_info *devinfo)
123912    switch (devinfo->gen) {
123918       if (devinfo->is_haswell) {
123926       if (devinfo->is_g4x) {
123943 COLOR_CALC_STATE_StencilWriteMask_start(const struct gen_device_info *devinfo)
123945    switch (devinfo->gen) {
123951       if (devinfo->is_haswell) {
123959       if (devinfo->is_g4x) {
123979 COLOR_CALC_STATE_XDitherOffset_bits(const struct gen_device_info *devinfo)
123981    switch (devinfo->gen) {
123987       if (devinfo->is_haswell) {
123995       if (devinfo->is_g4x) {
124012 COLOR_CALC_STATE_XDitherOffset_start(const struct gen_device_info *devinfo)
124014    switch (devinfo->gen) {
124020       if (devinfo->is_haswell) {
124028       if (devinfo->is_g4x) {
124048 COLOR_CALC_STATE_YDitherOffset_bits(const struct gen_device_info *devinfo)
124050    switch (devinfo->gen) {
124056       if (devinfo->is_haswell) {
124064       if (devinfo->is_g4x) {
124081 COLOR_CALC_STATE_YDitherOffset_start(const struct gen_device_info *devinfo)
124083    switch (devinfo->gen) {
124089       if (devinfo->is_haswell) {
124097       if (devinfo->is_g4x) {
124115 COMMON_SLICE_CHICKEN3_length(const struct gen_device_info *devinfo)
124117    switch (devinfo->gen) {
124123       if (devinfo->is_haswell) {
124131       if (devinfo->is_g4x) {
124149 COMMON_SLICE_CHICKEN3_PSThreadPanicDispatch_bits(const struct gen_device_info *devinfo)
124151    switch (devinfo->gen) {
124157       if (devinfo->is_haswell) {
124165       if (devinfo->is_g4x) {
124180 COMMON_SLICE_CHICKEN3_PSThreadPanicDispatch_start(const struct gen_device_info *devinfo)
124182    switch (devinfo->gen) {
124188       if (devinfo->is_haswell) {
124196       if (devinfo->is_g4x) {
124214 COMMON_SLICE_CHICKEN3_PSThreadPanicDispatchMask_bits(const struct gen_device_info *devinfo)
124216    switch (devinfo->gen) {
124222       if (devinfo->is_haswell) {
124230       if (devinfo->is_g4x) {
124245 COMMON_SLICE_CHICKEN3_PSThreadPanicDispatchMask_start(const struct gen_device_info *devinfo)
124247    switch (devinfo->gen) {
124253       if (devinfo->is_haswell) {
124261       if (devinfo->is_g4x) {
124281 CONSTANT_BUFFER_length(const struct gen_device_info *devinfo)
124283    switch (devinfo->gen) {
124289       if (devinfo->is_haswell) {
124297       if (devinfo->is_g4x) {
124317 CONSTANT_BUFFER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
124319    switch (devinfo->gen) {
124325       if (devinfo->is_haswell) {
124333       if (devinfo->is_g4x) {
124350 CONSTANT_BUFFER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
124352    switch (devinfo->gen) {
124358       if (devinfo->is_haswell) {
124366       if (devinfo->is_g4x) {
124386 CONSTANT_BUFFER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
124388    switch (devinfo->gen) {
124394       if (devinfo->is_haswell) {
124402       if (devinfo->is_g4x) {
124419 CONSTANT_BUFFER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
124421    switch (devinfo->gen) {
124427       if (devinfo->is_haswell) {
124435       if (devinfo->is_g4x) {
124455 CONSTANT_BUFFER_BufferLength_bits(const struct gen_device_info *devinfo)
124457    switch (devinfo->gen) {
124463       if (devinfo->is_haswell) {
124471       if (devinfo->is_g4x) {
124488 CONSTANT_BUFFER_BufferLength_start(const struct gen_device_info *devinfo)
124490    switch (devinfo->gen) {
124496       if (devinfo->is_haswell) {
124504       if (devinfo->is_g4x) {
124524 CONSTANT_BUFFER_BufferStartingAddress_bits(const struct gen_device_info *devinfo)
124526    switch (devinfo->gen) {
124532       if (devinfo->is_haswell) {
124540       if (devinfo->is_g4x) {
124557 CONSTANT_BUFFER_BufferStartingAddress_start(const struct gen_device_info *devinfo)
124559    switch (devinfo->gen) {
124565       if (devinfo->is_haswell) {
124573       if (devinfo->is_g4x) {
124593 CONSTANT_BUFFER_CommandSubType_bits(const struct gen_device_info *devinfo)
124595    switch (devinfo->gen) {
124601       if (devinfo->is_haswell) {
124609       if (devinfo->is_g4x) {
124626 CONSTANT_BUFFER_CommandSubType_start(const struct gen_device_info *devinfo)
124628    switch (devinfo->gen) {
124634       if (devinfo->is_haswell) {
124642       if (devinfo->is_g4x) {
124662 CONSTANT_BUFFER_CommandType_bits(const struct gen_device_info *devinfo)
124664    switch (devinfo->gen) {
124670       if (devinfo->is_haswell) {
124678       if (devinfo->is_g4x) {
124695 CONSTANT_BUFFER_CommandType_start(const struct gen_device_info *devinfo)
124697    switch (devinfo->gen) {
124703       if (devinfo->is_haswell) {
124711       if (devinfo->is_g4x) {
124731 CONSTANT_BUFFER_DWordLength_bits(const struct gen_device_info *devinfo)
124733    switch (devinfo->gen) {
124739       if (devinfo->is_haswell) {
124747       if (devinfo->is_g4x) {
124764 CONSTANT_BUFFER_DWordLength_start(const struct gen_device_info *devinfo)
124766    switch (devinfo->gen) {
124772       if (devinfo->is_haswell) {
124780       if (devinfo->is_g4x) {
124800 CONSTANT_BUFFER_Valid_bits(const struct gen_device_info *devinfo)
124802    switch (devinfo->gen) {
124808       if (devinfo->is_haswell) {
124816       if (devinfo->is_g4x) {
124833 CONSTANT_BUFFER_Valid_start(const struct gen_device_info *devinfo)
124835    switch (devinfo->gen) {
124841       if (devinfo->is_haswell) {
124849       if (devinfo->is_g4x) {
124869 CS_CHICKEN1_length(const struct gen_device_info *devinfo)
124871    switch (devinfo->gen) {
124877       if (devinfo->is_haswell) {
124885       if (devinfo->is_g4x) {
124905 CS_CHICKEN1_ReplayMode_bits(const struct gen_device_info *devinfo)
124907    switch (devinfo->gen) {
124913       if (devinfo->is_haswell) {
124921       if (devinfo->is_g4x) {
124938 CS_CHICKEN1_ReplayMode_start(const struct gen_device_info *devinfo)
124940    switch (devinfo->gen) {
124946       if (devinfo->is_haswell) {
124954       if (devinfo->is_g4x) {
124974 CS_CHICKEN1_ReplayModeMask_bits(const struct gen_device_info *devinfo)
124976    switch (devinfo->gen) {
124982       if (devinfo->is_haswell) {
124990       if (devinfo->is_g4x) {
125007 CS_CHICKEN1_ReplayModeMask_start(const struct gen_device_info *devinfo)
125009    switch (devinfo->gen) {
125015       if (devinfo->is_haswell) {
125023       if (devinfo->is_g4x) {
125043 CS_DEBUG_MODE2_length(const struct gen_device_info *devinfo)
125045    switch (devinfo->gen) {
125051       if (devinfo->is_haswell) {
125059       if (devinfo->is_g4x) {
125079 CS_DEBUG_MODE2_3DRenderingInstructionDisable_bits(const struct gen_device_info *devinfo)
125081    switch (devinfo->gen) {
125087       if (devinfo->is_haswell) {
125095       if (devinfo->is_g4x) {
125112 CS_DEBUG_MODE2_3DRenderingInstructionDisable_start(const struct gen_device_info *devinfo)
125114    switch (devinfo->gen) {
125120       if (devinfo->is_haswell) {
125128       if (devinfo->is_g4x) {
125148 CS_DEBUG_MODE2_3DRenderingInstructionDisableMask_bits(const struct gen_device_info *devinfo)
125150    switch (devinfo->gen) {
125156       if (devinfo->is_haswell) {
125164       if (devinfo->is_g4x) {
125181 CS_DEBUG_MODE2_3DRenderingInstructionDisableMask_start(const struct gen_device_info *devinfo)
125183    switch (devinfo->gen) {
125189       if (devinfo->is_haswell) {
125197       if (devinfo->is_g4x) {
125217 CS_DEBUG_MODE2_CONSTANT_BUFFERAddressOffsetDisable_bits(const struct gen_device_info *devinfo)
125219    switch (devinfo->gen) {
125225       if (devinfo->is_haswell) {
125233       if (devinfo->is_g4x) {
125250 CS_DEBUG_MODE2_CONSTANT_BUFFERAddressOffsetDisable_start(const struct gen_device_info *devinfo)
125252    switch (devinfo->gen) {
125258       if (devinfo->is_haswell) {
125266       if (devinfo->is_g4x) {
125286 CS_DEBUG_MODE2_CONSTANT_BUFFERAddressOffsetDisableMask_bits(const struct gen_device_info *devinfo)
125288    switch (devinfo->gen) {
125294       if (devinfo->is_haswell) {
125302       if (devinfo->is_g4x) {
125319 CS_DEBUG_MODE2_CONSTANT_BUFFERAddressOffsetDisableMask_start(const struct gen_device_info *devinfo)
125321    switch (devinfo->gen) {
125327       if (devinfo->is_haswell) {
125335       if (devinfo->is_g4x) {
125355 CS_DEBUG_MODE2_MediaInstructionDisable_bits(const struct gen_device_info *devinfo)
125357    switch (devinfo->gen) {
125363       if (devinfo->is_haswell) {
125371       if (devinfo->is_g4x) {
125388 CS_DEBUG_MODE2_MediaInstructionDisable_start(const struct gen_device_info *devinfo)
125390    switch (devinfo->gen) {
125396       if (devinfo->is_haswell) {
125404       if (devinfo->is_g4x) {
125424 CS_DEBUG_MODE2_MediaInstructionDisableMask_bits(const struct gen_device_info *devinfo)
125426    switch (devinfo->gen) {
125432       if (devinfo->is_haswell) {
125440       if (devinfo->is_g4x) {
125457 CS_DEBUG_MODE2_MediaInstructionDisableMask_start(const struct gen_device_info *devinfo)
125459    switch (devinfo->gen) {
125465       if (devinfo->is_haswell) {
125473       if (devinfo->is_g4x) {
125496 CS_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
125498    switch (devinfo->gen) {
125504       if (devinfo->is_haswell) {
125512       if (devinfo->is_g4x) {
125535 CS_INVOCATION_COUNT_CSInvocationCountReport_bits(const struct gen_device_info *devinfo)
125537    switch (devinfo->gen) {
125543       if (devinfo->is_haswell) {
125551       if (devinfo->is_g4x) {
125571 CS_INVOCATION_COUNT_CSInvocationCountReport_start(const struct gen_device_info *devinfo)
125573    switch (devinfo->gen) {
125579       if (devinfo->is_haswell) {
125587       if (devinfo->is_g4x) {
125607 CS_URB_STATE_length(const struct gen_device_info *devinfo)
125609    switch (devinfo->gen) {
125615       if (devinfo->is_haswell) {
125623       if (devinfo->is_g4x) {
125643 CS_URB_STATE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
125645    switch (devinfo->gen) {
125651       if (devinfo->is_haswell) {
125659       if (devinfo->is_g4x) {
125676 CS_URB_STATE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
125678    switch (devinfo->gen) {
125684       if (devinfo->is_haswell) {
125692       if (devinfo->is_g4x) {
125712 CS_URB_STATE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
125714    switch (devinfo->gen) {
125720       if (devinfo->is_haswell) {
125728       if (devinfo->is_g4x) {
125745 CS_URB_STATE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
125747    switch (devinfo->gen) {
125753       if (devinfo->is_haswell) {
125761       if (devinfo->is_g4x) {
125781 CS_URB_STATE_CommandSubType_bits(const struct gen_device_info *devinfo)
125783    switch (devinfo->gen) {
125789       if (devinfo->is_haswell) {
125797       if (devinfo->is_g4x) {
125814 CS_URB_STATE_CommandSubType_start(const struct gen_device_info *devinfo)
125816    switch (devinfo->gen) {
125822       if (devinfo->is_haswell) {
125830       if (devinfo->is_g4x) {
125850 CS_URB_STATE_CommandType_bits(const struct gen_device_info *devinfo)
125852    switch (devinfo->gen) {
125858       if (devinfo->is_haswell) {
125866       if (devinfo->is_g4x) {
125883 CS_URB_STATE_CommandType_start(const struct gen_device_info *devinfo)
125885    switch (devinfo->gen) {
125891       if (devinfo->is_haswell) {
125899       if (devinfo->is_g4x) {
125919 CS_URB_STATE_DWordLength_bits(const struct gen_device_info *devinfo)
125921    switch (devinfo->gen) {
125927       if (devinfo->is_haswell) {
125935       if (devinfo->is_g4x) {
125952 CS_URB_STATE_DWordLength_start(const struct gen_device_info *devinfo)
125954    switch (devinfo->gen) {
125960       if (devinfo->is_haswell) {
125968       if (devinfo->is_g4x) {
125988 CS_URB_STATE_NumberofURBEntries_bits(const struct gen_device_info *devinfo)
125990    switch (devinfo->gen) {
125996       if (devinfo->is_haswell) {
126004       if (devinfo->is_g4x) {
126021 CS_URB_STATE_NumberofURBEntries_start(const struct gen_device_info *devinfo)
126023    switch (devinfo->gen) {
126029       if (devinfo->is_haswell) {
126037       if (devinfo->is_g4x) {
126057 CS_URB_STATE_URBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
126059    switch (devinfo->gen) {
126065       if (devinfo->is_haswell) {
126073       if (devinfo->is_g4x) {
126090 CS_URB_STATE_URBEntryAllocationSize_start(const struct gen_device_info *devinfo)
126092    switch (devinfo->gen) {
126098       if (devinfo->is_haswell) {
126106       if (devinfo->is_g4x) {
126126 DEPTH_STENCIL_STATE_length(const struct gen_device_info *devinfo)
126128    switch (devinfo->gen) {
126134       if (devinfo->is_haswell) {
126142       if (devinfo->is_g4x) {
126162 DEPTH_STENCIL_STATE_BackfaceStencilFailOp_bits(const struct gen_device_info *devinfo)
126164    switch (devinfo->gen) {
126170       if (devinfo->is_haswell) {
126178       if (devinfo->is_g4x) {
126195 DEPTH_STENCIL_STATE_BackfaceStencilFailOp_start(const struct gen_device_info *devinfo)
126197    switch (devinfo->gen) {
126203       if (devinfo->is_haswell) {
126211       if (devinfo->is_g4x) {
126231 DEPTH_STENCIL_STATE_BackfaceStencilPassDepthFailOp_bits(const struct gen_device_info *devinfo)
126233    switch (devinfo->gen) {
126239       if (devinfo->is_haswell) {
126247       if (devinfo->is_g4x) {
126264 DEPTH_STENCIL_STATE_BackfaceStencilPassDepthFailOp_start(const struct gen_device_info *devinfo)
126266    switch (devinfo->gen) {
126272       if (devinfo->is_haswell) {
126280       if (devinfo->is_g4x) {
126300 DEPTH_STENCIL_STATE_BackfaceStencilPassDepthPassOp_bits(const struct gen_device_info *devinfo)
126302    switch (devinfo->gen) {
126308       if (devinfo->is_haswell) {
126316       if (devinfo->is_g4x) {
126333 DEPTH_STENCIL_STATE_BackfaceStencilPassDepthPassOp_start(const struct gen_device_info *devinfo)
126335    switch (devinfo->gen) {
126341       if (devinfo->is_haswell) {
126349       if (devinfo->is_g4x) {
126369 DEPTH_STENCIL_STATE_BackfaceStencilTestFunction_bits(const struct gen_device_info *devinfo)
126371    switch (devinfo->gen) {
126377       if (devinfo->is_haswell) {
126385       if (devinfo->is_g4x) {
126402 DEPTH_STENCIL_STATE_BackfaceStencilTestFunction_start(const struct gen_device_info *devinfo)
126404    switch (devinfo->gen) {
126410       if (devinfo->is_haswell) {
126418       if (devinfo->is_g4x) {
126438 DEPTH_STENCIL_STATE_BackfaceStencilTestMask_bits(const struct gen_device_info *devinfo)
126440    switch (devinfo->gen) {
126446       if (devinfo->is_haswell) {
126454       if (devinfo->is_g4x) {
126471 DEPTH_STENCIL_STATE_BackfaceStencilTestMask_start(const struct gen_device_info *devinfo)
126473    switch (devinfo->gen) {
126479       if (devinfo->is_haswell) {
126487       if (devinfo->is_g4x) {
126507 DEPTH_STENCIL_STATE_BackfaceStencilWriteMask_bits(const struct gen_device_info *devinfo)
126509    switch (devinfo->gen) {
126515       if (devinfo->is_haswell) {
126523       if (devinfo->is_g4x) {
126540 DEPTH_STENCIL_STATE_BackfaceStencilWriteMask_start(const struct gen_device_info *devinfo)
126542    switch (devinfo->gen) {
126548       if (devinfo->is_haswell) {
126556       if (devinfo->is_g4x) {
126576 DEPTH_STENCIL_STATE_DepthBufferWriteEnable_bits(const struct gen_device_info *devinfo)
126578    switch (devinfo->gen) {
126584       if (devinfo->is_haswell) {
126592       if (devinfo->is_g4x) {
126609 DEPTH_STENCIL_STATE_DepthBufferWriteEnable_start(const struct gen_device_info *devinfo)
126611    switch (devinfo->gen) {
126617       if (devinfo->is_haswell) {
126625       if (devinfo->is_g4x) {
126645 DEPTH_STENCIL_STATE_DepthTestEnable_bits(const struct gen_device_info *devinfo)
126647    switch (devinfo->gen) {
126653       if (devinfo->is_haswell) {
126661       if (devinfo->is_g4x) {
126678 DEPTH_STENCIL_STATE_DepthTestEnable_start(const struct gen_device_info *devinfo)
126680    switch (devinfo->gen) {
126686       if (devinfo->is_haswell) {
126694       if (devinfo->is_g4x) {
126714 DEPTH_STENCIL_STATE_DepthTestFunction_bits(const struct gen_device_info *devinfo)
126716    switch (devinfo->gen) {
126722       if (devinfo->is_haswell) {
126730       if (devinfo->is_g4x) {
126747 DEPTH_STENCIL_STATE_DepthTestFunction_start(const struct gen_device_info *devinfo)
126749    switch (devinfo->gen) {
126755       if (devinfo->is_haswell) {
126763       if (devinfo->is_g4x) {
126783 DEPTH_STENCIL_STATE_DoubleSidedStencilEnable_bits(const struct gen_device_info *devinfo)
126785    switch (devinfo->gen) {
126791       if (devinfo->is_haswell) {
126799       if (devinfo->is_g4x) {
126816 DEPTH_STENCIL_STATE_DoubleSidedStencilEnable_start(const struct gen_device_info *devinfo)
126818    switch (devinfo->gen) {
126824       if (devinfo->is_haswell) {
126832       if (devinfo->is_g4x) {
126852 DEPTH_STENCIL_STATE_StencilBufferWriteEnable_bits(const struct gen_device_info *devinfo)
126854    switch (devinfo->gen) {
126860       if (devinfo->is_haswell) {
126868       if (devinfo->is_g4x) {
126885 DEPTH_STENCIL_STATE_StencilBufferWriteEnable_start(const struct gen_device_info *devinfo)
126887    switch (devinfo->gen) {
126893       if (devinfo->is_haswell) {
126901       if (devinfo->is_g4x) {
126921 DEPTH_STENCIL_STATE_StencilFailOp_bits(const struct gen_device_info *devinfo)
126923    switch (devinfo->gen) {
126929       if (devinfo->is_haswell) {
126937       if (devinfo->is_g4x) {
126954 DEPTH_STENCIL_STATE_StencilFailOp_start(const struct gen_device_info *devinfo)
126956    switch (devinfo->gen) {
126962       if (devinfo->is_haswell) {
126970       if (devinfo->is_g4x) {
126990 DEPTH_STENCIL_STATE_StencilPassDepthFailOp_bits(const struct gen_device_info *devinfo)
126992    switch (devinfo->gen) {
126998       if (devinfo->is_haswell) {
127006       if (devinfo->is_g4x) {
127023 DEPTH_STENCIL_STATE_StencilPassDepthFailOp_start(const struct gen_device_info *devinfo)
127025    switch (devinfo->gen) {
127031       if (devinfo->is_haswell) {
127039       if (devinfo->is_g4x) {
127059 DEPTH_STENCIL_STATE_StencilPassDepthPassOp_bits(const struct gen_device_info *devinfo)
127061    switch (devinfo->gen) {
127067       if (devinfo->is_haswell) {
127075       if (devinfo->is_g4x) {
127092 DEPTH_STENCIL_STATE_StencilPassDepthPassOp_start(const struct gen_device_info *devinfo)
127094    switch (devinfo->gen) {
127100       if (devinfo->is_haswell) {
127108       if (devinfo->is_g4x) {
127128 DEPTH_STENCIL_STATE_StencilTestEnable_bits(const struct gen_device_info *devinfo)
127130    switch (devinfo->gen) {
127136       if (devinfo->is_haswell) {
127144       if (devinfo->is_g4x) {
127161 DEPTH_STENCIL_STATE_StencilTestEnable_start(const struct gen_device_info *devinfo)
127163    switch (devinfo->gen) {
127169       if (devinfo->is_haswell) {
127177       if (devinfo->is_g4x) {
127197 DEPTH_STENCIL_STATE_StencilTestFunction_bits(const struct gen_device_info *devinfo)
127199    switch (devinfo->gen) {
127205       if (devinfo->is_haswell) {
127213       if (devinfo->is_g4x) {
127230 DEPTH_STENCIL_STATE_StencilTestFunction_start(const struct gen_device_info *devinfo)
127232    switch (devinfo->gen) {
127238       if (devinfo->is_haswell) {
127246       if (devinfo->is_g4x) {
127266 DEPTH_STENCIL_STATE_StencilTestMask_bits(const struct gen_device_info *devinfo)
127268    switch (devinfo->gen) {
127274       if (devinfo->is_haswell) {
127282       if (devinfo->is_g4x) {
127299 DEPTH_STENCIL_STATE_StencilTestMask_start(const struct gen_device_info *devinfo)
127301    switch (devinfo->gen) {
127307       if (devinfo->is_haswell) {
127315       if (devinfo->is_g4x) {
127335 DEPTH_STENCIL_STATE_StencilWriteMask_bits(const struct gen_device_info *devinfo)
127337    switch (devinfo->gen) {
127343       if (devinfo->is_haswell) {
127351       if (devinfo->is_g4x) {
127368 DEPTH_STENCIL_STATE_StencilWriteMask_start(const struct gen_device_info *devinfo)
127370    switch (devinfo->gen) {
127376       if (devinfo->is_haswell) {
127384       if (devinfo->is_g4x) {
127407 DS_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
127409    switch (devinfo->gen) {
127415       if (devinfo->is_haswell) {
127423       if (devinfo->is_g4x) {
127446 DS_INVOCATION_COUNT_DSInvocationCountReport_bits(const struct gen_device_info *devinfo)
127448    switch (devinfo->gen) {
127454       if (devinfo->is_haswell) {
127462       if (devinfo->is_g4x) {
127482 DS_INVOCATION_COUNT_DSInvocationCountReport_start(const struct gen_device_info *devinfo)
127484    switch (devinfo->gen) {
127490       if (devinfo->is_haswell) {
127498       if (devinfo->is_g4x) {
127517 ERR_INT_length(const struct gen_device_info *devinfo)
127519    switch (devinfo->gen) {
127525       if (devinfo->is_haswell) {
127533       if (devinfo->is_g4x) {
127552 ERR_INT_CursorAGTTFaultStatus_bits(const struct gen_device_info *devinfo)
127554    switch (devinfo->gen) {
127560       if (devinfo->is_haswell) {
127568       if (devinfo->is_g4x) {
127584 ERR_INT_CursorAGTTFaultStatus_start(const struct gen_device_info *devinfo)
127586    switch (devinfo->gen) {
127592       if (devinfo->is_haswell) {
127600       if (devinfo->is_g4x) {
127619 ERR_INT_CursorBGTTFaultStatus_bits(const struct gen_device_info *devinfo)
127621    switch (devinfo->gen) {
127627       if (devinfo->is_haswell) {
127635       if (devinfo->is_g4x) {
127651 ERR_INT_CursorBGTTFaultStatus_start(const struct gen_device_info *devinfo)
127653    switch (devinfo->gen) {
127659       if (devinfo->is_haswell) {
127667       if (devinfo->is_g4x) {
127686 ERR_INT_InvalidGTTpagetableentry_bits(const struct gen_device_info *devinfo)
127688    switch (devinfo->gen) {
127694       if (devinfo->is_haswell) {
127702       if (devinfo->is_g4x) {
127718 ERR_INT_InvalidGTTpagetableentry_start(const struct gen_device_info *devinfo)
127720    switch (devinfo->gen) {
127726       if (devinfo->is_haswell) {
127734       if (devinfo->is_g4x) {
127753 ERR_INT_Invalidpagetableentrydata_bits(const struct gen_device_info *devinfo)
127755    switch (devinfo->gen) {
127761       if (devinfo->is_haswell) {
127769       if (devinfo->is_g4x) {
127785 ERR_INT_Invalidpagetableentrydata_start(const struct gen_device_info *devinfo)
127787    switch (devinfo->gen) {
127793       if (devinfo->is_haswell) {
127801       if (devinfo->is_g4x) {
127820 ERR_INT_PrimaryAGTTFaultStatus_bits(const struct gen_device_info *devinfo)
127822    switch (devinfo->gen) {
127828       if (devinfo->is_haswell) {
127836       if (devinfo->is_g4x) {
127852 ERR_INT_PrimaryAGTTFaultStatus_start(const struct gen_device_info *devinfo)
127854    switch (devinfo->gen) {
127860       if (devinfo->is_haswell) {
127868       if (devinfo->is_g4x) {
127887 ERR_INT_PrimaryBGTTFaultStatus_bits(const struct gen_device_info *devinfo)
127889    switch (devinfo->gen) {
127895       if (devinfo->is_haswell) {
127903       if (devinfo->is_g4x) {
127919 ERR_INT_PrimaryBGTTFaultStatus_start(const struct gen_device_info *devinfo)
127921    switch (devinfo->gen) {
127927       if (devinfo->is_haswell) {
127935       if (devinfo->is_g4x) {
127954 ERR_INT_SpriteAGTTFaultStatus_bits(const struct gen_device_info *devinfo)
127956    switch (devinfo->gen) {
127962       if (devinfo->is_haswell) {
127970       if (devinfo->is_g4x) {
127986 ERR_INT_SpriteAGTTFaultStatus_start(const struct gen_device_info *devinfo)
127988    switch (devinfo->gen) {
127994       if (devinfo->is_haswell) {
128002       if (devinfo->is_g4x) {
128021 ERR_INT_SpriteBGTTFaultStatus_bits(const struct gen_device_info *devinfo)
128023    switch (devinfo->gen) {
128029       if (devinfo->is_haswell) {
128037       if (devinfo->is_g4x) {
128053 ERR_INT_SpriteBGTTFaultStatus_start(const struct gen_device_info *devinfo)
128055    switch (devinfo->gen) {
128061       if (devinfo->is_haswell) {
128069       if (devinfo->is_g4x) {
128089 EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_length(const struct gen_device_info *devinfo)
128091    switch (devinfo->gen) {
128097       if (devinfo->is_haswell) {
128105       if (devinfo->is_g4x) {
128125 EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_EndOfThread_bits(const struct gen_device_info *devinfo)
128127    switch (devinfo->gen) {
128133       if (devinfo->is_haswell) {
128141       if (devinfo->is_g4x) {
128158 EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_EndOfThread_start(const struct gen_device_info *devinfo)
128160    switch (devinfo->gen) {
128166       if (devinfo->is_haswell) {
128174       if (devinfo->is_g4x) {
128194 EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_ExtendedMessageLength_bits(const struct gen_device_info *devinfo)
128196    switch (devinfo->gen) {
128202       if (devinfo->is_haswell) {
128210       if (devinfo->is_g4x) {
128227 EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_ExtendedMessageLength_start(const struct gen_device_info *devinfo)
128229    switch (devinfo->gen) {
128235       if (devinfo->is_haswell) {
128243       if (devinfo->is_g4x) {
128263 EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_TargetFunctionID_bits(const struct gen_device_info *devinfo)
128265    switch (devinfo->gen) {
128271       if (devinfo->is_haswell) {
128279       if (devinfo->is_g4x) {
128296 EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_TargetFunctionID_start(const struct gen_device_info *devinfo)
128298    switch (devinfo->gen) {
128304       if (devinfo->is_haswell) {
128312       if (devinfo->is_g4x) {
128331 FAULT_REG_length(const struct gen_device_info *devinfo)
128333    switch (devinfo->gen) {
128339       if (devinfo->is_haswell) {
128347       if (devinfo->is_g4x) {
128366 FAULT_REG_EngineID_bits(const struct gen_device_info *devinfo)
128368    switch (devinfo->gen) {
128374       if (devinfo->is_haswell) {
128382       if (devinfo->is_g4x) {
128398 FAULT_REG_EngineID_start(const struct gen_device_info *devinfo)
128400    switch (devinfo->gen) {
128406       if (devinfo->is_haswell) {
128414       if (devinfo->is_g4x) {
128433 FAULT_REG_FaultType_bits(const struct gen_device_info *devinfo)
128435    switch (devinfo->gen) {
128441       if (devinfo->is_haswell) {
128449       if (devinfo->is_g4x) {
128465 FAULT_REG_FaultType_start(const struct gen_device_info *devinfo)
128467    switch (devinfo->gen) {
128473       if (devinfo->is_haswell) {
128481       if (devinfo->is_g4x) {
128500 FAULT_REG_GTTSEL_bits(const struct gen_device_info *devinfo)
128502    switch (devinfo->gen) {
128508       if (devinfo->is_haswell) {
128516       if (devinfo->is_g4x) {
128532 FAULT_REG_GTTSEL_start(const struct gen_device_info *devinfo)
128534    switch (devinfo->gen) {
128540       if (devinfo->is_haswell) {
128548       if (devinfo->is_g4x) {
128567 FAULT_REG_SRCIDofFault_bits(const struct gen_device_info *devinfo)
128569    switch (devinfo->gen) {
128575       if (devinfo->is_haswell) {
128583       if (devinfo->is_g4x) {
128599 FAULT_REG_SRCIDofFault_start(const struct gen_device_info *devinfo)
128601    switch (devinfo->gen) {
128607       if (devinfo->is_haswell) {
128615       if (devinfo->is_g4x) {
128634 FAULT_REG_ValidBit_bits(const struct gen_device_info *devinfo)
128636    switch (devinfo->gen) {
128642       if (devinfo->is_haswell) {
128650       if (devinfo->is_g4x) {
128666 FAULT_REG_ValidBit_start(const struct gen_device_info *devinfo)
128668    switch (devinfo->gen) {
128674       if (devinfo->is_haswell) {
128682       if (devinfo->is_g4x) {
128703 FILTER_COEFFICIENT_length(const struct gen_device_info *devinfo)
128705    switch (devinfo->gen) {
128711       if (devinfo->is_haswell) {
128719       if (devinfo->is_g4x) {
128740 FILTER_COEFFICIENT_FilterCoefficient_bits(const struct gen_device_info *devinfo)
128742    switch (devinfo->gen) {
128748       if (devinfo->is_haswell) {
128756       if (devinfo->is_g4x) {
128774 FILTER_COEFFICIENT_FilterCoefficient_start(const struct gen_device_info *devinfo)
128776    switch (devinfo->gen) {
128782       if (devinfo->is_haswell) {
128790       if (devinfo->is_g4x) {
128810 FRAMEDELTAQP_length(const struct gen_device_info *devinfo)
128812    switch (devinfo->gen) {
128818       if (devinfo->is_haswell) {
128826       if (devinfo->is_g4x) {
128846 FRAMEDELTAQP_FrameDeltaQP_bits(const struct gen_device_info *devinfo)
128848    switch (devinfo->gen) {
128854       if (devinfo->is_haswell) {
128862       if (devinfo->is_g4x) {
128879 FRAMEDELTAQP_FrameDeltaQP_start(const struct gen_device_info *devinfo)
128881    switch (devinfo->gen) {
128887       if (devinfo->is_haswell) {
128895       if (devinfo->is_g4x) {
128915 FRAMEDELTAQPRANGE_length(const struct gen_device_info *devinfo)
128917    switch (devinfo->gen) {
128923       if (devinfo->is_haswell) {
128931       if (devinfo->is_g4x) {
128951 FRAMEDELTAQPRANGE_FrameDeltaQPRange_bits(const struct gen_device_info *devinfo)
128953    switch (devinfo->gen) {
128959       if (devinfo->is_haswell) {
128967       if (devinfo->is_g4x) {
128984 FRAMEDELTAQPRANGE_FrameDeltaQPRange_start(const struct gen_device_info *devinfo)
128986    switch (devinfo->gen) {
128992       if (devinfo->is_haswell) {
129000       if (devinfo->is_g4x) {
129022 GATHER_CONSTANT_ENTRY_length(const struct gen_device_info *devinfo)
129024    switch (devinfo->gen) {
129030       if (devinfo->is_haswell) {
129038       if (devinfo->is_g4x) {
129060 GATHER_CONSTANT_ENTRY_BindingTableIndexOffset_bits(const struct gen_device_info *devinfo)
129062    switch (devinfo->gen) {
129068       if (devinfo->is_haswell) {
129076       if (devinfo->is_g4x) {
129095 GATHER_CONSTANT_ENTRY_BindingTableIndexOffset_start(const struct gen_device_info *devinfo)
129097    switch (devinfo->gen) {
129103       if (devinfo->is_haswell) {
129111       if (devinfo->is_g4x) {
129133 GATHER_CONSTANT_ENTRY_ChannelMask_bits(const struct gen_device_info *devinfo)
129135    switch (devinfo->gen) {
129141       if (devinfo->is_haswell) {
129149       if (devinfo->is_g4x) {
129168 GATHER_CONSTANT_ENTRY_ChannelMask_start(const struct gen_device_info *devinfo)
129170    switch (devinfo->gen) {
129176       if (devinfo->is_haswell) {
129184       if (devinfo->is_g4x) {
129206 GATHER_CONSTANT_ENTRY_ConstantBufferOffset_bits(const struct gen_device_info *devinfo)
129208    switch (devinfo->gen) {
129214       if (devinfo->is_haswell) {
129222       if (devinfo->is_g4x) {
129241 GATHER_CONSTANT_ENTRY_ConstantBufferOffset_start(const struct gen_device_info *devinfo)
129243    switch (devinfo->gen) {
129249       if (devinfo->is_haswell) {
129257       if (devinfo->is_g4x) {
129279 GFX_ARB_ERROR_RPT_length(const struct gen_device_info *devinfo)
129281    switch (devinfo->gen) {
129287       if (devinfo->is_haswell) {
129295       if (devinfo->is_g4x) {
129315 GFX_ARB_ERROR_RPT_ContextPageFaultError_bits(const struct gen_device_info *devinfo)
129317    switch (devinfo->gen) {
129323       if (devinfo->is_haswell) {
129331       if (devinfo->is_g4x) {
129348 GFX_ARB_ERROR_RPT_ContextPageFaultError_start(const struct gen_device_info *devinfo)
129350    switch (devinfo->gen) {
129356       if (devinfo->is_haswell) {
129364       if (devinfo->is_g4x) {
129384 GFX_ARB_ERROR_RPT_ContextPageVTDTranslationError_bits(const struct gen_device_info *devinfo)
129386    switch (devinfo->gen) {
129392       if (devinfo->is_haswell) {
129400       if (devinfo->is_g4x) {
129417 GFX_ARB_ERROR_RPT_ContextPageVTDTranslationError_start(const struct gen_device_info *devinfo)
129419    switch (devinfo->gen) {
129425       if (devinfo->is_haswell) {
129433       if (devinfo->is_g4x) {
129452 GFX_ARB_ERROR_RPT_ContextWasNotMarkedAsPresentWhenDoingDMA_bits(const struct gen_device_info *devinfo)
129454    switch (devinfo->gen) {
129460       if (devinfo->is_haswell) {
129468       if (devinfo->is_g4x) {
129484 GFX_ARB_ERROR_RPT_ContextWasNotMarkedAsPresentWhenDoingDMA_start(const struct gen_device_info *devinfo)
129486    switch (devinfo->gen) {
129492       if (devinfo->is_haswell) {
129500       if (devinfo->is_g4x) {
129519 GFX_ARB_ERROR_RPT_GuCVTdtranslationPageFault2ndlevelUndefineddoorbell_bits(const struct gen_device_info *devinfo)
129521    switch (devinfo->gen) {
129527       if (devinfo->is_haswell) {
129535       if (devinfo->is_g4x) {
129551 GFX_ARB_ERROR_RPT_GuCVTdtranslationPageFault2ndlevelUndefineddoorbell_start(const struct gen_device_info *devinfo)
129553    switch (devinfo->gen) {
129559       if (devinfo->is_haswell) {
129567       if (devinfo->is_g4x) {
129587 GFX_ARB_ERROR_RPT_HardwareStatusPageFaultError_bits(const struct gen_device_info *devinfo)
129589    switch (devinfo->gen) {
129595       if (devinfo->is_haswell) {
129603       if (devinfo->is_g4x) {
129620 GFX_ARB_ERROR_RPT_HardwareStatusPageFaultError_start(const struct gen_device_info *devinfo)
129622    switch (devinfo->gen) {
129628       if (devinfo->is_haswell) {
129636       if (devinfo->is_g4x) {
129656 GFX_ARB_ERROR_RPT_HardwareStatusPageVTDTranslationError_bits(const struct gen_device_info *devinfo)
129658    switch (devinfo->gen) {
129664       if (devinfo->is_haswell) {
129672       if (devinfo->is_g4x) {
129689 GFX_ARB_ERROR_RPT_HardwareStatusPageVTDTranslationError_start(const struct gen_device_info *devinfo)
129691    switch (devinfo->gen) {
129697       if (devinfo->is_haswell) {
129705       if (devinfo->is_g4x) {
129724 GFX_ARB_ERROR_RPT_InvalidPageDirectoryEntryError_bits(const struct gen_device_info *devinfo)
129726    switch (devinfo->gen) {
129732       if (devinfo->is_haswell) {
129740       if (devinfo->is_g4x) {
129756 GFX_ARB_ERROR_RPT_InvalidPageDirectoryEntryError_start(const struct gen_device_info *devinfo)
129758    switch (devinfo->gen) {
129764       if (devinfo->is_haswell) {
129772       if (devinfo->is_g4x) {
129792 GFX_ARB_ERROR_RPT_InvalidPageDirectoryentryerror_bits(const struct gen_device_info *devinfo)
129794    switch (devinfo->gen) {
129800       if (devinfo->is_haswell) {
129808       if (devinfo->is_g4x) {
129825 GFX_ARB_ERROR_RPT_InvalidPageDirectoryentryerror_start(const struct gen_device_info *devinfo)
129827    switch (devinfo->gen) {
129833       if (devinfo->is_haswell) {
129841       if (devinfo->is_g4x) {
129860 GFX_ARB_ERROR_RPT_NonWBmemorytypeforAdvancedContext_bits(const struct gen_device_info *devinfo)
129862    switch (devinfo->gen) {
129868       if (devinfo->is_haswell) {
129876       if (devinfo->is_g4x) {
129892 GFX_ARB_ERROR_RPT_NonWBmemorytypeforAdvancedContext_start(const struct gen_device_info *devinfo)
129894    switch (devinfo->gen) {
129900       if (devinfo->is_haswell) {
129908       if (devinfo->is_g4x) {
129927 GFX_ARB_ERROR_RPT_PASIDBoundaryViolation_bits(const struct gen_device_info *devinfo)
129929    switch (devinfo->gen) {
129935       if (devinfo->is_haswell) {
129943       if (devinfo->is_g4x) {
129959 GFX_ARB_ERROR_RPT_PASIDBoundaryViolation_start(const struct gen_device_info *devinfo)
129961    switch (devinfo->gen) {
129967       if (devinfo->is_haswell) {
129975       if (devinfo->is_g4x) {
129994 GFX_ARB_ERROR_RPT_PASIDNotEnabled_bits(const struct gen_device_info *devinfo)
129996    switch (devinfo->gen) {
130002       if (devinfo->is_haswell) {
130010       if (devinfo->is_g4x) {
130026 GFX_ARB_ERROR_RPT_PASIDNotEnabled_start(const struct gen_device_info *devinfo)
130028    switch (devinfo->gen) {
130034       if (devinfo->is_haswell) {
130042       if (devinfo->is_g4x) {
130061 GFX_ARB_ERROR_RPT_PASIDNotValid_bits(const struct gen_device_info *devinfo)
130063    switch (devinfo->gen) {
130069       if (devinfo->is_haswell) {
130077       if (devinfo->is_g4x) {
130093 GFX_ARB_ERROR_RPT_PASIDNotValid_start(const struct gen_device_info *devinfo)
130095    switch (devinfo->gen) {
130101       if (devinfo->is_haswell) {
130109       if (devinfo->is_g4x) {
130128 GFX_ARB_ERROR_RPT_PASIDWasZeroForUntranslatedRequest_bits(const struct gen_device_info *devinfo)
130130    switch (devinfo->gen) {
130136       if (devinfo->is_haswell) {
130144       if (devinfo->is_g4x) {
130160 GFX_ARB_ERROR_RPT_PASIDWasZeroForUntranslatedRequest_start(const struct gen_device_info *devinfo)
130162    switch (devinfo->gen) {
130168       if (devinfo->is_haswell) {
130176       if (devinfo->is_g4x) {
130198 GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_bits(const struct gen_device_info *devinfo)
130200    switch (devinfo->gen) {
130206       if (devinfo->is_haswell) {
130214       if (devinfo->is_g4x) {
130233 GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_start(const struct gen_device_info *devinfo)
130235    switch (devinfo->gen) {
130241       if (devinfo->is_haswell) {
130249       if (devinfo->is_g4x) {
130267 GFX_ARB_ERROR_RPT_PendingPageFaults_bits(const struct gen_device_info *devinfo)
130269    switch (devinfo->gen) {
130275       if (devinfo->is_haswell) {
130283       if (devinfo->is_g4x) {
130298 GFX_ARB_ERROR_RPT_PendingPageFaults_start(const struct gen_device_info *devinfo)
130300    switch (devinfo->gen) {
130306       if (devinfo->is_haswell) {
130314       if (devinfo->is_g4x) {
130333 GFX_ARB_ERROR_RPT_ROSTRMPAVPInvalidPhysicalAddress_bits(const struct gen_device_info *devinfo)
130335    switch (devinfo->gen) {
130341       if (devinfo->is_haswell) {
130349       if (devinfo->is_g4x) {
130365 GFX_ARB_ERROR_RPT_ROSTRMPAVPInvalidPhysicalAddress_start(const struct gen_device_info *devinfo)
130367    switch (devinfo->gen) {
130373       if (devinfo->is_haswell) {
130381       if (devinfo->is_g4x) {
130400 GFX_ARB_ERROR_RPT_RSTRMPAVPReadInvalid_bits(const struct gen_device_info *devinfo)
130402    switch (devinfo->gen) {
130408       if (devinfo->is_haswell) {
130416       if (devinfo->is_g4x) {
130432 GFX_ARB_ERROR_RPT_RSTRMPAVPReadInvalid_start(const struct gen_device_info *devinfo)
130434    switch (devinfo->gen) {
130440       if (devinfo->is_haswell) {
130448       if (devinfo->is_g4x) {
130470 GFX_ARB_ERROR_RPT_TLBPageFaultError_bits(const struct gen_device_info *devinfo)
130472    switch (devinfo->gen) {
130478       if (devinfo->is_haswell) {
130486       if (devinfo->is_g4x) {
130505 GFX_ARB_ERROR_RPT_TLBPageFaultError_start(const struct gen_device_info *devinfo)
130507    switch (devinfo->gen) {
130513       if (devinfo->is_haswell) {
130521       if (devinfo->is_g4x) {
130543 GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_bits(const struct gen_device_info *devinfo)
130545    switch (devinfo->gen) {
130551       if (devinfo->is_haswell) {
130559       if (devinfo->is_g4x) {
130578 GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_start(const struct gen_device_info *devinfo)
130580    switch (devinfo->gen) {
130586       if (devinfo->is_haswell) {
130594       if (devinfo->is_g4x) {
130616 GFX_ARB_ERROR_RPT_UnloadedPDError_bits(const struct gen_device_info *devinfo)
130618    switch (devinfo->gen) {
130624       if (devinfo->is_haswell) {
130632       if (devinfo->is_g4x) {
130651 GFX_ARB_ERROR_RPT_UnloadedPDError_start(const struct gen_device_info *devinfo)
130653    switch (devinfo->gen) {
130659       if (devinfo->is_haswell) {
130667       if (devinfo->is_g4x) {
130686 GFX_ARB_ERROR_RPT_WRDPPAVPInvalid_bits(const struct gen_device_info *devinfo)
130688    switch (devinfo->gen) {
130694       if (devinfo->is_haswell) {
130702       if (devinfo->is_g4x) {
130718 GFX_ARB_ERROR_RPT_WRDPPAVPInvalid_start(const struct gen_device_info *devinfo)
130720    switch (devinfo->gen) {
130726       if (devinfo->is_haswell) {
130734       if (devinfo->is_g4x) {
130754 GPGPU_CSR_BASE_ADDRESS_length(const struct gen_device_info *devinfo)
130756    switch (devinfo->gen) {
130762       if (devinfo->is_haswell) {
130770       if (devinfo->is_g4x) {
130790 GPGPU_CSR_BASE_ADDRESS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
130792    switch (devinfo->gen) {
130798       if (devinfo->is_haswell) {
130806       if (devinfo->is_g4x) {
130823 GPGPU_CSR_BASE_ADDRESS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
130825    switch (devinfo->gen) {
130831       if (devinfo->is_haswell) {
130839       if (devinfo->is_g4x) {
130859 GPGPU_CSR_BASE_ADDRESS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
130861    switch (devinfo->gen) {
130867       if (devinfo->is_haswell) {
130875       if (devinfo->is_g4x) {
130892 GPGPU_CSR_BASE_ADDRESS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
130894    switch (devinfo->gen) {
130900       if (devinfo->is_haswell) {
130908       if (devinfo->is_g4x) {
130928 GPGPU_CSR_BASE_ADDRESS_CommandSubType_bits(const struct gen_device_info *devinfo)
130930    switch (devinfo->gen) {
130936       if (devinfo->is_haswell) {
130944       if (devinfo->is_g4x) {
130961 GPGPU_CSR_BASE_ADDRESS_CommandSubType_start(const struct gen_device_info *devinfo)
130963    switch (devinfo->gen) {
130969       if (devinfo->is_haswell) {
130977       if (devinfo->is_g4x) {
130997 GPGPU_CSR_BASE_ADDRESS_CommandType_bits(const struct gen_device_info *devinfo)
130999    switch (devinfo->gen) {
131005       if (devinfo->is_haswell) {
131013       if (devinfo->is_g4x) {
131030 GPGPU_CSR_BASE_ADDRESS_CommandType_start(const struct gen_device_info *devinfo)
131032    switch (devinfo->gen) {
131038       if (devinfo->is_haswell) {
131046       if (devinfo->is_g4x) {
131066 GPGPU_CSR_BASE_ADDRESS_DWordLength_bits(const struct gen_device_info *devinfo)
131068    switch (devinfo->gen) {
131074       if (devinfo->is_haswell) {
131082       if (devinfo->is_g4x) {
131099 GPGPU_CSR_BASE_ADDRESS_DWordLength_start(const struct gen_device_info *devinfo)
131101    switch (devinfo->gen) {
131107       if (devinfo->is_haswell) {
131115       if (devinfo->is_g4x) {
131135 GPGPU_CSR_BASE_ADDRESS_GPGPUCSRBaseAddress_bits(const struct gen_device_info *devinfo)
131137    switch (devinfo->gen) {
131143       if (devinfo->is_haswell) {
131151       if (devinfo->is_g4x) {
131168 GPGPU_CSR_BASE_ADDRESS_GPGPUCSRBaseAddress_start(const struct gen_device_info *devinfo)
131170    switch (devinfo->gen) {
131176       if (devinfo->is_haswell) {
131184       if (devinfo->is_g4x) {
131203 GPGPU_OBJECT_length(const struct gen_device_info *devinfo)
131205    switch (devinfo->gen) {
131211       if (devinfo->is_haswell) {
131219       if (devinfo->is_g4x) {
131238 GPGPU_OBJECT_CommandType_bits(const struct gen_device_info *devinfo)
131240    switch (devinfo->gen) {
131246       if (devinfo->is_haswell) {
131254       if (devinfo->is_g4x) {
131270 GPGPU_OBJECT_CommandType_start(const struct gen_device_info *devinfo)
131272    switch (devinfo->gen) {
131278       if (devinfo->is_haswell) {
131286       if (devinfo->is_g4x) {
131305 GPGPU_OBJECT_DWordLength_bits(const struct gen_device_info *devinfo)
131307    switch (devinfo->gen) {
131313       if (devinfo->is_haswell) {
131321       if (devinfo->is_g4x) {
131337 GPGPU_OBJECT_DWordLength_start(const struct gen_device_info *devinfo)
131339    switch (devinfo->gen) {
131345       if (devinfo->is_haswell) {
131353       if (devinfo->is_g4x) {
131372 GPGPU_OBJECT_EndofThreadGroup_bits(const struct gen_device_info *devinfo)
131374    switch (devinfo->gen) {
131380       if (devinfo->is_haswell) {
131388       if (devinfo->is_g4x) {
131404 GPGPU_OBJECT_EndofThreadGroup_start(const struct gen_device_info *devinfo)
131406    switch (devinfo->gen) {
131412       if (devinfo->is_haswell) {
131420       if (devinfo->is_g4x) {
131439 GPGPU_OBJECT_ExecutionMask_bits(const struct gen_device_info *devinfo)
131441    switch (devinfo->gen) {
131447       if (devinfo->is_haswell) {
131455       if (devinfo->is_g4x) {
131471 GPGPU_OBJECT_ExecutionMask_start(const struct gen_device_info *devinfo)
131473    switch (devinfo->gen) {
131479       if (devinfo->is_haswell) {
131487       if (devinfo->is_g4x) {
131506 GPGPU_OBJECT_HalfSliceDestinationSelect_bits(const struct gen_device_info *devinfo)
131508    switch (devinfo->gen) {
131514       if (devinfo->is_haswell) {
131522       if (devinfo->is_g4x) {
131538 GPGPU_OBJECT_HalfSliceDestinationSelect_start(const struct gen_device_info *devinfo)
131540    switch (devinfo->gen) {
131546       if (devinfo->is_haswell) {
131554       if (devinfo->is_g4x) {
131573 GPGPU_OBJECT_IndirectDataLength_bits(const struct gen_device_info *devinfo)
131575    switch (devinfo->gen) {
131581       if (devinfo->is_haswell) {
131589       if (devinfo->is_g4x) {
131605 GPGPU_OBJECT_IndirectDataLength_start(const struct gen_device_info *devinfo)
131607    switch (devinfo->gen) {
131613       if (devinfo->is_haswell) {
131621       if (devinfo->is_g4x) {
131640 GPGPU_OBJECT_IndirectDataStartAddress_bits(const struct gen_device_info *devinfo)
131642    switch (devinfo->gen) {
131648       if (devinfo->is_haswell) {
131656       if (devinfo->is_g4x) {
131672 GPGPU_OBJECT_IndirectDataStartAddress_start(const struct gen_device_info *devinfo)
131674    switch (devinfo->gen) {
131680       if (devinfo->is_haswell) {
131688       if (devinfo->is_g4x) {
131707 GPGPU_OBJECT_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
131709    switch (devinfo->gen) {
131715       if (devinfo->is_haswell) {
131723       if (devinfo->is_g4x) {
131739 GPGPU_OBJECT_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
131741    switch (devinfo->gen) {
131747       if (devinfo->is_haswell) {
131755       if (devinfo->is_g4x) {
131774 GPGPU_OBJECT_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
131776    switch (devinfo->gen) {
131782       if (devinfo->is_haswell) {
131790       if (devinfo->is_g4x) {
131806 GPGPU_OBJECT_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
131808    switch (devinfo->gen) {
131814       if (devinfo->is_haswell) {
131822       if (devinfo->is_g4x) {
131841 GPGPU_OBJECT_Pipeline_bits(const struct gen_device_info *devinfo)
131843    switch (devinfo->gen) {
131849       if (devinfo->is_haswell) {
131857       if (devinfo->is_g4x) {
131873 GPGPU_OBJECT_Pipeline_start(const struct gen_device_info *devinfo)
131875    switch (devinfo->gen) {
131881       if (devinfo->is_haswell) {
131889       if (devinfo->is_g4x) {
131908 GPGPU_OBJECT_PredicateEnable_bits(const struct gen_device_info *devinfo)
131910    switch (devinfo->gen) {
131916       if (devinfo->is_haswell) {
131924       if (devinfo->is_g4x) {
131940 GPGPU_OBJECT_PredicateEnable_start(const struct gen_device_info *devinfo)
131942    switch (devinfo->gen) {
131948       if (devinfo->is_haswell) {
131956       if (devinfo->is_g4x) {
131975 GPGPU_OBJECT_SharedLocalMemoryFixedOffset_bits(const struct gen_device_info *devinfo)
131977    switch (devinfo->gen) {
131983       if (devinfo->is_haswell) {
131991       if (devinfo->is_g4x) {
132007 GPGPU_OBJECT_SharedLocalMemoryFixedOffset_start(const struct gen_device_info *devinfo)
132009    switch (devinfo->gen) {
132015       if (devinfo->is_haswell) {
132023       if (devinfo->is_g4x) {
132042 GPGPU_OBJECT_SharedLocalMemoryOffset_bits(const struct gen_device_info *devinfo)
132044    switch (devinfo->gen) {
132050       if (devinfo->is_haswell) {
132058       if (devinfo->is_g4x) {
132074 GPGPU_OBJECT_SharedLocalMemoryOffset_start(const struct gen_device_info *devinfo)
132076    switch (devinfo->gen) {
132082       if (devinfo->is_haswell) {
132090       if (devinfo->is_g4x) {
132108 GPGPU_OBJECT_SliceDestinationSelect_bits(const struct gen_device_info *devinfo)
132110    switch (devinfo->gen) {
132116       if (devinfo->is_haswell) {
132124       if (devinfo->is_g4x) {
132139 GPGPU_OBJECT_SliceDestinationSelect_start(const struct gen_device_info *devinfo)
132141    switch (devinfo->gen) {
132147       if (devinfo->is_haswell) {
132155       if (devinfo->is_g4x) {
132174 GPGPU_OBJECT_SubOpcode_bits(const struct gen_device_info *devinfo)
132176    switch (devinfo->gen) {
132182       if (devinfo->is_haswell) {
132190       if (devinfo->is_g4x) {
132206 GPGPU_OBJECT_SubOpcode_start(const struct gen_device_info *devinfo)
132208    switch (devinfo->gen) {
132214       if (devinfo->is_haswell) {
132222       if (devinfo->is_g4x) {
132241 GPGPU_OBJECT_ThreadGroupIDX_bits(const struct gen_device_info *devinfo)
132243    switch (devinfo->gen) {
132249       if (devinfo->is_haswell) {
132257       if (devinfo->is_g4x) {
132273 GPGPU_OBJECT_ThreadGroupIDX_start(const struct gen_device_info *devinfo)
132275    switch (devinfo->gen) {
132281       if (devinfo->is_haswell) {
132289       if (devinfo->is_g4x) {
132308 GPGPU_OBJECT_ThreadGroupIDY_bits(const struct gen_device_info *devinfo)
132310    switch (devinfo->gen) {
132316       if (devinfo->is_haswell) {
132324       if (devinfo->is_g4x) {
132340 GPGPU_OBJECT_ThreadGroupIDY_start(const struct gen_device_info *devinfo)
132342    switch (devinfo->gen) {
132348       if (devinfo->is_haswell) {
132356       if (devinfo->is_g4x) {
132375 GPGPU_OBJECT_ThreadGroupIDZ_bits(const struct gen_device_info *devinfo)
132377    switch (devinfo->gen) {
132383       if (devinfo->is_haswell) {
132391       if (devinfo->is_g4x) {
132407 GPGPU_OBJECT_ThreadGroupIDZ_start(const struct gen_device_info *devinfo)
132409    switch (devinfo->gen) {
132415       if (devinfo->is_haswell) {
132423       if (devinfo->is_g4x) {
132446 GPGPU_WALKER_length(const struct gen_device_info *devinfo)
132448    switch (devinfo->gen) {
132454       if (devinfo->is_haswell) {
132462       if (devinfo->is_g4x) {
132485 GPGPU_WALKER_BottomExecutionMask_bits(const struct gen_device_info *devinfo)
132487    switch (devinfo->gen) {
132493       if (devinfo->is_haswell) {
132501       if (devinfo->is_g4x) {
132521 GPGPU_WALKER_BottomExecutionMask_start(const struct gen_device_info *devinfo)
132523    switch (devinfo->gen) {
132529       if (devinfo->is_haswell) {
132537       if (devinfo->is_g4x) {
132560 GPGPU_WALKER_CommandType_bits(const struct gen_device_info *devinfo)
132562    switch (devinfo->gen) {
132568       if (devinfo->is_haswell) {
132576       if (devinfo->is_g4x) {
132596 GPGPU_WALKER_CommandType_start(const struct gen_device_info *devinfo)
132598    switch (devinfo->gen) {
132604       if (devinfo->is_haswell) {
132612       if (devinfo->is_g4x) {
132635 GPGPU_WALKER_DWordLength_bits(const struct gen_device_info *devinfo)
132637    switch (devinfo->gen) {
132643       if (devinfo->is_haswell) {
132651       if (devinfo->is_g4x) {
132671 GPGPU_WALKER_DWordLength_start(const struct gen_device_info *devinfo)
132673    switch (devinfo->gen) {
132679       if (devinfo->is_haswell) {
132687       if (devinfo->is_g4x) {
132708 GPGPU_WALKER_IndirectDataLength_bits(const struct gen_device_info *devinfo)
132710    switch (devinfo->gen) {
132716       if (devinfo->is_haswell) {
132724       if (devinfo->is_g4x) {
132742 GPGPU_WALKER_IndirectDataLength_start(const struct gen_device_info *devinfo)
132744    switch (devinfo->gen) {
132750       if (devinfo->is_haswell) {
132758       if (devinfo->is_g4x) {
132779 GPGPU_WALKER_IndirectDataStartAddress_bits(const struct gen_device_info *devinfo)
132781    switch (devinfo->gen) {
132787       if (devinfo->is_haswell) {
132795       if (devinfo->is_g4x) {
132813 GPGPU_WALKER_IndirectDataStartAddress_start(const struct gen_device_info *devinfo)
132815    switch (devinfo->gen) {
132821       if (devinfo->is_haswell) {
132829       if (devinfo->is_g4x) {
132852 GPGPU_WALKER_IndirectParameterEnable_bits(const struct gen_device_info *devinfo)
132854    switch (devinfo->gen) {
132860       if (devinfo->is_haswell) {
132868       if (devinfo->is_g4x) {
132888 GPGPU_WALKER_IndirectParameterEnable_start(const struct gen_device_info *devinfo)
132890    switch (devinfo->gen) {
132896       if (devinfo->is_haswell) {
132904       if (devinfo->is_g4x) {
132927 GPGPU_WALKER_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
132929    switch (devinfo->gen) {
132935       if (devinfo->is_haswell) {
132943       if (devinfo->is_g4x) {
132963 GPGPU_WALKER_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
132965    switch (devinfo->gen) {
132971       if (devinfo->is_haswell) {
132979       if (devinfo->is_g4x) {
133002 GPGPU_WALKER_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
133004    switch (devinfo->gen) {
133010       if (devinfo->is_haswell) {
133018       if (devinfo->is_g4x) {
133038 GPGPU_WALKER_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
133040    switch (devinfo->gen) {
133046       if (devinfo->is_haswell) {
133054       if (devinfo->is_g4x) {
133077 GPGPU_WALKER_Pipeline_bits(const struct gen_device_info *devinfo)
133079    switch (devinfo->gen) {
133085       if (devinfo->is_haswell) {
133093       if (devinfo->is_g4x) {
133113 GPGPU_WALKER_Pipeline_start(const struct gen_device_info *devinfo)
133115    switch (devinfo->gen) {
133121       if (devinfo->is_haswell) {
133129       if (devinfo->is_g4x) {
133152 GPGPU_WALKER_PredicateEnable_bits(const struct gen_device_info *devinfo)
133154    switch (devinfo->gen) {
133160       if (devinfo->is_haswell) {
133168       if (devinfo->is_g4x) {
133188 GPGPU_WALKER_PredicateEnable_start(const struct gen_device_info *devinfo)
133190    switch (devinfo->gen) {
133196       if (devinfo->is_haswell) {
133204       if (devinfo->is_g4x) {
133227 GPGPU_WALKER_RightExecutionMask_bits(const struct gen_device_info *devinfo)
133229    switch (devinfo->gen) {
133235       if (devinfo->is_haswell) {
133243       if (devinfo->is_g4x) {
133263 GPGPU_WALKER_RightExecutionMask_start(const struct gen_device_info *devinfo)
133265    switch (devinfo->gen) {
133271       if (devinfo->is_haswell) {
133279       if (devinfo->is_g4x) {
133302 GPGPU_WALKER_SIMDSize_bits(const struct gen_device_info *devinfo)
133304    switch (devinfo->gen) {
133310       if (devinfo->is_haswell) {
133318       if (devinfo->is_g4x) {
133338 GPGPU_WALKER_SIMDSize_start(const struct gen_device_info *devinfo)
133340    switch (devinfo->gen) {
133346       if (devinfo->is_haswell) {
133354       if (devinfo->is_g4x) {
133375 GPGPU_WALKER_SubOpcode_bits(const struct gen_device_info *devinfo)
133377    switch (devinfo->gen) {
133383       if (devinfo->is_haswell) {
133391       if (devinfo->is_g4x) {
133409 GPGPU_WALKER_SubOpcode_start(const struct gen_device_info *devinfo)
133411    switch (devinfo->gen) {
133417       if (devinfo->is_haswell) {
133425       if (devinfo->is_g4x) {
133444 GPGPU_WALKER_SubOpcodeA_bits(const struct gen_device_info *devinfo)
133446    switch (devinfo->gen) {
133452       if (devinfo->is_haswell) {
133460       if (devinfo->is_g4x) {
133476 GPGPU_WALKER_SubOpcodeA_start(const struct gen_device_info *devinfo)
133478    switch (devinfo->gen) {
133484       if (devinfo->is_haswell) {
133492       if (devinfo->is_g4x) {
133515 GPGPU_WALKER_ThreadDepthCounterMaximum_bits(const struct gen_device_info *devinfo)
133517    switch (devinfo->gen) {
133523       if (devinfo->is_haswell) {
133531       if (devinfo->is_g4x) {
133551 GPGPU_WALKER_ThreadDepthCounterMaximum_start(const struct gen_device_info *devinfo)
133553    switch (devinfo->gen) {
133559       if (devinfo->is_haswell) {
133567       if (devinfo->is_g4x) {
133590 GPGPU_WALKER_ThreadGroupIDStartingX_bits(const struct gen_device_info *devinfo)
133592    switch (devinfo->gen) {
133598       if (devinfo->is_haswell) {
133606       if (devinfo->is_g4x) {
133626 GPGPU_WALKER_ThreadGroupIDStartingX_start(const struct gen_device_info *devinfo)
133628    switch (devinfo->gen) {
133634       if (devinfo->is_haswell) {
133642       if (devinfo->is_g4x) {
133665 GPGPU_WALKER_ThreadGroupIDStartingY_bits(const struct gen_device_info *devinfo)
133667    switch (devinfo->gen) {
133673       if (devinfo->is_haswell) {
133681       if (devinfo->is_g4x) {
133701 GPGPU_WALKER_ThreadGroupIDStartingY_start(const struct gen_device_info *devinfo)
133703    switch (devinfo->gen) {
133709       if (devinfo->is_haswell) {
133717       if (devinfo->is_g4x) {
133736 GPGPU_WALKER_ThreadGroupIDStartingZ_bits(const struct gen_device_info *devinfo)
133738    switch (devinfo->gen) {
133744       if (devinfo->is_haswell) {
133752       if (devinfo->is_g4x) {
133768 GPGPU_WALKER_ThreadGroupIDStartingZ_start(const struct gen_device_info *devinfo)
133770    switch (devinfo->gen) {
133776       if (devinfo->is_haswell) {
133784       if (devinfo->is_g4x) {
133805 GPGPU_WALKER_ThreadGroupIDStartingResumeZ_bits(const struct gen_device_info *devinfo)
133807    switch (devinfo->gen) {
133813       if (devinfo->is_haswell) {
133821       if (devinfo->is_g4x) {
133839 GPGPU_WALKER_ThreadGroupIDStartingResumeZ_start(const struct gen_device_info *devinfo)
133841    switch (devinfo->gen) {
133847       if (devinfo->is_haswell) {
133855       if (devinfo->is_g4x) {
133878 GPGPU_WALKER_ThreadGroupIDXDimension_bits(const struct gen_device_info *devinfo)
133880    switch (devinfo->gen) {
133886       if (devinfo->is_haswell) {
133894       if (devinfo->is_g4x) {
133914 GPGPU_WALKER_ThreadGroupIDXDimension_start(const struct gen_device_info *devinfo)
133916    switch (devinfo->gen) {
133922       if (devinfo->is_haswell) {
133930       if (devinfo->is_g4x) {
133953 GPGPU_WALKER_ThreadGroupIDYDimension_bits(const struct gen_device_info *devinfo)
133955    switch (devinfo->gen) {
133961       if (devinfo->is_haswell) {
133969       if (devinfo->is_g4x) {
133989 GPGPU_WALKER_ThreadGroupIDYDimension_start(const struct gen_device_info *devinfo)
133991    switch (devinfo->gen) {
133997       if (devinfo->is_haswell) {
134005       if (devinfo->is_g4x) {
134028 GPGPU_WALKER_ThreadGroupIDZDimension_bits(const struct gen_device_info *devinfo)
134030    switch (devinfo->gen) {
134036       if (devinfo->is_haswell) {
134044       if (devinfo->is_g4x) {
134064 GPGPU_WALKER_ThreadGroupIDZDimension_start(const struct gen_device_info *devinfo)
134066    switch (devinfo->gen) {
134072       if (devinfo->is_haswell) {
134080       if (devinfo->is_g4x) {
134103 GPGPU_WALKER_ThreadHeightCounterMaximum_bits(const struct gen_device_info *devinfo)
134105    switch (devinfo->gen) {
134111       if (devinfo->is_haswell) {
134119       if (devinfo->is_g4x) {
134139 GPGPU_WALKER_ThreadHeightCounterMaximum_start(const struct gen_device_info *devinfo)
134141    switch (devinfo->gen) {
134147       if (devinfo->is_haswell) {
134155       if (devinfo->is_g4x) {
134178 GPGPU_WALKER_ThreadWidthCounterMaximum_bits(const struct gen_device_info *devinfo)
134180    switch (devinfo->gen) {
134186       if (devinfo->is_haswell) {
134194       if (devinfo->is_g4x) {
134214 GPGPU_WALKER_ThreadWidthCounterMaximum_start(const struct gen_device_info *devinfo)
134216    switch (devinfo->gen) {
134222       if (devinfo->is_haswell) {
134230       if (devinfo->is_g4x) {
134253 GS_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
134255    switch (devinfo->gen) {
134261       if (devinfo->is_haswell) {
134269       if (devinfo->is_g4x) {
134292 GS_INVOCATION_COUNT_GSInvocationCountReport_bits(const struct gen_device_info *devinfo)
134294    switch (devinfo->gen) {
134300       if (devinfo->is_haswell) {
134308       if (devinfo->is_g4x) {
134328 GS_INVOCATION_COUNT_GSInvocationCountReport_start(const struct gen_device_info *devinfo)
134330    switch (devinfo->gen) {
134336       if (devinfo->is_haswell) {
134344       if (devinfo->is_g4x) {
134367 GS_PRIMITIVES_COUNT_length(const struct gen_device_info *devinfo)
134369    switch (devinfo->gen) {
134375       if (devinfo->is_haswell) {
134383       if (devinfo->is_g4x) {
134406 GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_bits(const struct gen_device_info *devinfo)
134408    switch (devinfo->gen) {
134414       if (devinfo->is_haswell) {
134422       if (devinfo->is_g4x) {
134442 GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_start(const struct gen_device_info *devinfo)
134444    switch (devinfo->gen) {
134450       if (devinfo->is_haswell) {
134458       if (devinfo->is_g4x) {
134478 GS_STATE_length(const struct gen_device_info *devinfo)
134480    switch (devinfo->gen) {
134486       if (devinfo->is_haswell) {
134494       if (devinfo->is_g4x) {
134514 GS_STATE_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
134516    switch (devinfo->gen) {
134522       if (devinfo->is_haswell) {
134530       if (devinfo->is_g4x) {
134547 GS_STATE_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
134549    switch (devinfo->gen) {
134555       if (devinfo->is_haswell) {
134563       if (devinfo->is_g4x) {
134583 GS_STATE_ConstantURBEntryReadLength_bits(const struct gen_device_info *devinfo)
134585    switch (devinfo->gen) {
134591       if (devinfo->is_haswell) {
134599       if (devinfo->is_g4x) {
134616 GS_STATE_ConstantURBEntryReadLength_start(const struct gen_device_info *devinfo)
134618    switch (devinfo->gen) {
134624       if (devinfo->is_haswell) {
134632       if (devinfo->is_g4x) {
134652 GS_STATE_ConstantURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
134654    switch (devinfo->gen) {
134660       if (devinfo->is_haswell) {
134668       if (devinfo->is_g4x) {
134685 GS_STATE_ConstantURBEntryReadOffset_start(const struct gen_device_info *devinfo)
134687    switch (devinfo->gen) {
134693       if (devinfo->is_haswell) {
134701       if (devinfo->is_g4x) {
134720 GS_STATE_DiscardAdjacency_bits(const struct gen_device_info *devinfo)
134722    switch (devinfo->gen) {
134728       if (devinfo->is_haswell) {
134736       if (devinfo->is_g4x) {
134752 GS_STATE_DiscardAdjacency_start(const struct gen_device_info *devinfo)
134754    switch (devinfo->gen) {
134760       if (devinfo->is_haswell) {
134768       if (devinfo->is_g4x) {
134788 GS_STATE_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
134790    switch (devinfo->gen) {
134796       if (devinfo->is_haswell) {
134804       if (devinfo->is_g4x) {
134821 GS_STATE_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
134823    switch (devinfo->gen) {
134829       if (devinfo->is_haswell) {
134837       if (devinfo->is_g4x) {
134857 GS_STATE_FloatingPointMode_bits(const struct gen_device_info *devinfo)
134859    switch (devinfo->gen) {
134865       if (devinfo->is_haswell) {
134873       if (devinfo->is_g4x) {
134890 GS_STATE_FloatingPointMode_start(const struct gen_device_info *devinfo)
134892    switch (devinfo->gen) {
134898       if (devinfo->is_haswell) {
134906       if (devinfo->is_g4x) {
134926 GS_STATE_GRFRegisterCount_bits(const struct gen_device_info *devinfo)
134928    switch (devinfo->gen) {
134934       if (devinfo->is_haswell) {
134942       if (devinfo->is_g4x) {
134959 GS_STATE_GRFRegisterCount_start(const struct gen_device_info *devinfo)
134961    switch (devinfo->gen) {
134967       if (devinfo->is_haswell) {
134975       if (devinfo->is_g4x) {
134994 GS_STATE_GSStatisticsEnable_bits(const struct gen_device_info *devinfo)
134996    switch (devinfo->gen) {
135002       if (devinfo->is_haswell) {
135010       if (devinfo->is_g4x) {
135026 GS_STATE_GSStatisticsEnable_start(const struct gen_device_info *devinfo)
135028    switch (devinfo->gen) {
135034       if (devinfo->is_haswell) {
135042       if (devinfo->is_g4x) {
135062 GS_STATE_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
135064    switch (devinfo->gen) {
135070       if (devinfo->is_haswell) {
135078       if (devinfo->is_g4x) {
135095 GS_STATE_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
135097    switch (devinfo->gen) {
135103       if (devinfo->is_haswell) {
135111       if (devinfo->is_g4x) {
135131 GS_STATE_KernelStartPointer_bits(const struct gen_device_info *devinfo)
135133    switch (devinfo->gen) {
135139       if (devinfo->is_haswell) {
135147       if (devinfo->is_g4x) {
135164 GS_STATE_KernelStartPointer_start(const struct gen_device_info *devinfo)
135166    switch (devinfo->gen) {
135172       if (devinfo->is_haswell) {
135180       if (devinfo->is_g4x) {
135200 GS_STATE_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
135202    switch (devinfo->gen) {
135208       if (devinfo->is_haswell) {
135216       if (devinfo->is_g4x) {
135233 GS_STATE_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
135235    switch (devinfo->gen) {
135241       if (devinfo->is_haswell) {
135249       if (devinfo->is_g4x) {
135269 GS_STATE_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
135271    switch (devinfo->gen) {
135277       if (devinfo->is_haswell) {
135285       if (devinfo->is_g4x) {
135302 GS_STATE_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
135304    switch (devinfo->gen) {
135310       if (devinfo->is_haswell) {
135318       if (devinfo->is_g4x) {
135338 GS_STATE_MaximumVPIndex_bits(const struct gen_device_info *devinfo)
135340    switch (devinfo->gen) {
135346       if (devinfo->is_haswell) {
135354       if (devinfo->is_g4x) {
135371 GS_STATE_MaximumVPIndex_start(const struct gen_device_info *devinfo)
135373    switch (devinfo->gen) {
135379       if (devinfo->is_haswell) {
135387       if (devinfo->is_g4x) {
135407 GS_STATE_NumberofURBEntries_bits(const struct gen_device_info *devinfo)
135409    switch (devinfo->gen) {
135415       if (devinfo->is_haswell) {
135423       if (devinfo->is_g4x) {
135440 GS_STATE_NumberofURBEntries_start(const struct gen_device_info *devinfo)
135442    switch (devinfo->gen) {
135448       if (devinfo->is_haswell) {
135456       if (devinfo->is_g4x) {
135476 GS_STATE_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
135478    switch (devinfo->gen) {
135484       if (devinfo->is_haswell) {
135492       if (devinfo->is_g4x) {
135509 GS_STATE_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
135511    switch (devinfo->gen) {
135517       if (devinfo->is_haswell) {
135525       if (devinfo->is_g4x) {
135543 GS_STATE_RenderingEnable_bits(const struct gen_device_info *devinfo)
135545    switch (devinfo->gen) {
135551       if (devinfo->is_haswell) {
135559       if (devinfo->is_g4x) {
135574 GS_STATE_RenderingEnable_start(const struct gen_device_info *devinfo)
135576    switch (devinfo->gen) {
135582       if (devinfo->is_haswell) {
135590       if (devinfo->is_g4x) {
135608 GS_STATE_RenderingEnabled_bits(const struct gen_device_info *devinfo)
135610    switch (devinfo->gen) {
135616       if (devinfo->is_haswell) {
135624       if (devinfo->is_g4x) {
135639 GS_STATE_RenderingEnabled_start(const struct gen_device_info *devinfo)
135641    switch (devinfo->gen) {
135647       if (devinfo->is_haswell) {
135655       if (devinfo->is_g4x) {
135675 GS_STATE_ReorderEnable_bits(const struct gen_device_info *devinfo)
135677    switch (devinfo->gen) {
135683       if (devinfo->is_haswell) {
135691       if (devinfo->is_g4x) {
135708 GS_STATE_ReorderEnable_start(const struct gen_device_info *devinfo)
135710    switch (devinfo->gen) {
135716       if (devinfo->is_haswell) {
135724       if (devinfo->is_g4x) {
135742 GS_STATE_SOStatisticsEnable_bits(const struct gen_device_info *devinfo)
135744    switch (devinfo->gen) {
135750       if (devinfo->is_haswell) {
135758       if (devinfo->is_g4x) {
135773 GS_STATE_SOStatisticsEnable_start(const struct gen_device_info *devinfo)
135775    switch (devinfo->gen) {
135781       if (devinfo->is_haswell) {
135789       if (devinfo->is_g4x) {
135809 GS_STATE_SamplerCount_bits(const struct gen_device_info *devinfo)
135811    switch (devinfo->gen) {
135817       if (devinfo->is_haswell) {
135825       if (devinfo->is_g4x) {
135842 GS_STATE_SamplerCount_start(const struct gen_device_info *devinfo)
135844    switch (devinfo->gen) {
135850       if (devinfo->is_haswell) {
135858       if (devinfo->is_g4x) {
135878 GS_STATE_SamplerStatePointer_bits(const struct gen_device_info *devinfo)
135880    switch (devinfo->gen) {
135886       if (devinfo->is_haswell) {
135894       if (devinfo->is_g4x) {
135911 GS_STATE_SamplerStatePointer_start(const struct gen_device_info *devinfo)
135913    switch (devinfo->gen) {
135919       if (devinfo->is_haswell) {
135927       if (devinfo->is_g4x) {
135947 GS_STATE_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
135949    switch (devinfo->gen) {
135955       if (devinfo->is_haswell) {
135963       if (devinfo->is_g4x) {
135980 GS_STATE_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
135982    switch (devinfo->gen) {
135988       if (devinfo->is_haswell) {
135996       if (devinfo->is_g4x) {
136016 GS_STATE_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
136018    switch (devinfo->gen) {
136024       if (devinfo->is_haswell) {
136032       if (devinfo->is_g4x) {
136049 GS_STATE_SingleProgramFlow_start(const struct gen_device_info *devinfo)
136051    switch (devinfo->gen) {
136057       if (devinfo->is_haswell) {
136065       if (devinfo->is_g4x) {
136085 GS_STATE_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
136087    switch (devinfo->gen) {
136093       if (devinfo->is_haswell) {
136101       if (devinfo->is_g4x) {
136118 GS_STATE_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
136120    switch (devinfo->gen) {
136126       if (devinfo->is_haswell) {
136134       if (devinfo->is_g4x) {
136154 GS_STATE_URBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
136156    switch (devinfo->gen) {
136162       if (devinfo->is_haswell) {
136170       if (devinfo->is_g4x) {
136187 GS_STATE_URBEntryAllocationSize_start(const struct gen_device_info *devinfo)
136189    switch (devinfo->gen) {
136195       if (devinfo->is_haswell) {
136203       if (devinfo->is_g4x) {
136223 GS_STATE_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
136225    switch (devinfo->gen) {
136231       if (devinfo->is_haswell) {
136239       if (devinfo->is_g4x) {
136256 GS_STATE_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
136258    switch (devinfo->gen) {
136264       if (devinfo->is_haswell) {
136272       if (devinfo->is_g4x) {
136292 GS_STATE_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
136294    switch (devinfo->gen) {
136300       if (devinfo->is_haswell) {
136308       if (devinfo->is_g4x) {
136325 GS_STATE_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
136327    switch (devinfo->gen) {
136333       if (devinfo->is_haswell) {
136341       if (devinfo->is_g4x) {
136359 HALF_SLICE_CHICKEN7_length(const struct gen_device_info *devinfo)
136361    switch (devinfo->gen) {
136367       if (devinfo->is_haswell) {
136375       if (devinfo->is_g4x) {
136393 HALF_SLICE_CHICKEN7_EnabledTexelOffsetPrecisionFix_bits(const struct gen_device_info *devinfo)
136395    switch (devinfo->gen) {
136401       if (devinfo->is_haswell) {
136409       if (devinfo->is_g4x) {
136424 HALF_SLICE_CHICKEN7_EnabledTexelOffsetPrecisionFix_start(const struct gen_device_info *devinfo)
136426    switch (devinfo->gen) {
136432       if (devinfo->is_haswell) {
136440       if (devinfo->is_g4x) {
136458 HALF_SLICE_CHICKEN7_EnabledTexelOffsetPrecisionFixMask_bits(const struct gen_device_info *devinfo)
136460    switch (devinfo->gen) {
136466       if (devinfo->is_haswell) {
136474       if (devinfo->is_g4x) {
136489 HALF_SLICE_CHICKEN7_EnabledTexelOffsetPrecisionFixMask_start(const struct gen_device_info *devinfo)
136491    switch (devinfo->gen) {
136497       if (devinfo->is_haswell) {
136505       if (devinfo->is_g4x) {
136525 HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD_length(const struct gen_device_info *devinfo)
136527    switch (devinfo->gen) {
136533       if (devinfo->is_haswell) {
136541       if (devinfo->is_g4x) {
136561 HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD_IndirectPayloadBaseAddress_bits(const struct gen_device_info *devinfo)
136563    switch (devinfo->gen) {
136569       if (devinfo->is_haswell) {
136577       if (devinfo->is_g4x) {
136594 HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD_IndirectPayloadBaseAddress_start(const struct gen_device_info *devinfo)
136596    switch (devinfo->gen) {
136602       if (devinfo->is_haswell) {
136610       if (devinfo->is_g4x) {
136630 HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD_IndirectPayloadBaseAddress2_bits(const struct gen_device_info *devinfo)
136632    switch (devinfo->gen) {
136638       if (devinfo->is_haswell) {
136646       if (devinfo->is_g4x) {
136663 HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD_IndirectPayloadBaseAddress2_start(const struct gen_device_info *devinfo)
136665    switch (devinfo->gen) {
136671       if (devinfo->is_haswell) {
136679       if (devinfo->is_g4x) {
136699 HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD_IndirectPayloadDataSizeinbits_bits(const struct gen_device_info *devinfo)
136701    switch (devinfo->gen) {
136707       if (devinfo->is_haswell) {
136715       if (devinfo->is_g4x) {
136732 HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD_IndirectPayloadDataSizeinbits_start(const struct gen_device_info *devinfo)
136734    switch (devinfo->gen) {
136740       if (devinfo->is_haswell) {
136748       if (devinfo->is_g4x) {
136768 HCP_REF_LIST_ENTRY_length(const struct gen_device_info *devinfo)
136770    switch (devinfo->gen) {
136776       if (devinfo->is_haswell) {
136784       if (devinfo->is_g4x) {
136804 HCP_REF_LIST_ENTRY_ChromaWeightedPrediction_bits(const struct gen_device_info *devinfo)
136806    switch (devinfo->gen) {
136812       if (devinfo->is_haswell) {
136820       if (devinfo->is_g4x) {
136837 HCP_REF_LIST_ENTRY_ChromaWeightedPrediction_start(const struct gen_device_info *devinfo)
136839    switch (devinfo->gen) {
136845       if (devinfo->is_haswell) {
136853       if (devinfo->is_g4x) {
136873 HCP_REF_LIST_ENTRY_FieldPic_bits(const struct gen_device_info *devinfo)
136875    switch (devinfo->gen) {
136881       if (devinfo->is_haswell) {
136889       if (devinfo->is_g4x) {
136906 HCP_REF_LIST_ENTRY_FieldPic_start(const struct gen_device_info *devinfo)
136908    switch (devinfo->gen) {
136914       if (devinfo->is_haswell) {
136922       if (devinfo->is_g4x) {
136942 HCP_REF_LIST_ENTRY_ListEntry_bits(const struct gen_device_info *devinfo)
136944    switch (devinfo->gen) {
136950       if (devinfo->is_haswell) {
136958       if (devinfo->is_g4x) {
136975 HCP_REF_LIST_ENTRY_ListEntry_start(const struct gen_device_info *devinfo)
136977    switch (devinfo->gen) {
136983       if (devinfo->is_haswell) {
136991       if (devinfo->is_g4x) {
137011 HCP_REF_LIST_ENTRY_LongTermReference_bits(const struct gen_device_info *devinfo)
137013    switch (devinfo->gen) {
137019       if (devinfo->is_haswell) {
137027       if (devinfo->is_g4x) {
137044 HCP_REF_LIST_ENTRY_LongTermReference_start(const struct gen_device_info *devinfo)
137046    switch (devinfo->gen) {
137052       if (devinfo->is_haswell) {
137060       if (devinfo->is_g4x) {
137080 HCP_REF_LIST_ENTRY_LumaWeightedPrediction_bits(const struct gen_device_info *devinfo)
137082    switch (devinfo->gen) {
137088       if (devinfo->is_haswell) {
137096       if (devinfo->is_g4x) {
137113 HCP_REF_LIST_ENTRY_LumaWeightedPrediction_start(const struct gen_device_info *devinfo)
137115    switch (devinfo->gen) {
137121       if (devinfo->is_haswell) {
137129       if (devinfo->is_g4x) {
137149 HCP_REF_LIST_ENTRY_ReferencePicturetbValue_bits(const struct gen_device_info *devinfo)
137151    switch (devinfo->gen) {
137157       if (devinfo->is_haswell) {
137165       if (devinfo->is_g4x) {
137182 HCP_REF_LIST_ENTRY_ReferencePicturetbValue_start(const struct gen_device_info *devinfo)
137184    switch (devinfo->gen) {
137190       if (devinfo->is_haswell) {
137198       if (devinfo->is_g4x) {
137218 HCP_REF_LIST_ENTRY_TopField_bits(const struct gen_device_info *devinfo)
137220    switch (devinfo->gen) {
137226       if (devinfo->is_haswell) {
137234       if (devinfo->is_g4x) {
137251 HCP_REF_LIST_ENTRY_TopField_start(const struct gen_device_info *devinfo)
137253    switch (devinfo->gen) {
137259       if (devinfo->is_haswell) {
137267       if (devinfo->is_g4x) {
137287 HCP_TILE_POSITION_IN_CTB_length(const struct gen_device_info *devinfo)
137289    switch (devinfo->gen) {
137295       if (devinfo->is_haswell) {
137303       if (devinfo->is_g4x) {
137323 HCP_TILE_POSITION_IN_CTB_CtbPos0i_bits(const struct gen_device_info *devinfo)
137325    switch (devinfo->gen) {
137331       if (devinfo->is_haswell) {
137339       if (devinfo->is_g4x) {
137356 HCP_TILE_POSITION_IN_CTB_CtbPos0i_start(const struct gen_device_info *devinfo)
137358    switch (devinfo->gen) {
137364       if (devinfo->is_haswell) {
137372       if (devinfo->is_g4x) {
137392 HCP_TILE_POSITION_IN_CTB_CtbPos1i_bits(const struct gen_device_info *devinfo)
137394    switch (devinfo->gen) {
137400       if (devinfo->is_haswell) {
137408       if (devinfo->is_g4x) {
137425 HCP_TILE_POSITION_IN_CTB_CtbPos1i_start(const struct gen_device_info *devinfo)
137427    switch (devinfo->gen) {
137433       if (devinfo->is_haswell) {
137441       if (devinfo->is_g4x) {
137461 HCP_TILE_POSITION_IN_CTB_CtbPos2i_bits(const struct gen_device_info *devinfo)
137463    switch (devinfo->gen) {
137469       if (devinfo->is_haswell) {
137477       if (devinfo->is_g4x) {
137494 HCP_TILE_POSITION_IN_CTB_CtbPos2i_start(const struct gen_device_info *devinfo)
137496    switch (devinfo->gen) {
137502       if (devinfo->is_haswell) {
137510       if (devinfo->is_g4x) {
137530 HCP_TILE_POSITION_IN_CTB_CtbPos3i_bits(const struct gen_device_info *devinfo)
137532    switch (devinfo->gen) {
137538       if (devinfo->is_haswell) {
137546       if (devinfo->is_g4x) {
137563 HCP_TILE_POSITION_IN_CTB_CtbPos3i_start(const struct gen_device_info *devinfo)
137565    switch (devinfo->gen) {
137571       if (devinfo->is_haswell) {
137579       if (devinfo->is_g4x) {
137597 HCP_TILE_POSITION_IN_CTB_MSB_length(const struct gen_device_info *devinfo)
137599    switch (devinfo->gen) {
137605       if (devinfo->is_haswell) {
137613       if (devinfo->is_g4x) {
137631 HCP_TILE_POSITION_IN_CTB_MSB_CtbRowPositionofTileColumn_bits(const struct gen_device_info *devinfo)
137633    switch (devinfo->gen) {
137639       if (devinfo->is_haswell) {
137647       if (devinfo->is_g4x) {
137662 HCP_TILE_POSITION_IN_CTB_MSB_CtbRowPositionofTileColumn_start(const struct gen_device_info *devinfo)
137664    switch (devinfo->gen) {
137670       if (devinfo->is_haswell) {
137678       if (devinfo->is_g4x) {
137698 HCP_WEIGHTOFFSET_CHROMA_ENTRY_length(const struct gen_device_info *devinfo)
137700    switch (devinfo->gen) {
137706       if (devinfo->is_haswell) {
137714       if (devinfo->is_g4x) {
137734 HCP_WEIGHTOFFSET_CHROMA_ENTRY_ChromaOffsetLX0_bits(const struct gen_device_info *devinfo)
137736    switch (devinfo->gen) {
137742       if (devinfo->is_haswell) {
137750       if (devinfo->is_g4x) {
137767 HCP_WEIGHTOFFSET_CHROMA_ENTRY_ChromaOffsetLX0_start(const struct gen_device_info *devinfo)
137769    switch (devinfo->gen) {
137775       if (devinfo->is_haswell) {
137783       if (devinfo->is_g4x) {
137803 HCP_WEIGHTOFFSET_CHROMA_ENTRY_ChromaOffsetLX1_bits(const struct gen_device_info *devinfo)
137805    switch (devinfo->gen) {
137811       if (devinfo->is_haswell) {
137819       if (devinfo->is_g4x) {
137836 HCP_WEIGHTOFFSET_CHROMA_ENTRY_ChromaOffsetLX1_start(const struct gen_device_info *devinfo)
137838    switch (devinfo->gen) {
137844       if (devinfo->is_haswell) {
137852       if (devinfo->is_g4x) {
137872 HCP_WEIGHTOFFSET_CHROMA_ENTRY_DeltaChromaWeightLX0_bits(const struct gen_device_info *devinfo)
137874    switch (devinfo->gen) {
137880       if (devinfo->is_haswell) {
137888       if (devinfo->is_g4x) {
137905 HCP_WEIGHTOFFSET_CHROMA_ENTRY_DeltaChromaWeightLX0_start(const struct gen_device_info *devinfo)
137907    switch (devinfo->gen) {
137913       if (devinfo->is_haswell) {
137921       if (devinfo->is_g4x) {
137941 HCP_WEIGHTOFFSET_CHROMA_ENTRY_DeltaChromaWeightLX1_bits(const struct gen_device_info *devinfo)
137943    switch (devinfo->gen) {
137949       if (devinfo->is_haswell) {
137957       if (devinfo->is_g4x) {
137974 HCP_WEIGHTOFFSET_CHROMA_ENTRY_DeltaChromaWeightLX1_start(const struct gen_device_info *devinfo)
137976    switch (devinfo->gen) {
137982       if (devinfo->is_haswell) {
137990       if (devinfo->is_g4x) {
138008 HCP_WEIGHTOFFSET_CHROMA_EXT_ENTRY_length(const struct gen_device_info *devinfo)
138010    switch (devinfo->gen) {
138016       if (devinfo->is_haswell) {
138024       if (devinfo->is_g4x) {
138042 HCP_WEIGHTOFFSET_CHROMA_EXT_ENTRY_ChromaOffsetLX0MSBytei1_bits(const struct gen_device_info *devinfo)
138044    switch (devinfo->gen) {
138050       if (devinfo->is_haswell) {
138058       if (devinfo->is_g4x) {
138073 HCP_WEIGHTOFFSET_CHROMA_EXT_ENTRY_ChromaOffsetLX0MSBytei1_start(const struct gen_device_info *devinfo)
138075    switch (devinfo->gen) {
138081       if (devinfo->is_haswell) {
138089       if (devinfo->is_g4x) {
138107 HCP_WEIGHTOFFSET_CHROMA_EXT_ENTRY_ChromaOffsetLX0MSBytei_bits(const struct gen_device_info *devinfo)
138109    switch (devinfo->gen) {
138115       if (devinfo->is_haswell) {
138123       if (devinfo->is_g4x) {
138138 HCP_WEIGHTOFFSET_CHROMA_EXT_ENTRY_ChromaOffsetLX0MSBytei_start(const struct gen_device_info *devinfo)
138140    switch (devinfo->gen) {
138146       if (devinfo->is_haswell) {
138154       if (devinfo->is_g4x) {
138172 HCP_WEIGHTOFFSET_CHROMA_EXT_ENTRY_ChromaOffsetLX1MSBytei1_bits(const struct gen_device_info *devinfo)
138174    switch (devinfo->gen) {
138180       if (devinfo->is_haswell) {
138188       if (devinfo->is_g4x) {
138203 HCP_WEIGHTOFFSET_CHROMA_EXT_ENTRY_ChromaOffsetLX1MSBytei1_start(const struct gen_device_info *devinfo)
138205    switch (devinfo->gen) {
138211       if (devinfo->is_haswell) {
138219       if (devinfo->is_g4x) {
138237 HCP_WEIGHTOFFSET_CHROMA_EXT_ENTRY_ChromaOffsetLX1MSBytei_bits(const struct gen_device_info *devinfo)
138239    switch (devinfo->gen) {
138245       if (devinfo->is_haswell) {
138253       if (devinfo->is_g4x) {
138268 HCP_WEIGHTOFFSET_CHROMA_EXT_ENTRY_ChromaOffsetLX1MSBytei_start(const struct gen_device_info *devinfo)
138270    switch (devinfo->gen) {
138276       if (devinfo->is_haswell) {
138284       if (devinfo->is_g4x) {
138304 HCP_WEIGHTOFFSET_LUMA_ENTRY_length(const struct gen_device_info *devinfo)
138306    switch (devinfo->gen) {
138312       if (devinfo->is_haswell) {
138320       if (devinfo->is_g4x) {
138340 HCP_WEIGHTOFFSET_LUMA_ENTRY_DeltaLumaWeightLX_bits(const struct gen_device_info *devinfo)
138342    switch (devinfo->gen) {
138348       if (devinfo->is_haswell) {
138356       if (devinfo->is_g4x) {
138373 HCP_WEIGHTOFFSET_LUMA_ENTRY_DeltaLumaWeightLX_start(const struct gen_device_info *devinfo)
138375    switch (devinfo->gen) {
138381       if (devinfo->is_haswell) {
138389       if (devinfo->is_g4x) {
138409 HCP_WEIGHTOFFSET_LUMA_ENTRY_LumaOffsetLX_bits(const struct gen_device_info *devinfo)
138411    switch (devinfo->gen) {
138417       if (devinfo->is_haswell) {
138425       if (devinfo->is_g4x) {
138442 HCP_WEIGHTOFFSET_LUMA_ENTRY_LumaOffsetLX_start(const struct gen_device_info *devinfo)
138444    switch (devinfo->gen) {
138450       if (devinfo->is_haswell) {
138458       if (devinfo->is_g4x) {
138476 HCP_WEIGHTOFFSET_LUMA_ENTRY_LumaOffsetLXMSByte_bits(const struct gen_device_info *devinfo)
138478    switch (devinfo->gen) {
138484       if (devinfo->is_haswell) {
138492       if (devinfo->is_g4x) {
138507 HCP_WEIGHTOFFSET_LUMA_ENTRY_LumaOffsetLXMSByte_start(const struct gen_device_info *devinfo)
138509    switch (devinfo->gen) {
138515       if (devinfo->is_haswell) {
138523       if (devinfo->is_g4x) {
138543 HEVC_ARBITRATION_PRIORITY_length(const struct gen_device_info *devinfo)
138545    switch (devinfo->gen) {
138551       if (devinfo->is_haswell) {
138559       if (devinfo->is_g4x) {
138579 HEVC_ARBITRATION_PRIORITY_Priority_bits(const struct gen_device_info *devinfo)
138581    switch (devinfo->gen) {
138587       if (devinfo->is_haswell) {
138595       if (devinfo->is_g4x) {
138612 HEVC_ARBITRATION_PRIORITY_Priority_start(const struct gen_device_info *devinfo)
138614    switch (devinfo->gen) {
138620       if (devinfo->is_haswell) {
138628       if (devinfo->is_g4x) {
138648 HEVC_VP9_RDOQ_LAMBDA_FIELDS_length(const struct gen_device_info *devinfo)
138650    switch (devinfo->gen) {
138656       if (devinfo->is_haswell) {
138664       if (devinfo->is_g4x) {
138684 HEVC_VP9_RDOQ_LAMBDA_FIELDS_LambdaValue0_bits(const struct gen_device_info *devinfo)
138686    switch (devinfo->gen) {
138692       if (devinfo->is_haswell) {
138700       if (devinfo->is_g4x) {
138717 HEVC_VP9_RDOQ_LAMBDA_FIELDS_LambdaValue0_start(const struct gen_device_info *devinfo)
138719    switch (devinfo->gen) {
138725       if (devinfo->is_haswell) {
138733       if (devinfo->is_g4x) {
138753 HEVC_VP9_RDOQ_LAMBDA_FIELDS_LambdaValue1_bits(const struct gen_device_info *devinfo)
138755    switch (devinfo->gen) {
138761       if (devinfo->is_haswell) {
138769       if (devinfo->is_g4x) {
138786 HEVC_VP9_RDOQ_LAMBDA_FIELDS_LambdaValue1_start(const struct gen_device_info *devinfo)
138788    switch (devinfo->gen) {
138794       if (devinfo->is_haswell) {
138802       if (devinfo->is_g4x) {
138825 HS_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
138827    switch (devinfo->gen) {
138833       if (devinfo->is_haswell) {
138841       if (devinfo->is_g4x) {
138864 HS_INVOCATION_COUNT_HSInvocationCountReport_bits(const struct gen_device_info *devinfo)
138866    switch (devinfo->gen) {
138872       if (devinfo->is_haswell) {
138880       if (devinfo->is_g4x) {
138900 HS_INVOCATION_COUNT_HSInvocationCountReport_start(const struct gen_device_info *devinfo)
138902    switch (devinfo->gen) {
138908       if (devinfo->is_haswell) {
138916       if (devinfo->is_g4x) {
138936 HUC_VIRTUAL_ADDR_REGION_length(const struct gen_device_info *devinfo)
138938    switch (devinfo->gen) {
138944       if (devinfo->is_haswell) {
138952       if (devinfo->is_g4x) {
138972 HUC_VIRTUAL_ADDR_REGION_Address_bits(const struct gen_device_info *devinfo)
138974    switch (devinfo->gen) {
138980       if (devinfo->is_haswell) {
138988       if (devinfo->is_g4x) {
139005 HUC_VIRTUAL_ADDR_REGION_Address_start(const struct gen_device_info *devinfo)
139007    switch (devinfo->gen) {
139013       if (devinfo->is_haswell) {
139021       if (devinfo->is_g4x) {
139041 HUC_VIRTUAL_ADDR_REGION_MemoryAddressAttributes_bits(const struct gen_device_info *devinfo)
139043    switch (devinfo->gen) {
139049       if (devinfo->is_haswell) {
139057       if (devinfo->is_g4x) {
139074 HUC_VIRTUAL_ADDR_REGION_MemoryAddressAttributes_start(const struct gen_device_info *devinfo)
139076    switch (devinfo->gen) {
139082       if (devinfo->is_haswell) {
139090       if (devinfo->is_g4x) {
139113 IA_PRIMITIVES_COUNT_length(const struct gen_device_info *devinfo)
139115    switch (devinfo->gen) {
139121       if (devinfo->is_haswell) {
139129       if (devinfo->is_g4x) {
139152 IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_bits(const struct gen_device_info *devinfo)
139154    switch (devinfo->gen) {
139160       if (devinfo->is_haswell) {
139168       if (devinfo->is_g4x) {
139188 IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_start(const struct gen_device_info *devinfo)
139190    switch (devinfo->gen) {
139196       if (devinfo->is_haswell) {
139204       if (devinfo->is_g4x) {
139227 IA_VERTICES_COUNT_length(const struct gen_device_info *devinfo)
139229    switch (devinfo->gen) {
139235       if (devinfo->is_haswell) {
139243       if (devinfo->is_g4x) {
139266 IA_VERTICES_COUNT_IAVerticesCountReport_bits(const struct gen_device_info *devinfo)
139268    switch (devinfo->gen) {
139274       if (devinfo->is_haswell) {
139282       if (devinfo->is_g4x) {
139302 IA_VERTICES_COUNT_IAVerticesCountReport_start(const struct gen_device_info *devinfo)
139304    switch (devinfo->gen) {
139310       if (devinfo->is_haswell) {
139318       if (devinfo->is_g4x) {
139337 IMAGE_STATE_COST_length(const struct gen_device_info *devinfo)
139339    switch (devinfo->gen) {
139345       if (devinfo->is_haswell) {
139353       if (devinfo->is_g4x) {
139372 IMAGE_STATE_COST_MV0Cost_bits(const struct gen_device_info *devinfo)
139374    switch (devinfo->gen) {
139380       if (devinfo->is_haswell) {
139388       if (devinfo->is_g4x) {
139404 IMAGE_STATE_COST_MV0Cost_start(const struct gen_device_info *devinfo)
139406    switch (devinfo->gen) {
139412       if (devinfo->is_haswell) {
139420       if (devinfo->is_g4x) {
139439 IMAGE_STATE_COST_MV1Cost_bits(const struct gen_device_info *devinfo)
139441    switch (devinfo->gen) {
139447       if (devinfo->is_haswell) {
139455       if (devinfo->is_g4x) {
139471 IMAGE_STATE_COST_MV1Cost_start(const struct gen_device_info *devinfo)
139473    switch (devinfo->gen) {
139479       if (devinfo->is_haswell) {
139487       if (devinfo->is_g4x) {
139506 IMAGE_STATE_COST_MV2Cost_bits(const struct gen_device_info *devinfo)
139508    switch (devinfo->gen) {
139514       if (devinfo->is_haswell) {
139522       if (devinfo->is_g4x) {
139538 IMAGE_STATE_COST_MV2Cost_start(const struct gen_device_info *devinfo)
139540    switch (devinfo->gen) {
139546       if (devinfo->is_haswell) {
139554       if (devinfo->is_g4x) {
139573 IMAGE_STATE_COST_MV3Cost_bits(const struct gen_device_info *devinfo)
139575    switch (devinfo->gen) {
139581       if (devinfo->is_haswell) {
139589       if (devinfo->is_g4x) {
139605 IMAGE_STATE_COST_MV3Cost_start(const struct gen_device_info *devinfo)
139607    switch (devinfo->gen) {
139613       if (devinfo->is_haswell) {
139621       if (devinfo->is_g4x) {
139640 IMAGE_STATE_COST_MV4Cost_bits(const struct gen_device_info *devinfo)
139642    switch (devinfo->gen) {
139648       if (devinfo->is_haswell) {
139656       if (devinfo->is_g4x) {
139672 IMAGE_STATE_COST_MV4Cost_start(const struct gen_device_info *devinfo)
139674    switch (devinfo->gen) {
139680       if (devinfo->is_haswell) {
139688       if (devinfo->is_g4x) {
139707 IMAGE_STATE_COST_MV5Cost_bits(const struct gen_device_info *devinfo)
139709    switch (devinfo->gen) {
139715       if (devinfo->is_haswell) {
139723       if (devinfo->is_g4x) {
139739 IMAGE_STATE_COST_MV5Cost_start(const struct gen_device_info *devinfo)
139741    switch (devinfo->gen) {
139747       if (devinfo->is_haswell) {
139755       if (devinfo->is_g4x) {
139774 IMAGE_STATE_COST_MV6Cost_bits(const struct gen_device_info *devinfo)
139776    switch (devinfo->gen) {
139782       if (devinfo->is_haswell) {
139790       if (devinfo->is_g4x) {
139806 IMAGE_STATE_COST_MV6Cost_start(const struct gen_device_info *devinfo)
139808    switch (devinfo->gen) {
139814       if (devinfo->is_haswell) {
139822       if (devinfo->is_g4x) {
139841 IMAGE_STATE_COST_MV7Cost_bits(const struct gen_device_info *devinfo)
139843    switch (devinfo->gen) {
139849       if (devinfo->is_haswell) {
139857       if (devinfo->is_g4x) {
139873 IMAGE_STATE_COST_MV7Cost_start(const struct gen_device_info *devinfo)
139875    switch (devinfo->gen) {
139881       if (devinfo->is_haswell) {
139889       if (devinfo->is_g4x) {
139912 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_length(const struct gen_device_info *devinfo)
139914    switch (devinfo->gen) {
139920       if (devinfo->is_haswell) {
139928       if (devinfo->is_g4x) {
139950 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_BSliceConcealmentMode_bits(const struct gen_device_info *devinfo)
139952    switch (devinfo->gen) {
139958       if (devinfo->is_haswell) {
139966       if (devinfo->is_g4x) {
139985 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_BSliceConcealmentMode_start(const struct gen_device_info *devinfo)
139987    switch (devinfo->gen) {
139993       if (devinfo->is_haswell) {
140001       if (devinfo->is_g4x) {
140023 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_BSliceInterDirectTypeConcealmentMode_bits(const struct gen_device_info *devinfo)
140025    switch (devinfo->gen) {
140031       if (devinfo->is_haswell) {
140039       if (devinfo->is_g4x) {
140058 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_BSliceInterDirectTypeConcealmentMode_start(const struct gen_device_info *devinfo)
140060    switch (devinfo->gen) {
140066       if (devinfo->is_haswell) {
140074       if (devinfo->is_g4x) {
140096 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_BSliceSpatialInterConcealmentMode_bits(const struct gen_device_info *devinfo)
140098    switch (devinfo->gen) {
140104       if (devinfo->is_haswell) {
140112       if (devinfo->is_g4x) {
140131 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_BSliceSpatialInterConcealmentMode_start(const struct gen_device_info *devinfo)
140133    switch (devinfo->gen) {
140139       if (devinfo->is_haswell) {
140147       if (devinfo->is_g4x) {
140169 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_BSliceTemporalInterConcealmentMode_bits(const struct gen_device_info *devinfo)
140171    switch (devinfo->gen) {
140177       if (devinfo->is_haswell) {
140185       if (devinfo->is_g4x) {
140204 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_BSliceTemporalInterConcealmentMode_start(const struct gen_device_info *devinfo)
140206    switch (devinfo->gen) {
140212       if (devinfo->is_haswell) {
140220       if (devinfo->is_g4x) {
140243 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_BSDPrematureCompleteErrorHandling_bits(const struct gen_device_info *devinfo)
140245    switch (devinfo->gen) {
140251       if (devinfo->is_haswell) {
140259       if (devinfo->is_g4x) {
140279 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_BSDPrematureCompleteErrorHandling_start(const struct gen_device_info *devinfo)
140281    switch (devinfo->gen) {
140287       if (devinfo->is_haswell) {
140295       if (devinfo->is_g4x) {
140318 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_ConcealmentMethod_bits(const struct gen_device_info *devinfo)
140320    switch (devinfo->gen) {
140326       if (devinfo->is_haswell) {
140334       if (devinfo->is_g4x) {
140354 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_ConcealmentMethod_start(const struct gen_device_info *devinfo)
140356    switch (devinfo->gen) {
140362       if (devinfo->is_haswell) {
140370       if (devinfo->is_g4x) {
140393 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_ConcealmentPictureID_bits(const struct gen_device_info *devinfo)
140395    switch (devinfo->gen) {
140401       if (devinfo->is_haswell) {
140409       if (devinfo->is_g4x) {
140429 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_ConcealmentPictureID_start(const struct gen_device_info *devinfo)
140431    switch (devinfo->gen) {
140437       if (devinfo->is_haswell) {
140445       if (devinfo->is_g4x) {
140467 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_ConcealmentReferencePictureFieldBit_bits(const struct gen_device_info *devinfo)
140469    switch (devinfo->gen) {
140475       if (devinfo->is_haswell) {
140483       if (devinfo->is_g4x) {
140502 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_ConcealmentReferencePictureFieldBit_start(const struct gen_device_info *devinfo)
140504    switch (devinfo->gen) {
140510       if (devinfo->is_haswell) {
140518       if (devinfo->is_g4x) {
140541 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_EmulationPreventionBytePresent_bits(const struct gen_device_info *devinfo)
140543    switch (devinfo->gen) {
140549       if (devinfo->is_haswell) {
140557       if (devinfo->is_g4x) {
140577 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_EmulationPreventionBytePresent_start(const struct gen_device_info *devinfo)
140579    switch (devinfo->gen) {
140585       if (devinfo->is_haswell) {
140593       if (devinfo->is_g4x) {
140616 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_EntropyErrorHandling_bits(const struct gen_device_info *devinfo)
140618    switch (devinfo->gen) {
140624       if (devinfo->is_haswell) {
140632       if (devinfo->is_g4x) {
140652 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_EntropyErrorHandling_start(const struct gen_device_info *devinfo)
140654    switch (devinfo->gen) {
140660       if (devinfo->is_haswell) {
140668       if (devinfo->is_g4x) {
140691 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_FirstMBBitOffset_bits(const struct gen_device_info *devinfo)
140693    switch (devinfo->gen) {
140699       if (devinfo->is_haswell) {
140707       if (devinfo->is_g4x) {
140727 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_FirstMBBitOffset_start(const struct gen_device_info *devinfo)
140729    switch (devinfo->gen) {
140735       if (devinfo->is_haswell) {
140743       if (devinfo->is_g4x) {
140766 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_FirstMBByteOffsetofSliceDataorSliceHeader_bits(const struct gen_device_info *devinfo)
140768    switch (devinfo->gen) {
140774       if (devinfo->is_haswell) {
140782       if (devinfo->is_g4x) {
140802 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_FirstMBByteOffsetofSliceDataorSliceHeader_start(const struct gen_device_info *devinfo)
140804    switch (devinfo->gen) {
140810       if (devinfo->is_haswell) {
140818       if (devinfo->is_g4x) {
140841 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_FixPrevMBSkipped_bits(const struct gen_device_info *devinfo)
140843    switch (devinfo->gen) {
140849       if (devinfo->is_haswell) {
140857       if (devinfo->is_g4x) {
140877 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_FixPrevMBSkipped_start(const struct gen_device_info *devinfo)
140879    switch (devinfo->gen) {
140885       if (devinfo->is_haswell) {
140893       if (devinfo->is_g4x) {
140915 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_ISliceConcealmentMode_bits(const struct gen_device_info *devinfo)
140917    switch (devinfo->gen) {
140923       if (devinfo->is_haswell) {
140931       if (devinfo->is_g4x) {
140950 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_ISliceConcealmentMode_start(const struct gen_device_info *devinfo)
140952    switch (devinfo->gen) {
140958       if (devinfo->is_haswell) {
140966       if (devinfo->is_g4x) {
140989 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_InitCurrentMBNumber_bits(const struct gen_device_info *devinfo)
140991    switch (devinfo->gen) {
140997       if (devinfo->is_haswell) {
141005       if (devinfo->is_g4x) {
141025 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_InitCurrentMBNumber_start(const struct gen_device_info *devinfo)
141027    switch (devinfo->gen) {
141033       if (devinfo->is_haswell) {
141041       if (devinfo->is_g4x) {
141063 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_Intra8x84x4PredictionErrorConcealmentControl_bits(const struct gen_device_info *devinfo)
141065    switch (devinfo->gen) {
141071       if (devinfo->is_haswell) {
141079       if (devinfo->is_g4x) {
141098 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_Intra8x84x4PredictionErrorConcealmentControl_start(const struct gen_device_info *devinfo)
141100    switch (devinfo->gen) {
141106       if (devinfo->is_haswell) {
141114       if (devinfo->is_g4x) {
141136 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_IntraPredMode4x48x8LumaErrorControl_bits(const struct gen_device_info *devinfo)
141138    switch (devinfo->gen) {
141144       if (devinfo->is_haswell) {
141152       if (devinfo->is_g4x) {
141171 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_IntraPredMode4x48x8LumaErrorControl_start(const struct gen_device_info *devinfo)
141173    switch (devinfo->gen) {
141179       if (devinfo->is_haswell) {
141187       if (devinfo->is_g4x) {
141209 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_IntraPredictionErrorControl_bits(const struct gen_device_info *devinfo)
141211    switch (devinfo->gen) {
141217       if (devinfo->is_haswell) {
141225       if (devinfo->is_g4x) {
141244 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_IntraPredictionErrorControl_start(const struct gen_device_info *devinfo)
141246    switch (devinfo->gen) {
141252       if (devinfo->is_haswell) {
141260       if (devinfo->is_g4x) {
141283 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_LastSlice_bits(const struct gen_device_info *devinfo)
141285    switch (devinfo->gen) {
141291       if (devinfo->is_haswell) {
141299       if (devinfo->is_g4x) {
141319 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_LastSlice_start(const struct gen_device_info *devinfo)
141321    switch (devinfo->gen) {
141327       if (devinfo->is_haswell) {
141335       if (devinfo->is_g4x) {
141357 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBSpatialMotionVectorsOverrideDisable_bits(const struct gen_device_info *devinfo)
141359    switch (devinfo->gen) {
141365       if (devinfo->is_haswell) {
141373       if (devinfo->is_g4x) {
141392 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBSpatialMotionVectorsOverrideDisable_start(const struct gen_device_info *devinfo)
141394    switch (devinfo->gen) {
141400       if (devinfo->is_haswell) {
141408       if (devinfo->is_g4x) {
141426 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBSpatialMotionVectorsOverrideDisableFlag_bits(const struct gen_device_info *devinfo)
141428    switch (devinfo->gen) {
141434       if (devinfo->is_haswell) {
141442       if (devinfo->is_g4x) {
141457 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBSpatialMotionVectorsOverrideDisableFlag_start(const struct gen_device_info *devinfo)
141459    switch (devinfo->gen) {
141465       if (devinfo->is_haswell) {
141473       if (devinfo->is_g4x) {
141496 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBSpatialPredictionMode_bits(const struct gen_device_info *devinfo)
141498    switch (devinfo->gen) {
141504       if (devinfo->is_haswell) {
141512       if (devinfo->is_g4x) {
141532 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBSpatialPredictionMode_start(const struct gen_device_info *devinfo)
141534    switch (devinfo->gen) {
141540       if (devinfo->is_haswell) {
141548       if (devinfo->is_g4x) {
141566 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBSpatialReferenceIndexOverrideDisable_bits(const struct gen_device_info *devinfo)
141568    switch (devinfo->gen) {
141574       if (devinfo->is_haswell) {
141582       if (devinfo->is_g4x) {
141597 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBSpatialReferenceIndexOverrideDisable_start(const struct gen_device_info *devinfo)
141599    switch (devinfo->gen) {
141605       if (devinfo->is_haswell) {
141613       if (devinfo->is_g4x) {
141635 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBSpatialWeightPredictionDisable_bits(const struct gen_device_info *devinfo)
141637    switch (devinfo->gen) {
141643       if (devinfo->is_haswell) {
141651       if (devinfo->is_g4x) {
141670 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBSpatialWeightPredictionDisable_start(const struct gen_device_info *devinfo)
141672    switch (devinfo->gen) {
141678       if (devinfo->is_haswell) {
141686       if (devinfo->is_g4x) {
141704 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBSpatialWeightPredictionDisableFlag_bits(const struct gen_device_info *devinfo)
141706    switch (devinfo->gen) {
141712       if (devinfo->is_haswell) {
141720       if (devinfo->is_g4x) {
141735 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBSpatialWeightPredictionDisableFlag_start(const struct gen_device_info *devinfo)
141737    switch (devinfo->gen) {
141743       if (devinfo->is_haswell) {
141751       if (devinfo->is_g4x) {
141774 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBTemporalMotionVectorsOverrideEnable_bits(const struct gen_device_info *devinfo)
141776    switch (devinfo->gen) {
141782       if (devinfo->is_haswell) {
141790       if (devinfo->is_g4x) {
141810 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBTemporalMotionVectorsOverrideEnable_start(const struct gen_device_info *devinfo)
141812    switch (devinfo->gen) {
141818       if (devinfo->is_haswell) {
141826       if (devinfo->is_g4x) {
141849 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBTemporalPredictionMode_bits(const struct gen_device_info *devinfo)
141851    switch (devinfo->gen) {
141857       if (devinfo->is_haswell) {
141865       if (devinfo->is_g4x) {
141885 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBTemporalPredictionMode_start(const struct gen_device_info *devinfo)
141887    switch (devinfo->gen) {
141893       if (devinfo->is_haswell) {
141901       if (devinfo->is_g4x) {
141919 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBTemporalReferenceIndexOverrideEnable_bits(const struct gen_device_info *devinfo)
141921    switch (devinfo->gen) {
141927       if (devinfo->is_haswell) {
141935       if (devinfo->is_g4x) {
141950 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBTemporalReferenceIndexOverrideEnable_start(const struct gen_device_info *devinfo)
141952    switch (devinfo->gen) {
141958       if (devinfo->is_haswell) {
141966       if (devinfo->is_g4x) {
141989 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBTemporalWeightPredictionDisable_bits(const struct gen_device_info *devinfo)
141991    switch (devinfo->gen) {
141997       if (devinfo->is_haswell) {
142005       if (devinfo->is_g4x) {
142025 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentBTemporalWeightPredictionDisable_start(const struct gen_device_info *devinfo)
142027    switch (devinfo->gen) {
142033       if (devinfo->is_haswell) {
142041       if (devinfo->is_g4x) {
142063 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentPSliceMotionVectorsOverrideDisable_bits(const struct gen_device_info *devinfo)
142065    switch (devinfo->gen) {
142071       if (devinfo->is_haswell) {
142079       if (devinfo->is_g4x) {
142098 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentPSliceMotionVectorsOverrideDisable_start(const struct gen_device_info *devinfo)
142100    switch (devinfo->gen) {
142106       if (devinfo->is_haswell) {
142114       if (devinfo->is_g4x) {
142132 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentPSliceMotionVectorsOverrideDisableFlag_bits(const struct gen_device_info *devinfo)
142134    switch (devinfo->gen) {
142140       if (devinfo->is_haswell) {
142148       if (devinfo->is_g4x) {
142163 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentPSliceMotionVectorsOverrideDisableFlag_start(const struct gen_device_info *devinfo)
142165    switch (devinfo->gen) {
142171       if (devinfo->is_haswell) {
142179       if (devinfo->is_g4x) {
142197 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentPSliceReferenceIndexOverrideDisable_bits(const struct gen_device_info *devinfo)
142199    switch (devinfo->gen) {
142205       if (devinfo->is_haswell) {
142213       if (devinfo->is_g4x) {
142228 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentPSliceReferenceIndexOverrideDisable_start(const struct gen_device_info *devinfo)
142230    switch (devinfo->gen) {
142236       if (devinfo->is_haswell) {
142244       if (devinfo->is_g4x) {
142266 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentPSliceWeightPredictionDisable_bits(const struct gen_device_info *devinfo)
142268    switch (devinfo->gen) {
142274       if (devinfo->is_haswell) {
142282       if (devinfo->is_g4x) {
142301 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentPSliceWeightPredictionDisable_start(const struct gen_device_info *devinfo)
142303    switch (devinfo->gen) {
142309       if (devinfo->is_haswell) {
142317       if (devinfo->is_g4x) {
142335 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentPSliceWeightPredictionDisableFlag_bits(const struct gen_device_info *devinfo)
142337    switch (devinfo->gen) {
142343       if (devinfo->is_haswell) {
142351       if (devinfo->is_g4x) {
142366 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBErrorConcealmentPSliceWeightPredictionDisableFlag_start(const struct gen_device_info *devinfo)
142368    switch (devinfo->gen) {
142374       if (devinfo->is_haswell) {
142382       if (devinfo->is_g4x) {
142405 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBHeaderErrorHandling_bits(const struct gen_device_info *devinfo)
142407    switch (devinfo->gen) {
142413       if (devinfo->is_haswell) {
142421       if (devinfo->is_g4x) {
142441 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MBHeaderErrorHandling_start(const struct gen_device_info *devinfo)
142443    switch (devinfo->gen) {
142449       if (devinfo->is_haswell) {
142457       if (devinfo->is_g4x) {
142480 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MPRErrorHandling_bits(const struct gen_device_info *devinfo)
142482    switch (devinfo->gen) {
142488       if (devinfo->is_haswell) {
142496       if (devinfo->is_g4x) {
142516 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_MPRErrorHandling_start(const struct gen_device_info *devinfo)
142518    switch (devinfo->gen) {
142524       if (devinfo->is_haswell) {
142532       if (devinfo->is_g4x) {
142554 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_PSliceConcealmentMode_bits(const struct gen_device_info *devinfo)
142556    switch (devinfo->gen) {
142562       if (devinfo->is_haswell) {
142570       if (devinfo->is_g4x) {
142589 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_PSliceConcealmentMode_start(const struct gen_device_info *devinfo)
142591    switch (devinfo->gen) {
142597       if (devinfo->is_haswell) {
142605       if (devinfo->is_g4x) {
142627 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_PSliceInterConcealmentMode_bits(const struct gen_device_info *devinfo)
142629    switch (devinfo->gen) {
142635       if (devinfo->is_haswell) {
142643       if (devinfo->is_g4x) {
142662 INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_PSliceInterConcealmentMode_start(const struct gen_device_info *devinfo)
142664    switch (devinfo->gen) {
142670       if (devinfo->is_haswell) {
142678       if (devinfo->is_g4x) {
142702 INSTDONE_1_length(const struct gen_device_info *devinfo)
142704    switch (devinfo->gen) {
142710       if (devinfo->is_haswell) {
142718       if (devinfo->is_g4x) {
142736 INSTDONE_1_AVSDone_bits(const struct gen_device_info *devinfo)
142738    switch (devinfo->gen) {
142744       if (devinfo->is_haswell) {
142752       if (devinfo->is_g4x) {
142767 INSTDONE_1_AVSDone_start(const struct gen_device_info *devinfo)
142769    switch (devinfo->gen) {
142775       if (devinfo->is_haswell) {
142783       if (devinfo->is_g4x) {
142806 INSTDONE_1_CLDone_bits(const struct gen_device_info *devinfo)
142808    switch (devinfo->gen) {
142814       if (devinfo->is_haswell) {
142822       if (devinfo->is_g4x) {
142842 INSTDONE_1_CLDone_start(const struct gen_device_info *devinfo)
142844    switch (devinfo->gen) {
142850       if (devinfo->is_haswell) {
142858       if (devinfo->is_g4x) {
142880 INSTDONE_1_CSDone_bits(const struct gen_device_info *devinfo)
142882    switch (devinfo->gen) {
142888       if (devinfo->is_haswell) {
142896       if (devinfo->is_g4x) {
142915 INSTDONE_1_CSDone_start(const struct gen_device_info *devinfo)
142917    switch (devinfo->gen) {
142923       if (devinfo->is_haswell) {
142931       if (devinfo->is_g4x) {
142954 INSTDONE_1_DSDone_bits(const struct gen_device_info *devinfo)
142956    switch (devinfo->gen) {
142962       if (devinfo->is_haswell) {
142970       if (devinfo->is_g4x) {
142990 INSTDONE_1_DSDone_start(const struct gen_device_info *devinfo)
142992    switch (devinfo->gen) {
142998       if (devinfo->is_haswell) {
143006       if (devinfo->is_g4x) {
143024 INSTDONE_1_EU00Done_bits(const struct gen_device_info *devinfo)
143026    switch (devinfo->gen) {
143032       if (devinfo->is_haswell) {
143040       if (devinfo->is_g4x) {
143055 INSTDONE_1_EU00Done_start(const struct gen_device_info *devinfo)
143057    switch (devinfo->gen) {
143063       if (devinfo->is_haswell) {
143071       if (devinfo->is_g4x) {
143089 INSTDONE_1_EU01Done_bits(const struct gen_device_info *devinfo)
143091    switch (devinfo->gen) {
143097       if (devinfo->is_haswell) {
143105       if (devinfo->is_g4x) {
143120 INSTDONE_1_EU01Done_start(const struct gen_device_info *devinfo)
143122    switch (devinfo->gen) {
143128       if (devinfo->is_haswell) {
143136       if (devinfo->is_g4x) {
143154 INSTDONE_1_EU02Done_bits(const struct gen_device_info *devinfo)
143156    switch (devinfo->gen) {
143162       if (devinfo->is_haswell) {
143170       if (devinfo->is_g4x) {
143185 INSTDONE_1_EU02Done_start(const struct gen_device_info *devinfo)
143187    switch (devinfo->gen) {
143193       if (devinfo->is_haswell) {
143201       if (devinfo->is_g4x) {
143219 INSTDONE_1_EU10Done_bits(const struct gen_device_info *devinfo)
143221    switch (devinfo->gen) {
143227       if (devinfo->is_haswell) {
143235       if (devinfo->is_g4x) {
143250 INSTDONE_1_EU10Done_start(const struct gen_device_info *devinfo)
143252    switch (devinfo->gen) {
143258       if (devinfo->is_haswell) {
143266       if (devinfo->is_g4x) {
143284 INSTDONE_1_EU11Done_bits(const struct gen_device_info *devinfo)
143286    switch (devinfo->gen) {
143292       if (devinfo->is_haswell) {
143300       if (devinfo->is_g4x) {
143315 INSTDONE_1_EU11Done_start(const struct gen_device_info *devinfo)
143317    switch (devinfo->gen) {
143323       if (devinfo->is_haswell) {
143331       if (devinfo->is_g4x) {
143349 INSTDONE_1_EU12Done_bits(const struct gen_device_info *devinfo)
143351    switch (devinfo->gen) {
143357       if (devinfo->is_haswell) {
143365       if (devinfo->is_g4x) {
143380 INSTDONE_1_EU12Done_start(const struct gen_device_info *devinfo)
143382    switch (devinfo->gen) {
143388       if (devinfo->is_haswell) {
143396       if (devinfo->is_g4x) {
143414 INSTDONE_1_EU20Done_bits(const struct gen_device_info *devinfo)
143416    switch (devinfo->gen) {
143422       if (devinfo->is_haswell) {
143430       if (devinfo->is_g4x) {
143445 INSTDONE_1_EU20Done_start(const struct gen_device_info *devinfo)
143447    switch (devinfo->gen) {
143453       if (devinfo->is_haswell) {
143461       if (devinfo->is_g4x) {
143479 INSTDONE_1_EU21Done_bits(const struct gen_device_info *devinfo)
143481    switch (devinfo->gen) {
143487       if (devinfo->is_haswell) {
143495       if (devinfo->is_g4x) {
143510 INSTDONE_1_EU21Done_start(const struct gen_device_info *devinfo)
143512    switch (devinfo->gen) {
143518       if (devinfo->is_haswell) {
143526       if (devinfo->is_g4x) {
143544 INSTDONE_1_EU22Done_bits(const struct gen_device_info *devinfo)
143546    switch (devinfo->gen) {
143552       if (devinfo->is_haswell) {
143560       if (devinfo->is_g4x) {
143575 INSTDONE_1_EU22Done_start(const struct gen_device_info *devinfo)
143577    switch (devinfo->gen) {
143583       if (devinfo->is_haswell) {
143591       if (devinfo->is_g4x) {
143609 INSTDONE_1_EU30Done_bits(const struct gen_device_info *devinfo)
143611    switch (devinfo->gen) {
143617       if (devinfo->is_haswell) {
143625       if (devinfo->is_g4x) {
143640 INSTDONE_1_EU30Done_start(const struct gen_device_info *devinfo)
143642    switch (devinfo->gen) {
143648       if (devinfo->is_haswell) {
143656       if (devinfo->is_g4x) {
143674 INSTDONE_1_EU31Done_bits(const struct gen_device_info *devinfo)
143676    switch (devinfo->gen) {
143682       if (devinfo->is_haswell) {
143690       if (devinfo->is_g4x) {
143705 INSTDONE_1_EU31Done_start(const struct gen_device_info *devinfo)
143707    switch (devinfo->gen) {
143713       if (devinfo->is_haswell) {
143721       if (devinfo->is_g4x) {
143739 INSTDONE_1_EU32Done_bits(const struct gen_device_info *devinfo)
143741    switch (devinfo->gen) {
143747       if (devinfo->is_haswell) {
143755       if (devinfo->is_g4x) {
143770 INSTDONE_1_EU32Done_start(const struct gen_device_info *devinfo)
143772    switch (devinfo->gen) {
143778       if (devinfo->is_haswell) {
143786       if (devinfo->is_g4x) {
143809 INSTDONE_1_GAFMDone_bits(const struct gen_device_info *devinfo)
143811    switch (devinfo->gen) {
143817       if (devinfo->is_haswell) {
143825       if (devinfo->is_g4x) {
143845 INSTDONE_1_GAFMDone_start(const struct gen_device_info *devinfo)
143847    switch (devinfo->gen) {
143853       if (devinfo->is_haswell) {
143861       if (devinfo->is_g4x) {
143884 INSTDONE_1_GAFSDone_bits(const struct gen_device_info *devinfo)
143886    switch (devinfo->gen) {
143892       if (devinfo->is_haswell) {
143900       if (devinfo->is_g4x) {
143920 INSTDONE_1_GAFSDone_start(const struct gen_device_info *devinfo)
143922    switch (devinfo->gen) {
143928       if (devinfo->is_haswell) {
143936       if (devinfo->is_g4x) {
143959 INSTDONE_1_GAMDone_bits(const struct gen_device_info *devinfo)
143961    switch (devinfo->gen) {
143967       if (devinfo->is_haswell) {
143975       if (devinfo->is_g4x) {
143995 INSTDONE_1_GAMDone_start(const struct gen_device_info *devinfo)
143997    switch (devinfo->gen) {
144003       if (devinfo->is_haswell) {
144011       if (devinfo->is_g4x) {
144034 INSTDONE_1_GSDone_bits(const struct gen_device_info *devinfo)
144036    switch (devinfo->gen) {
144042       if (devinfo->is_haswell) {
144050       if (devinfo->is_g4x) {
144070 INSTDONE_1_GSDone_start(const struct gen_device_info *devinfo)
144072    switch (devinfo->gen) {
144078       if (devinfo->is_haswell) {
144086       if (devinfo->is_g4x) {
144104 INSTDONE_1_GWDone_bits(const struct gen_device_info *devinfo)
144106    switch (devinfo->gen) {
144112       if (devinfo->is_haswell) {
144120       if (devinfo->is_g4x) {
144135 INSTDONE_1_GWDone_start(const struct gen_device_info *devinfo)
144137    switch (devinfo->gen) {
144143       if (devinfo->is_haswell) {
144151       if (devinfo->is_g4x) {
144169 INSTDONE_1_HIZDone_bits(const struct gen_device_info *devinfo)
144171    switch (devinfo->gen) {
144177       if (devinfo->is_haswell) {
144185       if (devinfo->is_g4x) {
144200 INSTDONE_1_HIZDone_start(const struct gen_device_info *devinfo)
144202    switch (devinfo->gen) {
144208       if (devinfo->is_haswell) {
144216       if (devinfo->is_g4x) {
144239 INSTDONE_1_HSDone_bits(const struct gen_device_info *devinfo)
144241    switch (devinfo->gen) {
144247       if (devinfo->is_haswell) {
144255       if (devinfo->is_g4x) {
144275 INSTDONE_1_HSDone_start(const struct gen_device_info *devinfo)
144277    switch (devinfo->gen) {
144283       if (devinfo->is_haswell) {
144291       if (devinfo->is_g4x) {
144309 INSTDONE_1_IC0Done_bits(const struct gen_device_info *devinfo)
144311    switch (devinfo->gen) {
144317       if (devinfo->is_haswell) {
144325       if (devinfo->is_g4x) {
144340 INSTDONE_1_IC0Done_start(const struct gen_device_info *devinfo)
144342    switch (devinfo->gen) {
144348       if (devinfo->is_haswell) {
144356       if (devinfo->is_g4x) {
144374 INSTDONE_1_IC1Done_bits(const struct gen_device_info *devinfo)
144376    switch (devinfo->gen) {
144382       if (devinfo->is_haswell) {
144390       if (devinfo->is_g4x) {
144405 INSTDONE_1_IC1Done_start(const struct gen_device_info *devinfo)
144407    switch (devinfo->gen) {
144413       if (devinfo->is_haswell) {
144421       if (devinfo->is_g4x) {
144439 INSTDONE_1_IC2Done_bits(const struct gen_device_info *devinfo)
144441    switch (devinfo->gen) {
144447       if (devinfo->is_haswell) {
144455       if (devinfo->is_g4x) {
144470 INSTDONE_1_IC2Done_start(const struct gen_device_info *devinfo)
144472    switch (devinfo->gen) {
144478       if (devinfo->is_haswell) {
144486       if (devinfo->is_g4x) {
144504 INSTDONE_1_IC3Done_bits(const struct gen_device_info *devinfo)
144506    switch (devinfo->gen) {
144512       if (devinfo->is_haswell) {
144520       if (devinfo->is_g4x) {
144535 INSTDONE_1_IC3Done_start(const struct gen_device_info *devinfo)
144537    switch (devinfo->gen) {
144543       if (devinfo->is_haswell) {
144551       if (devinfo->is_g4x) {
144569 INSTDONE_1_IEFDone_bits(const struct gen_device_info *devinfo)
144571    switch (devinfo->gen) {
144577       if (devinfo->is_haswell) {
144585       if (devinfo->is_g4x) {
144600 INSTDONE_1_IEFDone_start(const struct gen_device_info *devinfo)
144602    switch (devinfo->gen) {
144608       if (devinfo->is_haswell) {
144616       if (devinfo->is_g4x) {
144634 INSTDONE_1_ISC10Done_bits(const struct gen_device_info *devinfo)
144636    switch (devinfo->gen) {
144642       if (devinfo->is_haswell) {
144650       if (devinfo->is_g4x) {
144665 INSTDONE_1_ISC10Done_start(const struct gen_device_info *devinfo)
144667    switch (devinfo->gen) {
144673       if (devinfo->is_haswell) {
144681       if (devinfo->is_g4x) {
144699 INSTDONE_1_ISC23Done_bits(const struct gen_device_info *devinfo)
144701    switch (devinfo->gen) {
144707       if (devinfo->is_haswell) {
144715       if (devinfo->is_g4x) {
144730 INSTDONE_1_ISC23Done_start(const struct gen_device_info *devinfo)
144732    switch (devinfo->gen) {
144738       if (devinfo->is_haswell) {
144746       if (devinfo->is_g4x) {
144764 INSTDONE_1_MA0Done_bits(const struct gen_device_info *devinfo)
144766    switch (devinfo->gen) {
144772       if (devinfo->is_haswell) {
144780       if (devinfo->is_g4x) {
144795 INSTDONE_1_MA0Done_start(const struct gen_device_info *devinfo)
144797    switch (devinfo->gen) {
144803       if (devinfo->is_haswell) {
144811       if (devinfo->is_g4x) {
144829 INSTDONE_1_MA1Done_bits(const struct gen_device_info *devinfo)
144831    switch (devinfo->gen) {
144837       if (devinfo->is_haswell) {
144845       if (devinfo->is_g4x) {
144860 INSTDONE_1_MA1Done_start(const struct gen_device_info *devinfo)
144862    switch (devinfo->gen) {
144868       if (devinfo->is_haswell) {
144876       if (devinfo->is_g4x) {
144894 INSTDONE_1_MA2Done_bits(const struct gen_device_info *devinfo)
144896    switch (devinfo->gen) {
144902       if (devinfo->is_haswell) {
144910       if (devinfo->is_g4x) {
144925 INSTDONE_1_MA2Done_start(const struct gen_device_info *devinfo)
144927    switch (devinfo->gen) {
144933       if (devinfo->is_haswell) {
144941       if (devinfo->is_g4x) {
144959 INSTDONE_1_MA3Done_bits(const struct gen_device_info *devinfo)
144961    switch (devinfo->gen) {
144967       if (devinfo->is_haswell) {
144975       if (devinfo->is_g4x) {
144990 INSTDONE_1_MA3Done_start(const struct gen_device_info *devinfo)
144992    switch (devinfo->gen) {
144998       if (devinfo->is_haswell) {
145006       if (devinfo->is_g4x) {
145030 INSTDONE_1_PRB0RingEnable_bits(const struct gen_device_info *devinfo)
145032    switch (devinfo->gen) {
145038       if (devinfo->is_haswell) {
145046       if (devinfo->is_g4x) {
145067 INSTDONE_1_PRB0RingEnable_start(const struct gen_device_info *devinfo)
145069    switch (devinfo->gen) {
145075       if (devinfo->is_haswell) {
145083       if (devinfo->is_g4x) {
145106 INSTDONE_1_RCCFBCCSDone_bits(const struct gen_device_info *devinfo)
145108    switch (devinfo->gen) {
145114       if (devinfo->is_haswell) {
145122       if (devinfo->is_g4x) {
145142 INSTDONE_1_RCCFBCCSDone_start(const struct gen_device_info *devinfo)
145144    switch (devinfo->gen) {
145150       if (devinfo->is_haswell) {
145158       if (devinfo->is_g4x) {
145180 INSTDONE_1_RSDone_bits(const struct gen_device_info *devinfo)
145182    switch (devinfo->gen) {
145188       if (devinfo->is_haswell) {
145196       if (devinfo->is_g4x) {
145215 INSTDONE_1_RSDone_start(const struct gen_device_info *devinfo)
145217    switch (devinfo->gen) {
145223       if (devinfo->is_haswell) {
145231       if (devinfo->is_g4x) {
145254 INSTDONE_1_SDEDone_bits(const struct gen_device_info *devinfo)
145256    switch (devinfo->gen) {
145262       if (devinfo->is_haswell) {
145270       if (devinfo->is_g4x) {
145290 INSTDONE_1_SDEDone_start(const struct gen_device_info *devinfo)
145292    switch (devinfo->gen) {
145298       if (devinfo->is_haswell) {
145306       if (devinfo->is_g4x) {
145329 INSTDONE_1_SFDone_bits(const struct gen_device_info *devinfo)
145331    switch (devinfo->gen) {
145337       if (devinfo->is_haswell) {
145345       if (devinfo->is_g4x) {
145365 INSTDONE_1_SFDone_start(const struct gen_device_info *devinfo)
145367    switch (devinfo->gen) {
145373       if (devinfo->is_haswell) {
145381       if (devinfo->is_g4x) {
145404 INSTDONE_1_SOLDone_bits(const struct gen_device_info *devinfo)
145406    switch (devinfo->gen) {
145412       if (devinfo->is_haswell) {
145420       if (devinfo->is_g4x) {
145440 INSTDONE_1_SOLDone_start(const struct gen_device_info *devinfo)
145442    switch (devinfo->gen) {
145448       if (devinfo->is_haswell) {
145456       if (devinfo->is_g4x) {
145479 INSTDONE_1_SVGDone_bits(const struct gen_device_info *devinfo)
145481    switch (devinfo->gen) {
145487       if (devinfo->is_haswell) {
145495       if (devinfo->is_g4x) {
145515 INSTDONE_1_SVGDone_start(const struct gen_device_info *devinfo)
145517    switch (devinfo->gen) {
145523       if (devinfo->is_haswell) {
145531       if (devinfo->is_g4x) {
145549 INSTDONE_1_TDDone_bits(const struct gen_device_info *devinfo)
145551    switch (devinfo->gen) {
145557       if (devinfo->is_haswell) {
145565       if (devinfo->is_g4x) {
145580 INSTDONE_1_TDDone_start(const struct gen_device_info *devinfo)
145582    switch (devinfo->gen) {
145588       if (devinfo->is_haswell) {
145596       if (devinfo->is_g4x) {
145618 INSTDONE_1_TDGDone_bits(const struct gen_device_info *devinfo)
145620    switch (devinfo->gen) {
145626       if (devinfo->is_haswell) {
145634       if (devinfo->is_g4x) {
145653 INSTDONE_1_TDGDone_start(const struct gen_device_info *devinfo)
145655    switch (devinfo->gen) {
145661       if (devinfo->is_haswell) {
145669       if (devinfo->is_g4x) {
145687 INSTDONE_1_TDG0Done_bits(const struct gen_device_info *devinfo)
145689    switch (devinfo->gen) {
145695       if (devinfo->is_haswell) {
145703       if (devinfo->is_g4x) {
145718 INSTDONE_1_TDG0Done_start(const struct gen_device_info *devinfo)
145720    switch (devinfo->gen) {
145726       if (devinfo->is_haswell) {
145734       if (devinfo->is_g4x) {
145752 INSTDONE_1_TDG1Done_bits(const struct gen_device_info *devinfo)
145754    switch (devinfo->gen) {
145760       if (devinfo->is_haswell) {
145768       if (devinfo->is_g4x) {
145783 INSTDONE_1_TDG1Done_start(const struct gen_device_info *devinfo)
145785    switch (devinfo->gen) {
145791       if (devinfo->is_haswell) {
145799       if (devinfo->is_g4x) {
145822 INSTDONE_1_TEDone_bits(const struct gen_device_info *devinfo)
145824    switch (devinfo->gen) {
145830       if (devinfo->is_haswell) {
145838       if (devinfo->is_g4x) {
145858 INSTDONE_1_TEDone_start(const struct gen_device_info *devinfo)
145860    switch (devinfo->gen) {
145866       if (devinfo->is_haswell) {
145874       if (devinfo->is_g4x) {
145892 INSTDONE_1_TSDone_bits(const struct gen_device_info *devinfo)
145894    switch (devinfo->gen) {
145900       if (devinfo->is_haswell) {
145908       if (devinfo->is_g4x) {
145923 INSTDONE_1_TSDone_start(const struct gen_device_info *devinfo)
145925    switch (devinfo->gen) {
145931       if (devinfo->is_haswell) {
145939       if (devinfo->is_g4x) {
145961 INSTDONE_1_TSGDone_bits(const struct gen_device_info *devinfo)
145963    switch (devinfo->gen) {
145969       if (devinfo->is_haswell) {
145977       if (devinfo->is_g4x) {
145996 INSTDONE_1_TSGDone_start(const struct gen_device_info *devinfo)
145998    switch (devinfo->gen) {
146004       if (devinfo->is_haswell) {
146012       if (devinfo->is_g4x) {
146030 INSTDONE_1_TSG0Done_bits(const struct gen_device_info *devinfo)
146032    switch (devinfo->gen) {
146038       if (devinfo->is_haswell) {
146046       if (devinfo->is_g4x) {
146061 INSTDONE_1_TSG0Done_start(const struct gen_device_info *devinfo)
146063    switch (devinfo->gen) {
146069       if (devinfo->is_haswell) {
146077       if (devinfo->is_g4x) {
146095 INSTDONE_1_TSG1Done_bits(const struct gen_device_info *devinfo)
146097    switch (devinfo->gen) {
146103       if (devinfo->is_haswell) {
146111       if (devinfo->is_g4x) {
146126 INSTDONE_1_TSG1Done_start(const struct gen_device_info *devinfo)
146128    switch (devinfo->gen) {
146134       if (devinfo->is_haswell) {
146142       if (devinfo->is_g4x) {
146165 INSTDONE_1_URBMDone_bits(const struct gen_device_info *devinfo)
146167    switch (devinfo->gen) {
146173       if (devinfo->is_haswell) {
146181       if (devinfo->is_g4x) {
146201 INSTDONE_1_URBMDone_start(const struct gen_device_info *devinfo)
146203    switch (devinfo->gen) {
146209       if (devinfo->is_haswell) {
146217       if (devinfo->is_g4x) {
146241 INSTDONE_1_VFEDone_bits(const struct gen_device_info *devinfo)
146243    switch (devinfo->gen) {
146249       if (devinfo->is_haswell) {
146257       if (devinfo->is_g4x) {
146278 INSTDONE_1_VFEDone_start(const struct gen_device_info *devinfo)
146280    switch (devinfo->gen) {
146286       if (devinfo->is_haswell) {
146294       if (devinfo->is_g4x) {
146317 INSTDONE_1_VFGDone_bits(const struct gen_device_info *devinfo)
146319    switch (devinfo->gen) {
146325       if (devinfo->is_haswell) {
146333       if (devinfo->is_g4x) {
146353 INSTDONE_1_VFGDone_start(const struct gen_device_info *devinfo)
146355    switch (devinfo->gen) {
146361       if (devinfo->is_haswell) {
146369       if (devinfo->is_g4x) {
146392 INSTDONE_1_VSDone_bits(const struct gen_device_info *devinfo)
146394    switch (devinfo->gen) {
146400       if (devinfo->is_haswell) {
146408       if (devinfo->is_g4x) {
146428 INSTDONE_1_VSDone_start(const struct gen_device_info *devinfo)
146430    switch (devinfo->gen) {
146436       if (devinfo->is_haswell) {
146444       if (devinfo->is_g4x) {
146462 INSTDONE_1_VSCDone_bits(const struct gen_device_info *devinfo)
146464    switch (devinfo->gen) {
146470       if (devinfo->is_haswell) {
146478       if (devinfo->is_g4x) {
146493 INSTDONE_1_VSCDone_start(const struct gen_device_info *devinfo)
146495    switch (devinfo->gen) {
146501       if (devinfo->is_haswell) {
146509       if (devinfo->is_g4x) {
146527 INSTDONE_2_length(const struct gen_device_info *devinfo)
146529    switch (devinfo->gen) {
146535       if (devinfo->is_haswell) {
146543       if (devinfo->is_g4x) {
146561 INSTDONE_2_CLDone_bits(const struct gen_device_info *devinfo)
146563    switch (devinfo->gen) {
146569       if (devinfo->is_haswell) {
146577       if (devinfo->is_g4x) {
146592 INSTDONE_2_CLDone_start(const struct gen_device_info *devinfo)
146594    switch (devinfo->gen) {
146600       if (devinfo->is_haswell) {
146608       if (devinfo->is_g4x) {
146626 INSTDONE_2_CSDone_bits(const struct gen_device_info *devinfo)
146628    switch (devinfo->gen) {
146634       if (devinfo->is_haswell) {
146642       if (devinfo->is_g4x) {
146657 INSTDONE_2_CSDone_start(const struct gen_device_info *devinfo)
146659    switch (devinfo->gen) {
146665       if (devinfo->is_haswell) {
146673       if (devinfo->is_g4x) {
146691 INSTDONE_2_DAPDone_bits(const struct gen_device_info *devinfo)
146693    switch (devinfo->gen) {
146699       if (devinfo->is_haswell) {
146707       if (devinfo->is_g4x) {
146722 INSTDONE_2_DAPDone_start(const struct gen_device_info *devinfo)
146724    switch (devinfo->gen) {
146730       if (devinfo->is_haswell) {
146738       if (devinfo->is_g4x) {
146756 INSTDONE_2_DGDone_bits(const struct gen_device_info *devinfo)
146758    switch (devinfo->gen) {
146764       if (devinfo->is_haswell) {
146772       if (devinfo->is_g4x) {
146787 INSTDONE_2_DGDone_start(const struct gen_device_info *devinfo)
146789    switch (devinfo->gen) {
146795       if (devinfo->is_haswell) {
146803       if (devinfo->is_g4x) {
146821 INSTDONE_2_DMDone_bits(const struct gen_device_info *devinfo)
146823    switch (devinfo->gen) {
146829       if (devinfo->is_haswell) {
146837       if (devinfo->is_g4x) {
146852 INSTDONE_2_DMDone_start(const struct gen_device_info *devinfo)
146854    switch (devinfo->gen) {
146860       if (devinfo->is_haswell) {
146868       if (devinfo->is_g4x) {
146886 INSTDONE_2_FLDone_bits(const struct gen_device_info *devinfo)
146888    switch (devinfo->gen) {
146894       if (devinfo->is_haswell) {
146902       if (devinfo->is_g4x) {
146917 INSTDONE_2_FLDone_start(const struct gen_device_info *devinfo)
146919    switch (devinfo->gen) {
146925       if (devinfo->is_haswell) {
146933       if (devinfo->is_g4x) {
146951 INSTDONE_2_FTDone_bits(const struct gen_device_info *devinfo)
146953    switch (devinfo->gen) {
146959       if (devinfo->is_haswell) {
146967       if (devinfo->is_g4x) {
146982 INSTDONE_2_FTDone_start(const struct gen_device_info *devinfo)
146984    switch (devinfo->gen) {
146990       if (devinfo->is_haswell) {
146998       if (devinfo->is_g4x) {
147016 INSTDONE_2_GAMDone_bits(const struct gen_device_info *devinfo)
147018    switch (devinfo->gen) {
147024       if (devinfo->is_haswell) {
147032       if (devinfo->is_g4x) {
147047 INSTDONE_2_GAMDone_start(const struct gen_device_info *devinfo)
147049    switch (devinfo->gen) {
147055       if (devinfo->is_haswell) {
147063       if (devinfo->is_g4x) {
147081 INSTDONE_2_GSDone_bits(const struct gen_device_info *devinfo)
147083    switch (devinfo->gen) {
147089       if (devinfo->is_haswell) {
147097       if (devinfo->is_g4x) {
147112 INSTDONE_2_GSDone_start(const struct gen_device_info *devinfo)
147114    switch (devinfo->gen) {
147120       if (devinfo->is_haswell) {
147128       if (devinfo->is_g4x) {
147146 INSTDONE_2_ISCDone_bits(const struct gen_device_info *devinfo)
147148    switch (devinfo->gen) {
147154       if (devinfo->is_haswell) {
147162       if (devinfo->is_g4x) {
147177 INSTDONE_2_ISCDone_start(const struct gen_device_info *devinfo)
147179    switch (devinfo->gen) {
147185       if (devinfo->is_haswell) {
147193       if (devinfo->is_g4x) {
147211 INSTDONE_2_IZDone_bits(const struct gen_device_info *devinfo)
147213    switch (devinfo->gen) {
147219       if (devinfo->is_haswell) {
147227       if (devinfo->is_g4x) {
147242 INSTDONE_2_IZDone_start(const struct gen_device_info *devinfo)
147244    switch (devinfo->gen) {
147250       if (devinfo->is_haswell) {
147258       if (devinfo->is_g4x) {
147276 INSTDONE_2_MTDone_bits(const struct gen_device_info *devinfo)
147278    switch (devinfo->gen) {
147284       if (devinfo->is_haswell) {
147292       if (devinfo->is_g4x) {
147307 INSTDONE_2_MTDone_start(const struct gen_device_info *devinfo)
147309    switch (devinfo->gen) {
147315       if (devinfo->is_haswell) {
147323       if (devinfo->is_g4x) {
147341 INSTDONE_2_PLDone_bits(const struct gen_device_info *devinfo)
147343    switch (devinfo->gen) {
147349       if (devinfo->is_haswell) {
147357       if (devinfo->is_g4x) {
147372 INSTDONE_2_PLDone_start(const struct gen_device_info *devinfo)
147374    switch (devinfo->gen) {
147380       if (devinfo->is_haswell) {
147388       if (devinfo->is_g4x) {
147406 INSTDONE_2_PSDDone_bits(const struct gen_device_info *devinfo)
147408    switch (devinfo->gen) {
147414       if (devinfo->is_haswell) {
147422       if (devinfo->is_g4x) {
147437 INSTDONE_2_PSDDone_start(const struct gen_device_info *devinfo)
147439    switch (devinfo->gen) {
147445       if (devinfo->is_haswell) {
147453       if (devinfo->is_g4x) {
147471 INSTDONE_2_QCDone_bits(const struct gen_device_info *devinfo)
147473    switch (devinfo->gen) {
147479       if (devinfo->is_haswell) {
147487       if (devinfo->is_g4x) {
147502 INSTDONE_2_QCDone_start(const struct gen_device_info *devinfo)
147504    switch (devinfo->gen) {
147510       if (devinfo->is_haswell) {
147518       if (devinfo->is_g4x) {
147536 INSTDONE_2_RCCDone_bits(const struct gen_device_info *devinfo)
147538    switch (devinfo->gen) {
147544       if (devinfo->is_haswell) {
147552       if (devinfo->is_g4x) {
147567 INSTDONE_2_RCCDone_start(const struct gen_device_info *devinfo)
147569    switch (devinfo->gen) {
147575       if (devinfo->is_haswell) {
147583       if (devinfo->is_g4x) {
147601 INSTDONE_2_RCPBEDone_bits(const struct gen_device_info *devinfo)
147603    switch (devinfo->gen) {
147609       if (devinfo->is_haswell) {
147617       if (devinfo->is_g4x) {
147632 INSTDONE_2_RCPBEDone_start(const struct gen_device_info *devinfo)
147634    switch (devinfo->gen) {
147640       if (devinfo->is_haswell) {
147648       if (devinfo->is_g4x) {
147666 INSTDONE_2_RCPFEDone_bits(const struct gen_device_info *devinfo)
147668    switch (devinfo->gen) {
147674       if (devinfo->is_haswell) {
147682       if (devinfo->is_g4x) {
147697 INSTDONE_2_RCPFEDone_start(const struct gen_device_info *devinfo)
147699    switch (devinfo->gen) {
147705       if (devinfo->is_haswell) {
147713       if (devinfo->is_g4x) {
147731 INSTDONE_2_RCZDone_bits(const struct gen_device_info *devinfo)
147733    switch (devinfo->gen) {
147739       if (devinfo->is_haswell) {
147747       if (devinfo->is_g4x) {
147762 INSTDONE_2_RCZDone_start(const struct gen_device_info *devinfo)
147764    switch (devinfo->gen) {
147770       if (devinfo->is_haswell) {
147778       if (devinfo->is_g4x) {
147796 INSTDONE_2_SCDone_bits(const struct gen_device_info *devinfo)
147798    switch (devinfo->gen) {
147804       if (devinfo->is_haswell) {
147812       if (devinfo->is_g4x) {
147827 INSTDONE_2_SCDone_start(const struct gen_device_info *devinfo)
147829    switch (devinfo->gen) {
147835       if (devinfo->is_haswell) {
147843       if (devinfo->is_g4x) {
147861 INSTDONE_2_SFDone_bits(const struct gen_device_info *devinfo)
147863    switch (devinfo->gen) {
147869       if (devinfo->is_haswell) {
147877       if (devinfo->is_g4x) {
147892 INSTDONE_2_SFDone_start(const struct gen_device_info *devinfo)
147894    switch (devinfo->gen) {
147900       if (devinfo->is_haswell) {
147908       if (devinfo->is_g4x) {
147926 INSTDONE_2_SIDone_bits(const struct gen_device_info *devinfo)
147928    switch (devinfo->gen) {
147934       if (devinfo->is_haswell) {
147942       if (devinfo->is_g4x) {
147957 INSTDONE_2_SIDone_start(const struct gen_device_info *devinfo)
147959    switch (devinfo->gen) {
147965       if (devinfo->is_haswell) {
147973       if (devinfo->is_g4x) {
147991 INSTDONE_2_SODone_bits(const struct gen_device_info *devinfo)
147993    switch (devinfo->gen) {
147999       if (devinfo->is_haswell) {
148007       if (devinfo->is_g4x) {
148022 INSTDONE_2_SODone_start(const struct gen_device_info *devinfo)
148024    switch (devinfo->gen) {
148030       if (devinfo->is_haswell) {
148038       if (devinfo->is_g4x) {
148056 INSTDONE_2_SVGDone_bits(const struct gen_device_info *devinfo)
148058    switch (devinfo->gen) {
148064       if (devinfo->is_haswell) {
148072       if (devinfo->is_g4x) {
148087 INSTDONE_2_SVGDone_start(const struct gen_device_info *devinfo)
148089    switch (devinfo->gen) {
148095       if (devinfo->is_haswell) {
148103       if (devinfo->is_g4x) {
148121 INSTDONE_2_SVRWDone_bits(const struct gen_device_info *devinfo)
148123    switch (devinfo->gen) {
148129       if (devinfo->is_haswell) {
148137       if (devinfo->is_g4x) {
148152 INSTDONE_2_SVRWDone_start(const struct gen_device_info *devinfo)
148154    switch (devinfo->gen) {
148160       if (devinfo->is_haswell) {
148168       if (devinfo->is_g4x) {
148186 INSTDONE_2_SVSMDone_bits(const struct gen_device_info *devinfo)
148188    switch (devinfo->gen) {
148194       if (devinfo->is_haswell) {
148202       if (devinfo->is_g4x) {
148217 INSTDONE_2_SVSMDone_start(const struct gen_device_info *devinfo)
148219    switch (devinfo->gen) {
148225       if (devinfo->is_haswell) {
148233       if (devinfo->is_g4x) {
148251 INSTDONE_2_VDIDone_bits(const struct gen_device_info *devinfo)
148253    switch (devinfo->gen) {
148259       if (devinfo->is_haswell) {
148267       if (devinfo->is_g4x) {
148282 INSTDONE_2_VDIDone_start(const struct gen_device_info *devinfo)
148284    switch (devinfo->gen) {
148290       if (devinfo->is_haswell) {
148298       if (devinfo->is_g4x) {
148316 INSTDONE_2_VFDone_bits(const struct gen_device_info *devinfo)
148318    switch (devinfo->gen) {
148324       if (devinfo->is_haswell) {
148332       if (devinfo->is_g4x) {
148347 INSTDONE_2_VFDone_start(const struct gen_device_info *devinfo)
148349    switch (devinfo->gen) {
148355       if (devinfo->is_haswell) {
148363       if (devinfo->is_g4x) {
148381 INSTDONE_2_VMEDone_bits(const struct gen_device_info *devinfo)
148383    switch (devinfo->gen) {
148389       if (devinfo->is_haswell) {
148397       if (devinfo->is_g4x) {
148412 INSTDONE_2_VMEDone_start(const struct gen_device_info *devinfo)
148414    switch (devinfo->gen) {
148420       if (devinfo->is_haswell) {
148428       if (devinfo->is_g4x) {
148446 INSTDONE_2_VS0Done_bits(const struct gen_device_info *devinfo)
148448    switch (devinfo->gen) {
148454       if (devinfo->is_haswell) {
148462       if (devinfo->is_g4x) {
148477 INSTDONE_2_VS0Done_start(const struct gen_device_info *devinfo)
148479    switch (devinfo->gen) {
148485       if (devinfo->is_haswell) {
148493       if (devinfo->is_g4x) {
148511 INSTDONE_2_WMBEDone_bits(const struct gen_device_info *devinfo)
148513    switch (devinfo->gen) {
148519       if (devinfo->is_haswell) {
148527       if (devinfo->is_g4x) {
148542 INSTDONE_2_WMBEDone_start(const struct gen_device_info *devinfo)
148544    switch (devinfo->gen) {
148550       if (devinfo->is_haswell) {
148558       if (devinfo->is_g4x) {
148576 INSTDONE_2_WMFEDone_bits(const struct gen_device_info *devinfo)
148578    switch (devinfo->gen) {
148584       if (devinfo->is_haswell) {
148592       if (devinfo->is_g4x) {
148607 INSTDONE_2_WMFEDone_start(const struct gen_device_info *devinfo)
148609    switch (devinfo->gen) {
148615       if (devinfo->is_haswell) {
148623       if (devinfo->is_g4x) {
148644 INSTPM_length(const struct gen_device_info *devinfo)
148646    switch (devinfo->gen) {
148652       if (devinfo->is_haswell) {
148660       if (devinfo->is_g4x) {
148681 INSTPM_3DRenderingInstructionDisable_bits(const struct gen_device_info *devinfo)
148683    switch (devinfo->gen) {
148689       if (devinfo->is_haswell) {
148697       if (devinfo->is_g4x) {
148715 INSTPM_3DRenderingInstructionDisable_start(const struct gen_device_info *devinfo)
148717    switch (devinfo->gen) {
148723       if (devinfo->is_haswell) {
148731       if (devinfo->is_g4x) {
148752 INSTPM_3DRenderingInstructionDisableMask_bits(const struct gen_device_info *devinfo)
148754    switch (devinfo->gen) {
148760       if (devinfo->is_haswell) {
148768       if (devinfo->is_g4x) {
148786 INSTPM_3DRenderingInstructionDisableMask_start(const struct gen_device_info *devinfo)
148788    switch (devinfo->gen) {
148794       if (devinfo->is_haswell) {
148802       if (devinfo->is_g4x) {
148823 INSTPM_3DStateInstructionDisable_bits(const struct gen_device_info *devinfo)
148825    switch (devinfo->gen) {
148831       if (devinfo->is_haswell) {
148839       if (devinfo->is_g4x) {
148857 INSTPM_3DStateInstructionDisable_start(const struct gen_device_info *devinfo)
148859    switch (devinfo->gen) {
148865       if (devinfo->is_haswell) {
148873       if (devinfo->is_g4x) {
148894 INSTPM_3DStateInstructionDisableMask_bits(const struct gen_device_info *devinfo)
148896    switch (devinfo->gen) {
148902       if (devinfo->is_haswell) {
148910       if (devinfo->is_g4x) {
148928 INSTPM_3DStateInstructionDisableMask_start(const struct gen_device_info *devinfo)
148930    switch (devinfo->gen) {
148936       if (devinfo->is_haswell) {
148944       if (devinfo->is_g4x) {
148965 INSTPM_CONSTANT_BUFFERAddressOffsetDisable_bits(const struct gen_device_info *devinfo)
148967    switch (devinfo->gen) {
148973       if (devinfo->is_haswell) {
148981       if (devinfo->is_g4x) {
148999 INSTPM_CONSTANT_BUFFERAddressOffsetDisable_start(const struct gen_device_info *devinfo)
149001    switch (devinfo->gen) {
149007       if (devinfo->is_haswell) {
149015       if (devinfo->is_g4x) {
149036 INSTPM_CONSTANT_BUFFERAddressOffsetDisableMask_bits(const struct gen_device_info *devinfo)
149038    switch (devinfo->gen) {
149044       if (devinfo->is_haswell) {
149052       if (devinfo->is_g4x) {
149070 INSTPM_CONSTANT_BUFFERAddressOffsetDisableMask_start(const struct gen_device_info *devinfo)
149072    switch (devinfo->gen) {
149078       if (devinfo->is_haswell) {
149086       if (devinfo->is_g4x) {
149107 INSTPM_MediaInstructionDisable_bits(const struct gen_device_info *devinfo)
149109    switch (devinfo->gen) {
149115       if (devinfo->is_haswell) {
149123       if (devinfo->is_g4x) {
149141 INSTPM_MediaInstructionDisable_start(const struct gen_device_info *devinfo)
149143    switch (devinfo->gen) {
149149       if (devinfo->is_haswell) {
149157       if (devinfo->is_g4x) {
149178 INSTPM_MediaInstructionDisableMask_bits(const struct gen_device_info *devinfo)
149180    switch (devinfo->gen) {
149186       if (devinfo->is_haswell) {
149194       if (devinfo->is_g4x) {
149212 INSTPM_MediaInstructionDisableMask_start(const struct gen_device_info *devinfo)
149214    switch (devinfo->gen) {
149220       if (devinfo->is_haswell) {
149228       if (devinfo->is_g4x) {
149252 INTERFACE_DESCRIPTOR_DATA_length(const struct gen_device_info *devinfo)
149254    switch (devinfo->gen) {
149260       if (devinfo->is_haswell) {
149268       if (devinfo->is_g4x) {
149291 INTERFACE_DESCRIPTOR_DATA_BarrierEnable_bits(const struct gen_device_info *devinfo)
149293    switch (devinfo->gen) {
149299       if (devinfo->is_haswell) {
149307       if (devinfo->is_g4x) {
149327 INTERFACE_DESCRIPTOR_DATA_BarrierEnable_start(const struct gen_device_info *devinfo)
149329    switch (devinfo->gen) {
149335       if (devinfo->is_haswell) {
149343       if (devinfo->is_g4x) {
149361 INTERFACE_DESCRIPTOR_DATA_BarrierID_bits(const struct gen_device_info *devinfo)
149363    switch (devinfo->gen) {
149369       if (devinfo->is_haswell) {
149377       if (devinfo->is_g4x) {
149392 INTERFACE_DESCRIPTOR_DATA_BarrierID_start(const struct gen_device_info *devinfo)
149394    switch (devinfo->gen) {
149400       if (devinfo->is_haswell) {
149408       if (devinfo->is_g4x) {
149426 INTERFACE_DESCRIPTOR_DATA_BarrierReturnByte_bits(const struct gen_device_info *devinfo)
149428    switch (devinfo->gen) {
149434       if (devinfo->is_haswell) {
149442       if (devinfo->is_g4x) {
149457 INTERFACE_DESCRIPTOR_DATA_BarrierReturnByte_start(const struct gen_device_info *devinfo)
149459    switch (devinfo->gen) {
149465       if (devinfo->is_haswell) {
149473       if (devinfo->is_g4x) {
149491 INTERFACE_DESCRIPTOR_DATA_BarrierReturnGRFOffset_bits(const struct gen_device_info *devinfo)
149493    switch (devinfo->gen) {
149499       if (devinfo->is_haswell) {
149507       if (devinfo->is_g4x) {
149522 INTERFACE_DESCRIPTOR_DATA_BarrierReturnGRFOffset_start(const struct gen_device_info *devinfo)
149524    switch (devinfo->gen) {
149530       if (devinfo->is_haswell) {
149538       if (devinfo->is_g4x) {
149562 INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
149564    switch (devinfo->gen) {
149570       if (devinfo->is_haswell) {
149578       if (devinfo->is_g4x) {
149599 INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
149601    switch (devinfo->gen) {
149607       if (devinfo->is_haswell) {
149615       if (devinfo->is_g4x) {
149639 INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_bits(const struct gen_device_info *devinfo)
149641    switch (devinfo->gen) {
149647       if (devinfo->is_haswell) {
149655       if (devinfo->is_g4x) {
149676 INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_start(const struct gen_device_info *devinfo)
149678    switch (devinfo->gen) {
149684       if (devinfo->is_haswell) {
149692       if (devinfo->is_g4x) {
149716 INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_bits(const struct gen_device_info *devinfo)
149718    switch (devinfo->gen) {
149724       if (devinfo->is_haswell) {
149732       if (devinfo->is_g4x) {
149753 INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_start(const struct gen_device_info *devinfo)
149755    switch (devinfo->gen) {
149761       if (devinfo->is_haswell) {
149769       if (devinfo->is_g4x) {
149792 INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
149794    switch (devinfo->gen) {
149800       if (devinfo->is_haswell) {
149808       if (devinfo->is_g4x) {
149828 INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_start(const struct gen_device_info *devinfo)
149830    switch (devinfo->gen) {
149836       if (devinfo->is_haswell) {
149844       if (devinfo->is_g4x) {
149866 INTERFACE_DESCRIPTOR_DATA_CrossThreadConstantDataReadLength_bits(const struct gen_device_info *devinfo)
149868    switch (devinfo->gen) {
149874       if (devinfo->is_haswell) {
149882       if (devinfo->is_g4x) {
149901 INTERFACE_DESCRIPTOR_DATA_CrossThreadConstantDataReadLength_start(const struct gen_device_info *devinfo)
149903    switch (devinfo->gen) {
149909       if (devinfo->is_haswell) {
149917       if (devinfo->is_g4x) {
149938 INTERFACE_DESCRIPTOR_DATA_DenormMode_bits(const struct gen_device_info *devinfo)
149940    switch (devinfo->gen) {
149946       if (devinfo->is_haswell) {
149954       if (devinfo->is_g4x) {
149972 INTERFACE_DESCRIPTOR_DATA_DenormMode_start(const struct gen_device_info *devinfo)
149974    switch (devinfo->gen) {
149980       if (devinfo->is_haswell) {
149988       if (devinfo->is_g4x) {
150012 INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_bits(const struct gen_device_info *devinfo)
150014    switch (devinfo->gen) {
150020       if (devinfo->is_haswell) {
150028       if (devinfo->is_g4x) {
150049 INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_start(const struct gen_device_info *devinfo)
150051    switch (devinfo->gen) {
150057       if (devinfo->is_haswell) {
150065       if (devinfo->is_g4x) {
150085 INTERFACE_DESCRIPTOR_DATA_GlobalBarrierEnable_bits(const struct gen_device_info *devinfo)
150087    switch (devinfo->gen) {
150093       if (devinfo->is_haswell) {
150101       if (devinfo->is_g4x) {
150118 INTERFACE_DESCRIPTOR_DATA_GlobalBarrierEnable_start(const struct gen_device_info *devinfo)
150120    switch (devinfo->gen) {
150126       if (devinfo->is_haswell) {
150134       if (devinfo->is_g4x) {
150158 INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
150160    switch (devinfo->gen) {
150166       if (devinfo->is_haswell) {
150174       if (devinfo->is_g4x) {
150195 INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
150197    switch (devinfo->gen) {
150203       if (devinfo->is_haswell) {
150211       if (devinfo->is_g4x) {
150235 INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_bits(const struct gen_device_info *devinfo)
150237    switch (devinfo->gen) {
150243       if (devinfo->is_haswell) {
150251       if (devinfo->is_g4x) {
150272 INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_start(const struct gen_device_info *devinfo)
150274    switch (devinfo->gen) {
150280       if (devinfo->is_haswell) {
150288       if (devinfo->is_g4x) {
150312 INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
150314    switch (devinfo->gen) {
150320       if (devinfo->is_haswell) {
150328       if (devinfo->is_g4x) {
150349 INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
150351    switch (devinfo->gen) {
150357       if (devinfo->is_haswell) {
150365       if (devinfo->is_g4x) {
150388 INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_bits(const struct gen_device_info *devinfo)
150390    switch (devinfo->gen) {
150396       if (devinfo->is_haswell) {
150404       if (devinfo->is_g4x) {
150424 INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_start(const struct gen_device_info *devinfo)
150426    switch (devinfo->gen) {
150432       if (devinfo->is_haswell) {
150440       if (devinfo->is_g4x) {
150463 INTERFACE_DESCRIPTOR_DATA_RoundingMode_bits(const struct gen_device_info *devinfo)
150465    switch (devinfo->gen) {
150471       if (devinfo->is_haswell) {
150479       if (devinfo->is_g4x) {
150499 INTERFACE_DESCRIPTOR_DATA_RoundingMode_start(const struct gen_device_info *devinfo)
150501    switch (devinfo->gen) {
150507       if (devinfo->is_haswell) {
150515       if (devinfo->is_g4x) {
150539 INTERFACE_DESCRIPTOR_DATA_SamplerCount_bits(const struct gen_device_info *devinfo)
150541    switch (devinfo->gen) {
150547       if (devinfo->is_haswell) {
150555       if (devinfo->is_g4x) {
150576 INTERFACE_DESCRIPTOR_DATA_SamplerCount_start(const struct gen_device_info *devinfo)
150578    switch (devinfo->gen) {
150584       if (devinfo->is_haswell) {
150592       if (devinfo->is_g4x) {
150616 INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_bits(const struct gen_device_info *devinfo)
150618    switch (devinfo->gen) {
150624       if (devinfo->is_haswell) {
150632       if (devinfo->is_g4x) {
150653 INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_start(const struct gen_device_info *devinfo)
150655    switch (devinfo->gen) {
150661       if (devinfo->is_haswell) {
150669       if (devinfo->is_g4x) {
150692 INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_bits(const struct gen_device_info *devinfo)
150694    switch (devinfo->gen) {
150700       if (devinfo->is_haswell) {
150708       if (devinfo->is_g4x) {
150728 INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_start(const struct gen_device_info *devinfo)
150730    switch (devinfo->gen) {
150736       if (devinfo->is_haswell) {
150744       if (devinfo->is_g4x) {
150768 INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
150770    switch (devinfo->gen) {
150776       if (devinfo->is_haswell) {
150784       if (devinfo->is_g4x) {
150805 INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_start(const struct gen_device_info *devinfo)
150807    switch (devinfo->gen) {
150813       if (devinfo->is_haswell) {
150821       if (devinfo->is_g4x) {
150845 INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
150847    switch (devinfo->gen) {
150853       if (devinfo->is_haswell) {
150861       if (devinfo->is_g4x) {
150882 INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
150884    switch (devinfo->gen) {
150890       if (devinfo->is_haswell) {
150898       if (devinfo->is_g4x) {
150916 INTERFACE_DESCRIPTOR_DATA_ThreadPreemptiondisable_bits(const struct gen_device_info *devinfo)
150918    switch (devinfo->gen) {
150924       if (devinfo->is_haswell) {
150932       if (devinfo->is_g4x) {
150947 INTERFACE_DESCRIPTOR_DATA_ThreadPreemptiondisable_start(const struct gen_device_info *devinfo)
150949    switch (devinfo->gen) {
150955       if (devinfo->is_haswell) {
150963       if (devinfo->is_g4x) {
150987 INTERFACE_DESCRIPTOR_DATA_ThreadPriority_bits(const struct gen_device_info *devinfo)
150989    switch (devinfo->gen) {
150995       if (devinfo->is_haswell) {
151003       if (devinfo->is_g4x) {
151024 INTERFACE_DESCRIPTOR_DATA_ThreadPriority_start(const struct gen_device_info *devinfo)
151026    switch (devinfo->gen) {
151032       if (devinfo->is_haswell) {
151040       if (devinfo->is_g4x) {
151061 L3CNTLREG_length(const struct gen_device_info *devinfo)
151063    switch (devinfo->gen) {
151069       if (devinfo->is_haswell) {
151077       if (devinfo->is_g4x) {
151098 L3CNTLREG_AllAllocation_bits(const struct gen_device_info *devinfo)
151100    switch (devinfo->gen) {
151106       if (devinfo->is_haswell) {
151114       if (devinfo->is_g4x) {
151132 L3CNTLREG_AllAllocation_start(const struct gen_device_info *devinfo)
151134    switch (devinfo->gen) {
151140       if (devinfo->is_haswell) {
151148       if (devinfo->is_g4x) {
151169 L3CNTLREG_DCAllocation_bits(const struct gen_device_info *devinfo)
151171    switch (devinfo->gen) {
151177       if (devinfo->is_haswell) {
151185       if (devinfo->is_g4x) {
151203 L3CNTLREG_DCAllocation_start(const struct gen_device_info *devinfo)
151205    switch (devinfo->gen) {
151211       if (devinfo->is_haswell) {
151219       if (devinfo->is_g4x) {
151237 L3CNTLREG_ErrorDetectionBehaviorControl_bits(const struct gen_device_info *devinfo)
151239    switch (devinfo->gen) {
151245       if (devinfo->is_haswell) {
151253       if (devinfo->is_g4x) {
151268 L3CNTLREG_ErrorDetectionBehaviorControl_start(const struct gen_device_info *devinfo)
151270    switch (devinfo->gen) {
151276       if (devinfo->is_haswell) {
151284       if (devinfo->is_g4x) {
151305 L3CNTLREG_ROAllocation_bits(const struct gen_device_info *devinfo)
151307    switch (devinfo->gen) {
151313       if (devinfo->is_haswell) {
151321       if (devinfo->is_g4x) {
151339 L3CNTLREG_ROAllocation_start(const struct gen_device_info *devinfo)
151341    switch (devinfo->gen) {
151347       if (devinfo->is_haswell) {
151355       if (devinfo->is_g4x) {
151376 L3CNTLREG_SLMEnable_bits(const struct gen_device_info *devinfo)
151378    switch (devinfo->gen) {
151384       if (devinfo->is_haswell) {
151392       if (devinfo->is_g4x) {
151410 L3CNTLREG_SLMEnable_start(const struct gen_device_info *devinfo)
151412    switch (devinfo->gen) {
151418       if (devinfo->is_haswell) {
151426       if (devinfo->is_g4x) {
151447 L3CNTLREG_URBAllocation_bits(const struct gen_device_info *devinfo)
151449    switch (devinfo->gen) {
151455       if (devinfo->is_haswell) {
151463       if (devinfo->is_g4x) {
151481 L3CNTLREG_URBAllocation_start(const struct gen_device_info *devinfo)
151483    switch (devinfo->gen) {
151489       if (devinfo->is_haswell) {
151497       if (devinfo->is_g4x) {
151515 L3CNTLREG_UseFullWays_bits(const struct gen_device_info *devinfo)
151517    switch (devinfo->gen) {
151523       if (devinfo->is_haswell) {
151531       if (devinfo->is_g4x) {
151546 L3CNTLREG_UseFullWays_start(const struct gen_device_info *devinfo)
151548    switch (devinfo->gen) {
151554       if (devinfo->is_haswell) {
151562       if (devinfo->is_g4x) {
151581 L3CNTLREG2_length(const struct gen_device_info *devinfo)
151583    switch (devinfo->gen) {
151589       if (devinfo->is_haswell) {
151597       if (devinfo->is_g4x) {
151615 L3CNTLREG2_ALLAllocation_bits(const struct gen_device_info *devinfo)
151617    switch (devinfo->gen) {
151623       if (devinfo->is_haswell) {
151631       if (devinfo->is_g4x) {
151646 L3CNTLREG2_ALLAllocation_start(const struct gen_device_info *devinfo)
151648    switch (devinfo->gen) {
151654       if (devinfo->is_haswell) {
151662       if (devinfo->is_g4x) {
151681 L3CNTLREG2_DCAllocation_bits(const struct gen_device_info *devinfo)
151683    switch (devinfo->gen) {
151689       if (devinfo->is_haswell) {
151697       if (devinfo->is_g4x) {
151713 L3CNTLREG2_DCAllocation_start(const struct gen_device_info *devinfo)
151715    switch (devinfo->gen) {
151721       if (devinfo->is_haswell) {
151729       if (devinfo->is_g4x) {
151748 L3CNTLREG2_DCLowBandwidth_bits(const struct gen_device_info *devinfo)
151750    switch (devinfo->gen) {
151756       if (devinfo->is_haswell) {
151764       if (devinfo->is_g4x) {
151780 L3CNTLREG2_DCLowBandwidth_start(const struct gen_device_info *devinfo)
151782    switch (devinfo->gen) {
151788       if (devinfo->is_haswell) {
151796       if (devinfo->is_g4x) {
151815 L3CNTLREG2_ROAllocation_bits(const struct gen_device_info *devinfo)
151817    switch (devinfo->gen) {
151823       if (devinfo->is_haswell) {
151831       if (devinfo->is_g4x) {
151847 L3CNTLREG2_ROAllocation_start(const struct gen_device_info *devinfo)
151849    switch (devinfo->gen) {
151855       if (devinfo->is_haswell) {
151863       if (devinfo->is_g4x) {
151882 L3CNTLREG2_ROLowBandwidth_bits(const struct gen_device_info *devinfo)
151884    switch (devinfo->gen) {
151890       if (devinfo->is_haswell) {
151898       if (devinfo->is_g4x) {
151914 L3CNTLREG2_ROLowBandwidth_start(const struct gen_device_info *devinfo)
151916    switch (devinfo->gen) {
151922       if (devinfo->is_haswell) {
151930       if (devinfo->is_g4x) {
151949 L3CNTLREG2_SLMEnable_bits(const struct gen_device_info *devinfo)
151951    switch (devinfo->gen) {
151957       if (devinfo->is_haswell) {
151965       if (devinfo->is_g4x) {
151981 L3CNTLREG2_SLMEnable_start(const struct gen_device_info *devinfo)
151983    switch (devinfo->gen) {
151989       if (devinfo->is_haswell) {
151997       if (devinfo->is_g4x) {
152016 L3CNTLREG2_URBAllocation_bits(const struct gen_device_info *devinfo)
152018    switch (devinfo->gen) {
152024       if (devinfo->is_haswell) {
152032       if (devinfo->is_g4x) {
152048 L3CNTLREG2_URBAllocation_start(const struct gen_device_info *devinfo)
152050    switch (devinfo->gen) {
152056       if (devinfo->is_haswell) {
152064       if (devinfo->is_g4x) {
152083 L3CNTLREG2_URBLowBandwidth_bits(const struct gen_device_info *devinfo)
152085    switch (devinfo->gen) {
152091       if (devinfo->is_haswell) {
152099       if (devinfo->is_g4x) {
152115 L3CNTLREG2_URBLowBandwidth_start(const struct gen_device_info *devinfo)
152117    switch (devinfo->gen) {
152123       if (devinfo->is_haswell) {
152131       if (devinfo->is_g4x) {
152150 L3CNTLREG3_length(const struct gen_device_info *devinfo)
152152    switch (devinfo->gen) {
152158       if (devinfo->is_haswell) {
152166       if (devinfo->is_g4x) {
152185 L3CNTLREG3_CAllocation_bits(const struct gen_device_info *devinfo)
152187    switch (devinfo->gen) {
152193       if (devinfo->is_haswell) {
152201       if (devinfo->is_g4x) {
152217 L3CNTLREG3_CAllocation_start(const struct gen_device_info *devinfo)
152219    switch (devinfo->gen) {
152225       if (devinfo->is_haswell) {
152233       if (devinfo->is_g4x) {
152252 L3CNTLREG3_CLowBandwidth_bits(const struct gen_device_info *devinfo)
152254    switch (devinfo->gen) {
152260       if (devinfo->is_haswell) {
152268       if (devinfo->is_g4x) {
152284 L3CNTLREG3_CLowBandwidth_start(const struct gen_device_info *devinfo)
152286    switch (devinfo->gen) {
152292       if (devinfo->is_haswell) {
152300       if (devinfo->is_g4x) {
152319 L3CNTLREG3_ISAllocation_bits(const struct gen_device_info *devinfo)
152321    switch (devinfo->gen) {
152327       if (devinfo->is_haswell) {
152335       if (devinfo->is_g4x) {
152351 L3CNTLREG3_ISAllocation_start(const struct gen_device_info *devinfo)
152353    switch (devinfo->gen) {
152359       if (devinfo->is_haswell) {
152367       if (devinfo->is_g4x) {
152386 L3CNTLREG3_ISLowBandwidth_bits(const struct gen_device_info *devinfo)
152388    switch (devinfo->gen) {
152394       if (devinfo->is_haswell) {
152402       if (devinfo->is_g4x) {
152418 L3CNTLREG3_ISLowBandwidth_start(const struct gen_device_info *devinfo)
152420    switch (devinfo->gen) {
152426       if (devinfo->is_haswell) {
152434       if (devinfo->is_g4x) {
152453 L3CNTLREG3_TAllocation_bits(const struct gen_device_info *devinfo)
152455    switch (devinfo->gen) {
152461       if (devinfo->is_haswell) {
152469       if (devinfo->is_g4x) {
152485 L3CNTLREG3_TAllocation_start(const struct gen_device_info *devinfo)
152487    switch (devinfo->gen) {
152493       if (devinfo->is_haswell) {
152501       if (devinfo->is_g4x) {
152520 L3CNTLREG3_TLowBandwidth_bits(const struct gen_device_info *devinfo)
152522    switch (devinfo->gen) {
152528       if (devinfo->is_haswell) {
152536       if (devinfo->is_g4x) {
152552 L3CNTLREG3_TLowBandwidth_start(const struct gen_device_info *devinfo)
152554    switch (devinfo->gen) {
152560       if (devinfo->is_haswell) {
152568       if (devinfo->is_g4x) {
152587 L3SQCREG1_length(const struct gen_device_info *devinfo)
152589    switch (devinfo->gen) {
152595       if (devinfo->is_haswell) {
152603       if (devinfo->is_g4x) {
152622 L3SQCREG1_ConvertC_UC_bits(const struct gen_device_info *devinfo)
152624    switch (devinfo->gen) {
152630       if (devinfo->is_haswell) {
152638       if (devinfo->is_g4x) {
152654 L3SQCREG1_ConvertC_UC_start(const struct gen_device_info *devinfo)
152656    switch (devinfo->gen) {
152662       if (devinfo->is_haswell) {
152670       if (devinfo->is_g4x) {
152689 L3SQCREG1_ConvertDC_UC_bits(const struct gen_device_info *devinfo)
152691    switch (devinfo->gen) {
152697       if (devinfo->is_haswell) {
152705       if (devinfo->is_g4x) {
152721 L3SQCREG1_ConvertDC_UC_start(const struct gen_device_info *devinfo)
152723    switch (devinfo->gen) {
152729       if (devinfo->is_haswell) {
152737       if (devinfo->is_g4x) {
152756 L3SQCREG1_ConvertIS_UC_bits(const struct gen_device_info *devinfo)
152758    switch (devinfo->gen) {
152764       if (devinfo->is_haswell) {
152772       if (devinfo->is_g4x) {
152788 L3SQCREG1_ConvertIS_UC_start(const struct gen_device_info *devinfo)
152790    switch (devinfo->gen) {
152796       if (devinfo->is_haswell) {
152804       if (devinfo->is_g4x) {
152823 L3SQCREG1_ConvertT_UC_bits(const struct gen_device_info *devinfo)
152825    switch (devinfo->gen) {
152831       if (devinfo->is_haswell) {
152839       if (devinfo->is_g4x) {
152855 L3SQCREG1_ConvertT_UC_start(const struct gen_device_info *devinfo)
152857    switch (devinfo->gen) {
152863       if (devinfo->is_haswell) {
152871       if (devinfo->is_g4x) {
152890 LUMA_FILTER_COEFFICIENTS_ARRAY_length(const struct gen_device_info *devinfo)
152892    switch (devinfo->gen) {
152898       if (devinfo->is_haswell) {
152906       if (devinfo->is_g4x) {
152925 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn0_bits(const struct gen_device_info *devinfo)
152927    switch (devinfo->gen) {
152933       if (devinfo->is_haswell) {
152941       if (devinfo->is_g4x) {
152957 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn0_start(const struct gen_device_info *devinfo)
152959    switch (devinfo->gen) {
152965       if (devinfo->is_haswell) {
152973       if (devinfo->is_g4x) {
152992 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn1_bits(const struct gen_device_info *devinfo)
152994    switch (devinfo->gen) {
153000       if (devinfo->is_haswell) {
153008       if (devinfo->is_g4x) {
153024 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn1_start(const struct gen_device_info *devinfo)
153026    switch (devinfo->gen) {
153032       if (devinfo->is_haswell) {
153040       if (devinfo->is_g4x) {
153059 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
153061    switch (devinfo->gen) {
153067       if (devinfo->is_haswell) {
153075       if (devinfo->is_g4x) {
153091 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn2_start(const struct gen_device_info *devinfo)
153093    switch (devinfo->gen) {
153099       if (devinfo->is_haswell) {
153107       if (devinfo->is_g4x) {
153126 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
153128    switch (devinfo->gen) {
153134       if (devinfo->is_haswell) {
153142       if (devinfo->is_g4x) {
153158 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn3_start(const struct gen_device_info *devinfo)
153160    switch (devinfo->gen) {
153166       if (devinfo->is_haswell) {
153174       if (devinfo->is_g4x) {
153193 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
153195    switch (devinfo->gen) {
153201       if (devinfo->is_haswell) {
153209       if (devinfo->is_g4x) {
153225 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn4_start(const struct gen_device_info *devinfo)
153227    switch (devinfo->gen) {
153233       if (devinfo->is_haswell) {
153241       if (devinfo->is_g4x) {
153260 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
153262    switch (devinfo->gen) {
153268       if (devinfo->is_haswell) {
153276       if (devinfo->is_g4x) {
153292 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn5_start(const struct gen_device_info *devinfo)
153294    switch (devinfo->gen) {
153300       if (devinfo->is_haswell) {
153308       if (devinfo->is_g4x) {
153327 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn6_bits(const struct gen_device_info *devinfo)
153329    switch (devinfo->gen) {
153335       if (devinfo->is_haswell) {
153343       if (devinfo->is_g4x) {
153359 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn6_start(const struct gen_device_info *devinfo)
153361    switch (devinfo->gen) {
153367       if (devinfo->is_haswell) {
153375       if (devinfo->is_g4x) {
153394 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn7_bits(const struct gen_device_info *devinfo)
153396    switch (devinfo->gen) {
153402       if (devinfo->is_haswell) {
153410       if (devinfo->is_g4x) {
153426 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0XFilterCoefficientn7_start(const struct gen_device_info *devinfo)
153428    switch (devinfo->gen) {
153434       if (devinfo->is_haswell) {
153442       if (devinfo->is_g4x) {
153461 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn0_bits(const struct gen_device_info *devinfo)
153463    switch (devinfo->gen) {
153469       if (devinfo->is_haswell) {
153477       if (devinfo->is_g4x) {
153493 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn0_start(const struct gen_device_info *devinfo)
153495    switch (devinfo->gen) {
153501       if (devinfo->is_haswell) {
153509       if (devinfo->is_g4x) {
153528 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn1_bits(const struct gen_device_info *devinfo)
153530    switch (devinfo->gen) {
153536       if (devinfo->is_haswell) {
153544       if (devinfo->is_g4x) {
153560 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn1_start(const struct gen_device_info *devinfo)
153562    switch (devinfo->gen) {
153568       if (devinfo->is_haswell) {
153576       if (devinfo->is_g4x) {
153595 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
153597    switch (devinfo->gen) {
153603       if (devinfo->is_haswell) {
153611       if (devinfo->is_g4x) {
153627 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn2_start(const struct gen_device_info *devinfo)
153629    switch (devinfo->gen) {
153635       if (devinfo->is_haswell) {
153643       if (devinfo->is_g4x) {
153662 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
153664    switch (devinfo->gen) {
153670       if (devinfo->is_haswell) {
153678       if (devinfo->is_g4x) {
153694 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn3_start(const struct gen_device_info *devinfo)
153696    switch (devinfo->gen) {
153702       if (devinfo->is_haswell) {
153710       if (devinfo->is_g4x) {
153729 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
153731    switch (devinfo->gen) {
153737       if (devinfo->is_haswell) {
153745       if (devinfo->is_g4x) {
153761 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn4_start(const struct gen_device_info *devinfo)
153763    switch (devinfo->gen) {
153769       if (devinfo->is_haswell) {
153777       if (devinfo->is_g4x) {
153796 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
153798    switch (devinfo->gen) {
153804       if (devinfo->is_haswell) {
153812       if (devinfo->is_g4x) {
153828 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn5_start(const struct gen_device_info *devinfo)
153830    switch (devinfo->gen) {
153836       if (devinfo->is_haswell) {
153844       if (devinfo->is_g4x) {
153863 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn6_bits(const struct gen_device_info *devinfo)
153865    switch (devinfo->gen) {
153871       if (devinfo->is_haswell) {
153879       if (devinfo->is_g4x) {
153895 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn6_start(const struct gen_device_info *devinfo)
153897    switch (devinfo->gen) {
153903       if (devinfo->is_haswell) {
153911       if (devinfo->is_g4x) {
153930 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn7_bits(const struct gen_device_info *devinfo)
153932    switch (devinfo->gen) {
153938       if (devinfo->is_haswell) {
153946       if (devinfo->is_g4x) {
153962 LUMA_FILTER_COEFFICIENTS_ARRAY_Table0YFilterCoefficientn7_start(const struct gen_device_info *devinfo)
153964    switch (devinfo->gen) {
153970       if (devinfo->is_haswell) {
153978       if (devinfo->is_g4x) {
154002 MEDIA_CURBE_LOAD_length(const struct gen_device_info *devinfo)
154004    switch (devinfo->gen) {
154010       if (devinfo->is_haswell) {
154018       if (devinfo->is_g4x) {
154042 MEDIA_CURBE_LOAD_CURBEDataStartAddress_bits(const struct gen_device_info *devinfo)
154044    switch (devinfo->gen) {
154050       if (devinfo->is_haswell) {
154058       if (devinfo->is_g4x) {
154079 MEDIA_CURBE_LOAD_CURBEDataStartAddress_start(const struct gen_device_info *devinfo)
154081    switch (devinfo->gen) {
154087       if (devinfo->is_haswell) {
154095       if (devinfo->is_g4x) {
154119 MEDIA_CURBE_LOAD_CURBETotalDataLength_bits(const struct gen_device_info *devinfo)
154121    switch (devinfo->gen) {
154127       if (devinfo->is_haswell) {
154135       if (devinfo->is_g4x) {
154156 MEDIA_CURBE_LOAD_CURBETotalDataLength_start(const struct gen_device_info *devinfo)
154158    switch (devinfo->gen) {
154164       if (devinfo->is_haswell) {
154172       if (devinfo->is_g4x) {
154196 MEDIA_CURBE_LOAD_CommandType_bits(const struct gen_device_info *devinfo)
154198    switch (devinfo->gen) {
154204       if (devinfo->is_haswell) {
154212       if (devinfo->is_g4x) {
154233 MEDIA_CURBE_LOAD_CommandType_start(const struct gen_device_info *devinfo)
154235    switch (devinfo->gen) {
154241       if (devinfo->is_haswell) {
154249       if (devinfo->is_g4x) {
154273 MEDIA_CURBE_LOAD_DWordLength_bits(const struct gen_device_info *devinfo)
154275    switch (devinfo->gen) {
154281       if (devinfo->is_haswell) {
154289       if (devinfo->is_g4x) {
154310 MEDIA_CURBE_LOAD_DWordLength_start(const struct gen_device_info *devinfo)
154312    switch (devinfo->gen) {
154318       if (devinfo->is_haswell) {
154326       if (devinfo->is_g4x) {
154350 MEDIA_CURBE_LOAD_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
154352    switch (devinfo->gen) {
154358       if (devinfo->is_haswell) {
154366       if (devinfo->is_g4x) {
154387 MEDIA_CURBE_LOAD_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
154389    switch (devinfo->gen) {
154395       if (devinfo->is_haswell) {
154403       if (devinfo->is_g4x) {
154427 MEDIA_CURBE_LOAD_Pipeline_bits(const struct gen_device_info *devinfo)
154429    switch (devinfo->gen) {
154435       if (devinfo->is_haswell) {
154443       if (devinfo->is_g4x) {
154464 MEDIA_CURBE_LOAD_Pipeline_start(const struct gen_device_info *devinfo)
154466    switch (devinfo->gen) {
154472       if (devinfo->is_haswell) {
154480       if (devinfo->is_g4x) {
154504 MEDIA_CURBE_LOAD_SubOpcode_bits(const struct gen_device_info *devinfo)
154506    switch (devinfo->gen) {
154512       if (devinfo->is_haswell) {
154520       if (devinfo->is_g4x) {
154541 MEDIA_CURBE_LOAD_SubOpcode_start(const struct gen_device_info *devinfo)
154543    switch (devinfo->gen) {
154549       if (devinfo->is_haswell) {
154557       if (devinfo->is_g4x) {
154575 MEDIA_GATEWAY_STATE_length(const struct gen_device_info *devinfo)
154577    switch (devinfo->gen) {
154583       if (devinfo->is_haswell) {
154591       if (devinfo->is_g4x) {
154609 MEDIA_GATEWAY_STATE_BarrierByte_bits(const struct gen_device_info *devinfo)
154611    switch (devinfo->gen) {
154617       if (devinfo->is_haswell) {
154625       if (devinfo->is_g4x) {
154640 MEDIA_GATEWAY_STATE_BarrierByte_start(const struct gen_device_info *devinfo)
154642    switch (devinfo->gen) {
154648       if (devinfo->is_haswell) {
154656       if (devinfo->is_g4x) {
154674 MEDIA_GATEWAY_STATE_BarrierThreadCount_bits(const struct gen_device_info *devinfo)
154676    switch (devinfo->gen) {
154682       if (devinfo->is_haswell) {
154690       if (devinfo->is_g4x) {
154705 MEDIA_GATEWAY_STATE_BarrierThreadCount_start(const struct gen_device_info *devinfo)
154707    switch (devinfo->gen) {
154713       if (devinfo->is_haswell) {
154721       if (devinfo->is_g4x) {
154739 MEDIA_GATEWAY_STATE_BarrierID_bits(const struct gen_device_info *devinfo)
154741    switch (devinfo->gen) {
154747       if (devinfo->is_haswell) {
154755       if (devinfo->is_g4x) {
154770 MEDIA_GATEWAY_STATE_BarrierID_start(const struct gen_device_info *devinfo)
154772    switch (devinfo->gen) {
154778       if (devinfo->is_haswell) {
154786       if (devinfo->is_g4x) {
154804 MEDIA_GATEWAY_STATE_CommandType_bits(const struct gen_device_info *devinfo)
154806    switch (devinfo->gen) {
154812       if (devinfo->is_haswell) {
154820       if (devinfo->is_g4x) {
154835 MEDIA_GATEWAY_STATE_CommandType_start(const struct gen_device_info *devinfo)
154837    switch (devinfo->gen) {
154843       if (devinfo->is_haswell) {
154851       if (devinfo->is_g4x) {
154869 MEDIA_GATEWAY_STATE_DWordLength_bits(const struct gen_device_info *devinfo)
154871    switch (devinfo->gen) {
154877       if (devinfo->is_haswell) {
154885       if (devinfo->is_g4x) {
154900 MEDIA_GATEWAY_STATE_DWordLength_start(const struct gen_device_info *devinfo)
154902    switch (devinfo->gen) {
154908       if (devinfo->is_haswell) {
154916       if (devinfo->is_g4x) {
154934 MEDIA_GATEWAY_STATE_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
154936    switch (devinfo->gen) {
154942       if (devinfo->is_haswell) {
154950       if (devinfo->is_g4x) {
154965 MEDIA_GATEWAY_STATE_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
154967    switch (devinfo->gen) {
154973       if (devinfo->is_haswell) {
154981       if (devinfo->is_g4x) {
154999 MEDIA_GATEWAY_STATE_Pipeline_bits(const struct gen_device_info *devinfo)
155001    switch (devinfo->gen) {
155007       if (devinfo->is_haswell) {
155015       if (devinfo->is_g4x) {
155030 MEDIA_GATEWAY_STATE_Pipeline_start(const struct gen_device_info *devinfo)
155032    switch (devinfo->gen) {
155038       if (devinfo->is_haswell) {
155046       if (devinfo->is_g4x) {
155064 MEDIA_GATEWAY_STATE_SubOpcode_bits(const struct gen_device_info *devinfo)
155066    switch (devinfo->gen) {
155072       if (devinfo->is_haswell) {
155080       if (devinfo->is_g4x) {
155095 MEDIA_GATEWAY_STATE_SubOpcode_start(const struct gen_device_info *devinfo)
155097    switch (devinfo->gen) {
155103       if (devinfo->is_haswell) {
155111       if (devinfo->is_g4x) {
155135 MEDIA_INTERFACE_DESCRIPTOR_LOAD_length(const struct gen_device_info *devinfo)
155137    switch (devinfo->gen) {
155143       if (devinfo->is_haswell) {
155151       if (devinfo->is_g4x) {
155175 MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_bits(const struct gen_device_info *devinfo)
155177    switch (devinfo->gen) {
155183       if (devinfo->is_haswell) {
155191       if (devinfo->is_g4x) {
155212 MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_start(const struct gen_device_info *devinfo)
155214    switch (devinfo->gen) {
155220       if (devinfo->is_haswell) {
155228       if (devinfo->is_g4x) {
155252 MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_bits(const struct gen_device_info *devinfo)
155254    switch (devinfo->gen) {
155260       if (devinfo->is_haswell) {
155268       if (devinfo->is_g4x) {
155289 MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_start(const struct gen_device_info *devinfo)
155291    switch (devinfo->gen) {
155297       if (devinfo->is_haswell) {
155305       if (devinfo->is_g4x) {
155329 MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_bits(const struct gen_device_info *devinfo)
155331    switch (devinfo->gen) {
155337       if (devinfo->is_haswell) {
155345       if (devinfo->is_g4x) {
155366 MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_start(const struct gen_device_info *devinfo)
155368    switch (devinfo->gen) {
155374       if (devinfo->is_haswell) {
155382       if (devinfo->is_g4x) {
155406 MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_bits(const struct gen_device_info *devinfo)
155408    switch (devinfo->gen) {
155414       if (devinfo->is_haswell) {
155422       if (devinfo->is_g4x) {
155443 MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_start(const struct gen_device_info *devinfo)
155445    switch (devinfo->gen) {
155451       if (devinfo->is_haswell) {
155459       if (devinfo->is_g4x) {
155483 MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
155485    switch (devinfo->gen) {
155491       if (devinfo->is_haswell) {
155499       if (devinfo->is_g4x) {
155520 MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
155522    switch (devinfo->gen) {
155528       if (devinfo->is_haswell) {
155536       if (devinfo->is_g4x) {
155560 MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_bits(const struct gen_device_info *devinfo)
155562    switch (devinfo->gen) {
155568       if (devinfo->is_haswell) {
155576       if (devinfo->is_g4x) {
155597 MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_start(const struct gen_device_info *devinfo)
155599    switch (devinfo->gen) {
155605       if (devinfo->is_haswell) {
155613       if (devinfo->is_g4x) {
155637 MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_bits(const struct gen_device_info *devinfo)
155639    switch (devinfo->gen) {
155645       if (devinfo->is_haswell) {
155653       if (devinfo->is_g4x) {
155674 MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_start(const struct gen_device_info *devinfo)
155676    switch (devinfo->gen) {
155682       if (devinfo->is_haswell) {
155690       if (devinfo->is_g4x) {
155714 MEDIA_OBJECT_BlockColor_bits(const struct gen_device_info *devinfo)
155716    switch (devinfo->gen) {
155722       if (devinfo->is_haswell) {
155730       if (devinfo->is_g4x) {
155745 MEDIA_OBJECT_BlockColor_start(const struct gen_device_info *devinfo)
155747    switch (devinfo->gen) {
155753       if (devinfo->is_haswell) {
155761       if (devinfo->is_g4x) {
155785 MEDIA_OBJECT_ChildrenPresent_bits(const struct gen_device_info *devinfo)
155787    switch (devinfo->gen) {
155793       if (devinfo->is_haswell) {
155801       if (devinfo->is_g4x) {
155822 MEDIA_OBJECT_ChildrenPresent_start(const struct gen_device_info *devinfo)
155824    switch (devinfo->gen) {
155830       if (devinfo->is_haswell) {
155838       if (devinfo->is_g4x) {
155862 MEDIA_OBJECT_CommandType_bits(const struct gen_device_info *devinfo)
155864    switch (devinfo->gen) {
155870       if (devinfo->is_haswell) {
155878       if (devinfo->is_g4x) {
155899 MEDIA_OBJECT_CommandType_start(const struct gen_device_info *devinfo)
155901    switch (devinfo->gen) {
155907       if (devinfo->is_haswell) {
155915       if (devinfo->is_g4x) {
155939 MEDIA_OBJECT_DWordLength_bits(const struct gen_device_info *devinfo)
155941    switch (devinfo->gen) {
155947       if (devinfo->is_haswell) {
155955       if (devinfo->is_g4x) {
155976 MEDIA_OBJECT_DWordLength_start(const struct gen_device_info *devinfo)
155978    switch (devinfo->gen) {
155984       if (devinfo->is_haswell) {
155992       if (devinfo->is_g4x) {
156013 MEDIA_OBJECT_ForceDestination_bits(const struct gen_device_info *devinfo)
156015    switch (devinfo->gen) {
156021       if (devinfo->is_haswell) {
156029       if (devinfo->is_g4x) {
156047 MEDIA_OBJECT_ForceDestination_start(const struct gen_device_info *devinfo)
156049    switch (devinfo->gen) {
156055       if (devinfo->is_haswell) {
156063       if (devinfo->is_g4x) {
156082 MEDIA_OBJECT_HalfSliceDestinationSelect_bits(const struct gen_device_info *devinfo)
156084    switch (devinfo->gen) {
156090       if (devinfo->is_haswell) {
156098       if (devinfo->is_g4x) {
156114 MEDIA_OBJECT_HalfSliceDestinationSelect_start(const struct gen_device_info *devinfo)
156116    switch (devinfo->gen) {
156122       if (devinfo->is_haswell) {
156130       if (devinfo->is_g4x) {
156154 MEDIA_OBJECT_IndirectDataLength_bits(const struct gen_device_info *devinfo)
156156    switch (devinfo->gen) {
156162       if (devinfo->is_haswell) {
156170       if (devinfo->is_g4x) {
156191 MEDIA_OBJECT_IndirectDataLength_start(const struct gen_device_info *devinfo)
156193    switch (devinfo->gen) {
156199       if (devinfo->is_haswell) {
156207       if (devinfo->is_g4x) {
156231 MEDIA_OBJECT_IndirectDataStartAddress_bits(const struct gen_device_info *devinfo)
156233    switch (devinfo->gen) {
156239       if (devinfo->is_haswell) {
156247       if (devinfo->is_g4x) {
156268 MEDIA_OBJECT_IndirectDataStartAddress_start(const struct gen_device_info *devinfo)
156270    switch (devinfo->gen) {
156276       if (devinfo->is_haswell) {
156284       if (devinfo->is_g4x) {
156308 MEDIA_OBJECT_InlineData_bits(const struct gen_device_info *devinfo)
156310    switch (devinfo->gen) {
156316       if (devinfo->is_haswell) {
156324       if (devinfo->is_g4x) {
156345 MEDIA_OBJECT_InlineData_start(const struct gen_device_info *devinfo)
156347    switch (devinfo->gen) {
156353       if (devinfo->is_haswell) {
156361       if (devinfo->is_g4x) {
156385 MEDIA_OBJECT_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
156387    switch (devinfo->gen) {
156393       if (devinfo->is_haswell) {
156401       if (devinfo->is_g4x) {
156422 MEDIA_OBJECT_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
156424    switch (devinfo->gen) {
156430       if (devinfo->is_haswell) {
156438       if (devinfo->is_g4x) {
156462 MEDIA_OBJECT_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
156464    switch (devinfo->gen) {
156470       if (devinfo->is_haswell) {
156478       if (devinfo->is_g4x) {
156499 MEDIA_OBJECT_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
156501    switch (devinfo->gen) {
156507       if (devinfo->is_haswell) {
156515       if (devinfo->is_g4x) {
156539 MEDIA_OBJECT_MediaCommandPipeline_bits(const struct gen_device_info *devinfo)
156541    switch (devinfo->gen) {
156547       if (devinfo->is_haswell) {
156555       if (devinfo->is_g4x) {
156576 MEDIA_OBJECT_MediaCommandPipeline_start(const struct gen_device_info *devinfo)
156578    switch (devinfo->gen) {
156584       if (devinfo->is_haswell) {
156592       if (devinfo->is_g4x) {
156616 MEDIA_OBJECT_MediaCommandSubOpcode_bits(const struct gen_device_info *devinfo)
156618    switch (devinfo->gen) {
156624       if (devinfo->is_haswell) {
156632       if (devinfo->is_g4x) {
156653 MEDIA_OBJECT_MediaCommandSubOpcode_start(const struct gen_device_info *devinfo)
156655    switch (devinfo->gen) {
156661       if (devinfo->is_haswell) {
156669       if (devinfo->is_g4x) {
156692 MEDIA_OBJECT_ScoreboardColor_bits(const struct gen_device_info *devinfo)
156694    switch (devinfo->gen) {
156700       if (devinfo->is_haswell) {
156708       if (devinfo->is_g4x) {
156728 MEDIA_OBJECT_ScoreboardColor_start(const struct gen_device_info *devinfo)
156730    switch (devinfo->gen) {
156736       if (devinfo->is_haswell) {
156744       if (devinfo->is_g4x) {
156767 MEDIA_OBJECT_ScoreboardMask_bits(const struct gen_device_info *devinfo)
156769    switch (devinfo->gen) {
156775       if (devinfo->is_haswell) {
156783       if (devinfo->is_g4x) {
156803 MEDIA_OBJECT_ScoreboardMask_start(const struct gen_device_info *devinfo)
156805    switch (devinfo->gen) {
156811       if (devinfo->is_haswell) {
156819       if (devinfo->is_g4x) {
156842 MEDIA_OBJECT_ScoreboardX_bits(const struct gen_device_info *devinfo)
156844    switch (devinfo->gen) {
156850       if (devinfo->is_haswell) {
156858       if (devinfo->is_g4x) {
156878 MEDIA_OBJECT_ScoreboardX_start(const struct gen_device_info *devinfo)
156880    switch (devinfo->gen) {
156886       if (devinfo->is_haswell) {
156894       if (devinfo->is_g4x) {
156917 MEDIA_OBJECT_ScoredboardY_bits(const struct gen_device_info *devinfo)
156919    switch (devinfo->gen) {
156925       if (devinfo->is_haswell) {
156933       if (devinfo->is_g4x) {
156953 MEDIA_OBJECT_ScoredboardY_start(const struct gen_device_info *devinfo)
156955    switch (devinfo->gen) {
156961       if (devinfo->is_haswell) {
156969       if (devinfo->is_g4x) {
156991 MEDIA_OBJECT_SliceDestinationSelect_bits(const struct gen_device_info *devinfo)
156993    switch (devinfo->gen) {
156999       if (devinfo->is_haswell) {
157007       if (devinfo->is_g4x) {
157026 MEDIA_OBJECT_SliceDestinationSelect_start(const struct gen_device_info *devinfo)
157028    switch (devinfo->gen) {
157034       if (devinfo->is_haswell) {
157042       if (devinfo->is_g4x) {
157062 MEDIA_OBJECT_SliceDestinationSelectMSBs_bits(const struct gen_device_info *devinfo)
157064    switch (devinfo->gen) {
157070       if (devinfo->is_haswell) {
157078       if (devinfo->is_g4x) {
157095 MEDIA_OBJECT_SliceDestinationSelectMSBs_start(const struct gen_device_info *devinfo)
157097    switch (devinfo->gen) {
157103       if (devinfo->is_haswell) {
157111       if (devinfo->is_g4x) {
157132 MEDIA_OBJECT_SubSliceDestinationSelect_bits(const struct gen_device_info *devinfo)
157134    switch (devinfo->gen) {
157140       if (devinfo->is_haswell) {
157148       if (devinfo->is_g4x) {
157166 MEDIA_OBJECT_SubSliceDestinationSelect_start(const struct gen_device_info *devinfo)
157168    switch (devinfo->gen) {
157174       if (devinfo->is_haswell) {
157182       if (devinfo->is_g4x) {
157206 MEDIA_OBJECT_ThreadSynchronization_bits(const struct gen_device_info *devinfo)
157208    switch (devinfo->gen) {
157214       if (devinfo->is_haswell) {
157222       if (devinfo->is_g4x) {
157243 MEDIA_OBJECT_ThreadSynchronization_start(const struct gen_device_info *devinfo)
157245    switch (devinfo->gen) {
157251       if (devinfo->is_haswell) {
157259       if (devinfo->is_g4x) {
157282 MEDIA_OBJECT_UseScoreboard_bits(const struct gen_device_info *devinfo)
157284    switch (devinfo->gen) {
157290       if (devinfo->is_haswell) {
157298       if (devinfo->is_g4x) {
157318 MEDIA_OBJECT_UseScoreboard_start(const struct gen_device_info *devinfo)
157320    switch (devinfo->gen) {
157326       if (devinfo->is_haswell) {
157334       if (devinfo->is_g4x) {
157352 MEDIA_OBJECT_XPosition_bits(const struct gen_device_info *devinfo)
157354    switch (devinfo->gen) {
157360       if (devinfo->is_haswell) {
157368       if (devinfo->is_g4x) {
157383 MEDIA_OBJECT_XPosition_start(const struct gen_device_info *devinfo)
157385    switch (devinfo->gen) {
157391       if (devinfo->is_haswell) {
157399       if (devinfo->is_g4x) {
157417 MEDIA_OBJECT_YPosition_bits(const struct gen_device_info *devinfo)
157419    switch (devinfo->gen) {
157425       if (devinfo->is_haswell) {
157433       if (devinfo->is_g4x) {
157448 MEDIA_OBJECT_YPosition_start(const struct gen_device_info *devinfo)
157450    switch (devinfo->gen) {
157456       if (devinfo->is_haswell) {
157464       if (devinfo->is_g4x) {
157488 MEDIA_OBJECT_GRPID_BlockColor_bits(const struct gen_device_info *devinfo)
157490    switch (devinfo->gen) {
157496       if (devinfo->is_haswell) {
157504       if (devinfo->is_g4x) {
157519 MEDIA_OBJECT_GRPID_BlockColor_start(const struct gen_device_info *devinfo)
157521    switch (devinfo->gen) {
157527       if (devinfo->is_haswell) {
157535       if (devinfo->is_g4x) {
157556 MEDIA_OBJECT_GRPID_CommandType_bits(const struct gen_device_info *devinfo)
157558    switch (devinfo->gen) {
157564       if (devinfo->is_haswell) {
157572       if (devinfo->is_g4x) {
157590 MEDIA_OBJECT_GRPID_CommandType_start(const struct gen_device_info *devinfo)
157592    switch (devinfo->gen) {
157598       if (devinfo->is_haswell) {
157606       if (devinfo->is_g4x) {
157627 MEDIA_OBJECT_GRPID_DWordLength_bits(const struct gen_device_info *devinfo)
157629    switch (devinfo->gen) {
157635       if (devinfo->is_haswell) {
157643       if (devinfo->is_g4x) {
157661 MEDIA_OBJECT_GRPID_DWordLength_start(const struct gen_device_info *devinfo)
157663    switch (devinfo->gen) {
157669       if (devinfo->is_haswell) {
157677       if (devinfo->is_g4x) {
157698 MEDIA_OBJECT_GRPID_EndofThreadGroup_bits(const struct gen_device_info *devinfo)
157700    switch (devinfo->gen) {
157706       if (devinfo->is_haswell) {
157714       if (devinfo->is_g4x) {
157732 MEDIA_OBJECT_GRPID_EndofThreadGroup_start(const struct gen_device_info *devinfo)
157734    switch (devinfo->gen) {
157740       if (devinfo->is_haswell) {
157748       if (devinfo->is_g4x) {
157767 MEDIA_OBJECT_GRPID_ForceDestination_bits(const struct gen_device_info *devinfo)
157769    switch (devinfo->gen) {
157775       if (devinfo->is_haswell) {
157783       if (devinfo->is_g4x) {
157799 MEDIA_OBJECT_GRPID_ForceDestination_start(const struct gen_device_info *devinfo)
157801    switch (devinfo->gen) {
157807       if (devinfo->is_haswell) {
157815       if (devinfo->is_g4x) {
157836 MEDIA_OBJECT_GRPID_GroupID_bits(const struct gen_device_info *devinfo)
157838    switch (devinfo->gen) {
157844       if (devinfo->is_haswell) {
157852       if (devinfo->is_g4x) {
157870 MEDIA_OBJECT_GRPID_GroupID_start(const struct gen_device_info *devinfo)
157872    switch (devinfo->gen) {
157878       if (devinfo->is_haswell) {
157886       if (devinfo->is_g4x) {
157907 MEDIA_OBJECT_GRPID_IndirectDataLength_bits(const struct gen_device_info *devinfo)
157909    switch (devinfo->gen) {
157915       if (devinfo->is_haswell) {
157923       if (devinfo->is_g4x) {
157941 MEDIA_OBJECT_GRPID_IndirectDataLength_start(const struct gen_device_info *devinfo)
157943    switch (devinfo->gen) {
157949       if (devinfo->is_haswell) {
157957       if (devinfo->is_g4x) {
157978 MEDIA_OBJECT_GRPID_IndirectDataStartAddress_bits(const struct gen_device_info *devinfo)
157980    switch (devinfo->gen) {
157986       if (devinfo->is_haswell) {
157994       if (devinfo->is_g4x) {
158012 MEDIA_OBJECT_GRPID_IndirectDataStartAddress_start(const struct gen_device_info *devinfo)
158014    switch (devinfo->gen) {
158020       if (devinfo->is_haswell) {
158028       if (devinfo->is_g4x) {
158049 MEDIA_OBJECT_GRPID_InlineData_bits(const struct gen_device_info *devinfo)
158051    switch (devinfo->gen) {
158057       if (devinfo->is_haswell) {
158065       if (devinfo->is_g4x) {
158083 MEDIA_OBJECT_GRPID_InlineData_start(const struct gen_device_info *devinfo)
158085    switch (devinfo->gen) {
158091       if (devinfo->is_haswell) {
158099       if (devinfo->is_g4x) {
158120 MEDIA_OBJECT_GRPID_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
158122    switch (devinfo->gen) {
158128       if (devinfo->is_haswell) {
158136       if (devinfo->is_g4x) {
158154 MEDIA_OBJECT_GRPID_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
158156    switch (devinfo->gen) {
158162       if (devinfo->is_haswell) {
158170       if (devinfo->is_g4x) {
158191 MEDIA_OBJECT_GRPID_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
158193    switch (devinfo->gen) {
158199       if (devinfo->is_haswell) {
158207       if (devinfo->is_g4x) {
158225 MEDIA_OBJECT_GRPID_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
158227    switch (devinfo->gen) {
158233       if (devinfo->is_haswell) {
158241       if (devinfo->is_g4x) {
158262 MEDIA_OBJECT_GRPID_MediaCommandPipeline_bits(const struct gen_device_info *devinfo)
158264    switch (devinfo->gen) {
158270       if (devinfo->is_haswell) {
158278       if (devinfo->is_g4x) {
158296 MEDIA_OBJECT_GRPID_MediaCommandPipeline_start(const struct gen_device_info *devinfo)
158298    switch (devinfo->gen) {
158304       if (devinfo->is_haswell) {
158312       if (devinfo->is_g4x) {
158333 MEDIA_OBJECT_GRPID_MediaCommandSubOpcode_bits(const struct gen_device_info *devinfo)
158335    switch (devinfo->gen) {
158341       if (devinfo->is_haswell) {
158349       if (devinfo->is_g4x) {
158367 MEDIA_OBJECT_GRPID_MediaCommandSubOpcode_start(const struct gen_device_info *devinfo)
158369    switch (devinfo->gen) {
158375       if (devinfo->is_haswell) {
158383       if (devinfo->is_g4x) {
158403 MEDIA_OBJECT_GRPID_ScoreboardColor_bits(const struct gen_device_info *devinfo)
158405    switch (devinfo->gen) {
158411       if (devinfo->is_haswell) {
158419       if (devinfo->is_g4x) {
158436 MEDIA_OBJECT_GRPID_ScoreboardColor_start(const struct gen_device_info *devinfo)
158438    switch (devinfo->gen) {
158444       if (devinfo->is_haswell) {
158452       if (devinfo->is_g4x) {
158472 MEDIA_OBJECT_GRPID_ScoreboardMask_bits(const struct gen_device_info *devinfo)
158474    switch (devinfo->gen) {
158480       if (devinfo->is_haswell) {
158488       if (devinfo->is_g4x) {
158505 MEDIA_OBJECT_GRPID_ScoreboardMask_start(const struct gen_device_info *devinfo)
158507    switch (devinfo->gen) {
158513       if (devinfo->is_haswell) {
158521       if (devinfo->is_g4x) {
158541 MEDIA_OBJECT_GRPID_ScoreboardX_bits(const struct gen_device_info *devinfo)
158543    switch (devinfo->gen) {
158549       if (devinfo->is_haswell) {
158557       if (devinfo->is_g4x) {
158574 MEDIA_OBJECT_GRPID_ScoreboardX_start(const struct gen_device_info *devinfo)
158576    switch (devinfo->gen) {
158582       if (devinfo->is_haswell) {
158590       if (devinfo->is_g4x) {
158610 MEDIA_OBJECT_GRPID_ScoreboardY_bits(const struct gen_device_info *devinfo)
158612    switch (devinfo->gen) {
158618       if (devinfo->is_haswell) {
158626       if (devinfo->is_g4x) {
158643 MEDIA_OBJECT_GRPID_ScoreboardY_start(const struct gen_device_info *devinfo)
158645    switch (devinfo->gen) {
158651       if (devinfo->is_haswell) {
158659       if (devinfo->is_g4x) {
158678 MEDIA_OBJECT_GRPID_SliceDestinationSelect_bits(const struct gen_device_info *devinfo)
158680    switch (devinfo->gen) {
158686       if (devinfo->is_haswell) {
158694       if (devinfo->is_g4x) {
158710 MEDIA_OBJECT_GRPID_SliceDestinationSelect_start(const struct gen_device_info *devinfo)
158712    switch (devinfo->gen) {
158718       if (devinfo->is_haswell) {
158726       if (devinfo->is_g4x) {
158744 MEDIA_OBJECT_GRPID_SliceDestinationSelectMSB_bits(const struct gen_device_info *devinfo)
158746    switch (devinfo->gen) {
158752       if (devinfo->is_haswell) {
158760       if (devinfo->is_g4x) {
158775 MEDIA_OBJECT_GRPID_SliceDestinationSelectMSB_start(const struct gen_device_info *devinfo)
158777    switch (devinfo->gen) {
158783       if (devinfo->is_haswell) {
158791       if (devinfo->is_g4x) {
158810 MEDIA_OBJECT_GRPID_SubSliceDestinationSelect_bits(const struct gen_device_info *devinfo)
158812    switch (devinfo->gen) {
158818       if (devinfo->is_haswell) {
158826       if (devinfo->is_g4x) {
158842 MEDIA_OBJECT_GRPID_SubSliceDestinationSelect_start(const struct gen_device_info *devinfo)
158844    switch (devinfo->gen) {
158850       if (devinfo->is_haswell) {
158858       if (devinfo->is_g4x) {
158878 MEDIA_OBJECT_GRPID_UseScoreboard_bits(const struct gen_device_info *devinfo)
158880    switch (devinfo->gen) {
158886       if (devinfo->is_haswell) {
158894       if (devinfo->is_g4x) {
158911 MEDIA_OBJECT_GRPID_UseScoreboard_start(const struct gen_device_info *devinfo)
158913    switch (devinfo->gen) {
158919       if (devinfo->is_haswell) {
158927       if (devinfo->is_g4x) {
158945 MEDIA_OBJECT_GRPID_XPosition_bits(const struct gen_device_info *devinfo)
158947    switch (devinfo->gen) {
158953       if (devinfo->is_haswell) {
158961       if (devinfo->is_g4x) {
158976 MEDIA_OBJECT_GRPID_XPosition_start(const struct gen_device_info *devinfo)
158978    switch (devinfo->gen) {
158984       if (devinfo->is_haswell) {
158992       if (devinfo->is_g4x) {
159010 MEDIA_OBJECT_GRPID_YPosition_bits(const struct gen_device_info *devinfo)
159012    switch (devinfo->gen) {
159018       if (devinfo->is_haswell) {
159026       if (devinfo->is_g4x) {
159041 MEDIA_OBJECT_GRPID_YPosition_start(const struct gen_device_info *devinfo)
159043    switch (devinfo->gen) {
159049       if (devinfo->is_haswell) {
159057       if (devinfo->is_g4x) {
159081 MEDIA_OBJECT_PRT_length(const struct gen_device_info *devinfo)
159083    switch (devinfo->gen) {
159089       if (devinfo->is_haswell) {
159097       if (devinfo->is_g4x) {
159121 MEDIA_OBJECT_PRT_ChildrenPresent_bits(const struct gen_device_info *devinfo)
159123    switch (devinfo->gen) {
159129       if (devinfo->is_haswell) {
159137       if (devinfo->is_g4x) {
159158 MEDIA_OBJECT_PRT_ChildrenPresent_start(const struct gen_device_info *devinfo)
159160    switch (devinfo->gen) {
159166       if (devinfo->is_haswell) {
159174       if (devinfo->is_g4x) {
159198 MEDIA_OBJECT_PRT_CommandType_bits(const struct gen_device_info *devinfo)
159200    switch (devinfo->gen) {
159206       if (devinfo->is_haswell) {
159214       if (devinfo->is_g4x) {
159235 MEDIA_OBJECT_PRT_CommandType_start(const struct gen_device_info *devinfo)
159237    switch (devinfo->gen) {
159243       if (devinfo->is_haswell) {
159251       if (devinfo->is_g4x) {
159275 MEDIA_OBJECT_PRT_DWordLength_bits(const struct gen_device_info *devinfo)
159277    switch (devinfo->gen) {
159283       if (devinfo->is_haswell) {
159291       if (devinfo->is_g4x) {
159312 MEDIA_OBJECT_PRT_DWordLength_start(const struct gen_device_info *devinfo)
159314    switch (devinfo->gen) {
159320       if (devinfo->is_haswell) {
159328       if (devinfo->is_g4x) {
159352 MEDIA_OBJECT_PRT_InlineData_bits(const struct gen_device_info *devinfo)
159354    switch (devinfo->gen) {
159360       if (devinfo->is_haswell) {
159368       if (devinfo->is_g4x) {
159389 MEDIA_OBJECT_PRT_InlineData_start(const struct gen_device_info *devinfo)
159391    switch (devinfo->gen) {
159397       if (devinfo->is_haswell) {
159405       if (devinfo->is_g4x) {
159429 MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
159431    switch (devinfo->gen) {
159437       if (devinfo->is_haswell) {
159445       if (devinfo->is_g4x) {
159466 MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
159468    switch (devinfo->gen) {
159474       if (devinfo->is_haswell) {
159482       if (devinfo->is_g4x) {
159506 MEDIA_OBJECT_PRT_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
159508    switch (devinfo->gen) {
159514       if (devinfo->is_haswell) {
159522       if (devinfo->is_g4x) {
159543 MEDIA_OBJECT_PRT_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
159545    switch (devinfo->gen) {
159551       if (devinfo->is_haswell) {
159559       if (devinfo->is_g4x) {
159583 MEDIA_OBJECT_PRT_PRT_FenceNeeded_bits(const struct gen_device_info *devinfo)
159585    switch (devinfo->gen) {
159591       if (devinfo->is_haswell) {
159599       if (devinfo->is_g4x) {
159620 MEDIA_OBJECT_PRT_PRT_FenceNeeded_start(const struct gen_device_info *devinfo)
159622    switch (devinfo->gen) {
159628       if (devinfo->is_haswell) {
159636       if (devinfo->is_g4x) {
159660 MEDIA_OBJECT_PRT_PRT_FenceType_bits(const struct gen_device_info *devinfo)
159662    switch (devinfo->gen) {
159668       if (devinfo->is_haswell) {
159676       if (devinfo->is_g4x) {
159697 MEDIA_OBJECT_PRT_PRT_FenceType_start(const struct gen_device_info *devinfo)
159699    switch (devinfo->gen) {
159705       if (devinfo->is_haswell) {
159713       if (devinfo->is_g4x) {
159737 MEDIA_OBJECT_PRT_Pipeline_bits(const struct gen_device_info *devinfo)
159739    switch (devinfo->gen) {
159745       if (devinfo->is_haswell) {
159753       if (devinfo->is_g4x) {
159774 MEDIA_OBJECT_PRT_Pipeline_start(const struct gen_device_info *devinfo)
159776    switch (devinfo->gen) {
159782       if (devinfo->is_haswell) {
159790       if (devinfo->is_g4x) {
159814 MEDIA_OBJECT_PRT_SubOpcode_bits(const struct gen_device_info *devinfo)
159816    switch (devinfo->gen) {
159822       if (devinfo->is_haswell) {
159830       if (devinfo->is_g4x) {
159851 MEDIA_OBJECT_PRT_SubOpcode_start(const struct gen_device_info *devinfo)
159853    switch (devinfo->gen) {
159859       if (devinfo->is_haswell) {
159867       if (devinfo->is_g4x) {
159897 MEDIA_OBJECT_WALKER_BlockResolutionX_bits(const struct gen_device_info *devinfo)
159899    switch (devinfo->gen) {
159905       if (devinfo->is_haswell) {
159913       if (devinfo->is_g4x) {
159934 MEDIA_OBJECT_WALKER_BlockResolutionX_start(const struct gen_device_info *devinfo)
159936    switch (devinfo->gen) {
159942       if (devinfo->is_haswell) {
159950       if (devinfo->is_g4x) {
159974 MEDIA_OBJECT_WALKER_BlockResolutionY_bits(const struct gen_device_info *devinfo)
159976    switch (devinfo->gen) {
159982       if (devinfo->is_haswell) {
159990       if (devinfo->is_g4x) {
160011 MEDIA_OBJECT_WALKER_BlockResolutionY_start(const struct gen_device_info *devinfo)
160013    switch (devinfo->gen) {
160019       if (devinfo->is_haswell) {
160027       if (devinfo->is_g4x) {
160048 MEDIA_OBJECT_WALKER_ChildrenPresent_bits(const struct gen_device_info *devinfo)
160050    switch (devinfo->gen) {
160056       if (devinfo->is_haswell) {
160064       if (devinfo->is_g4x) {
160082 MEDIA_OBJECT_WALKER_ChildrenPresent_start(const struct gen_device_info *devinfo)
160084    switch (devinfo->gen) {
160090       if (devinfo->is_haswell) {
160098       if (devinfo->is_g4x) {
160122 MEDIA_OBJECT_WALKER_ColorCountMinusOne_bits(const struct gen_device_info *devinfo)
160124    switch (devinfo->gen) {
160130       if (devinfo->is_haswell) {
160138       if (devinfo->is_g4x) {
160159 MEDIA_OBJECT_WALKER_ColorCountMinusOne_start(const struct gen_device_info *devinfo)
160161    switch (devinfo->gen) {
160167       if (devinfo->is_haswell) {
160175       if (devinfo->is_g4x) {
160199 MEDIA_OBJECT_WALKER_CommandType_bits(const struct gen_device_info *devinfo)
160201    switch (devinfo->gen) {
160207       if (devinfo->is_haswell) {
160215       if (devinfo->is_g4x) {
160236 MEDIA_OBJECT_WALKER_CommandType_start(const struct gen_device_info *devinfo)
160238    switch (devinfo->gen) {
160244       if (devinfo->is_haswell) {
160252       if (devinfo->is_g4x) {
160276 MEDIA_OBJECT_WALKER_DWordLength_bits(const struct gen_device_info *devinfo)
160278    switch (devinfo->gen) {
160284       if (devinfo->is_haswell) {
160292       if (devinfo->is_g4x) {
160313 MEDIA_OBJECT_WALKER_DWordLength_start(const struct gen_device_info *devinfo)
160315    switch (devinfo->gen) {
160321       if (devinfo->is_haswell) {
160329       if (devinfo->is_g4x) {
160349 MEDIA_OBJECT_WALKER_DualMode_bits(const struct gen_device_info *devinfo)
160351    switch (devinfo->gen) {
160357       if (devinfo->is_haswell) {
160365       if (devinfo->is_g4x) {
160382 MEDIA_OBJECT_WALKER_DualMode_start(const struct gen_device_info *devinfo)
160384    switch (devinfo->gen) {
160390       if (devinfo->is_haswell) {
160398       if (devinfo->is_g4x) {
160422 MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_bits(const struct gen_device_info *devinfo)
160424    switch (devinfo->gen) {
160430       if (devinfo->is_haswell) {
160438       if (devinfo->is_g4x) {
160459 MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_start(const struct gen_device_info *devinfo)
160461    switch (devinfo->gen) {
160467       if (devinfo->is_haswell) {
160475       if (devinfo->is_g4x) {
160499 MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_bits(const struct gen_device_info *devinfo)
160501    switch (devinfo->gen) {
160507       if (devinfo->is_haswell) {
160515       if (devinfo->is_g4x) {
160536 MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_start(const struct gen_device_info *devinfo)
160538    switch (devinfo->gen) {
160544       if (devinfo->is_haswell) {
160552       if (devinfo->is_g4x) {
160576 MEDIA_OBJECT_WALKER_GlobalLoopExecCount_bits(const struct gen_device_info *devinfo)
160578    switch (devinfo->gen) {
160584       if (devinfo->is_haswell) {
160592       if (devinfo->is_g4x) {
160613 MEDIA_OBJECT_WALKER_GlobalLoopExecCount_start(const struct gen_device_info *devinfo)
160615    switch (devinfo->gen) {
160621       if (devinfo->is_haswell) {
160629       if (devinfo->is_g4x) {
160653 MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_bits(const struct gen_device_info *devinfo)
160655    switch (devinfo->gen) {
160661       if (devinfo->is_haswell) {
160669       if (devinfo->is_g4x) {
160690 MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_start(const struct gen_device_info *devinfo)
160692    switch (devinfo->gen) {
160698       if (devinfo->is_haswell) {
160706       if (devinfo->is_g4x) {
160730 MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_bits(const struct gen_device_info *devinfo)
160732    switch (devinfo->gen) {
160738       if (devinfo->is_haswell) {
160746       if (devinfo->is_g4x) {
160767 MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_start(const struct gen_device_info *devinfo)
160769    switch (devinfo->gen) {
160775       if (devinfo->is_haswell) {
160783       if (devinfo->is_g4x) {
160807 MEDIA_OBJECT_WALKER_GlobalResolutionX_bits(const struct gen_device_info *devinfo)
160809    switch (devinfo->gen) {
160815       if (devinfo->is_haswell) {
160823       if (devinfo->is_g4x) {
160844 MEDIA_OBJECT_WALKER_GlobalResolutionX_start(const struct gen_device_info *devinfo)
160846    switch (devinfo->gen) {
160852       if (devinfo->is_haswell) {
160860       if (devinfo->is_g4x) {
160884 MEDIA_OBJECT_WALKER_GlobalResolutionY_bits(const struct gen_device_info *devinfo)
160886    switch (devinfo->gen) {
160892       if (devinfo->is_haswell) {
160900       if (devinfo->is_g4x) {
160921 MEDIA_OBJECT_WALKER_GlobalResolutionY_start(const struct gen_device_info *devinfo)
160923    switch (devinfo->gen) {
160929       if (devinfo->is_haswell) {
160937       if (devinfo->is_g4x) {
160961 MEDIA_OBJECT_WALKER_GlobalStartX_bits(const struct gen_device_info *devinfo)
160963    switch (devinfo->gen) {
160969       if (devinfo->is_haswell) {
160977       if (devinfo->is_g4x) {
160998 MEDIA_OBJECT_WALKER_GlobalStartX_start(const struct gen_device_info *devinfo)
161000    switch (devinfo->gen) {
161006       if (devinfo->is_haswell) {
161014       if (devinfo->is_g4x) {
161038 MEDIA_OBJECT_WALKER_GlobalStartY_bits(const struct gen_device_info *devinfo)
161040    switch (devinfo->gen) {
161046       if (devinfo->is_haswell) {
161054       if (devinfo->is_g4x) {
161075 MEDIA_OBJECT_WALKER_GlobalStartY_start(const struct gen_device_info *devinfo)
161077    switch (devinfo->gen) {
161083       if (devinfo->is_haswell) {
161091       if (devinfo->is_g4x) {
161112 MEDIA_OBJECT_WALKER_GroupIDLoopSelect_bits(const struct gen_device_info *devinfo)
161114    switch (devinfo->gen) {
161120       if (devinfo->is_haswell) {
161128       if (devinfo->is_g4x) {
161146 MEDIA_OBJECT_WALKER_GroupIDLoopSelect_start(const struct gen_device_info *devinfo)
161148    switch (devinfo->gen) {
161154       if (devinfo->is_haswell) {
161162       if (devinfo->is_g4x) {
161186 MEDIA_OBJECT_WALKER_IndirectDataLength_bits(const struct gen_device_info *devinfo)
161188    switch (devinfo->gen) {
161194       if (devinfo->is_haswell) {
161202       if (devinfo->is_g4x) {
161223 MEDIA_OBJECT_WALKER_IndirectDataLength_start(const struct gen_device_info *devinfo)
161225    switch (devinfo->gen) {
161231       if (devinfo->is_haswell) {
161239       if (devinfo->is_g4x) {
161263 MEDIA_OBJECT_WALKER_IndirectDataStartAddress_bits(const struct gen_device_info *devinfo)
161265    switch (devinfo->gen) {
161271       if (devinfo->is_haswell) {
161279       if (devinfo->is_g4x) {
161300 MEDIA_OBJECT_WALKER_IndirectDataStartAddress_start(const struct gen_device_info *devinfo)
161302    switch (devinfo->gen) {
161308       if (devinfo->is_haswell) {
161316       if (devinfo->is_g4x) {
161340 MEDIA_OBJECT_WALKER_InlineData_bits(const struct gen_device_info *devinfo)
161342    switch (devinfo->gen) {
161348       if (devinfo->is_haswell) {
161356       if (devinfo->is_g4x) {
161377 MEDIA_OBJECT_WALKER_InlineData_start(const struct gen_device_info *devinfo)
161379    switch (devinfo->gen) {
161385       if (devinfo->is_haswell) {
161393       if (devinfo->is_g4x) {
161417 MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
161419    switch (devinfo->gen) {
161425       if (devinfo->is_haswell) {
161433       if (devinfo->is_g4x) {
161454 MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
161456    switch (devinfo->gen) {
161462       if (devinfo->is_haswell) {
161470       if (devinfo->is_g4x) {
161489 MEDIA_OBJECT_WALKER_LocalEndX_bits(const struct gen_device_info *devinfo)
161491    switch (devinfo->gen) {
161497       if (devinfo->is_haswell) {
161505       if (devinfo->is_g4x) {
161521 MEDIA_OBJECT_WALKER_LocalEndX_start(const struct gen_device_info *devinfo)
161523    switch (devinfo->gen) {
161529       if (devinfo->is_haswell) {
161537       if (devinfo->is_g4x) {
161556 MEDIA_OBJECT_WALKER_LocalEndY_bits(const struct gen_device_info *devinfo)
161558    switch (devinfo->gen) {
161564       if (devinfo->is_haswell) {
161572       if (devinfo->is_g4x) {
161588 MEDIA_OBJECT_WALKER_LocalEndY_start(const struct gen_device_info *devinfo)
161590    switch (devinfo->gen) {
161596       if (devinfo->is_haswell) {
161604       if (devinfo->is_g4x) {
161628 MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_bits(const struct gen_device_info *devinfo)
161630    switch (devinfo->gen) {
161636       if (devinfo->is_haswell) {
161644       if (devinfo->is_g4x) {
161665 MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_start(const struct gen_device_info *devinfo)
161667    switch (devinfo->gen) {
161673       if (devinfo->is_haswell) {
161681       if (devinfo->is_g4x) {
161705 MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_bits(const struct gen_device_info *devinfo)
161707    switch (devinfo->gen) {
161713       if (devinfo->is_haswell) {
161721       if (devinfo->is_g4x) {
161742 MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_start(const struct gen_device_info *devinfo)
161744    switch (devinfo->gen) {
161750       if (devinfo->is_haswell) {
161758       if (devinfo->is_g4x) {
161782 MEDIA_OBJECT_WALKER_LocalLoopExecCount_bits(const struct gen_device_info *devinfo)
161784    switch (devinfo->gen) {
161790       if (devinfo->is_haswell) {
161798       if (devinfo->is_g4x) {
161819 MEDIA_OBJECT_WALKER_LocalLoopExecCount_start(const struct gen_device_info *devinfo)
161821    switch (devinfo->gen) {
161827       if (devinfo->is_haswell) {
161835       if (devinfo->is_g4x) {
161859 MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_bits(const struct gen_device_info *devinfo)
161861    switch (devinfo->gen) {
161867       if (devinfo->is_haswell) {
161875       if (devinfo->is_g4x) {
161896 MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_start(const struct gen_device_info *devinfo)
161898    switch (devinfo->gen) {
161904       if (devinfo->is_haswell) {
161912       if (devinfo->is_g4x) {
161936 MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_bits(const struct gen_device_info *devinfo)
161938    switch (devinfo->gen) {
161944       if (devinfo->is_haswell) {
161952       if (devinfo->is_g4x) {
161973 MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_start(const struct gen_device_info *devinfo)
161975    switch (devinfo->gen) {
161981       if (devinfo->is_haswell) {
161989       if (devinfo->is_g4x) {
162013 MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_bits(const struct gen_device_info *devinfo)
162015    switch (devinfo->gen) {
162021       if (devinfo->is_haswell) {
162029       if (devinfo->is_g4x) {
162050 MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_start(const struct gen_device_info *devinfo)
162052    switch (devinfo->gen) {
162058       if (devinfo->is_haswell) {
162066       if (devinfo->is_g4x) {
162090 MEDIA_OBJECT_WALKER_LocalStartX_bits(const struct gen_device_info *devinfo)
162092    switch (devinfo->gen) {
162098       if (devinfo->is_haswell) {
162106       if (devinfo->is_g4x) {
162127 MEDIA_OBJECT_WALKER_LocalStartX_start(const struct gen_device_info *devinfo)
162129    switch (devinfo->gen) {
162135       if (devinfo->is_haswell) {
162143       if (devinfo->is_g4x) {
162167 MEDIA_OBJECT_WALKER_LocalStartY_bits(const struct gen_device_info *devinfo)
162169    switch (devinfo->gen) {
162175       if (devinfo->is_haswell) {
162183       if (devinfo->is_g4x) {
162204 MEDIA_OBJECT_WALKER_LocalStartY_start(const struct gen_device_info *devinfo)
162206    switch (devinfo->gen) {
162212       if (devinfo->is_haswell) {
162220       if (devinfo->is_g4x) {
162240 MEDIA_OBJECT_WALKER_MaskedDispatch_bits(const struct gen_device_info *devinfo)
162242    switch (devinfo->gen) {
162248       if (devinfo->is_haswell) {
162256       if (devinfo->is_g4x) {
162273 MEDIA_OBJECT_WALKER_MaskedDispatch_start(const struct gen_device_info *devinfo)
162275    switch (devinfo->gen) {
162281       if (devinfo->is_haswell) {
162289       if (devinfo->is_g4x) {
162313 MEDIA_OBJECT_WALKER_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
162315    switch (devinfo->gen) {
162321       if (devinfo->is_haswell) {
162329       if (devinfo->is_g4x) {
162350 MEDIA_OBJECT_WALKER_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
162352    switch (devinfo->gen) {
162358       if (devinfo->is_haswell) {
162366       if (devinfo->is_g4x) {
162390 MEDIA_OBJECT_WALKER_MidLoopUnitX_bits(const struct gen_device_info *devinfo)
162392    switch (devinfo->gen) {
162398       if (devinfo->is_haswell) {
162406       if (devinfo->is_g4x) {
162427 MEDIA_OBJECT_WALKER_MidLoopUnitX_start(const struct gen_device_info *devinfo)
162429    switch (devinfo->gen) {
162435       if (devinfo->is_haswell) {
162443       if (devinfo->is_g4x) {
162467 MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_bits(const struct gen_device_info *devinfo)
162469    switch (devinfo->gen) {
162475       if (devinfo->is_haswell) {
162483       if (devinfo->is_g4x) {
162504 MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_start(const struct gen_device_info *devinfo)
162506    switch (devinfo->gen) {
162512       if (devinfo->is_haswell) {
162520       if (devinfo->is_g4x) {
162544 MEDIA_OBJECT_WALKER_Pipeline_bits(const struct gen_device_info *devinfo)
162546    switch (devinfo->gen) {
162552       if (devinfo->is_haswell) {
162560       if (devinfo->is_g4x) {
162581 MEDIA_OBJECT_WALKER_Pipeline_start(const struct gen_device_info *devinfo)
162583    switch (devinfo->gen) {
162589       if (devinfo->is_haswell) {
162597       if (devinfo->is_g4x) {
162615 MEDIA_OBJECT_WALKER_QuadMode_bits(const struct gen_device_info *devinfo)
162617    switch (devinfo->gen) {
162623       if (devinfo->is_haswell) {
162631       if (devinfo->is_g4x) {
162646 MEDIA_OBJECT_WALKER_QuadMode_start(const struct gen_device_info *devinfo)
162648    switch (devinfo->gen) {
162654       if (devinfo->is_haswell) {
162662       if (devinfo->is_g4x) {
162682 MEDIA_OBJECT_WALKER_Repel_bits(const struct gen_device_info *devinfo)
162684    switch (devinfo->gen) {
162690       if (devinfo->is_haswell) {
162698       if (devinfo->is_g4x) {
162715 MEDIA_OBJECT_WALKER_Repel_start(const struct gen_device_info *devinfo)
162717    switch (devinfo->gen) {
162723       if (devinfo->is_haswell) {
162731       if (devinfo->is_g4x) {
162754 MEDIA_OBJECT_WALKER_ScoreboardMask_bits(const struct gen_device_info *devinfo)
162756    switch (devinfo->gen) {
162762       if (devinfo->is_haswell) {
162770       if (devinfo->is_g4x) {
162790 MEDIA_OBJECT_WALKER_ScoreboardMask_start(const struct gen_device_info *devinfo)
162792    switch (devinfo->gen) {
162798       if (devinfo->is_haswell) {
162806       if (devinfo->is_g4x) {
162830 MEDIA_OBJECT_WALKER_SubOpcode_bits(const struct gen_device_info *devinfo)
162832    switch (devinfo->gen) {
162838       if (devinfo->is_haswell) {
162846       if (devinfo->is_g4x) {
162867 MEDIA_OBJECT_WALKER_SubOpcode_start(const struct gen_device_info *devinfo)
162869    switch (devinfo->gen) {
162875       if (devinfo->is_haswell) {
162883       if (devinfo->is_g4x) {
162907 MEDIA_OBJECT_WALKER_ThreadSynchronization_bits(const struct gen_device_info *devinfo)
162909    switch (devinfo->gen) {
162915       if (devinfo->is_haswell) {
162923       if (devinfo->is_g4x) {
162944 MEDIA_OBJECT_WALKER_ThreadSynchronization_start(const struct gen_device_info *devinfo)
162946    switch (devinfo->gen) {
162952       if (devinfo->is_haswell) {
162960       if (devinfo->is_g4x) {
162983 MEDIA_OBJECT_WALKER_UseScoreboard_bits(const struct gen_device_info *devinfo)
162985    switch (devinfo->gen) {
162991       if (devinfo->is_haswell) {
162999       if (devinfo->is_g4x) {
163019 MEDIA_OBJECT_WALKER_UseScoreboard_start(const struct gen_device_info *devinfo)
163021    switch (devinfo->gen) {
163027       if (devinfo->is_haswell) {
163035       if (devinfo->is_g4x) {
163059 MEDIA_STATE_FLUSH_length(const struct gen_device_info *devinfo)
163061    switch (devinfo->gen) {
163067       if (devinfo->is_haswell) {
163075       if (devinfo->is_g4x) {
163093 MEDIA_STATE_FLUSH_BarrierMask_bits(const struct gen_device_info *devinfo)
163095    switch (devinfo->gen) {
163101       if (devinfo->is_haswell) {
163109       if (devinfo->is_g4x) {
163124 MEDIA_STATE_FLUSH_BarrierMask_start(const struct gen_device_info *devinfo)
163126    switch (devinfo->gen) {
163132       if (devinfo->is_haswell) {
163140       if (devinfo->is_g4x) {
163164 MEDIA_STATE_FLUSH_CommandType_bits(const struct gen_device_info *devinfo)
163166    switch (devinfo->gen) {
163172       if (devinfo->is_haswell) {
163180       if (devinfo->is_g4x) {
163201 MEDIA_STATE_FLUSH_CommandType_start(const struct gen_device_info *devinfo)
163203    switch (devinfo->gen) {
163209       if (devinfo->is_haswell) {
163217       if (devinfo->is_g4x) {
163241 MEDIA_STATE_FLUSH_DWordLength_bits(const struct gen_device_info *devinfo)
163243    switch (devinfo->gen) {
163249       if (devinfo->is_haswell) {
163257       if (devinfo->is_g4x) {
163278 MEDIA_STATE_FLUSH_DWordLength_start(const struct gen_device_info *devinfo)
163280    switch (devinfo->gen) {
163286       if (devinfo->is_haswell) {
163294       if (devinfo->is_g4x) {
163312 MEDIA_STATE_FLUSH_DisablePreemption_bits(const struct gen_device_info *devinfo)
163314    switch (devinfo->gen) {
163320       if (devinfo->is_haswell) {
163328       if (devinfo->is_g4x) {
163343 MEDIA_STATE_FLUSH_DisablePreemption_start(const struct gen_device_info *devinfo)
163345    switch (devinfo->gen) {
163351       if (devinfo->is_haswell) {
163359       if (devinfo->is_g4x) {
163381 MEDIA_STATE_FLUSH_FlushtoGO_bits(const struct gen_device_info *devinfo)
163383    switch (devinfo->gen) {
163389       if (devinfo->is_haswell) {
163397       if (devinfo->is_g4x) {
163416 MEDIA_STATE_FLUSH_FlushtoGO_start(const struct gen_device_info *devinfo)
163418    switch (devinfo->gen) {
163424       if (devinfo->is_haswell) {
163432       if (devinfo->is_g4x) {
163455 MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
163457    switch (devinfo->gen) {
163463       if (devinfo->is_haswell) {
163471       if (devinfo->is_g4x) {
163491 MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
163493    switch (devinfo->gen) {
163499       if (devinfo->is_haswell) {
163507       if (devinfo->is_g4x) {
163531 MEDIA_STATE_FLUSH_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
163533    switch (devinfo->gen) {
163539       if (devinfo->is_haswell) {
163547       if (devinfo->is_g4x) {
163568 MEDIA_STATE_FLUSH_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
163570    switch (devinfo->gen) {
163576       if (devinfo->is_haswell) {
163584       if (devinfo->is_g4x) {
163608 MEDIA_STATE_FLUSH_Pipeline_bits(const struct gen_device_info *devinfo)
163610    switch (devinfo->gen) {
163616       if (devinfo->is_haswell) {
163624       if (devinfo->is_g4x) {
163645 MEDIA_STATE_FLUSH_Pipeline_start(const struct gen_device_info *devinfo)
163647    switch (devinfo->gen) {
163653       if (devinfo->is_haswell) {
163661       if (devinfo->is_g4x) {
163685 MEDIA_STATE_FLUSH_SubOpcode_bits(const struct gen_device_info *devinfo)
163687    switch (devinfo->gen) {
163693       if (devinfo->is_haswell) {
163701       if (devinfo->is_g4x) {
163722 MEDIA_STATE_FLUSH_SubOpcode_start(const struct gen_device_info *devinfo)
163724    switch (devinfo->gen) {
163730       if (devinfo->is_haswell) {
163738       if (devinfo->is_g4x) {
163756 MEDIA_STATE_FLUSH_ThreadCountWaterMark_bits(const struct gen_device_info *devinfo)
163758    switch (devinfo->gen) {
163764       if (devinfo->is_haswell) {
163772       if (devinfo->is_g4x) {
163787 MEDIA_STATE_FLUSH_ThreadCountWaterMark_start(const struct gen_device_info *devinfo)
163789    switch (devinfo->gen) {
163795       if (devinfo->is_haswell) {
163803       if (devinfo->is_g4x) {
163825 MEDIA_STATE_FLUSH_WatermarkRequired_bits(const struct gen_device_info *devinfo)
163827    switch (devinfo->gen) {
163833       if (devinfo->is_haswell) {
163841       if (devinfo->is_g4x) {
163860 MEDIA_STATE_FLUSH_WatermarkRequired_start(const struct gen_device_info *devinfo)
163862    switch (devinfo->gen) {
163868       if (devinfo->is_haswell) {
163876       if (devinfo->is_g4x) {
163900 MEDIA_VFE_STATE_length(const struct gen_device_info *devinfo)
163902    switch (devinfo->gen) {
163908       if (devinfo->is_haswell) {
163916       if (devinfo->is_g4x) {
163937 MEDIA_VFE_STATE_BypassGatewayControl_bits(const struct gen_device_info *devinfo)
163939    switch (devinfo->gen) {
163945       if (devinfo->is_haswell) {
163953       if (devinfo->is_g4x) {
163971 MEDIA_VFE_STATE_BypassGatewayControl_start(const struct gen_device_info *devinfo)
163973    switch (devinfo->gen) {
163979       if (devinfo->is_haswell) {
163987       if (devinfo->is_g4x) {
164011 MEDIA_VFE_STATE_CURBEAllocationSize_bits(const struct gen_device_info *devinfo)
164013    switch (devinfo->gen) {
164019       if (devinfo->is_haswell) {
164027       if (devinfo->is_g4x) {
164048 MEDIA_VFE_STATE_CURBEAllocationSize_start(const struct gen_device_info *devinfo)
164050    switch (devinfo->gen) {
164056       if (devinfo->is_haswell) {
164064       if (devinfo->is_g4x) {
164088 MEDIA_VFE_STATE_CommandType_bits(const struct gen_device_info *devinfo)
164090    switch (devinfo->gen) {
164096       if (devinfo->is_haswell) {
164104       if (devinfo->is_g4x) {
164125 MEDIA_VFE_STATE_CommandType_start(const struct gen_device_info *devinfo)
164127    switch (devinfo->gen) {
164133       if (devinfo->is_haswell) {
164141       if (devinfo->is_g4x) {
164165 MEDIA_VFE_STATE_DWordLength_bits(const struct gen_device_info *devinfo)
164167    switch (devinfo->gen) {
164173       if (devinfo->is_haswell) {
164181       if (devinfo->is_g4x) {
164202 MEDIA_VFE_STATE_DWordLength_start(const struct gen_device_info *devinfo)
164204    switch (devinfo->gen) {
164210       if (devinfo->is_haswell) {
164218       if (devinfo->is_g4x) {
164236 MEDIA_VFE_STATE_DispatchLoadBalance_bits(const struct gen_device_info *devinfo)
164238    switch (devinfo->gen) {
164244       if (devinfo->is_haswell) {
164252       if (devinfo->is_g4x) {
164267 MEDIA_VFE_STATE_DispatchLoadBalance_start(const struct gen_device_info *devinfo)
164269    switch (devinfo->gen) {
164275       if (devinfo->is_haswell) {
164283       if (devinfo->is_g4x) {
164301 MEDIA_VFE_STATE_FastPreempt_bits(const struct gen_device_info *devinfo)
164303    switch (devinfo->gen) {
164309       if (devinfo->is_haswell) {
164317       if (devinfo->is_g4x) {
164332 MEDIA_VFE_STATE_FastPreempt_start(const struct gen_device_info *devinfo)
164334    switch (devinfo->gen) {
164340       if (devinfo->is_haswell) {
164348       if (devinfo->is_g4x) {
164367 MEDIA_VFE_STATE_GPGPUMode_bits(const struct gen_device_info *devinfo)
164369    switch (devinfo->gen) {
164375       if (devinfo->is_haswell) {
164383       if (devinfo->is_g4x) {
164399 MEDIA_VFE_STATE_GPGPUMode_start(const struct gen_device_info *devinfo)
164401    switch (devinfo->gen) {
164407       if (devinfo->is_haswell) {
164415       if (devinfo->is_g4x) {
164433 MEDIA_VFE_STATE_GatewayMMIOAccessControl_bits(const struct gen_device_info *devinfo)
164435    switch (devinfo->gen) {
164441       if (devinfo->is_haswell) {
164449       if (devinfo->is_g4x) {
164464 MEDIA_VFE_STATE_GatewayMMIOAccessControl_start(const struct gen_device_info *devinfo)
164466    switch (devinfo->gen) {
164472       if (devinfo->is_haswell) {
164480       if (devinfo->is_g4x) {
164498 MEDIA_VFE_STATE_HalfSliceDisable_bits(const struct gen_device_info *devinfo)
164500    switch (devinfo->gen) {
164506       if (devinfo->is_haswell) {
164514       if (devinfo->is_g4x) {
164529 MEDIA_VFE_STATE_HalfSliceDisable_start(const struct gen_device_info *devinfo)
164531    switch (devinfo->gen) {
164537       if (devinfo->is_haswell) {
164545       if (devinfo->is_g4x) {
164563 MEDIA_VFE_STATE_MaximumNumberofDualSubslices_bits(const struct gen_device_info *devinfo)
164565    switch (devinfo->gen) {
164571       if (devinfo->is_haswell) {
164579       if (devinfo->is_g4x) {
164594 MEDIA_VFE_STATE_MaximumNumberofDualSubslices_start(const struct gen_device_info *devinfo)
164596    switch (devinfo->gen) {
164602       if (devinfo->is_haswell) {
164610       if (devinfo->is_g4x) {
164634 MEDIA_VFE_STATE_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
164636    switch (devinfo->gen) {
164642       if (devinfo->is_haswell) {
164650       if (devinfo->is_g4x) {
164671 MEDIA_VFE_STATE_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
164673    switch (devinfo->gen) {
164679       if (devinfo->is_haswell) {
164687       if (devinfo->is_g4x) {
164711 MEDIA_VFE_STATE_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
164713    switch (devinfo->gen) {
164719       if (devinfo->is_haswell) {
164727       if (devinfo->is_g4x) {
164748 MEDIA_VFE_STATE_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
164750    switch (devinfo->gen) {
164756       if (devinfo->is_haswell) {
164764       if (devinfo->is_g4x) {
164782 MEDIA_VFE_STATE_NumberofMediaObjectsperPreEmptionCheckpoint_bits(const struct gen_device_info *devinfo)
164784    switch (devinfo->gen) {
164790       if (devinfo->is_haswell) {
164798       if (devinfo->is_g4x) {
164813 MEDIA_VFE_STATE_NumberofMediaObjectsperPreEmptionCheckpoint_start(const struct gen_device_info *devinfo)
164815    switch (devinfo->gen) {
164821       if (devinfo->is_haswell) {
164829       if (devinfo->is_g4x) {
164853 MEDIA_VFE_STATE_NumberofURBEntries_bits(const struct gen_device_info *devinfo)
164855    switch (devinfo->gen) {
164861       if (devinfo->is_haswell) {
164869       if (devinfo->is_g4x) {
164890 MEDIA_VFE_STATE_NumberofURBEntries_start(const struct gen_device_info *devinfo)
164892    switch (devinfo->gen) {
164898       if (devinfo->is_haswell) {
164906       if (devinfo->is_g4x) {
164930 MEDIA_VFE_STATE_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
164932    switch (devinfo->gen) {
164938       if (devinfo->is_haswell) {
164946       if (devinfo->is_g4x) {
164967 MEDIA_VFE_STATE_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
164969    switch (devinfo->gen) {
164975       if (devinfo->is_haswell) {
164983       if (devinfo->is_g4x) {
165007 MEDIA_VFE_STATE_Pipeline_bits(const struct gen_device_info *devinfo)
165009    switch (devinfo->gen) {
165015       if (devinfo->is_haswell) {
165023       if (devinfo->is_g4x) {
165044 MEDIA_VFE_STATE_Pipeline_start(const struct gen_device_info *devinfo)
165046    switch (devinfo->gen) {
165052       if (devinfo->is_haswell) {
165060       if (devinfo->is_g4x) {
165083 MEDIA_VFE_STATE_ResetGatewayTimer_bits(const struct gen_device_info *devinfo)
165085    switch (devinfo->gen) {
165091       if (devinfo->is_haswell) {
165099       if (devinfo->is_g4x) {
165119 MEDIA_VFE_STATE_ResetGatewayTimer_start(const struct gen_device_info *devinfo)
165121    switch (devinfo->gen) {
165127       if (devinfo->is_haswell) {
165135       if (devinfo->is_g4x) {
165153 MEDIA_VFE_STATE_SLMBankSelectionPolicy_bits(const struct gen_device_info *devinfo)
165155    switch (devinfo->gen) {
165161       if (devinfo->is_haswell) {
165169       if (devinfo->is_g4x) {
165184 MEDIA_VFE_STATE_SLMBankSelectionPolicy_start(const struct gen_device_info *devinfo)
165186    switch (devinfo->gen) {
165192       if (devinfo->is_haswell) {
165200       if (devinfo->is_g4x) {
165223 MEDIA_VFE_STATE_Scoreboard0DeltaX_bits(const struct gen_device_info *devinfo)
165225    switch (devinfo->gen) {
165231       if (devinfo->is_haswell) {
165239       if (devinfo->is_g4x) {
165259 MEDIA_VFE_STATE_Scoreboard0DeltaX_start(const struct gen_device_info *devinfo)
165261    switch (devinfo->gen) {
165267       if (devinfo->is_haswell) {
165275       if (devinfo->is_g4x) {
165298 MEDIA_VFE_STATE_Scoreboard0DeltaY_bits(const struct gen_device_info *devinfo)
165300    switch (devinfo->gen) {
165306       if (devinfo->is_haswell) {
165314       if (devinfo->is_g4x) {
165334 MEDIA_VFE_STATE_Scoreboard0DeltaY_start(const struct gen_device_info *devinfo)
165336    switch (devinfo->gen) {
165342       if (devinfo->is_haswell) {
165350       if (devinfo->is_g4x) {
165373 MEDIA_VFE_STATE_Scoreboard1DeltaX_bits(const struct gen_device_info *devinfo)
165375    switch (devinfo->gen) {
165381       if (devinfo->is_haswell) {
165389       if (devinfo->is_g4x) {
165409 MEDIA_VFE_STATE_Scoreboard1DeltaX_start(const struct gen_device_info *devinfo)
165411    switch (devinfo->gen) {
165417       if (devinfo->is_haswell) {
165425       if (devinfo->is_g4x) {
165448 MEDIA_VFE_STATE_Scoreboard1DeltaY_bits(const struct gen_device_info *devinfo)
165450    switch (devinfo->gen) {
165456       if (devinfo->is_haswell) {
165464       if (devinfo->is_g4x) {
165484 MEDIA_VFE_STATE_Scoreboard1DeltaY_start(const struct gen_device_info *devinfo)
165486    switch (devinfo->gen) {
165492       if (devinfo->is_haswell) {
165500       if (devinfo->is_g4x) {
165523 MEDIA_VFE_STATE_Scoreboard2DeltaX_bits(const struct gen_device_info *devinfo)
165525    switch (devinfo->gen) {
165531       if (devinfo->is_haswell) {
165539       if (devinfo->is_g4x) {
165559 MEDIA_VFE_STATE_Scoreboard2DeltaX_start(const struct gen_device_info *devinfo)
165561    switch (devinfo->gen) {
165567       if (devinfo->is_haswell) {
165575       if (devinfo->is_g4x) {
165598 MEDIA_VFE_STATE_Scoreboard2DeltaY_bits(const struct gen_device_info *devinfo)
165600    switch (devinfo->gen) {
165606       if (devinfo->is_haswell) {
165614       if (devinfo->is_g4x) {
165634 MEDIA_VFE_STATE_Scoreboard2DeltaY_start(const struct gen_device_info *devinfo)
165636    switch (devinfo->gen) {
165642       if (devinfo->is_haswell) {
165650       if (devinfo->is_g4x) {
165673 MEDIA_VFE_STATE_Scoreboard3DeltaX_bits(const struct gen_device_info *devinfo)
165675    switch (devinfo->gen) {
165681       if (devinfo->is_haswell) {
165689       if (devinfo->is_g4x) {
165709 MEDIA_VFE_STATE_Scoreboard3DeltaX_start(const struct gen_device_info *devinfo)
165711    switch (devinfo->gen) {
165717       if (devinfo->is_haswell) {
165725       if (devinfo->is_g4x) {
165748 MEDIA_VFE_STATE_Scoreboard3DeltaY_bits(const struct gen_device_info *devinfo)
165750    switch (devinfo->gen) {
165756       if (devinfo->is_haswell) {
165764       if (devinfo->is_g4x) {
165784 MEDIA_VFE_STATE_Scoreboard3DeltaY_start(const struct gen_device_info *devinfo)
165786    switch (devinfo->gen) {
165792       if (devinfo->is_haswell) {
165800       if (devinfo->is_g4x) {
165823 MEDIA_VFE_STATE_Scoreboard4DeltaX_bits(const struct gen_device_info *devinfo)
165825    switch (devinfo->gen) {
165831       if (devinfo->is_haswell) {
165839       if (devinfo->is_g4x) {
165859 MEDIA_VFE_STATE_Scoreboard4DeltaX_start(const struct gen_device_info *devinfo)
165861    switch (devinfo->gen) {
165867       if (devinfo->is_haswell) {
165875       if (devinfo->is_g4x) {
165898 MEDIA_VFE_STATE_Scoreboard4DeltaY_bits(const struct gen_device_info *devinfo)
165900    switch (devinfo->gen) {
165906       if (devinfo->is_haswell) {
165914       if (devinfo->is_g4x) {
165934 MEDIA_VFE_STATE_Scoreboard4DeltaY_start(const struct gen_device_info *devinfo)
165936    switch (devinfo->gen) {
165942       if (devinfo->is_haswell) {
165950       if (devinfo->is_g4x) {
165973 MEDIA_VFE_STATE_Scoreboard5DeltaX_bits(const struct gen_device_info *devinfo)
165975    switch (devinfo->gen) {
165981       if (devinfo->is_haswell) {
165989       if (devinfo->is_g4x) {
166009 MEDIA_VFE_STATE_Scoreboard5DeltaX_start(const struct gen_device_info *devinfo)
166011    switch (devinfo->gen) {
166017       if (devinfo->is_haswell) {
166025       if (devinfo->is_g4x) {
166048 MEDIA_VFE_STATE_Scoreboard5DeltaY_bits(const struct gen_device_info *devinfo)
166050    switch (devinfo->gen) {
166056       if (devinfo->is_haswell) {
166064       if (devinfo->is_g4x) {
166084 MEDIA_VFE_STATE_Scoreboard5DeltaY_start(const struct gen_device_info *devinfo)
166086    switch (devinfo->gen) {
166092       if (devinfo->is_haswell) {
166100       if (devinfo->is_g4x) {
166123 MEDIA_VFE_STATE_Scoreboard6DeltaX_bits(const struct gen_device_info *devinfo)
166125    switch (devinfo->gen) {
166131       if (devinfo->is_haswell) {
166139       if (devinfo->is_g4x) {
166159 MEDIA_VFE_STATE_Scoreboard6DeltaX_start(const struct gen_device_info *devinfo)
166161    switch (devinfo->gen) {
166167       if (devinfo->is_haswell) {
166175       if (devinfo->is_g4x) {
166198 MEDIA_VFE_STATE_Scoreboard6DeltaY_bits(const struct gen_device_info *devinfo)
166200    switch (devinfo->gen) {
166206       if (devinfo->is_haswell) {
166214       if (devinfo->is_g4x) {
166234 MEDIA_VFE_STATE_Scoreboard6DeltaY_start(const struct gen_device_info *devinfo)
166236    switch (devinfo->gen) {
166242       if (devinfo->is_haswell) {
166250       if (devinfo->is_g4x) {
166273 MEDIA_VFE_STATE_Scoreboard7DeltaX_bits(const struct gen_device_info *devinfo)
166275    switch (devinfo->gen) {
166281       if (devinfo->is_haswell) {
166289       if (devinfo->is_g4x) {
166309 MEDIA_VFE_STATE_Scoreboard7DeltaX_start(const struct gen_device_info *devinfo)
166311    switch (devinfo->gen) {
166317       if (devinfo->is_haswell) {
166325       if (devinfo->is_g4x) {
166348 MEDIA_VFE_STATE_Scoreboard7DeltaY_bits(const struct gen_device_info *devinfo)
166350    switch (devinfo->gen) {
166356       if (devinfo->is_haswell) {
166364       if (devinfo->is_g4x) {
166384 MEDIA_VFE_STATE_Scoreboard7DeltaY_start(const struct gen_device_info *devinfo)
166386    switch (devinfo->gen) {
166392       if (devinfo->is_haswell) {
166400       if (devinfo->is_g4x) {
166423 MEDIA_VFE_STATE_ScoreboardEnable_bits(const struct gen_device_info *devinfo)
166425    switch (devinfo->gen) {
166431       if (devinfo->is_haswell) {
166439       if (devinfo->is_g4x) {
166459 MEDIA_VFE_STATE_ScoreboardEnable_start(const struct gen_device_info *devinfo)
166461    switch (devinfo->gen) {
166467       if (devinfo->is_haswell) {
166475       if (devinfo->is_g4x) {
166498 MEDIA_VFE_STATE_ScoreboardMask_bits(const struct gen_device_info *devinfo)
166500    switch (devinfo->gen) {
166506       if (devinfo->is_haswell) {
166514       if (devinfo->is_g4x) {
166534 MEDIA_VFE_STATE_ScoreboardMask_start(const struct gen_device_info *devinfo)
166536    switch (devinfo->gen) {
166542       if (devinfo->is_haswell) {
166550       if (devinfo->is_g4x) {
166573 MEDIA_VFE_STATE_ScoreboardType_bits(const struct gen_device_info *devinfo)
166575    switch (devinfo->gen) {
166581       if (devinfo->is_haswell) {
166589       if (devinfo->is_g4x) {
166609 MEDIA_VFE_STATE_ScoreboardType_start(const struct gen_device_info *devinfo)
166611    switch (devinfo->gen) {
166617       if (devinfo->is_haswell) {
166625       if (devinfo->is_g4x) {
166649 MEDIA_VFE_STATE_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
166651    switch (devinfo->gen) {
166657       if (devinfo->is_haswell) {
166665       if (devinfo->is_g4x) {
166686 MEDIA_VFE_STATE_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
166688    switch (devinfo->gen) {
166694       if (devinfo->is_haswell) {
166702       if (devinfo->is_g4x) {
166722 MEDIA_VFE_STATE_SliceDisable_bits(const struct gen_device_info *devinfo)
166724    switch (devinfo->gen) {
166730       if (devinfo->is_haswell) {
166738       if (devinfo->is_g4x) {
166755 MEDIA_VFE_STATE_SliceDisable_start(const struct gen_device_info *devinfo)
166757    switch (devinfo->gen) {
166763       if (devinfo->is_haswell) {
166771       if (devinfo->is_g4x) {
166793 MEDIA_VFE_STATE_StackSize_bits(const struct gen_device_info *devinfo)
166795    switch (devinfo->gen) {
166801       if (devinfo->is_haswell) {
166809       if (devinfo->is_g4x) {
166828 MEDIA_VFE_STATE_StackSize_start(const struct gen_device_info *devinfo)
166830    switch (devinfo->gen) {
166836       if (devinfo->is_haswell) {
166844       if (devinfo->is_g4x) {
166868 MEDIA_VFE_STATE_SubOpcode_bits(const struct gen_device_info *devinfo)
166870    switch (devinfo->gen) {
166876       if (devinfo->is_haswell) {
166884       if (devinfo->is_g4x) {
166905 MEDIA_VFE_STATE_SubOpcode_start(const struct gen_device_info *devinfo)
166907    switch (devinfo->gen) {
166913       if (devinfo->is_haswell) {
166921       if (devinfo->is_g4x) {
166939 MEDIA_VFE_STATE_ThreadDispatchSelectionPolicy_bits(const struct gen_device_info *devinfo)
166941    switch (devinfo->gen) {
166947       if (devinfo->is_haswell) {
166955       if (devinfo->is_g4x) {
166970 MEDIA_VFE_STATE_ThreadDispatchSelectionPolicy_start(const struct gen_device_info *devinfo)
166972    switch (devinfo->gen) {
166978       if (devinfo->is_haswell) {
166986       if (devinfo->is_g4x) {
167010 MEDIA_VFE_STATE_URBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
167012    switch (devinfo->gen) {
167018       if (devinfo->is_haswell) {
167026       if (devinfo->is_g4x) {
167047 MEDIA_VFE_STATE_URBEntryAllocationSize_start(const struct gen_device_info *devinfo)
167049    switch (devinfo->gen) {
167055       if (devinfo->is_haswell) {
167063       if (devinfo->is_g4x) {
167084 MEMORYADDRESSATTRIBUTES_length(const struct gen_device_info *devinfo)
167086    switch (devinfo->gen) {
167092       if (devinfo->is_haswell) {
167100       if (devinfo->is_g4x) {
167118 MEMORYADDRESSATTRIBUTES_AgeforQUADLRU_bits(const struct gen_device_info *devinfo)
167120    switch (devinfo->gen) {
167126       if (devinfo->is_haswell) {
167134       if (devinfo->is_g4x) {
167149 MEMORYADDRESSATTRIBUTES_AgeforQUADLRU_start(const struct gen_device_info *devinfo)
167151    switch (devinfo->gen) {
167157       if (devinfo->is_haswell) {
167165       if (devinfo->is_g4x) {
167186 MEMORYADDRESSATTRIBUTES_ArbitrationPriorityControl_bits(const struct gen_device_info *devinfo)
167188    switch (devinfo->gen) {
167194       if (devinfo->is_haswell) {
167202       if (devinfo->is_g4x) {
167220 MEMORYADDRESSATTRIBUTES_ArbitrationPriorityControl_start(const struct gen_device_info *devinfo)
167222    switch (devinfo->gen) {
167228       if (devinfo->is_haswell) {
167236       if (devinfo->is_g4x) {
167256 MEMORYADDRESSATTRIBUTES_MOCS_bits(const struct gen_device_info *devinfo)
167258    switch (devinfo->gen) {
167264       if (devinfo->is_haswell) {
167272       if (devinfo->is_g4x) {
167289 MEMORYADDRESSATTRIBUTES_MOCS_start(const struct gen_device_info *devinfo)
167291    switch (devinfo->gen) {
167297       if (devinfo->is_haswell) {
167305       if (devinfo->is_g4x) {
167325 MEMORYADDRESSATTRIBUTES_MemoryCompressionEnable_bits(const struct gen_device_info *devinfo)
167327    switch (devinfo->gen) {
167333       if (devinfo->is_haswell) {
167341       if (devinfo->is_g4x) {
167358 MEMORYADDRESSATTRIBUTES_MemoryCompressionEnable_start(const struct gen_device_info *devinfo)
167360    switch (devinfo->gen) {
167366       if (devinfo->is_haswell) {
167374       if (devinfo->is_g4x) {
167393 MEMORYADDRESSATTRIBUTES_MemoryCompressionMode_bits(const struct gen_device_info *devinfo)
167395    switch (devinfo->gen) {
167401       if (devinfo->is_haswell) {
167409       if (devinfo->is_g4x) {
167425 MEMORYADDRESSATTRIBUTES_MemoryCompressionMode_start(const struct gen_device_info *devinfo)
167427    switch (devinfo->gen) {
167433       if (devinfo->is_haswell) {
167441       if (devinfo->is_g4x) {
167461 MEMORYADDRESSATTRIBUTES_RowStoreScratchBufferCacheSelect_bits(const struct gen_device_info *devinfo)
167463    switch (devinfo->gen) {
167469       if (devinfo->is_haswell) {
167477       if (devinfo->is_g4x) {
167494 MEMORYADDRESSATTRIBUTES_RowStoreScratchBufferCacheSelect_start(const struct gen_device_info *devinfo)
167496    switch (devinfo->gen) {
167502       if (devinfo->is_haswell) {
167510       if (devinfo->is_g4x) {
167528 MEMORYADDRESSATTRIBUTES_TargetCache_bits(const struct gen_device_info *devinfo)
167530    switch (devinfo->gen) {
167536       if (devinfo->is_haswell) {
167544       if (devinfo->is_g4x) {
167559 MEMORYADDRESSATTRIBUTES_TargetCache_start(const struct gen_device_info *devinfo)
167561    switch (devinfo->gen) {
167567       if (devinfo->is_haswell) {
167575       if (devinfo->is_g4x) {
167595 MEMORYADDRESSATTRIBUTES_TiledResourceMode_bits(const struct gen_device_info *devinfo)
167597    switch (devinfo->gen) {
167603       if (devinfo->is_haswell) {
167611       if (devinfo->is_g4x) {
167628 MEMORYADDRESSATTRIBUTES_TiledResourceMode_start(const struct gen_device_info *devinfo)
167630    switch (devinfo->gen) {
167636       if (devinfo->is_haswell) {
167644       if (devinfo->is_g4x) {
167666 MEMORY_OBJECT_CONTROL_STATE_length(const struct gen_device_info *devinfo)
167668    switch (devinfo->gen) {
167674       if (devinfo->is_haswell) {
167682       if (devinfo->is_g4x) {
167700 MEMORY_OBJECT_CONTROL_STATE_AgeforQUADLRU_bits(const struct gen_device_info *devinfo)
167702    switch (devinfo->gen) {
167708       if (devinfo->is_haswell) {
167716       if (devinfo->is_g4x) {
167731 MEMORY_OBJECT_CONTROL_STATE_AgeforQUADLRU_start(const struct gen_device_info *devinfo)
167733    switch (devinfo->gen) {
167739       if (devinfo->is_haswell) {
167747       if (devinfo->is_g4x) {
167766 MEMORY_OBJECT_CONTROL_STATE_CacheabilityControl_bits(const struct gen_device_info *devinfo)
167768    switch (devinfo->gen) {
167774       if (devinfo->is_haswell) {
167782       if (devinfo->is_g4x) {
167798 MEMORY_OBJECT_CONTROL_STATE_CacheabilityControl_start(const struct gen_device_info *devinfo)
167800    switch (devinfo->gen) {
167806       if (devinfo->is_haswell) {
167814       if (devinfo->is_g4x) {
167832 MEMORY_OBJECT_CONTROL_STATE_EncryptedData_bits(const struct gen_device_info *devinfo)
167834    switch (devinfo->gen) {
167840       if (devinfo->is_haswell) {
167848       if (devinfo->is_g4x) {
167863 MEMORY_OBJECT_CONTROL_STATE_EncryptedData_start(const struct gen_device_info *devinfo)
167865    switch (devinfo->gen) {
167871       if (devinfo->is_haswell) {
167879       if (devinfo->is_g4x) {
167899 MEMORY_OBJECT_CONTROL_STATE_GraphicsDataTypeGFDT_bits(const struct gen_device_info *devinfo)
167901    switch (devinfo->gen) {
167907       if (devinfo->is_haswell) {
167915       if (devinfo->is_g4x) {
167932 MEMORY_OBJECT_CONTROL_STATE_GraphicsDataTypeGFDT_start(const struct gen_device_info *devinfo)
167934    switch (devinfo->gen) {
167940       if (devinfo->is_haswell) {
167948       if (devinfo->is_g4x) {
167967 MEMORY_OBJECT_CONTROL_STATE_L3CacheabilityControlL3CC_bits(const struct gen_device_info *devinfo)
167969    switch (devinfo->gen) {
167975       if (devinfo->is_haswell) {
167983       if (devinfo->is_g4x) {
167999 MEMORY_OBJECT_CONTROL_STATE_L3CacheabilityControlL3CC_start(const struct gen_device_info *devinfo)
168001    switch (devinfo->gen) {
168007       if (devinfo->is_haswell) {
168015       if (devinfo->is_g4x) {
168033 MEMORY_OBJECT_CONTROL_STATE_LLCCacheabilityControlLLCCC_bits(const struct gen_device_info *devinfo)
168035    switch (devinfo->gen) {
168041       if (devinfo->is_haswell) {
168049       if (devinfo->is_g4x) {
168064 MEMORY_OBJECT_CONTROL_STATE_LLCCacheabilityControlLLCCC_start(const struct gen_device_info *devinfo)
168066    switch (devinfo->gen) {
168072       if (devinfo->is_haswell) {
168080       if (devinfo->is_g4x) {
168098 MEMORY_OBJECT_CONTROL_STATE_LLCeLLCCacheabilityControlLLCCC_bits(const struct gen_device_info *devinfo)
168100    switch (devinfo->gen) {
168106       if (devinfo->is_haswell) {
168114       if (devinfo->is_g4x) {
168129 MEMORY_OBJECT_CONTROL_STATE_LLCeLLCCacheabilityControlLLCCC_start(const struct gen_device_info *devinfo)
168131    switch (devinfo->gen) {
168137       if (devinfo->is_haswell) {
168145       if (devinfo->is_g4x) {
168163 MEMORY_OBJECT_CONTROL_STATE_MemoryTypeLLCeLLCCacheabilityControl_bits(const struct gen_device_info *devinfo)
168165    switch (devinfo->gen) {
168171       if (devinfo->is_haswell) {
168179       if (devinfo->is_g4x) {
168194 MEMORY_OBJECT_CONTROL_STATE_MemoryTypeLLCeLLCCacheabilityControl_start(const struct gen_device_info *devinfo)
168196    switch (devinfo->gen) {
168202       if (devinfo->is_haswell) {
168210       if (devinfo->is_g4x) {
168228 MEMORY_OBJECT_CONTROL_STATE_TargetCache_bits(const struct gen_device_info *devinfo)
168230    switch (devinfo->gen) {
168236       if (devinfo->is_haswell) {
168244       if (devinfo->is_g4x) {
168259 MEMORY_OBJECT_CONTROL_STATE_TargetCache_start(const struct gen_device_info *devinfo)
168261    switch (devinfo->gen) {
168267       if (devinfo->is_haswell) {
168275       if (devinfo->is_g4x) {
168298 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_length(const struct gen_device_info *devinfo)
168300    switch (devinfo->gen) {
168306       if (devinfo->is_haswell) {
168314       if (devinfo->is_g4x) {
168337 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_FirstMBBitOffset_bits(const struct gen_device_info *devinfo)
168339    switch (devinfo->gen) {
168345       if (devinfo->is_haswell) {
168353       if (devinfo->is_g4x) {
168373 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_FirstMBBitOffset_start(const struct gen_device_info *devinfo)
168375    switch (devinfo->gen) {
168381       if (devinfo->is_haswell) {
168389       if (devinfo->is_g4x) {
168412 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_LastMB_bits(const struct gen_device_info *devinfo)
168414    switch (devinfo->gen) {
168420       if (devinfo->is_haswell) {
168428       if (devinfo->is_g4x) {
168448 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_LastMB_start(const struct gen_device_info *devinfo)
168450    switch (devinfo->gen) {
168456       if (devinfo->is_haswell) {
168464       if (devinfo->is_g4x) {
168487 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_LastPicSlice_bits(const struct gen_device_info *devinfo)
168489    switch (devinfo->gen) {
168495       if (devinfo->is_haswell) {
168503       if (devinfo->is_g4x) {
168523 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_LastPicSlice_start(const struct gen_device_info *devinfo)
168525    switch (devinfo->gen) {
168531       if (devinfo->is_haswell) {
168539       if (devinfo->is_g4x) {
168562 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_MBCount_bits(const struct gen_device_info *devinfo)
168564    switch (devinfo->gen) {
168570       if (devinfo->is_haswell) {
168578       if (devinfo->is_g4x) {
168598 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_MBCount_start(const struct gen_device_info *devinfo)
168600    switch (devinfo->gen) {
168606       if (devinfo->is_haswell) {
168614       if (devinfo->is_g4x) {
168636 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_NextSliceHorizontalPosition_bits(const struct gen_device_info *devinfo)
168638    switch (devinfo->gen) {
168644       if (devinfo->is_haswell) {
168652       if (devinfo->is_g4x) {
168671 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_NextSliceHorizontalPosition_start(const struct gen_device_info *devinfo)
168673    switch (devinfo->gen) {
168679       if (devinfo->is_haswell) {
168687       if (devinfo->is_g4x) {
168709 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_NextSliceVerticalPosition_bits(const struct gen_device_info *devinfo)
168711    switch (devinfo->gen) {
168717       if (devinfo->is_haswell) {
168725       if (devinfo->is_g4x) {
168744 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_NextSliceVerticalPosition_start(const struct gen_device_info *devinfo)
168746    switch (devinfo->gen) {
168752       if (devinfo->is_haswell) {
168760       if (devinfo->is_g4x) {
168783 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_QuantizerScaleCode_bits(const struct gen_device_info *devinfo)
168785    switch (devinfo->gen) {
168791       if (devinfo->is_haswell) {
168799       if (devinfo->is_g4x) {
168819 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_QuantizerScaleCode_start(const struct gen_device_info *devinfo)
168821    switch (devinfo->gen) {
168827       if (devinfo->is_haswell) {
168835       if (devinfo->is_g4x) {
168857 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_SliceConcealmentOverride_bits(const struct gen_device_info *devinfo)
168859    switch (devinfo->gen) {
168865       if (devinfo->is_haswell) {
168873       if (devinfo->is_g4x) {
168892 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_SliceConcealmentOverride_start(const struct gen_device_info *devinfo)
168894    switch (devinfo->gen) {
168900       if (devinfo->is_haswell) {
168908       if (devinfo->is_g4x) {
168930 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_SliceConcealmentType_bits(const struct gen_device_info *devinfo)
168932    switch (devinfo->gen) {
168938       if (devinfo->is_haswell) {
168946       if (devinfo->is_g4x) {
168965 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_SliceConcealmentType_start(const struct gen_device_info *devinfo)
168967    switch (devinfo->gen) {
168973       if (devinfo->is_haswell) {
168981       if (devinfo->is_g4x) {
169004 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_SliceHorizontalPosition_bits(const struct gen_device_info *devinfo)
169006    switch (devinfo->gen) {
169012       if (devinfo->is_haswell) {
169020       if (devinfo->is_g4x) {
169040 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_SliceHorizontalPosition_start(const struct gen_device_info *devinfo)
169042    switch (devinfo->gen) {
169048       if (devinfo->is_haswell) {
169056       if (devinfo->is_g4x) {
169079 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_SliceVerticalPosition_bits(const struct gen_device_info *devinfo)
169081    switch (devinfo->gen) {
169087       if (devinfo->is_haswell) {
169095       if (devinfo->is_g4x) {
169115 MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_SliceVerticalPosition_start(const struct gen_device_info *devinfo)
169117    switch (devinfo->gen) {
169123       if (devinfo->is_haswell) {
169131       if (devinfo->is_g4x) {
169155 MI_ARB_CHECK_length(const struct gen_device_info *devinfo)
169157    switch (devinfo->gen) {
169163       if (devinfo->is_haswell) {
169171       if (devinfo->is_g4x) {
169195 MI_ARB_CHECK_CommandType_bits(const struct gen_device_info *devinfo)
169197    switch (devinfo->gen) {
169203       if (devinfo->is_haswell) {
169211       if (devinfo->is_g4x) {
169232 MI_ARB_CHECK_CommandType_start(const struct gen_device_info *devinfo)
169234    switch (devinfo->gen) {
169240       if (devinfo->is_haswell) {
169248       if (devinfo->is_g4x) {
169272 MI_ARB_CHECK_MICommandOpcode_bits(const struct gen_device_info *devinfo)
169274    switch (devinfo->gen) {
169280       if (devinfo->is_haswell) {
169288       if (devinfo->is_g4x) {
169309 MI_ARB_CHECK_MICommandOpcode_start(const struct gen_device_info *devinfo)
169311    switch (devinfo->gen) {
169317       if (devinfo->is_haswell) {
169325       if (devinfo->is_g4x) {
169349 MI_ARB_ON_OFF_length(const struct gen_device_info *devinfo)
169351    switch (devinfo->gen) {
169357       if (devinfo->is_haswell) {
169365       if (devinfo->is_g4x) {
169384 MI_ARB_ON_OFF_AllowLiteRestore_bits(const struct gen_device_info *devinfo)
169386    switch (devinfo->gen) {
169392       if (devinfo->is_haswell) {
169400       if (devinfo->is_g4x) {
169416 MI_ARB_ON_OFF_AllowLiteRestore_start(const struct gen_device_info *devinfo)
169418    switch (devinfo->gen) {
169424       if (devinfo->is_haswell) {
169432       if (devinfo->is_g4x) {
169456 MI_ARB_ON_OFF_ArbitrationEnable_bits(const struct gen_device_info *devinfo)
169458    switch (devinfo->gen) {
169464       if (devinfo->is_haswell) {
169472       if (devinfo->is_g4x) {
169493 MI_ARB_ON_OFF_ArbitrationEnable_start(const struct gen_device_info *devinfo)
169495    switch (devinfo->gen) {
169501       if (devinfo->is_haswell) {
169509       if (devinfo->is_g4x) {
169533 MI_ARB_ON_OFF_CommandType_bits(const struct gen_device_info *devinfo)
169535    switch (devinfo->gen) {
169541       if (devinfo->is_haswell) {
169549       if (devinfo->is_g4x) {
169570 MI_ARB_ON_OFF_CommandType_start(const struct gen_device_info *devinfo)
169572    switch (devinfo->gen) {
169578       if (devinfo->is_haswell) {
169586       if (devinfo->is_g4x) {
169610 MI_ARB_ON_OFF_MICommandOpcode_bits(const struct gen_device_info *devinfo)
169612    switch (devinfo->gen) {
169618       if (devinfo->is_haswell) {
169626       if (devinfo->is_g4x) {
169647 MI_ARB_ON_OFF_MICommandOpcode_start(const struct gen_device_info *devinfo)
169649    switch (devinfo->gen) {
169655       if (devinfo->is_haswell) {
169663       if (devinfo->is_g4x) {
169684 MI_ATOMIC_length(const struct gen_device_info *devinfo)
169686    switch (devinfo->gen) {
169692       if (devinfo->is_haswell) {
169700       if (devinfo->is_g4x) {
169721 MI_ATOMIC_ATOMICOPCODE_bits(const struct gen_device_info *devinfo)
169723    switch (devinfo->gen) {
169729       if (devinfo->is_haswell) {
169737       if (devinfo->is_g4x) {
169755 MI_ATOMIC_ATOMICOPCODE_start(const struct gen_device_info *devinfo)
169757    switch (devinfo->gen) {
169763       if (devinfo->is_haswell) {
169771       if (devinfo->is_g4x) {
169792 MI_ATOMIC_CSSTALL_bits(const struct gen_device_info *devinfo)
169794    switch (devinfo->gen) {
169800       if (devinfo->is_haswell) {
169808       if (devinfo->is_g4x) {
169826 MI_ATOMIC_CSSTALL_start(const struct gen_device_info *devinfo)
169828    switch (devinfo->gen) {
169834       if (devinfo->is_haswell) {
169842       if (devinfo->is_g4x) {
169863 MI_ATOMIC_CommandType_bits(const struct gen_device_info *devinfo)
169865    switch (devinfo->gen) {
169871       if (devinfo->is_haswell) {
169879       if (devinfo->is_g4x) {
169897 MI_ATOMIC_CommandType_start(const struct gen_device_info *devinfo)
169899    switch (devinfo->gen) {
169905       if (devinfo->is_haswell) {
169913       if (devinfo->is_g4x) {
169934 MI_ATOMIC_DWordLength_bits(const struct gen_device_info *devinfo)
169936    switch (devinfo->gen) {
169942       if (devinfo->is_haswell) {
169950       if (devinfo->is_g4x) {
169968 MI_ATOMIC_DWordLength_start(const struct gen_device_info *devinfo)
169970    switch (devinfo->gen) {
169976       if (devinfo->is_haswell) {
169984       if (devinfo->is_g4x) {
170005 MI_ATOMIC_DataSize_bits(const struct gen_device_info *devinfo)
170007    switch (devinfo->gen) {
170013       if (devinfo->is_haswell) {
170021       if (devinfo->is_g4x) {
170039 MI_ATOMIC_DataSize_start(const struct gen_device_info *devinfo)
170041    switch (devinfo->gen) {
170047       if (devinfo->is_haswell) {
170055       if (devinfo->is_g4x) {
170076 MI_ATOMIC_InlineData_bits(const struct gen_device_info *devinfo)
170078    switch (devinfo->gen) {
170084       if (devinfo->is_haswell) {
170092       if (devinfo->is_g4x) {
170110 MI_ATOMIC_InlineData_start(const struct gen_device_info *devinfo)
170112    switch (devinfo->gen) {
170118       if (devinfo->is_haswell) {
170126       if (devinfo->is_g4x) {
170147 MI_ATOMIC_MICommandOpcode_bits(const struct gen_device_info *devinfo)
170149    switch (devinfo->gen) {
170155       if (devinfo->is_haswell) {
170163       if (devinfo->is_g4x) {
170181 MI_ATOMIC_MICommandOpcode_start(const struct gen_device_info *devinfo)
170183    switch (devinfo->gen) {
170189       if (devinfo->is_haswell) {
170197       if (devinfo->is_g4x) {
170218 MI_ATOMIC_MemoryAddress_bits(const struct gen_device_info *devinfo)
170220    switch (devinfo->gen) {
170226       if (devinfo->is_haswell) {
170234       if (devinfo->is_g4x) {
170252 MI_ATOMIC_MemoryAddress_start(const struct gen_device_info *devinfo)
170254    switch (devinfo->gen) {
170260       if (devinfo->is_haswell) {
170268       if (devinfo->is_g4x) {
170289 MI_ATOMIC_MemoryType_bits(const struct gen_device_info *devinfo)
170291    switch (devinfo->gen) {
170297       if (devinfo->is_haswell) {
170305       if (devinfo->is_g4x) {
170323 MI_ATOMIC_MemoryType_start(const struct gen_device_info *devinfo)
170325    switch (devinfo->gen) {
170331       if (devinfo->is_haswell) {
170339       if (devinfo->is_g4x) {
170360 MI_ATOMIC_Operand1DataDword0_bits(const struct gen_device_info *devinfo)
170362    switch (devinfo->gen) {
170368       if (devinfo->is_haswell) {
170376       if (devinfo->is_g4x) {
170394 MI_ATOMIC_Operand1DataDword0_start(const struct gen_device_info *devinfo)
170396    switch (devinfo->gen) {
170402       if (devinfo->is_haswell) {
170410       if (devinfo->is_g4x) {
170431 MI_ATOMIC_Operand1DataDword1_bits(const struct gen_device_info *devinfo)
170433    switch (devinfo->gen) {
170439       if (devinfo->is_haswell) {
170447       if (devinfo->is_g4x) {
170465 MI_ATOMIC_Operand1DataDword1_start(const struct gen_device_info *devinfo)
170467    switch (devinfo->gen) {
170473       if (devinfo->is_haswell) {
170481       if (devinfo->is_g4x) {
170502 MI_ATOMIC_Operand1DataDword2_bits(const struct gen_device_info *devinfo)
170504    switch (devinfo->gen) {
170510       if (devinfo->is_haswell) {
170518       if (devinfo->is_g4x) {
170536 MI_ATOMIC_Operand1DataDword2_start(const struct gen_device_info *devinfo)
170538    switch (devinfo->gen) {
170544       if (devinfo->is_haswell) {
170552       if (devinfo->is_g4x) {
170573 MI_ATOMIC_Operand1DataDword3_bits(const struct gen_device_info *devinfo)
170575    switch (devinfo->gen) {
170581       if (devinfo->is_haswell) {
170589       if (devinfo->is_g4x) {
170607 MI_ATOMIC_Operand1DataDword3_start(const struct gen_device_info *devinfo)
170609    switch (devinfo->gen) {
170615       if (devinfo->is_haswell) {
170623       if (devinfo->is_g4x) {
170644 MI_ATOMIC_Operand2DataDword0_bits(const struct gen_device_info *devinfo)
170646    switch (devinfo->gen) {
170652       if (devinfo->is_haswell) {
170660       if (devinfo->is_g4x) {
170678 MI_ATOMIC_Operand2DataDword0_start(const struct gen_device_info *devinfo)
170680    switch (devinfo->gen) {
170686       if (devinfo->is_haswell) {
170694       if (devinfo->is_g4x) {
170715 MI_ATOMIC_Operand2DataDword1_bits(const struct gen_device_info *devinfo)
170717    switch (devinfo->gen) {
170723       if (devinfo->is_haswell) {
170731       if (devinfo->is_g4x) {
170749 MI_ATOMIC_Operand2DataDword1_start(const struct gen_device_info *devinfo)
170751    switch (devinfo->gen) {
170757       if (devinfo->is_haswell) {
170765       if (devinfo->is_g4x) {
170786 MI_ATOMIC_Operand2DataDword2_bits(const struct gen_device_info *devinfo)
170788    switch (devinfo->gen) {
170794       if (devinfo->is_haswell) {
170802       if (devinfo->is_g4x) {
170820 MI_ATOMIC_Operand2DataDword2_start(const struct gen_device_info *devinfo)
170822    switch (devinfo->gen) {
170828       if (devinfo->is_haswell) {
170836       if (devinfo->is_g4x) {
170857 MI_ATOMIC_Operand2DataDword3_bits(const struct gen_device_info *devinfo)
170859    switch (devinfo->gen) {
170865       if (devinfo->is_haswell) {
170873       if (devinfo->is_g4x) {
170891 MI_ATOMIC_Operand2DataDword3_start(const struct gen_device_info *devinfo)
170893    switch (devinfo->gen) {
170899       if (devinfo->is_haswell) {
170907       if (devinfo->is_g4x) {
170928 MI_ATOMIC_PostSyncOperation_bits(const struct gen_device_info *devinfo)
170930    switch (devinfo->gen) {
170936       if (devinfo->is_haswell) {
170944       if (devinfo->is_g4x) {
170962 MI_ATOMIC_PostSyncOperation_start(const struct gen_device_info *devinfo)
170964    switch (devinfo->gen) {
170970       if (devinfo->is_haswell) {
170978       if (devinfo->is_g4x) {
170999 MI_ATOMIC_ReturnDataControl_bits(const struct gen_device_info *devinfo)
171001    switch (devinfo->gen) {
171007       if (devinfo->is_haswell) {
171015       if (devinfo->is_g4x) {
171033 MI_ATOMIC_ReturnDataControl_start(const struct gen_device_info *devinfo)
171035    switch (devinfo->gen) {
171041       if (devinfo->is_haswell) {
171049       if (devinfo->is_g4x) {
171073 MI_BATCH_BUFFER_END_length(const struct gen_device_info *devinfo)
171075    switch (devinfo->gen) {
171081       if (devinfo->is_haswell) {
171089       if (devinfo->is_g4x) {
171113 MI_BATCH_BUFFER_END_CommandType_bits(const struct gen_device_info *devinfo)
171115    switch (devinfo->gen) {
171121       if (devinfo->is_haswell) {
171129       if (devinfo->is_g4x) {
171150 MI_BATCH_BUFFER_END_CommandType_start(const struct gen_device_info *devinfo)
171152    switch (devinfo->gen) {
171158       if (devinfo->is_haswell) {
171166       if (devinfo->is_g4x) {
171185 MI_BATCH_BUFFER_END_EndContext_bits(const struct gen_device_info *devinfo)
171187    switch (devinfo->gen) {
171193       if (devinfo->is_haswell) {
171201       if (devinfo->is_g4x) {
171217 MI_BATCH_BUFFER_END_EndContext_start(const struct gen_device_info *devinfo)
171219    switch (devinfo->gen) {
171225       if (devinfo->is_haswell) {
171233       if (devinfo->is_g4x) {
171257 MI_BATCH_BUFFER_END_MICommandOpcode_bits(const struct gen_device_info *devinfo)
171259    switch (devinfo->gen) {
171265       if (devinfo->is_haswell) {
171273       if (devinfo->is_g4x) {
171294 MI_BATCH_BUFFER_END_MICommandOpcode_start(const struct gen_device_info *devinfo)
171296    switch (devinfo->gen) {
171302       if (devinfo->is_haswell) {
171310       if (devinfo->is_g4x) {
171334 MI_BATCH_BUFFER_START_length(const struct gen_device_info *devinfo)
171336    switch (devinfo->gen) {
171342       if (devinfo->is_haswell) {
171350       if (devinfo->is_g4x) {
171371 MI_BATCH_BUFFER_START_AddOffsetEnable_bits(const struct gen_device_info *devinfo)
171373    switch (devinfo->gen) {
171379       if (devinfo->is_haswell) {
171387       if (devinfo->is_g4x) {
171405 MI_BATCH_BUFFER_START_AddOffsetEnable_start(const struct gen_device_info *devinfo)
171407    switch (devinfo->gen) {
171413       if (devinfo->is_haswell) {
171421       if (devinfo->is_g4x) {
171445 MI_BATCH_BUFFER_START_AddressSpaceIndicator_bits(const struct gen_device_info *devinfo)
171447    switch (devinfo->gen) {
171453       if (devinfo->is_haswell) {
171461       if (devinfo->is_g4x) {
171482 MI_BATCH_BUFFER_START_AddressSpaceIndicator_start(const struct gen_device_info *devinfo)
171484    switch (devinfo->gen) {
171490       if (devinfo->is_haswell) {
171498       if (devinfo->is_g4x) {
171522 MI_BATCH_BUFFER_START_BatchBufferStartAddress_bits(const struct gen_device_info *devinfo)
171524    switch (devinfo->gen) {
171530       if (devinfo->is_haswell) {
171538       if (devinfo->is_g4x) {
171559 MI_BATCH_BUFFER_START_BatchBufferStartAddress_start(const struct gen_device_info *devinfo)
171561    switch (devinfo->gen) {
171567       if (devinfo->is_haswell) {
171575       if (devinfo->is_g4x) {
171595 MI_BATCH_BUFFER_START_ClearCommandBufferEnable_bits(const struct gen_device_info *devinfo)
171597    switch (devinfo->gen) {
171603       if (devinfo->is_haswell) {
171611       if (devinfo->is_g4x) {
171628 MI_BATCH_BUFFER_START_ClearCommandBufferEnable_start(const struct gen_device_info *devinfo)
171630    switch (devinfo->gen) {
171636       if (devinfo->is_haswell) {
171644       if (devinfo->is_g4x) {
171668 MI_BATCH_BUFFER_START_CommandType_bits(const struct gen_device_info *devinfo)
171670    switch (devinfo->gen) {
171676       if (devinfo->is_haswell) {
171684       if (devinfo->is_g4x) {
171705 MI_BATCH_BUFFER_START_CommandType_start(const struct gen_device_info *devinfo)
171707    switch (devinfo->gen) {
171713       if (devinfo->is_haswell) {
171721       if (devinfo->is_g4x) {
171745 MI_BATCH_BUFFER_START_DWordLength_bits(const struct gen_device_info *devinfo)
171747    switch (devinfo->gen) {
171753       if (devinfo->is_haswell) {
171761       if (devinfo->is_g4x) {
171782 MI_BATCH_BUFFER_START_DWordLength_start(const struct gen_device_info *devinfo)
171784    switch (devinfo->gen) {
171790       if (devinfo->is_haswell) {
171798       if (devinfo->is_g4x) {
171822 MI_BATCH_BUFFER_START_MICommandOpcode_bits(const struct gen_device_info *devinfo)
171824    switch (devinfo->gen) {
171830       if (devinfo->is_haswell) {
171838       if (devinfo->is_g4x) {
171859 MI_BATCH_BUFFER_START_MICommandOpcode_start(const struct gen_device_info *devinfo)
171861    switch (devinfo->gen) {
171867       if (devinfo->is_haswell) {
171875       if (devinfo->is_g4x) {
171893 MI_BATCH_BUFFER_START_NonPrivileged_bits(const struct gen_device_info *devinfo)
171895    switch (devinfo->gen) {
171901       if (devinfo->is_haswell) {
171909       if (devinfo->is_g4x) {
171924 MI_BATCH_BUFFER_START_NonPrivileged_start(const struct gen_device_info *devinfo)
171926    switch (devinfo->gen) {
171932       if (devinfo->is_haswell) {
171940       if (devinfo->is_g4x) {
171962 MI_BATCH_BUFFER_START_PredicationEnable_bits(const struct gen_device_info *devinfo)
171964    switch (devinfo->gen) {
171970       if (devinfo->is_haswell) {
171978       if (devinfo->is_g4x) {
171997 MI_BATCH_BUFFER_START_PredicationEnable_start(const struct gen_device_info *devinfo)
171999    switch (devinfo->gen) {
172005       if (devinfo->is_haswell) {
172013       if (devinfo->is_g4x) {
172035 MI_BATCH_BUFFER_START_ResourceStreamerEnable_bits(const struct gen_device_info *devinfo)
172037    switch (devinfo->gen) {
172043       if (devinfo->is_haswell) {
172051       if (devinfo->is_g4x) {
172070 MI_BATCH_BUFFER_START_ResourceStreamerEnable_start(const struct gen_device_info *devinfo)
172072    switch (devinfo->gen) {
172078       if (devinfo->is_haswell) {
172086       if (devinfo->is_g4x) {
172108 MI_BATCH_BUFFER_START_SecondLevelBatchBuffer_bits(const struct gen_device_info *devinfo)
172110    switch (devinfo->gen) {
172116       if (devinfo->is_haswell) {
172124       if (devinfo->is_g4x) {
172143 MI_BATCH_BUFFER_START_SecondLevelBatchBuffer_start(const struct gen_device_info *devinfo)
172145    switch (devinfo->gen) {
172151       if (devinfo->is_haswell) {
172159       if (devinfo->is_g4x) {
172189 MI_CLFLUSH_CommandType_bits(const struct gen_device_info *devinfo)
172191    switch (devinfo->gen) {
172197       if (devinfo->is_haswell) {
172205       if (devinfo->is_g4x) {
172226 MI_CLFLUSH_CommandType_start(const struct gen_device_info *devinfo)
172228    switch (devinfo->gen) {
172234       if (devinfo->is_haswell) {
172242       if (devinfo->is_g4x) {
172266 MI_CLFLUSH_DWRepresentingaHalfCacheLine_bits(const struct gen_device_info *devinfo)
172268    switch (devinfo->gen) {
172274       if (devinfo->is_haswell) {
172282       if (devinfo->is_g4x) {
172303 MI_CLFLUSH_DWRepresentingaHalfCacheLine_start(const struct gen_device_info *devinfo)
172305    switch (devinfo->gen) {
172311       if (devinfo->is_haswell) {
172319       if (devinfo->is_g4x) {
172343 MI_CLFLUSH_DWordLength_bits(const struct gen_device_info *devinfo)
172345    switch (devinfo->gen) {
172351       if (devinfo->is_haswell) {
172359       if (devinfo->is_g4x) {
172380 MI_CLFLUSH_DWordLength_start(const struct gen_device_info *devinfo)
172382    switch (devinfo->gen) {
172388       if (devinfo->is_haswell) {
172396       if (devinfo->is_g4x) {
172420 MI_CLFLUSH_MICommandOpcode_bits(const struct gen_device_info *devinfo)
172422    switch (devinfo->gen) {
172428       if (devinfo->is_haswell) {
172436       if (devinfo->is_g4x) {
172457 MI_CLFLUSH_MICommandOpcode_start(const struct gen_device_info *devinfo)
172459    switch (devinfo->gen) {
172465       if (devinfo->is_haswell) {
172473       if (devinfo->is_g4x) {
172497 MI_CLFLUSH_PageBaseAddress_bits(const struct gen_device_info *devinfo)
172499    switch (devinfo->gen) {
172505       if (devinfo->is_haswell) {
172513       if (devinfo->is_g4x) {
172534 MI_CLFLUSH_PageBaseAddress_start(const struct gen_device_info *devinfo)
172536    switch (devinfo->gen) {
172542       if (devinfo->is_haswell) {
172550       if (devinfo->is_g4x) {
172569 MI_CLFLUSH_PageBaseAddressHigh_bits(const struct gen_device_info *devinfo)
172571    switch (devinfo->gen) {
172577       if (devinfo->is_haswell) {
172585       if (devinfo->is_g4x) {
172601 MI_CLFLUSH_PageBaseAddressHigh_start(const struct gen_device_info *devinfo)
172603    switch (devinfo->gen) {
172609       if (devinfo->is_haswell) {
172617       if (devinfo->is_g4x) {
172641 MI_CLFLUSH_StartingCachelineOffset_bits(const struct gen_device_info *devinfo)
172643    switch (devinfo->gen) {
172649       if (devinfo->is_haswell) {
172657       if (devinfo->is_g4x) {
172678 MI_CLFLUSH_StartingCachelineOffset_start(const struct gen_device_info *devinfo)
172680    switch (devinfo->gen) {
172686       if (devinfo->is_haswell) {
172694       if (devinfo->is_g4x) {
172718 MI_CLFLUSH_UseGlobalGTT_bits(const struct gen_device_info *devinfo)
172720    switch (devinfo->gen) {
172726       if (devinfo->is_haswell) {
172734       if (devinfo->is_g4x) {
172755 MI_CLFLUSH_UseGlobalGTT_start(const struct gen_device_info *devinfo)
172757    switch (devinfo->gen) {
172763       if (devinfo->is_haswell) {
172771       if (devinfo->is_g4x) {
172795 MI_CONDITIONAL_BATCH_BUFFER_END_length(const struct gen_device_info *devinfo)
172797    switch (devinfo->gen) {
172803       if (devinfo->is_haswell) {
172811       if (devinfo->is_g4x) {
172835 MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_bits(const struct gen_device_info *devinfo)
172837    switch (devinfo->gen) {
172843       if (devinfo->is_haswell) {
172851       if (devinfo->is_g4x) {
172872 MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_start(const struct gen_device_info *devinfo)
172874    switch (devinfo->gen) {
172880       if (devinfo->is_haswell) {
172888       if (devinfo->is_g4x) {
172912 MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_bits(const struct gen_device_info *devinfo)
172914    switch (devinfo->gen) {
172920       if (devinfo->is_haswell) {
172928       if (devinfo->is_g4x) {
172949 MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_start(const struct gen_device_info *devinfo)
172951    switch (devinfo->gen) {
172957       if (devinfo->is_haswell) {
172965       if (devinfo->is_g4x) {
172989 MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_bits(const struct gen_device_info *devinfo)
172991    switch (devinfo->gen) {
172997       if (devinfo->is_haswell) {
173005       if (devinfo->is_g4x) {
173026 MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_start(const struct gen_device_info *devinfo)
173028    switch (devinfo->gen) {
173034       if (devinfo->is_haswell) {
173042       if (devinfo->is_g4x) {
173062 MI_CONDITIONAL_BATCH_BUFFER_END_CompareMaskMode_bits(const struct gen_device_info *devinfo)
173064    switch (devinfo->gen) {
173070       if (devinfo->is_haswell) {
173078       if (devinfo->is_g4x) {
173095 MI_CONDITIONAL_BATCH_BUFFER_END_CompareMaskMode_start(const struct gen_device_info *devinfo)
173097    switch (devinfo->gen) {
173103       if (devinfo->is_haswell) {
173111       if (devinfo->is_g4x) {
173135 MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_bits(const struct gen_device_info *devinfo)
173137    switch (devinfo->gen) {
173143       if (devinfo->is_haswell) {
173151       if (devinfo->is_g4x) {
173172 MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_start(const struct gen_device_info *devinfo)
173174    switch (devinfo->gen) {
173180       if (devinfo->is_haswell) {
173188       if (devinfo->is_g4x) {
173212 MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_bits(const struct gen_device_info *devinfo)
173214    switch (devinfo->gen) {
173220       if (devinfo->is_haswell) {
173228       if (devinfo->is_g4x) {
173249 MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_start(const struct gen_device_info *devinfo)
173251    switch (devinfo->gen) {
173257       if (devinfo->is_haswell) {
173265       if (devinfo->is_g4x) {
173289 MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_bits(const struct gen_device_info *devinfo)
173291    switch (devinfo->gen) {
173297       if (devinfo->is_haswell) {
173305       if (devinfo->is_g4x) {
173326 MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_start(const struct gen_device_info *devinfo)
173328    switch (devinfo->gen) {
173334       if (devinfo->is_haswell) {
173342       if (devinfo->is_g4x) {
173366 MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_bits(const struct gen_device_info *devinfo)
173368    switch (devinfo->gen) {
173374       if (devinfo->is_haswell) {
173382       if (devinfo->is_g4x) {
173403 MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_start(const struct gen_device_info *devinfo)
173405    switch (devinfo->gen) {
173411       if (devinfo->is_haswell) {
173419       if (devinfo->is_g4x) {
173440 MI_COPY_MEM_MEM_length(const struct gen_device_info *devinfo)
173442    switch (devinfo->gen) {
173448       if (devinfo->is_haswell) {
173456       if (devinfo->is_g4x) {
173477 MI_COPY_MEM_MEM_CommandType_bits(const struct gen_device_info *devinfo)
173479    switch (devinfo->gen) {
173485       if (devinfo->is_haswell) {
173493       if (devinfo->is_g4x) {
173511 MI_COPY_MEM_MEM_CommandType_start(const struct gen_device_info *devinfo)
173513    switch (devinfo->gen) {
173519       if (devinfo->is_haswell) {
173527       if (devinfo->is_g4x) {
173548 MI_COPY_MEM_MEM_DWordLength_bits(const struct gen_device_info *devinfo)
173550    switch (devinfo->gen) {
173556       if (devinfo->is_haswell) {
173564       if (devinfo->is_g4x) {
173582 MI_COPY_MEM_MEM_DWordLength_start(const struct gen_device_info *devinfo)
173584    switch (devinfo->gen) {
173590       if (devinfo->is_haswell) {
173598       if (devinfo->is_g4x) {
173619 MI_COPY_MEM_MEM_DestinationMemoryAddress_bits(const struct gen_device_info *devinfo)
173621    switch (devinfo->gen) {
173627       if (devinfo->is_haswell) {
173635       if (devinfo->is_g4x) {
173653 MI_COPY_MEM_MEM_DestinationMemoryAddress_start(const struct gen_device_info *devinfo)
173655    switch (devinfo->gen) {
173661       if (devinfo->is_haswell) {
173669       if (devinfo->is_g4x) {
173690 MI_COPY_MEM_MEM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
173692    switch (devinfo->gen) {
173698       if (devinfo->is_haswell) {
173706       if (devinfo->is_g4x) {
173724 MI_COPY_MEM_MEM_MICommandOpcode_start(const struct gen_device_info *devinfo)
173726    switch (devinfo->gen) {
173732       if (devinfo->is_haswell) {
173740       if (devinfo->is_g4x) {
173761 MI_COPY_MEM_MEM_SourceMemoryAddress_bits(const struct gen_device_info *devinfo)
173763    switch (devinfo->gen) {
173769       if (devinfo->is_haswell) {
173777       if (devinfo->is_g4x) {
173795 MI_COPY_MEM_MEM_SourceMemoryAddress_start(const struct gen_device_info *devinfo)
173797    switch (devinfo->gen) {
173803       if (devinfo->is_haswell) {
173811       if (devinfo->is_g4x) {
173832 MI_COPY_MEM_MEM_UseGlobalGTTDestination_bits(const struct gen_device_info *devinfo)
173834    switch (devinfo->gen) {
173840       if (devinfo->is_haswell) {
173848       if (devinfo->is_g4x) {
173866 MI_COPY_MEM_MEM_UseGlobalGTTDestination_start(const struct gen_device_info *devinfo)
173868    switch (devinfo->gen) {
173874       if (devinfo->is_haswell) {
173882       if (devinfo->is_g4x) {
173903 MI_COPY_MEM_MEM_UseGlobalGTTSource_bits(const struct gen_device_info *devinfo)
173905    switch (devinfo->gen) {
173911       if (devinfo->is_haswell) {
173919       if (devinfo->is_g4x) {
173937 MI_COPY_MEM_MEM_UseGlobalGTTSource_start(const struct gen_device_info *devinfo)
173939    switch (devinfo->gen) {
173945       if (devinfo->is_haswell) {
173953       if (devinfo->is_g4x) {
173973 MI_DISPLAY_FLIP_length(const struct gen_device_info *devinfo)
173975    switch (devinfo->gen) {
173981       if (devinfo->is_haswell) {
173989       if (devinfo->is_g4x) {
174009 MI_DISPLAY_FLIP_AsyncFlipIndicator_bits(const struct gen_device_info *devinfo)
174011    switch (devinfo->gen) {
174017       if (devinfo->is_haswell) {
174025       if (devinfo->is_g4x) {
174042 MI_DISPLAY_FLIP_AsyncFlipIndicator_start(const struct gen_device_info *devinfo)
174044    switch (devinfo->gen) {
174050       if (devinfo->is_haswell) {
174058       if (devinfo->is_g4x) {
174078 MI_DISPLAY_FLIP_CommandType_bits(const struct gen_device_info *devinfo)
174080    switch (devinfo->gen) {
174086       if (devinfo->is_haswell) {
174094       if (devinfo->is_g4x) {
174111 MI_DISPLAY_FLIP_CommandType_start(const struct gen_device_info *devinfo)
174113    switch (devinfo->gen) {
174119       if (devinfo->is_haswell) {
174127       if (devinfo->is_g4x) {
174147 MI_DISPLAY_FLIP_DWordLength_bits(const struct gen_device_info *devinfo)
174149    switch (devinfo->gen) {
174155       if (devinfo->is_haswell) {
174163       if (devinfo->is_g4x) {
174180 MI_DISPLAY_FLIP_DWordLength_start(const struct gen_device_info *devinfo)
174182    switch (devinfo->gen) {
174188       if (devinfo->is_haswell) {
174196       if (devinfo->is_g4x) {
174216 MI_DISPLAY_FLIP_DisplayBufferBaseAddress_bits(const struct gen_device_info *devinfo)
174218    switch (devinfo->gen) {
174224       if (devinfo->is_haswell) {
174232       if (devinfo->is_g4x) {
174249 MI_DISPLAY_FLIP_DisplayBufferBaseAddress_start(const struct gen_device_info *devinfo)
174251    switch (devinfo->gen) {
174257       if (devinfo->is_haswell) {
174265       if (devinfo->is_g4x) {
174285 MI_DISPLAY_FLIP_DisplayBufferPitch_bits(const struct gen_device_info *devinfo)
174287    switch (devinfo->gen) {
174293       if (devinfo->is_haswell) {
174301       if (devinfo->is_g4x) {
174318 MI_DISPLAY_FLIP_DisplayBufferPitch_start(const struct gen_device_info *devinfo)
174320    switch (devinfo->gen) {
174326       if (devinfo->is_haswell) {
174334       if (devinfo->is_g4x) {
174354 MI_DISPLAY_FLIP_DisplayPlaneSelect_bits(const struct gen_device_info *devinfo)
174356    switch (devinfo->gen) {
174362       if (devinfo->is_haswell) {
174370       if (devinfo->is_g4x) {
174387 MI_DISPLAY_FLIP_DisplayPlaneSelect_start(const struct gen_device_info *devinfo)
174389    switch (devinfo->gen) {
174395       if (devinfo->is_haswell) {
174403       if (devinfo->is_g4x) {
174423 MI_DISPLAY_FLIP_FlipType_bits(const struct gen_device_info *devinfo)
174425    switch (devinfo->gen) {
174431       if (devinfo->is_haswell) {
174439       if (devinfo->is_g4x) {
174456 MI_DISPLAY_FLIP_FlipType_start(const struct gen_device_info *devinfo)
174458    switch (devinfo->gen) {
174464       if (devinfo->is_haswell) {
174472       if (devinfo->is_g4x) {
174492 MI_DISPLAY_FLIP_LeftEyeDisplayBufferBaseAddress_bits(const struct gen_device_info *devinfo)
174494    switch (devinfo->gen) {
174500       if (devinfo->is_haswell) {
174508       if (devinfo->is_g4x) {
174525 MI_DISPLAY_FLIP_LeftEyeDisplayBufferBaseAddress_start(const struct gen_device_info *devinfo)
174527    switch (devinfo->gen) {
174533       if (devinfo->is_haswell) {
174541       if (devinfo->is_g4x) {
174561 MI_DISPLAY_FLIP_MICommandOpcode_bits(const struct gen_device_info *devinfo)
174563    switch (devinfo->gen) {
174569       if (devinfo->is_haswell) {
174577       if (devinfo->is_g4x) {
174594 MI_DISPLAY_FLIP_MICommandOpcode_start(const struct gen_device_info *devinfo)
174596    switch (devinfo->gen) {
174602       if (devinfo->is_haswell) {
174610       if (devinfo->is_g4x) {
174630 MI_DISPLAY_FLIP_Stereoscopic3DMode_bits(const struct gen_device_info *devinfo)
174632    switch (devinfo->gen) {
174638       if (devinfo->is_haswell) {
174646       if (devinfo->is_g4x) {
174663 MI_DISPLAY_FLIP_Stereoscopic3DMode_start(const struct gen_device_info *devinfo)
174665    switch (devinfo->gen) {
174671       if (devinfo->is_haswell) {
174679       if (devinfo->is_g4x) {
174699 MI_DISPLAY_FLIP_TileParameter_bits(const struct gen_device_info *devinfo)
174701    switch (devinfo->gen) {
174707       if (devinfo->is_haswell) {
174715       if (devinfo->is_g4x) {
174732 MI_DISPLAY_FLIP_TileParameter_start(const struct gen_device_info *devinfo)
174734    switch (devinfo->gen) {
174740       if (devinfo->is_haswell) {
174748       if (devinfo->is_g4x) {
174767 MI_DISPLAY_FLIP_VRRMasterFlip_bits(const struct gen_device_info *devinfo)
174769    switch (devinfo->gen) {
174775       if (devinfo->is_haswell) {
174783       if (devinfo->is_g4x) {
174799 MI_DISPLAY_FLIP_VRRMasterFlip_start(const struct gen_device_info *devinfo)
174801    switch (devinfo->gen) {
174807       if (devinfo->is_haswell) {
174815       if (devinfo->is_g4x) {
174838 MI_FLUSH_length(const struct gen_device_info *devinfo)
174840    switch (devinfo->gen) {
174846       if (devinfo->is_haswell) {
174854       if (devinfo->is_g4x) {
174877 MI_FLUSH_CommandType_bits(const struct gen_device_info *devinfo)
174879    switch (devinfo->gen) {
174885       if (devinfo->is_haswell) {
174893       if (devinfo->is_g4x) {
174913 MI_FLUSH_CommandType_start(const struct gen_device_info *devinfo)
174915    switch (devinfo->gen) {
174921       if (devinfo->is_haswell) {
174929       if (devinfo->is_g4x) {
174950 MI_FLUSH_GenericMediaStateClear_bits(const struct gen_device_info *devinfo)
174952    switch (devinfo->gen) {
174958       if (devinfo->is_haswell) {
174966       if (devinfo->is_g4x) {
174984 MI_FLUSH_GenericMediaStateClear_start(const struct gen_device_info *devinfo)
174986    switch (devinfo->gen) {
174992       if (devinfo->is_haswell) {
175000       if (devinfo->is_g4x) {
175023 MI_FLUSH_GlobalSnapshotCountReset_bits(const struct gen_device_info *devinfo)
175025    switch (devinfo->gen) {
175031       if (devinfo->is_haswell) {
175039       if (devinfo->is_g4x) {
175059 MI_FLUSH_GlobalSnapshotCountReset_start(const struct gen_device_info *devinfo)
175061    switch (devinfo->gen) {
175067       if (devinfo->is_haswell) {
175075       if (devinfo->is_g4x) {
175096 MI_FLUSH_IndirectStatePointersDisable_bits(const struct gen_device_info *devinfo)
175098    switch (devinfo->gen) {
175104       if (devinfo->is_haswell) {
175112       if (devinfo->is_g4x) {
175130 MI_FLUSH_IndirectStatePointersDisable_start(const struct gen_device_info *devinfo)
175132    switch (devinfo->gen) {
175138       if (devinfo->is_haswell) {
175146       if (devinfo->is_g4x) {
175169 MI_FLUSH_MICommandOpcode_bits(const struct gen_device_info *devinfo)
175171    switch (devinfo->gen) {
175177       if (devinfo->is_haswell) {
175185       if (devinfo->is_g4x) {
175205 MI_FLUSH_MICommandOpcode_start(const struct gen_device_info *devinfo)
175207    switch (devinfo->gen) {
175213       if (devinfo->is_haswell) {
175221       if (devinfo->is_g4x) {
175239 MI_FLUSH_ProtectedMemoryEnable_bits(const struct gen_device_info *devinfo)
175241    switch (devinfo->gen) {
175247       if (devinfo->is_haswell) {
175255       if (devinfo->is_g4x) {
175270 MI_FLUSH_ProtectedMemoryEnable_start(const struct gen_device_info *devinfo)
175272    switch (devinfo->gen) {
175278       if (devinfo->is_haswell) {
175286       if (devinfo->is_g4x) {
175309 MI_FLUSH_RenderCacheFlushInhibit_bits(const struct gen_device_info *devinfo)
175311    switch (devinfo->gen) {
175317       if (devinfo->is_haswell) {
175325       if (devinfo->is_g4x) {
175345 MI_FLUSH_RenderCacheFlushInhibit_start(const struct gen_device_info *devinfo)
175347    switch (devinfo->gen) {
175353       if (devinfo->is_haswell) {
175361       if (devinfo->is_g4x) {
175384 MI_FLUSH_StateInstructionCacheInvalidate_bits(const struct gen_device_info *devinfo)
175386    switch (devinfo->gen) {
175392       if (devinfo->is_haswell) {
175400       if (devinfo->is_g4x) {
175420 MI_FLUSH_StateInstructionCacheInvalidate_start(const struct gen_device_info *devinfo)
175422    switch (devinfo->gen) {
175428       if (devinfo->is_haswell) {
175436       if (devinfo->is_g4x) {
175456 MI_FORCE_WAKEUP_length(const struct gen_device_info *devinfo)
175458    switch (devinfo->gen) {
175464       if (devinfo->is_haswell) {
175472       if (devinfo->is_g4x) {
175492 MI_FORCE_WAKEUP_CommandType_bits(const struct gen_device_info *devinfo)
175494    switch (devinfo->gen) {
175500       if (devinfo->is_haswell) {
175508       if (devinfo->is_g4x) {
175525 MI_FORCE_WAKEUP_CommandType_start(const struct gen_device_info *devinfo)
175527    switch (devinfo->gen) {
175533       if (devinfo->is_haswell) {
175541       if (devinfo->is_g4x) {
175561 MI_FORCE_WAKEUP_DWordLength_bits(const struct gen_device_info *devinfo)
175563    switch (devinfo->gen) {
175569       if (devinfo->is_haswell) {
175577       if (devinfo->is_g4x) {
175594 MI_FORCE_WAKEUP_DWordLength_start(const struct gen_device_info *devinfo)
175596    switch (devinfo->gen) {
175602       if (devinfo->is_haswell) {
175610       if (devinfo->is_g4x) {
175629 MI_FORCE_WAKEUP_ForceMediaAwake_bits(const struct gen_device_info *devinfo)
175631    switch (devinfo->gen) {
175637       if (devinfo->is_haswell) {
175645       if (devinfo->is_g4x) {
175661 MI_FORCE_WAKEUP_ForceMediaAwake_start(const struct gen_device_info *devinfo)
175663    switch (devinfo->gen) {
175669       if (devinfo->is_haswell) {
175677       if (devinfo->is_g4x) {
175695 MI_FORCE_WAKEUP_ForceMediaSlice0Awake_bits(const struct gen_device_info *devinfo)
175697    switch (devinfo->gen) {
175703       if (devinfo->is_haswell) {
175711       if (devinfo->is_g4x) {
175726 MI_FORCE_WAKEUP_ForceMediaSlice0Awake_start(const struct gen_device_info *devinfo)
175728    switch (devinfo->gen) {
175734       if (devinfo->is_haswell) {
175742       if (devinfo->is_g4x) {
175760 MI_FORCE_WAKEUP_ForceMediaSlice1Awake_bits(const struct gen_device_info *devinfo)
175762    switch (devinfo->gen) {
175768       if (devinfo->is_haswell) {
175776       if (devinfo->is_g4x) {
175791 MI_FORCE_WAKEUP_ForceMediaSlice1Awake_start(const struct gen_device_info *devinfo)
175793    switch (devinfo->gen) {
175799       if (devinfo->is_haswell) {
175807       if (devinfo->is_g4x) {
175825 MI_FORCE_WAKEUP_ForceMediaSlice2Awake_bits(const struct gen_device_info *devinfo)
175827    switch (devinfo->gen) {
175833       if (devinfo->is_haswell) {
175841       if (devinfo->is_g4x) {
175856 MI_FORCE_WAKEUP_ForceMediaSlice2Awake_start(const struct gen_device_info *devinfo)
175858    switch (devinfo->gen) {
175864       if (devinfo->is_haswell) {
175872       if (devinfo->is_g4x) {
175890 MI_FORCE_WAKEUP_ForceMediaSlice3Awake_bits(const struct gen_device_info *devinfo)
175892    switch (devinfo->gen) {
175898       if (devinfo->is_haswell) {
175906       if (devinfo->is_g4x) {
175921 MI_FORCE_WAKEUP_ForceMediaSlice3Awake_start(const struct gen_device_info *devinfo)
175923    switch (devinfo->gen) {
175929       if (devinfo->is_haswell) {
175937       if (devinfo->is_g4x) {
175957 MI_FORCE_WAKEUP_ForceRenderAwake_bits(const struct gen_device_info *devinfo)
175959    switch (devinfo->gen) {
175965       if (devinfo->is_haswell) {
175973       if (devinfo->is_g4x) {
175990 MI_FORCE_WAKEUP_ForceRenderAwake_start(const struct gen_device_info *devinfo)
175992    switch (devinfo->gen) {
175998       if (devinfo->is_haswell) {
176006       if (devinfo->is_g4x) {
176026 MI_FORCE_WAKEUP_MICommandOpcode_bits(const struct gen_device_info *devinfo)
176028    switch (devinfo->gen) {
176034       if (devinfo->is_haswell) {
176042       if (devinfo->is_g4x) {
176059 MI_FORCE_WAKEUP_MICommandOpcode_start(const struct gen_device_info *devinfo)
176061    switch (devinfo->gen) {
176067       if (devinfo->is_haswell) {
176075       if (devinfo->is_g4x) {
176095 MI_FORCE_WAKEUP_MaskBits_bits(const struct gen_device_info *devinfo)
176097    switch (devinfo->gen) {
176103       if (devinfo->is_haswell) {
176111       if (devinfo->is_g4x) {
176128 MI_FORCE_WAKEUP_MaskBits_start(const struct gen_device_info *devinfo)
176130    switch (devinfo->gen) {
176136       if (devinfo->is_haswell) {
176144       if (devinfo->is_g4x) {
176171 MI_LOAD_REGISTER_IMM_length(const struct gen_device_info *devinfo)
176173    switch (devinfo->gen) {
176179       if (devinfo->is_haswell) {
176187       if (devinfo->is_g4x) {
176205 MI_LOAD_REGISTER_IMM_AddCSMMIOStartOffset_bits(const struct gen_device_info *devinfo)
176207    switch (devinfo->gen) {
176213       if (devinfo->is_haswell) {
176221       if (devinfo->is_g4x) {
176236 MI_LOAD_REGISTER_IMM_AddCSMMIOStartOffset_start(const struct gen_device_info *devinfo)
176238    switch (devinfo->gen) {
176244       if (devinfo->is_haswell) {
176252       if (devinfo->is_g4x) {
176279 MI_LOAD_REGISTER_IMM_ByteWriteDisables_bits(const struct gen_device_info *devinfo)
176281    switch (devinfo->gen) {
176287       if (devinfo->is_haswell) {
176295       if (devinfo->is_g4x) {
176319 MI_LOAD_REGISTER_IMM_ByteWriteDisables_start(const struct gen_device_info *devinfo)
176321    switch (devinfo->gen) {
176327       if (devinfo->is_haswell) {
176335       if (devinfo->is_g4x) {
176362 MI_LOAD_REGISTER_IMM_CommandType_bits(const struct gen_device_info *devinfo)
176364    switch (devinfo->gen) {
176370       if (devinfo->is_haswell) {
176378       if (devinfo->is_g4x) {
176402 MI_LOAD_REGISTER_IMM_CommandType_start(const struct gen_device_info *devinfo)
176404    switch (devinfo->gen) {
176410       if (devinfo->is_haswell) {
176418       if (devinfo->is_g4x) {
176445 MI_LOAD_REGISTER_IMM_DWordLength_bits(const struct gen_device_info *devinfo)
176447    switch (devinfo->gen) {
176453       if (devinfo->is_haswell) {
176461       if (devinfo->is_g4x) {
176485 MI_LOAD_REGISTER_IMM_DWordLength_start(const struct gen_device_info *devinfo)
176487    switch (devinfo->gen) {
176493       if (devinfo->is_haswell) {
176501       if (devinfo->is_g4x) {
176528 MI_LOAD_REGISTER_IMM_DataDWord_bits(const struct gen_device_info *devinfo)
176530    switch (devinfo->gen) {
176536       if (devinfo->is_haswell) {
176544       if (devinfo->is_g4x) {
176568 MI_LOAD_REGISTER_IMM_DataDWord_start(const struct gen_device_info *devinfo)
176570    switch (devinfo->gen) {
176576       if (devinfo->is_haswell) {
176584       if (devinfo->is_g4x) {
176611 MI_LOAD_REGISTER_IMM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
176613    switch (devinfo->gen) {
176619       if (devinfo->is_haswell) {
176627       if (devinfo->is_g4x) {
176651 MI_LOAD_REGISTER_IMM_MICommandOpcode_start(const struct gen_device_info *devinfo)
176653    switch (devinfo->gen) {
176659       if (devinfo->is_haswell) {
176667       if (devinfo->is_g4x) {
176694 MI_LOAD_REGISTER_IMM_RegisterOffset_bits(const struct gen_device_info *devinfo)
176696    switch (devinfo->gen) {
176702       if (devinfo->is_haswell) {
176710       if (devinfo->is_g4x) {
176734 MI_LOAD_REGISTER_IMM_RegisterOffset_start(const struct gen_device_info *devinfo)
176736    switch (devinfo->gen) {
176742       if (devinfo->is_haswell) {
176750       if (devinfo->is_g4x) {
176773 MI_LOAD_REGISTER_MEM_length(const struct gen_device_info *devinfo)
176775    switch (devinfo->gen) {
176781       if (devinfo->is_haswell) {
176789       if (devinfo->is_g4x) {
176807 MI_LOAD_REGISTER_MEM_AddCSMMIOStartOffset_bits(const struct gen_device_info *devinfo)
176809    switch (devinfo->gen) {
176815       if (devinfo->is_haswell) {
176823       if (devinfo->is_g4x) {
176838 MI_LOAD_REGISTER_MEM_AddCSMMIOStartOffset_start(const struct gen_device_info *devinfo)
176840    switch (devinfo->gen) {
176846       if (devinfo->is_haswell) {
176854       if (devinfo->is_g4x) {
176872 MI_LOAD_REGISTER_MEM_AddLoopVariable_bits(const struct gen_device_info *devinfo)
176874    switch (devinfo->gen) {
176880       if (devinfo->is_haswell) {
176888       if (devinfo->is_g4x) {
176903 MI_LOAD_REGISTER_MEM_AddLoopVariable_start(const struct gen_device_info *devinfo)
176905    switch (devinfo->gen) {
176911       if (devinfo->is_haswell) {
176919       if (devinfo->is_g4x) {
176942 MI_LOAD_REGISTER_MEM_AsyncModeEnable_bits(const struct gen_device_info *devinfo)
176944    switch (devinfo->gen) {
176950       if (devinfo->is_haswell) {
176958       if (devinfo->is_g4x) {
176978 MI_LOAD_REGISTER_MEM_AsyncModeEnable_start(const struct gen_device_info *devinfo)
176980    switch (devinfo->gen) {
176986       if (devinfo->is_haswell) {
176994       if (devinfo->is_g4x) {
177017 MI_LOAD_REGISTER_MEM_CommandType_bits(const struct gen_device_info *devinfo)
177019    switch (devinfo->gen) {
177025       if (devinfo->is_haswell) {
177033       if (devinfo->is_g4x) {
177053 MI_LOAD_REGISTER_MEM_CommandType_start(const struct gen_device_info *devinfo)
177055    switch (devinfo->gen) {
177061       if (devinfo->is_haswell) {
177069       if (devinfo->is_g4x) {
177092 MI_LOAD_REGISTER_MEM_DWordLength_bits(const struct gen_device_info *devinfo)
177094    switch (devinfo->gen) {
177100       if (devinfo->is_haswell) {
177108       if (devinfo->is_g4x) {
177128 MI_LOAD_REGISTER_MEM_DWordLength_start(const struct gen_device_info *devinfo)
177130    switch (devinfo->gen) {
177136       if (devinfo->is_haswell) {
177144       if (devinfo->is_g4x) {
177167 MI_LOAD_REGISTER_MEM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
177169    switch (devinfo->gen) {
177175       if (devinfo->is_haswell) {
177183       if (devinfo->is_g4x) {
177203 MI_LOAD_REGISTER_MEM_MICommandOpcode_start(const struct gen_device_info *devinfo)
177205    switch (devinfo->gen) {
177211       if (devinfo->is_haswell) {
177219       if (devinfo->is_g4x) {
177242 MI_LOAD_REGISTER_MEM_MemoryAddress_bits(const struct gen_device_info *devinfo)
177244    switch (devinfo->gen) {
177250       if (devinfo->is_haswell) {
177258       if (devinfo->is_g4x) {
177278 MI_LOAD_REGISTER_MEM_MemoryAddress_start(const struct gen_device_info *devinfo)
177280    switch (devinfo->gen) {
177286       if (devinfo->is_haswell) {
177294       if (devinfo->is_g4x) {
177317 MI_LOAD_REGISTER_MEM_RegisterAddress_bits(const struct gen_device_info *devinfo)
177319    switch (devinfo->gen) {
177325       if (devinfo->is_haswell) {
177333       if (devinfo->is_g4x) {
177353 MI_LOAD_REGISTER_MEM_RegisterAddress_start(const struct gen_device_info *devinfo)
177355    switch (devinfo->gen) {
177361       if (devinfo->is_haswell) {
177369       if (devinfo->is_g4x) {
177392 MI_LOAD_REGISTER_MEM_UseGlobalGTT_bits(const struct gen_device_info *devinfo)
177394    switch (devinfo->gen) {
177400       if (devinfo->is_haswell) {
177408       if (devinfo->is_g4x) {
177428 MI_LOAD_REGISTER_MEM_UseGlobalGTT_start(const struct gen_device_info *devinfo)
177430    switch (devinfo->gen) {
177436       if (devinfo->is_haswell) {
177444       if (devinfo->is_g4x) {
177466 MI_LOAD_REGISTER_REG_length(const struct gen_device_info *devinfo)
177468    switch (devinfo->gen) {
177474       if (devinfo->is_haswell) {
177482       if (devinfo->is_g4x) {
177500 MI_LOAD_REGISTER_REG_AddCSMMIOStartOffsetDestination_bits(const struct gen_device_info *devinfo)
177502    switch (devinfo->gen) {
177508       if (devinfo->is_haswell) {
177516       if (devinfo->is_g4x) {
177531 MI_LOAD_REGISTER_REG_AddCSMMIOStartOffsetDestination_start(const struct gen_device_info *devinfo)
177533    switch (devinfo->gen) {
177539       if (devinfo->is_haswell) {
177547       if (devinfo->is_g4x) {
177565 MI_LOAD_REGISTER_REG_AddCSMMIOStartOffsetSource_bits(const struct gen_device_info *devinfo)
177567    switch (devinfo->gen) {
177573       if (devinfo->is_haswell) {
177581       if (devinfo->is_g4x) {
177596 MI_LOAD_REGISTER_REG_AddCSMMIOStartOffsetSource_start(const struct gen_device_info *devinfo)
177598    switch (devinfo->gen) {
177604       if (devinfo->is_haswell) {
177612       if (devinfo->is_g4x) {
177634 MI_LOAD_REGISTER_REG_CommandType_bits(const struct gen_device_info *devinfo)
177636    switch (devinfo->gen) {
177642       if (devinfo->is_haswell) {
177650       if (devinfo->is_g4x) {
177669 MI_LOAD_REGISTER_REG_CommandType_start(const struct gen_device_info *devinfo)
177671    switch (devinfo->gen) {
177677       if (devinfo->is_haswell) {
177685       if (devinfo->is_g4x) {
177707 MI_LOAD_REGISTER_REG_DWordLength_bits(const struct gen_device_info *devinfo)
177709    switch (devinfo->gen) {
177715       if (devinfo->is_haswell) {
177723       if (devinfo->is_g4x) {
177742 MI_LOAD_REGISTER_REG_DWordLength_start(const struct gen_device_info *devinfo)
177744    switch (devinfo->gen) {
177750       if (devinfo->is_haswell) {
177758       if (devinfo->is_g4x) {
177780 MI_LOAD_REGISTER_REG_DestinationRegisterAddress_bits(const struct gen_device_info *devinfo)
177782    switch (devinfo->gen) {
177788       if (devinfo->is_haswell) {
177796       if (devinfo->is_g4x) {
177815 MI_LOAD_REGISTER_REG_DestinationRegisterAddress_start(const struct gen_device_info *devinfo)
177817    switch (devinfo->gen) {
177823       if (devinfo->is_haswell) {
177831       if (devinfo->is_g4x) {
177853 MI_LOAD_REGISTER_REG_MICommandOpcode_bits(const struct gen_device_info *devinfo)
177855    switch (devinfo->gen) {
177861       if (devinfo->is_haswell) {
177869       if (devinfo->is_g4x) {
177888 MI_LOAD_REGISTER_REG_MICommandOpcode_start(const struct gen_device_info *devinfo)
177890    switch (devinfo->gen) {
177896       if (devinfo->is_haswell) {
177904       if (devinfo->is_g4x) {
177926 MI_LOAD_REGISTER_REG_SourceRegisterAddress_bits(const struct gen_device_info *devinfo)
177928    switch (devinfo->gen) {
177934       if (devinfo->is_haswell) {
177942       if (devinfo->is_g4x) {
177961 MI_LOAD_REGISTER_REG_SourceRegisterAddress_start(const struct gen_device_info *devinfo)
177963    switch (devinfo->gen) {
177969       if (devinfo->is_haswell) {
177977       if (devinfo->is_g4x) {
178000 MI_LOAD_SCAN_LINES_EXCL_length(const struct gen_device_info *devinfo)
178002    switch (devinfo->gen) {
178008       if (devinfo->is_haswell) {
178016       if (devinfo->is_g4x) {
178039 MI_LOAD_SCAN_LINES_EXCL_CommandType_bits(const struct gen_device_info *devinfo)
178041    switch (devinfo->gen) {
178047       if (devinfo->is_haswell) {
178055       if (devinfo->is_g4x) {
178075 MI_LOAD_SCAN_LINES_EXCL_CommandType_start(const struct gen_device_info *devinfo)
178077    switch (devinfo->gen) {
178083       if (devinfo->is_haswell) {
178091       if (devinfo->is_g4x) {
178114 MI_LOAD_SCAN_LINES_EXCL_DWordLength_bits(const struct gen_device_info *devinfo)
178116    switch (devinfo->gen) {
178122       if (devinfo->is_haswell) {
178130       if (devinfo->is_g4x) {
178150 MI_LOAD_SCAN_LINES_EXCL_DWordLength_start(const struct gen_device_info *devinfo)
178152    switch (devinfo->gen) {
178158       if (devinfo->is_haswell) {
178166       if (devinfo->is_g4x) {
178189 MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_bits(const struct gen_device_info *devinfo)
178191    switch (devinfo->gen) {
178197       if (devinfo->is_haswell) {
178205       if (devinfo->is_g4x) {
178225 MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_start(const struct gen_device_info *devinfo)
178227    switch (devinfo->gen) {
178233       if (devinfo->is_haswell) {
178241       if (devinfo->is_g4x) {
178264 MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_bits(const struct gen_device_info *devinfo)
178266    switch (devinfo->gen) {
178272       if (devinfo->is_haswell) {
178280       if (devinfo->is_g4x) {
178300 MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_start(const struct gen_device_info *devinfo)
178302    switch (devinfo->gen) {
178308       if (devinfo->is_haswell) {
178316       if (devinfo->is_g4x) {
178339 MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_bits(const struct gen_device_info *devinfo)
178341    switch (devinfo->gen) {
178347       if (devinfo->is_haswell) {
178355       if (devinfo->is_g4x) {
178375 MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_start(const struct gen_device_info *devinfo)
178377    switch (devinfo->gen) {
178383       if (devinfo->is_haswell) {
178391       if (devinfo->is_g4x) {
178414 MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_bits(const struct gen_device_info *devinfo)
178416    switch (devinfo->gen) {
178422       if (devinfo->is_haswell) {
178430       if (devinfo->is_g4x) {
178450 MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_start(const struct gen_device_info *devinfo)
178452    switch (devinfo->gen) {
178458       if (devinfo->is_haswell) {
178466       if (devinfo->is_g4x) {
178488 MI_LOAD_SCAN_LINES_INCL_length(const struct gen_device_info *devinfo)
178490    switch (devinfo->gen) {
178496       if (devinfo->is_haswell) {
178504       if (devinfo->is_g4x) {
178526 MI_LOAD_SCAN_LINES_INCL_CommandType_bits(const struct gen_device_info *devinfo)
178528    switch (devinfo->gen) {
178534       if (devinfo->is_haswell) {
178542       if (devinfo->is_g4x) {
178561 MI_LOAD_SCAN_LINES_INCL_CommandType_start(const struct gen_device_info *devinfo)
178563    switch (devinfo->gen) {
178569       if (devinfo->is_haswell) {
178577       if (devinfo->is_g4x) {
178599 MI_LOAD_SCAN_LINES_INCL_DWordLength_bits(const struct gen_device_info *devinfo)
178601    switch (devinfo->gen) {
178607       if (devinfo->is_haswell) {
178615       if (devinfo->is_g4x) {
178634 MI_LOAD_SCAN_LINES_INCL_DWordLength_start(const struct gen_device_info *devinfo)
178636    switch (devinfo->gen) {
178642       if (devinfo->is_haswell) {
178650       if (devinfo->is_g4x) {
178672 MI_LOAD_SCAN_LINES_INCL_DisplayPlaneSelect_bits(const struct gen_device_info *devinfo)
178674    switch (devinfo->gen) {
178680       if (devinfo->is_haswell) {
178688       if (devinfo->is_g4x) {
178707 MI_LOAD_SCAN_LINES_INCL_DisplayPlaneSelect_start(const struct gen_device_info *devinfo)
178709    switch (devinfo->gen) {
178715       if (devinfo->is_haswell) {
178723       if (devinfo->is_g4x) {
178745 MI_LOAD_SCAN_LINES_INCL_EndScanLineNumber_bits(const struct gen_device_info *devinfo)
178747    switch (devinfo->gen) {
178753       if (devinfo->is_haswell) {
178761       if (devinfo->is_g4x) {
178780 MI_LOAD_SCAN_LINES_INCL_EndScanLineNumber_start(const struct gen_device_info *devinfo)
178782    switch (devinfo->gen) {
178788       if (devinfo->is_haswell) {
178796       if (devinfo->is_g4x) {
178818 MI_LOAD_SCAN_LINES_INCL_MICommandOpcode_bits(const struct gen_device_info *devinfo)
178820    switch (devinfo->gen) {
178826       if (devinfo->is_haswell) {
178834       if (devinfo->is_g4x) {
178853 MI_LOAD_SCAN_LINES_INCL_MICommandOpcode_start(const struct gen_device_info *devinfo)
178855    switch (devinfo->gen) {
178861       if (devinfo->is_haswell) {
178869       if (devinfo->is_g4x) {
178890 MI_LOAD_SCAN_LINES_INCL_ScanLineEventDoneForward_bits(const struct gen_device_info *devinfo)
178892    switch (devinfo->gen) {
178898       if (devinfo->is_haswell) {
178906       if (devinfo->is_g4x) {
178924 MI_LOAD_SCAN_LINES_INCL_ScanLineEventDoneForward_start(const struct gen_device_info *devinfo)
178926    switch (devinfo->gen) {
178932       if (devinfo->is_haswell) {
178940       if (devinfo->is_g4x) {
178962 MI_LOAD_SCAN_LINES_INCL_StartScanLineNumber_bits(const struct gen_device_info *devinfo)
178964    switch (devinfo->gen) {
178970       if (devinfo->is_haswell) {
178978       if (devinfo->is_g4x) {
178997 MI_LOAD_SCAN_LINES_INCL_StartScanLineNumber_start(const struct gen_device_info *devinfo)
178999    switch (devinfo->gen) {
179005       if (devinfo->is_haswell) {
179013       if (devinfo->is_g4x) {
179033 MI_LOAD_URB_MEM_length(const struct gen_device_info *devinfo)
179035    switch (devinfo->gen) {
179041       if (devinfo->is_haswell) {
179049       if (devinfo->is_g4x) {
179069 MI_LOAD_URB_MEM_CommandType_bits(const struct gen_device_info *devinfo)
179071    switch (devinfo->gen) {
179077       if (devinfo->is_haswell) {
179085       if (devinfo->is_g4x) {
179102 MI_LOAD_URB_MEM_CommandType_start(const struct gen_device_info *devinfo)
179104    switch (devinfo->gen) {
179110       if (devinfo->is_haswell) {
179118       if (devinfo->is_g4x) {
179138 MI_LOAD_URB_MEM_DWordLength_bits(const struct gen_device_info *devinfo)
179140    switch (devinfo->gen) {
179146       if (devinfo->is_haswell) {
179154       if (devinfo->is_g4x) {
179171 MI_LOAD_URB_MEM_DWordLength_start(const struct gen_device_info *devinfo)
179173    switch (devinfo->gen) {
179179       if (devinfo->is_haswell) {
179187       if (devinfo->is_g4x) {
179207 MI_LOAD_URB_MEM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
179209    switch (devinfo->gen) {
179215       if (devinfo->is_haswell) {
179223       if (devinfo->is_g4x) {
179240 MI_LOAD_URB_MEM_MICommandOpcode_start(const struct gen_device_info *devinfo)
179242    switch (devinfo->gen) {
179248       if (devinfo->is_haswell) {
179256       if (devinfo->is_g4x) {
179276 MI_LOAD_URB_MEM_MemoryAddress_bits(const struct gen_device_info *devinfo)
179278    switch (devinfo->gen) {
179284       if (devinfo->is_haswell) {
179292       if (devinfo->is_g4x) {
179309 MI_LOAD_URB_MEM_MemoryAddress_start(const struct gen_device_info *devinfo)
179311    switch (devinfo->gen) {
179317       if (devinfo->is_haswell) {
179325       if (devinfo->is_g4x) {
179345 MI_LOAD_URB_MEM_URBAddress_bits(const struct gen_device_info *devinfo)
179347    switch (devinfo->gen) {
179353       if (devinfo->is_haswell) {
179361       if (devinfo->is_g4x) {
179378 MI_LOAD_URB_MEM_URBAddress_start(const struct gen_device_info *devinfo)
179380    switch (devinfo->gen) {
179386       if (devinfo->is_haswell) {
179394       if (devinfo->is_g4x) {
179422 MI_MATH_CommandType_bits(const struct gen_device_info *devinfo)
179424    switch (devinfo->gen) {
179430       if (devinfo->is_haswell) {
179438       if (devinfo->is_g4x) {
179457 MI_MATH_CommandType_start(const struct gen_device_info *devinfo)
179459    switch (devinfo->gen) {
179465       if (devinfo->is_haswell) {
179473       if (devinfo->is_g4x) {
179495 MI_MATH_DWordLength_bits(const struct gen_device_info *devinfo)
179497    switch (devinfo->gen) {
179503       if (devinfo->is_haswell) {
179511       if (devinfo->is_g4x) {
179530 MI_MATH_DWordLength_start(const struct gen_device_info *devinfo)
179532    switch (devinfo->gen) {
179538       if (devinfo->is_haswell) {
179546       if (devinfo->is_g4x) {
179568 MI_MATH_Instruction_bits(const struct gen_device_info *devinfo)
179570    switch (devinfo->gen) {
179576       if (devinfo->is_haswell) {
179584       if (devinfo->is_g4x) {
179603 MI_MATH_Instruction_start(const struct gen_device_info *devinfo)
179605    switch (devinfo->gen) {
179611       if (devinfo->is_haswell) {
179619       if (devinfo->is_g4x) {
179641 MI_MATH_MICommandOpcode_bits(const struct gen_device_info *devinfo)
179643    switch (devinfo->gen) {
179649       if (devinfo->is_haswell) {
179657       if (devinfo->is_g4x) {
179676 MI_MATH_MICommandOpcode_start(const struct gen_device_info *devinfo)
179678    switch (devinfo->gen) {
179684       if (devinfo->is_haswell) {
179692       if (devinfo->is_g4x) {
179714 MI_MATH_ALU_INSTRUCTION_length(const struct gen_device_info *devinfo)
179716    switch (devinfo->gen) {
179722       if (devinfo->is_haswell) {
179730       if (devinfo->is_g4x) {
179752 MI_MATH_ALU_INSTRUCTION_ALUOpcode_bits(const struct gen_device_info *devinfo)
179754    switch (devinfo->gen) {
179760       if (devinfo->is_haswell) {
179768       if (devinfo->is_g4x) {
179787 MI_MATH_ALU_INSTRUCTION_ALUOpcode_start(const struct gen_device_info *devinfo)
179789    switch (devinfo->gen) {
179795       if (devinfo->is_haswell) {
179803       if (devinfo->is_g4x) {
179825 MI_MATH_ALU_INSTRUCTION_Operand1_bits(const struct gen_device_info *devinfo)
179827    switch (devinfo->gen) {
179833       if (devinfo->is_haswell) {
179841       if (devinfo->is_g4x) {
179860 MI_MATH_ALU_INSTRUCTION_Operand1_start(const struct gen_device_info *devinfo)
179862    switch (devinfo->gen) {
179868       if (devinfo->is_haswell) {
179876       if (devinfo->is_g4x) {
179898 MI_MATH_ALU_INSTRUCTION_Operand2_bits(const struct gen_device_info *devinfo)
179900    switch (devinfo->gen) {
179906       if (devinfo->is_haswell) {
179914       if (devinfo->is_g4x) {
179933 MI_MATH_ALU_INSTRUCTION_Operand2_start(const struct gen_device_info *devinfo)
179935    switch (devinfo->gen) {
179941       if (devinfo->is_haswell) {
179949       if (devinfo->is_g4x) {
179973 MI_NOOP_length(const struct gen_device_info *devinfo)
179975    switch (devinfo->gen) {
179981       if (devinfo->is_haswell) {
179989       if (devinfo->is_g4x) {
180013 MI_NOOP_CommandType_bits(const struct gen_device_info *devinfo)
180015    switch (devinfo->gen) {
180021       if (devinfo->is_haswell) {
180029       if (devinfo->is_g4x) {
180050 MI_NOOP_CommandType_start(const struct gen_device_info *devinfo)
180052    switch (devinfo->gen) {
180058       if (devinfo->is_haswell) {
180066       if (devinfo->is_g4x) {
180090 MI_NOOP_IdentificationNumber_bits(const struct gen_device_info *devinfo)
180092    switch (devinfo->gen) {
180098       if (devinfo->is_haswell) {
180106       if (devinfo->is_g4x) {
180127 MI_NOOP_IdentificationNumber_start(const struct gen_device_info *devinfo)
180129    switch (devinfo->gen) {
180135       if (devinfo->is_haswell) {
180143       if (devinfo->is_g4x) {
180167 MI_NOOP_IdentificationNumberRegisterWriteEnable_bits(const struct gen_device_info *devinfo)
180169    switch (devinfo->gen) {
180175       if (devinfo->is_haswell) {
180183       if (devinfo->is_g4x) {
180204 MI_NOOP_IdentificationNumberRegisterWriteEnable_start(const struct gen_device_info *devinfo)
180206    switch (devinfo->gen) {
180212       if (devinfo->is_haswell) {
180220       if (devinfo->is_g4x) {
180244 MI_NOOP_MICommandOpcode_bits(const struct gen_device_info *devinfo)
180246    switch (devinfo->gen) {
180252       if (devinfo->is_haswell) {
180260       if (devinfo->is_g4x) {
180281 MI_NOOP_MICommandOpcode_start(const struct gen_device_info *devinfo)
180283    switch (devinfo->gen) {
180289       if (devinfo->is_haswell) {
180297       if (devinfo->is_g4x) {
180320 MI_PREDICATE_length(const struct gen_device_info *devinfo)
180322    switch (devinfo->gen) {
180328       if (devinfo->is_haswell) {
180336       if (devinfo->is_g4x) {
180359 MI_PREDICATE_CombineOperation_bits(const struct gen_device_info *devinfo)
180361    switch (devinfo->gen) {
180367       if (devinfo->is_haswell) {
180375       if (devinfo->is_g4x) {
180395 MI_PREDICATE_CombineOperation_start(const struct gen_device_info *devinfo)
180397    switch (devinfo->gen) {
180403       if (devinfo->is_haswell) {
180411       if (devinfo->is_g4x) {
180434 MI_PREDICATE_CommandType_bits(const struct gen_device_info *devinfo)
180436    switch (devinfo->gen) {
180442       if (devinfo->is_haswell) {
180450       if (devinfo->is_g4x) {
180470 MI_PREDICATE_CommandType_start(const struct gen_device_info *devinfo)
180472    switch (devinfo->gen) {
180478       if (devinfo->is_haswell) {
180486       if (devinfo->is_g4x) {
180509 MI_PREDICATE_CompareOperation_bits(const struct gen_device_info *devinfo)
180511    switch (devinfo->gen) {
180517       if (devinfo->is_haswell) {
180525       if (devinfo->is_g4x) {
180545 MI_PREDICATE_CompareOperation_start(const struct gen_device_info *devinfo)
180547    switch (devinfo->gen) {
180553       if (devinfo->is_haswell) {
180561       if (devinfo->is_g4x) {
180584 MI_PREDICATE_LoadOperation_bits(const struct gen_device_info *devinfo)
180586    switch (devinfo->gen) {
180592       if (devinfo->is_haswell) {
180600       if (devinfo->is_g4x) {
180620 MI_PREDICATE_LoadOperation_start(const struct gen_device_info *devinfo)
180622    switch (devinfo->gen) {
180628       if (devinfo->is_haswell) {
180636       if (devinfo->is_g4x) {
180659 MI_PREDICATE_MICommandOpcode_bits(const struct gen_device_info *devinfo)
180661    switch (devinfo->gen) {
180667       if (devinfo->is_haswell) {
180675       if (devinfo->is_g4x) {
180695 MI_PREDICATE_MICommandOpcode_start(const struct gen_device_info *devinfo)
180697    switch (devinfo->gen) {
180703       if (devinfo->is_haswell) {
180711       if (devinfo->is_g4x) {
180735 MI_REPORT_HEAD_length(const struct gen_device_info *devinfo)
180737    switch (devinfo->gen) {
180743       if (devinfo->is_haswell) {
180751       if (devinfo->is_g4x) {
180775 MI_REPORT_HEAD_CommandType_bits(const struct gen_device_info *devinfo)
180777    switch (devinfo->gen) {
180783       if (devinfo->is_haswell) {
180791       if (devinfo->is_g4x) {
180812 MI_REPORT_HEAD_CommandType_start(const struct gen_device_info *devinfo)
180814    switch (devinfo->gen) {
180820       if (devinfo->is_haswell) {
180828       if (devinfo->is_g4x) {
180852 MI_REPORT_HEAD_MICommandOpcode_bits(const struct gen_device_info *devinfo)
180854    switch (devinfo->gen) {
180860       if (devinfo->is_haswell) {
180868       if (devinfo->is_g4x) {
180889 MI_REPORT_HEAD_MICommandOpcode_start(const struct gen_device_info *devinfo)
180891    switch (devinfo->gen) {
180897       if (devinfo->is_haswell) {
180905       if (devinfo->is_g4x) {
180928 MI_REPORT_PERF_COUNT_length(const struct gen_device_info *devinfo)
180930    switch (devinfo->gen) {
180936       if (devinfo->is_haswell) {
180944       if (devinfo->is_g4x) {
180967 MI_REPORT_PERF_COUNT_CommandType_bits(const struct gen_device_info *devinfo)
180969    switch (devinfo->gen) {
180975       if (devinfo->is_haswell) {
180983       if (devinfo->is_g4x) {
181003 MI_REPORT_PERF_COUNT_CommandType_start(const struct gen_device_info *devinfo)
181005    switch (devinfo->gen) {
181011       if (devinfo->is_haswell) {
181019       if (devinfo->is_g4x) {
181041 MI_REPORT_PERF_COUNT_CoreModeEnable_bits(const struct gen_device_info *devinfo)
181043    switch (devinfo->gen) {
181049       if (devinfo->is_haswell) {
181057       if (devinfo->is_g4x) {
181076 MI_REPORT_PERF_COUNT_CoreModeEnable_start(const struct gen_device_info *devinfo)
181078    switch (devinfo->gen) {
181084       if (devinfo->is_haswell) {
181092       if (devinfo->is_g4x) {
181115 MI_REPORT_PERF_COUNT_DWordLength_bits(const struct gen_device_info *devinfo)
181117    switch (devinfo->gen) {
181123       if (devinfo->is_haswell) {
181131       if (devinfo->is_g4x) {
181151 MI_REPORT_PERF_COUNT_DWordLength_start(const struct gen_device_info *devinfo)
181153    switch (devinfo->gen) {
181159       if (devinfo->is_haswell) {
181167       if (devinfo->is_g4x) {
181190 MI_REPORT_PERF_COUNT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
181192    switch (devinfo->gen) {
181198       if (devinfo->is_haswell) {
181206       if (devinfo->is_g4x) {
181226 MI_REPORT_PERF_COUNT_MICommandOpcode_start(const struct gen_device_info *devinfo)
181228    switch (devinfo->gen) {
181234       if (devinfo->is_haswell) {
181242       if (devinfo->is_g4x) {
181265 MI_REPORT_PERF_COUNT_MemoryAddress_bits(const struct gen_device_info *devinfo)
181267    switch (devinfo->gen) {
181273       if (devinfo->is_haswell) {
181281       if (devinfo->is_g4x) {
181301 MI_REPORT_PERF_COUNT_MemoryAddress_start(const struct gen_device_info *devinfo)
181303    switch (devinfo->gen) {
181309       if (devinfo->is_haswell) {
181317       if (devinfo->is_g4x) {
181340 MI_REPORT_PERF_COUNT_ReportID_bits(const struct gen_device_info *devinfo)
181342    switch (devinfo->gen) {
181348       if (devinfo->is_haswell) {
181356       if (devinfo->is_g4x) {
181376 MI_REPORT_PERF_COUNT_ReportID_start(const struct gen_device_info *devinfo)
181378    switch (devinfo->gen) {
181384       if (devinfo->is_haswell) {
181392       if (devinfo->is_g4x) {
181415 MI_REPORT_PERF_COUNT_UseGlobalGTT_bits(const struct gen_device_info *devinfo)
181417    switch (devinfo->gen) {
181423       if (devinfo->is_haswell) {
181431       if (devinfo->is_g4x) {
181451 MI_REPORT_PERF_COUNT_UseGlobalGTT_start(const struct gen_device_info *devinfo)
181453    switch (devinfo->gen) {
181459       if (devinfo->is_haswell) {
181467       if (devinfo->is_g4x) {
181489 MI_RS_CONTEXT_length(const struct gen_device_info *devinfo)
181491    switch (devinfo->gen) {
181497       if (devinfo->is_haswell) {
181505       if (devinfo->is_g4x) {
181527 MI_RS_CONTEXT_CommandType_bits(const struct gen_device_info *devinfo)
181529    switch (devinfo->gen) {
181535       if (devinfo->is_haswell) {
181543       if (devinfo->is_g4x) {
181562 MI_RS_CONTEXT_CommandType_start(const struct gen_device_info *devinfo)
181564    switch (devinfo->gen) {
181570       if (devinfo->is_haswell) {
181578       if (devinfo->is_g4x) {
181600 MI_RS_CONTEXT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
181602    switch (devinfo->gen) {
181608       if (devinfo->is_haswell) {
181616       if (devinfo->is_g4x) {
181635 MI_RS_CONTEXT_MICommandOpcode_start(const struct gen_device_info *devinfo)
181637    switch (devinfo->gen) {
181643       if (devinfo->is_haswell) {
181651       if (devinfo->is_g4x) {
181673 MI_RS_CONTEXT_ResourceStreamerSave_bits(const struct gen_device_info *devinfo)
181675    switch (devinfo->gen) {
181681       if (devinfo->is_haswell) {
181689       if (devinfo->is_g4x) {
181708 MI_RS_CONTEXT_ResourceStreamerSave_start(const struct gen_device_info *devinfo)
181710    switch (devinfo->gen) {
181716       if (devinfo->is_haswell) {
181724       if (devinfo->is_g4x) {
181746 MI_RS_CONTROL_length(const struct gen_device_info *devinfo)
181748    switch (devinfo->gen) {
181754       if (devinfo->is_haswell) {
181762       if (devinfo->is_g4x) {
181784 MI_RS_CONTROL_CommandType_bits(const struct gen_device_info *devinfo)
181786    switch (devinfo->gen) {
181792       if (devinfo->is_haswell) {
181800       if (devinfo->is_g4x) {
181819 MI_RS_CONTROL_CommandType_start(const struct gen_device_info *devinfo)
181821    switch (devinfo->gen) {
181827       if (devinfo->is_haswell) {
181835       if (devinfo->is_g4x) {
181857 MI_RS_CONTROL_MICommandOpcode_bits(const struct gen_device_info *devinfo)
181859    switch (devinfo->gen) {
181865       if (devinfo->is_haswell) {
181873       if (devinfo->is_g4x) {
181892 MI_RS_CONTROL_MICommandOpcode_start(const struct gen_device_info *devinfo)
181894    switch (devinfo->gen) {
181900       if (devinfo->is_haswell) {
181908       if (devinfo->is_g4x) {
181930 MI_RS_CONTROL_ResourceStreamerControl_bits(const struct gen_device_info *devinfo)
181932    switch (devinfo->gen) {
181938       if (devinfo->is_haswell) {
181946       if (devinfo->is_g4x) {
181965 MI_RS_CONTROL_ResourceStreamerControl_start(const struct gen_device_info *devinfo)
181967    switch (devinfo->gen) {
181973       if (devinfo->is_haswell) {
181981       if (devinfo->is_g4x) {
182003 MI_RS_STORE_DATA_IMM_length(const struct gen_device_info *devinfo)
182005    switch (devinfo->gen) {
182011       if (devinfo->is_haswell) {
182019       if (devinfo->is_g4x) {
182041 MI_RS_STORE_DATA_IMM_CommandType_bits(const struct gen_device_info *devinfo)
182043    switch (devinfo->gen) {
182049       if (devinfo->is_haswell) {
182057       if (devinfo->is_g4x) {
182076 MI_RS_STORE_DATA_IMM_CommandType_start(const struct gen_device_info *devinfo)
182078    switch (devinfo->gen) {
182084       if (devinfo->is_haswell) {
182092       if (devinfo->is_g4x) {
182114 MI_RS_STORE_DATA_IMM_CoreModeEnable_bits(const struct gen_device_info *devinfo)
182116    switch (devinfo->gen) {
182122       if (devinfo->is_haswell) {
182130       if (devinfo->is_g4x) {
182149 MI_RS_STORE_DATA_IMM_CoreModeEnable_start(const struct gen_device_info *devinfo)
182151    switch (devinfo->gen) {
182157       if (devinfo->is_haswell) {
182165       if (devinfo->is_g4x) {
182187 MI_RS_STORE_DATA_IMM_DWordLength_bits(const struct gen_device_info *devinfo)
182189    switch (devinfo->gen) {
182195       if (devinfo->is_haswell) {
182203       if (devinfo->is_g4x) {
182222 MI_RS_STORE_DATA_IMM_DWordLength_start(const struct gen_device_info *devinfo)
182224    switch (devinfo->gen) {
182230       if (devinfo->is_haswell) {
182238       if (devinfo->is_g4x) {
182260 MI_RS_STORE_DATA_IMM_DataDWord0_bits(const struct gen_device_info *devinfo)
182262    switch (devinfo->gen) {
182268       if (devinfo->is_haswell) {
182276       if (devinfo->is_g4x) {
182295 MI_RS_STORE_DATA_IMM_DataDWord0_start(const struct gen_device_info *devinfo)
182297    switch (devinfo->gen) {
182303       if (devinfo->is_haswell) {
182311       if (devinfo->is_g4x) {
182333 MI_RS_STORE_DATA_IMM_DestinationAddress_bits(const struct gen_device_info *devinfo)
182335    switch (devinfo->gen) {
182341       if (devinfo->is_haswell) {
182349       if (devinfo->is_g4x) {
182368 MI_RS_STORE_DATA_IMM_DestinationAddress_start(const struct gen_device_info *devinfo)
182370    switch (devinfo->gen) {
182376       if (devinfo->is_haswell) {
182384       if (devinfo->is_g4x) {
182406 MI_RS_STORE_DATA_IMM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
182408    switch (devinfo->gen) {
182414       if (devinfo->is_haswell) {
182422       if (devinfo->is_g4x) {
182441 MI_RS_STORE_DATA_IMM_MICommandOpcode_start(const struct gen_device_info *devinfo)
182443    switch (devinfo->gen) {
182449       if (devinfo->is_haswell) {
182457       if (devinfo->is_g4x) {
182477 MI_SEMAPHORE_MBOX_length(const struct gen_device_info *devinfo)
182479    switch (devinfo->gen) {
182485       if (devinfo->is_haswell) {
182493       if (devinfo->is_g4x) {
182513 MI_SEMAPHORE_MBOX_CommandType_bits(const struct gen_device_info *devinfo)
182515    switch (devinfo->gen) {
182521       if (devinfo->is_haswell) {
182529       if (devinfo->is_g4x) {
182546 MI_SEMAPHORE_MBOX_CommandType_start(const struct gen_device_info *devinfo)
182548    switch (devinfo->gen) {
182554       if (devinfo->is_haswell) {
182562       if (devinfo->is_g4x) {
182582 MI_SEMAPHORE_MBOX_DWordLength_bits(const struct gen_device_info *devinfo)
182584    switch (devinfo->gen) {
182590       if (devinfo->is_haswell) {
182598       if (devinfo->is_g4x) {
182615 MI_SEMAPHORE_MBOX_DWordLength_start(const struct gen_device_info *devinfo)
182617    switch (devinfo->gen) {
182623       if (devinfo->is_haswell) {
182631       if (devinfo->is_g4x) {
182649 MI_SEMAPHORE_MBOX_GeneralRegisterSelect_bits(const struct gen_device_info *devinfo)
182651    switch (devinfo->gen) {
182657       if (devinfo->is_haswell) {
182665       if (devinfo->is_g4x) {
182680 MI_SEMAPHORE_MBOX_GeneralRegisterSelect_start(const struct gen_device_info *devinfo)
182682    switch (devinfo->gen) {
182688       if (devinfo->is_haswell) {
182696       if (devinfo->is_g4x) {
182716 MI_SEMAPHORE_MBOX_MICommandOpcode_bits(const struct gen_device_info *devinfo)
182718    switch (devinfo->gen) {
182724       if (devinfo->is_haswell) {
182732       if (devinfo->is_g4x) {
182749 MI_SEMAPHORE_MBOX_MICommandOpcode_start(const struct gen_device_info *devinfo)
182751    switch (devinfo->gen) {
182757       if (devinfo->is_haswell) {
182765       if (devinfo->is_g4x) {
182785 MI_SEMAPHORE_MBOX_RegisterSelect_bits(const struct gen_device_info *devinfo)
182787    switch (devinfo->gen) {
182793       if (devinfo->is_haswell) {
182801       if (devinfo->is_g4x) {
182818 MI_SEMAPHORE_MBOX_RegisterSelect_start(const struct gen_device_info *devinfo)
182820    switch (devinfo->gen) {
182826       if (devinfo->is_haswell) {
182834       if (devinfo->is_g4x) {
182854 MI_SEMAPHORE_MBOX_SemaphoreDataDword_bits(const struct gen_device_info *devinfo)
182856    switch (devinfo->gen) {
182862       if (devinfo->is_haswell) {
182870       if (devinfo->is_g4x) {
182887 MI_SEMAPHORE_MBOX_SemaphoreDataDword_start(const struct gen_device_info *devinfo)
182889    switch (devinfo->gen) {
182895       if (devinfo->is_haswell) {
182903       if (devinfo->is_g4x) {
182924 MI_SEMAPHORE_SIGNAL_length(const struct gen_device_info *devinfo)
182926    switch (devinfo->gen) {
182932       if (devinfo->is_haswell) {
182940       if (devinfo->is_g4x) {
182961 MI_SEMAPHORE_SIGNAL_CommandType_bits(const struct gen_device_info *devinfo)
182963    switch (devinfo->gen) {
182969       if (devinfo->is_haswell) {
182977       if (devinfo->is_g4x) {
182995 MI_SEMAPHORE_SIGNAL_CommandType_start(const struct gen_device_info *devinfo)
182997    switch (devinfo->gen) {
183003       if (devinfo->is_haswell) {
183011       if (devinfo->is_g4x) {
183032 MI_SEMAPHORE_SIGNAL_DWordLength_bits(const struct gen_device_info *devinfo)
183034    switch (devinfo->gen) {
183040       if (devinfo->is_haswell) {
183048       if (devinfo->is_g4x) {
183066 MI_SEMAPHORE_SIGNAL_DWordLength_start(const struct gen_device_info *devinfo)
183068    switch (devinfo->gen) {
183074       if (devinfo->is_haswell) {
183082       if (devinfo->is_g4x) {
183103 MI_SEMAPHORE_SIGNAL_MICommandOpcode_bits(const struct gen_device_info *devinfo)
183105    switch (devinfo->gen) {
183111       if (devinfo->is_haswell) {
183119       if (devinfo->is_g4x) {
183137 MI_SEMAPHORE_SIGNAL_MICommandOpcode_start(const struct gen_device_info *devinfo)
183139    switch (devinfo->gen) {
183145       if (devinfo->is_haswell) {
183153       if (devinfo->is_g4x) {
183174 MI_SEMAPHORE_SIGNAL_PostSyncOperation_bits(const struct gen_device_info *devinfo)
183176    switch (devinfo->gen) {
183182       if (devinfo->is_haswell) {
183190       if (devinfo->is_g4x) {
183208 MI_SEMAPHORE_SIGNAL_PostSyncOperation_start(const struct gen_device_info *devinfo)
183210    switch (devinfo->gen) {
183216       if (devinfo->is_haswell) {
183224       if (devinfo->is_g4x) {
183245 MI_SEMAPHORE_SIGNAL_TargetContextID_bits(const struct gen_device_info *devinfo)
183247    switch (devinfo->gen) {
183253       if (devinfo->is_haswell) {
183261       if (devinfo->is_g4x) {
183279 MI_SEMAPHORE_SIGNAL_TargetContextID_start(const struct gen_device_info *devinfo)
183281    switch (devinfo->gen) {
183287       if (devinfo->is_haswell) {
183295       if (devinfo->is_g4x) {
183316 MI_SEMAPHORE_SIGNAL_TargetEngineSelect_bits(const struct gen_device_info *devinfo)
183318    switch (devinfo->gen) {
183324       if (devinfo->is_haswell) {
183332       if (devinfo->is_g4x) {
183350 MI_SEMAPHORE_SIGNAL_TargetEngineSelect_start(const struct gen_device_info *devinfo)
183352    switch (devinfo->gen) {
183358       if (devinfo->is_haswell) {
183366       if (devinfo->is_g4x) {
183387 MI_SEMAPHORE_WAIT_length(const struct gen_device_info *devinfo)
183389    switch (devinfo->gen) {
183395       if (devinfo->is_haswell) {
183403       if (devinfo->is_g4x) {
183424 MI_SEMAPHORE_WAIT_CommandType_bits(const struct gen_device_info *devinfo)
183426    switch (devinfo->gen) {
183432       if (devinfo->is_haswell) {
183440       if (devinfo->is_g4x) {
183458 MI_SEMAPHORE_WAIT_CommandType_start(const struct gen_device_info *devinfo)
183460    switch (devinfo->gen) {
183466       if (devinfo->is_haswell) {
183474       if (devinfo->is_g4x) {
183495 MI_SEMAPHORE_WAIT_CompareOperation_bits(const struct gen_device_info *devinfo)
183497    switch (devinfo->gen) {
183503       if (devinfo->is_haswell) {
183511       if (devinfo->is_g4x) {
183529 MI_SEMAPHORE_WAIT_CompareOperation_start(const struct gen_device_info *devinfo)
183531    switch (devinfo->gen) {
183537       if (devinfo->is_haswell) {
183545       if (devinfo->is_g4x) {
183566 MI_SEMAPHORE_WAIT_DWordLength_bits(const struct gen_device_info *devinfo)
183568    switch (devinfo->gen) {
183574       if (devinfo->is_haswell) {
183582       if (devinfo->is_g4x) {
183600 MI_SEMAPHORE_WAIT_DWordLength_start(const struct gen_device_info *devinfo)
183602    switch (devinfo->gen) {
183608       if (devinfo->is_haswell) {
183616       if (devinfo->is_g4x) {
183637 MI_SEMAPHORE_WAIT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
183639    switch (devinfo->gen) {
183645       if (devinfo->is_haswell) {
183653       if (devinfo->is_g4x) {
183671 MI_SEMAPHORE_WAIT_MICommandOpcode_start(const struct gen_device_info *devinfo)
183673    switch (devinfo->gen) {
183679       if (devinfo->is_haswell) {
183687       if (devinfo->is_g4x) {
183708 MI_SEMAPHORE_WAIT_MemoryType_bits(const struct gen_device_info *devinfo)
183710    switch (devinfo->gen) {
183716       if (devinfo->is_haswell) {
183724       if (devinfo->is_g4x) {
183742 MI_SEMAPHORE_WAIT_MemoryType_start(const struct gen_device_info *devinfo)
183744    switch (devinfo->gen) {
183750       if (devinfo->is_haswell) {
183758       if (devinfo->is_g4x) {
183778 MI_SEMAPHORE_WAIT_RegisterPollMode_bits(const struct gen_device_info *devinfo)
183780    switch (devinfo->gen) {
183786       if (devinfo->is_haswell) {
183794       if (devinfo->is_g4x) {
183811 MI_SEMAPHORE_WAIT_RegisterPollMode_start(const struct gen_device_info *devinfo)
183813    switch (devinfo->gen) {
183819       if (devinfo->is_haswell) {
183827       if (devinfo->is_g4x) {
183848 MI_SEMAPHORE_WAIT_SemaphoreAddress_bits(const struct gen_device_info *devinfo)
183850    switch (devinfo->gen) {
183856       if (devinfo->is_haswell) {
183864       if (devinfo->is_g4x) {
183882 MI_SEMAPHORE_WAIT_SemaphoreAddress_start(const struct gen_device_info *devinfo)
183884    switch (devinfo->gen) {
183890       if (devinfo->is_haswell) {
183898       if (devinfo->is_g4x) {
183916 MI_SEMAPHORE_WAIT_SemaphoreAddressHigh_bits(const struct gen_device_info *devinfo)
183918    switch (devinfo->gen) {
183924       if (devinfo->is_haswell) {
183932       if (devinfo->is_g4x) {
183947 MI_SEMAPHORE_WAIT_SemaphoreAddressHigh_start(const struct gen_device_info *devinfo)
183949    switch (devinfo->gen) {
183955       if (devinfo->is_haswell) {
183963       if (devinfo->is_g4x) {
183984 MI_SEMAPHORE_WAIT_SemaphoreDataDword_bits(const struct gen_device_info *devinfo)
183986    switch (devinfo->gen) {
183992       if (devinfo->is_haswell) {
184000       if (devinfo->is_g4x) {
184018 MI_SEMAPHORE_WAIT_SemaphoreDataDword_start(const struct gen_device_info *devinfo)
184020    switch (devinfo->gen) {
184026       if (devinfo->is_haswell) {
184034       if (devinfo->is_g4x) {
184055 MI_SEMAPHORE_WAIT_WaitMode_bits(const struct gen_device_info *devinfo)
184057    switch (devinfo->gen) {
184063       if (devinfo->is_haswell) {
184071       if (devinfo->is_g4x) {
184089 MI_SEMAPHORE_WAIT_WaitMode_start(const struct gen_device_info *devinfo)
184091    switch (devinfo->gen) {
184097       if (devinfo->is_haswell) {
184105       if (devinfo->is_g4x) {
184129 MI_SET_CONTEXT_length(const struct gen_device_info *devinfo)
184131    switch (devinfo->gen) {
184137       if (devinfo->is_haswell) {
184145       if (devinfo->is_g4x) {
184169 MI_SET_CONTEXT_CommandType_bits(const struct gen_device_info *devinfo)
184171    switch (devinfo->gen) {
184177       if (devinfo->is_haswell) {
184185       if (devinfo->is_g4x) {
184206 MI_SET_CONTEXT_CommandType_start(const struct gen_device_info *devinfo)
184208    switch (devinfo->gen) {
184214       if (devinfo->is_haswell) {
184222       if (devinfo->is_g4x) {
184244 MI_SET_CONTEXT_CoreModeEnable_bits(const struct gen_device_info *devinfo)
184246    switch (devinfo->gen) {
184252       if (devinfo->is_haswell) {
184260       if (devinfo->is_g4x) {
184279 MI_SET_CONTEXT_CoreModeEnable_start(const struct gen_device_info *devinfo)
184281    switch (devinfo->gen) {
184287       if (devinfo->is_haswell) {
184295       if (devinfo->is_g4x) {
184319 MI_SET_CONTEXT_DWordLength_bits(const struct gen_device_info *devinfo)
184321    switch (devinfo->gen) {
184327       if (devinfo->is_haswell) {
184335       if (devinfo->is_g4x) {
184356 MI_SET_CONTEXT_DWordLength_start(const struct gen_device_info *devinfo)
184358    switch (devinfo->gen) {
184364       if (devinfo->is_haswell) {
184372       if (devinfo->is_g4x) {
184391 MI_SET_CONTEXT_ExtendedStateRestoreEnable_bits(const struct gen_device_info *devinfo)
184393    switch (devinfo->gen) {
184399       if (devinfo->is_haswell) {
184407       if (devinfo->is_g4x) {
184423 MI_SET_CONTEXT_ExtendedStateRestoreEnable_start(const struct gen_device_info *devinfo)
184425    switch (devinfo->gen) {
184431       if (devinfo->is_haswell) {
184439       if (devinfo->is_g4x) {
184458 MI_SET_CONTEXT_ExtendedStateSaveEnable_bits(const struct gen_device_info *devinfo)
184460    switch (devinfo->gen) {
184466       if (devinfo->is_haswell) {
184474       if (devinfo->is_g4x) {
184490 MI_SET_CONTEXT_ExtendedStateSaveEnable_start(const struct gen_device_info *devinfo)
184492    switch (devinfo->gen) {
184498       if (devinfo->is_haswell) {
184506       if (devinfo->is_g4x) {
184530 MI_SET_CONTEXT_ForceRestore_bits(const struct gen_device_info *devinfo)
184532    switch (devinfo->gen) {
184538       if (devinfo->is_haswell) {
184546       if (devinfo->is_g4x) {
184567 MI_SET_CONTEXT_ForceRestore_start(const struct gen_device_info *devinfo)
184569    switch (devinfo->gen) {
184575       if (devinfo->is_haswell) {
184583       if (devinfo->is_g4x) {
184601 MI_SET_CONTEXT_HDDVDContext_bits(const struct gen_device_info *devinfo)
184603    switch (devinfo->gen) {
184609       if (devinfo->is_haswell) {
184617       if (devinfo->is_g4x) {
184632 MI_SET_CONTEXT_HDDVDContext_start(const struct gen_device_info *devinfo)
184634    switch (devinfo->gen) {
184640       if (devinfo->is_haswell) {
184648       if (devinfo->is_g4x) {
184672 MI_SET_CONTEXT_LogicalContextAddress_bits(const struct gen_device_info *devinfo)
184674    switch (devinfo->gen) {
184680       if (devinfo->is_haswell) {
184688       if (devinfo->is_g4x) {
184709 MI_SET_CONTEXT_LogicalContextAddress_start(const struct gen_device_info *devinfo)
184711    switch (devinfo->gen) {
184717       if (devinfo->is_haswell) {
184725       if (devinfo->is_g4x) {
184749 MI_SET_CONTEXT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
184751    switch (devinfo->gen) {
184757       if (devinfo->is_haswell) {
184765       if (devinfo->is_g4x) {
184786 MI_SET_CONTEXT_MICommandOpcode_start(const struct gen_device_info *devinfo)
184788    switch (devinfo->gen) {
184794       if (devinfo->is_haswell) {
184802       if (devinfo->is_g4x) {
184826 MI_SET_CONTEXT_ReservedMustbe1_bits(const struct gen_device_info *devinfo)
184828    switch (devinfo->gen) {
184834       if (devinfo->is_haswell) {
184842       if (devinfo->is_g4x) {
184863 MI_SET_CONTEXT_ReservedMustbe1_start(const struct gen_device_info *devinfo)
184865    switch (devinfo->gen) {
184871       if (devinfo->is_haswell) {
184879       if (devinfo->is_g4x) {
184901 MI_SET_CONTEXT_ResourceStreamerStateRestoreEnable_bits(const struct gen_device_info *devinfo)
184903    switch (devinfo->gen) {
184909       if (devinfo->is_haswell) {
184917       if (devinfo->is_g4x) {
184936 MI_SET_CONTEXT_ResourceStreamerStateRestoreEnable_start(const struct gen_device_info *devinfo)
184938    switch (devinfo->gen) {
184944       if (devinfo->is_haswell) {
184952       if (devinfo->is_g4x) {
184974 MI_SET_CONTEXT_ResourceStreamerStateSaveEnable_bits(const struct gen_device_info *devinfo)
184976    switch (devinfo->gen) {
184982       if (devinfo->is_haswell) {
184990       if (devinfo->is_g4x) {
185009 MI_SET_CONTEXT_ResourceStreamerStateSaveEnable_start(const struct gen_device_info *devinfo)
185011    switch (devinfo->gen) {
185017       if (devinfo->is_haswell) {
185025       if (devinfo->is_g4x) {
185049 MI_SET_CONTEXT_RestoreInhibit_bits(const struct gen_device_info *devinfo)
185051    switch (devinfo->gen) {
185057       if (devinfo->is_haswell) {
185065       if (devinfo->is_g4x) {
185086 MI_SET_CONTEXT_RestoreInhibit_start(const struct gen_device_info *devinfo)
185088    switch (devinfo->gen) {
185094       if (devinfo->is_haswell) {
185102       if (devinfo->is_g4x) {
185124 MI_SET_PREDICATE_length(const struct gen_device_info *devinfo)
185126    switch (devinfo->gen) {
185132       if (devinfo->is_haswell) {
185140       if (devinfo->is_g4x) {
185162 MI_SET_PREDICATE_CommandType_bits(const struct gen_device_info *devinfo)
185164    switch (devinfo->gen) {
185170       if (devinfo->is_haswell) {
185178       if (devinfo->is_g4x) {
185197 MI_SET_PREDICATE_CommandType_start(const struct gen_device_info *devinfo)
185199    switch (devinfo->gen) {
185205       if (devinfo->is_haswell) {
185213       if (devinfo->is_g4x) {
185235 MI_SET_PREDICATE_MICommandOpcode_bits(const struct gen_device_info *devinfo)
185237    switch (devinfo->gen) {
185243       if (devinfo->is_haswell) {
185251       if (devinfo->is_g4x) {
185270 MI_SET_PREDICATE_MICommandOpcode_start(const struct gen_device_info *devinfo)
185272    switch (devinfo->gen) {
185278       if (devinfo->is_haswell) {
185286       if (devinfo->is_g4x) {
185308 MI_SET_PREDICATE_PREDICATEENABLE_bits(const struct gen_device_info *devinfo)
185310    switch (devinfo->gen) {
185316       if (devinfo->is_haswell) {
185324       if (devinfo->is_g4x) {
185343 MI_SET_PREDICATE_PREDICATEENABLE_start(const struct gen_device_info *devinfo)
185345    switch (devinfo->gen) {
185351       if (devinfo->is_haswell) {
185359       if (devinfo->is_g4x) {
185386 MI_STORE_DATA_IMM_length(const struct gen_device_info *devinfo)
185388    switch (devinfo->gen) {
185394       if (devinfo->is_haswell) {
185402       if (devinfo->is_g4x) {
185429 MI_STORE_DATA_IMM_Address_bits(const struct gen_device_info *devinfo)
185431    switch (devinfo->gen) {
185437       if (devinfo->is_haswell) {
185445       if (devinfo->is_g4x) {
185469 MI_STORE_DATA_IMM_Address_start(const struct gen_device_info *devinfo)
185471    switch (devinfo->gen) {
185477       if (devinfo->is_haswell) {
185485       if (devinfo->is_g4x) {
185504 MI_STORE_DATA_IMM_BitFieldName_bits(const struct gen_device_info *devinfo)
185506    switch (devinfo->gen) {
185512       if (devinfo->is_haswell) {
185520       if (devinfo->is_g4x) {
185536 MI_STORE_DATA_IMM_BitFieldName_start(const struct gen_device_info *devinfo)
185538    switch (devinfo->gen) {
185544       if (devinfo->is_haswell) {
185552       if (devinfo->is_g4x) {
185579 MI_STORE_DATA_IMM_CommandType_bits(const struct gen_device_info *devinfo)
185581    switch (devinfo->gen) {
185587       if (devinfo->is_haswell) {
185595       if (devinfo->is_g4x) {
185619 MI_STORE_DATA_IMM_CommandType_start(const struct gen_device_info *devinfo)
185621    switch (devinfo->gen) {
185627       if (devinfo->is_haswell) {
185635       if (devinfo->is_g4x) {
185659 MI_STORE_DATA_IMM_CoreModeEnable_bits(const struct gen_device_info *devinfo)
185661    switch (devinfo->gen) {
185667       if (devinfo->is_haswell) {
185675       if (devinfo->is_g4x) {
185696 MI_STORE_DATA_IMM_CoreModeEnable_start(const struct gen_device_info *devinfo)
185698    switch (devinfo->gen) {
185704       if (devinfo->is_haswell) {
185712       if (devinfo->is_g4x) {
185739 MI_STORE_DATA_IMM_DWordLength_bits(const struct gen_device_info *devinfo)
185741    switch (devinfo->gen) {
185747       if (devinfo->is_haswell) {
185755       if (devinfo->is_g4x) {
185779 MI_STORE_DATA_IMM_DWordLength_start(const struct gen_device_info *devinfo)
185781    switch (devinfo->gen) {
185787       if (devinfo->is_haswell) {
185795       if (devinfo->is_g4x) {
185815 MI_STORE_DATA_IMM_DataDWord0_bits(const struct gen_device_info *devinfo)
185817    switch (devinfo->gen) {
185823       if (devinfo->is_haswell) {
185831       if (devinfo->is_g4x) {
185848 MI_STORE_DATA_IMM_DataDWord0_start(const struct gen_device_info *devinfo)
185850    switch (devinfo->gen) {
185856       if (devinfo->is_haswell) {
185864       if (devinfo->is_g4x) {
185884 MI_STORE_DATA_IMM_DataDWord1_bits(const struct gen_device_info *devinfo)
185886    switch (devinfo->gen) {
185892       if (devinfo->is_haswell) {
185900       if (devinfo->is_g4x) {
185917 MI_STORE_DATA_IMM_DataDWord1_start(const struct gen_device_info *devinfo)
185919    switch (devinfo->gen) {
185925       if (devinfo->is_haswell) {
185933       if (devinfo->is_g4x) {
185957 MI_STORE_DATA_IMM_ImmediateData_bits(const struct gen_device_info *devinfo)
185959    switch (devinfo->gen) {
185965       if (devinfo->is_haswell) {
185973       if (devinfo->is_g4x) {
185994 MI_STORE_DATA_IMM_ImmediateData_start(const struct gen_device_info *devinfo)
185996    switch (devinfo->gen) {
186002       if (devinfo->is_haswell) {
186010       if (devinfo->is_g4x) {
186037 MI_STORE_DATA_IMM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
186039    switch (devinfo->gen) {
186045       if (devinfo->is_haswell) {
186053       if (devinfo->is_g4x) {
186077 MI_STORE_DATA_IMM_MICommandOpcode_start(const struct gen_device_info *devinfo)
186079    switch (devinfo->gen) {
186085       if (devinfo->is_haswell) {
186093       if (devinfo->is_g4x) {
186113 MI_STORE_DATA_IMM_MemoryAddressType_bits(const struct gen_device_info *devinfo)
186115    switch (devinfo->gen) {
186121       if (devinfo->is_haswell) {
186129       if (devinfo->is_g4x) {
186146 MI_STORE_DATA_IMM_MemoryAddressType_start(const struct gen_device_info *devinfo)
186148    switch (devinfo->gen) {
186154       if (devinfo->is_haswell) {
186162       if (devinfo->is_g4x) {
186182 MI_STORE_DATA_IMM_PhysicalStartAddressExtension_bits(const struct gen_device_info *devinfo)
186184    switch (devinfo->gen) {
186190       if (devinfo->is_haswell) {
186198       if (devinfo->is_g4x) {
186215 MI_STORE_DATA_IMM_PhysicalStartAddressExtension_start(const struct gen_device_info *devinfo)
186217    switch (devinfo->gen) {
186223       if (devinfo->is_haswell) {
186231       if (devinfo->is_g4x) {
186252 MI_STORE_DATA_IMM_StoreQword_bits(const struct gen_device_info *devinfo)
186254    switch (devinfo->gen) {
186260       if (devinfo->is_haswell) {
186268       if (devinfo->is_g4x) {
186286 MI_STORE_DATA_IMM_StoreQword_start(const struct gen_device_info *devinfo)
186288    switch (devinfo->gen) {
186294       if (devinfo->is_haswell) {
186302       if (devinfo->is_g4x) {
186326 MI_STORE_DATA_IMM_UseGlobalGTT_bits(const struct gen_device_info *devinfo)
186328    switch (devinfo->gen) {
186334       if (devinfo->is_haswell) {
186342       if (devinfo->is_g4x) {
186363 MI_STORE_DATA_IMM_UseGlobalGTT_start(const struct gen_device_info *devinfo)
186365    switch (devinfo->gen) {
186371       if (devinfo->is_haswell) {
186379       if (devinfo->is_g4x) {
186403 MI_STORE_DATA_INDEX_length(const struct gen_device_info *devinfo)
186405    switch (devinfo->gen) {
186411       if (devinfo->is_haswell) {
186419       if (devinfo->is_g4x) {
186443 MI_STORE_DATA_INDEX_CommandType_bits(const struct gen_device_info *devinfo)
186445    switch (devinfo->gen) {
186451       if (devinfo->is_haswell) {
186459       if (devinfo->is_g4x) {
186480 MI_STORE_DATA_INDEX_CommandType_start(const struct gen_device_info *devinfo)
186482    switch (devinfo->gen) {
186488       if (devinfo->is_haswell) {
186496       if (devinfo->is_g4x) {
186520 MI_STORE_DATA_INDEX_DWordLength_bits(const struct gen_device_info *devinfo)
186522    switch (devinfo->gen) {
186528       if (devinfo->is_haswell) {
186536       if (devinfo->is_g4x) {
186557 MI_STORE_DATA_INDEX_DWordLength_start(const struct gen_device_info *devinfo)
186559    switch (devinfo->gen) {
186565       if (devinfo->is_haswell) {
186573       if (devinfo->is_g4x) {
186597 MI_STORE_DATA_INDEX_DataDWord0_bits(const struct gen_device_info *devinfo)
186599    switch (devinfo->gen) {
186605       if (devinfo->is_haswell) {
186613       if (devinfo->is_g4x) {
186634 MI_STORE_DATA_INDEX_DataDWord0_start(const struct gen_device_info *devinfo)
186636    switch (devinfo->gen) {
186642       if (devinfo->is_haswell) {
186650       if (devinfo->is_g4x) {
186674 MI_STORE_DATA_INDEX_DataDWord1_bits(const struct gen_device_info *devinfo)
186676    switch (devinfo->gen) {
186682       if (devinfo->is_haswell) {
186690       if (devinfo->is_g4x) {
186711 MI_STORE_DATA_INDEX_DataDWord1_start(const struct gen_device_info *devinfo)
186713    switch (devinfo->gen) {
186719       if (devinfo->is_haswell) {
186727       if (devinfo->is_g4x) {
186751 MI_STORE_DATA_INDEX_MICommandOpcode_bits(const struct gen_device_info *devinfo)
186753    switch (devinfo->gen) {
186759       if (devinfo->is_haswell) {
186767       if (devinfo->is_g4x) {
186788 MI_STORE_DATA_INDEX_MICommandOpcode_start(const struct gen_device_info *devinfo)
186790    switch (devinfo->gen) {
186796       if (devinfo->is_haswell) {
186804       if (devinfo->is_g4x) {
186828 MI_STORE_DATA_INDEX_Offset_bits(const struct gen_device_info *devinfo)
186830    switch (devinfo->gen) {
186836       if (devinfo->is_haswell) {
186844       if (devinfo->is_g4x) {
186865 MI_STORE_DATA_INDEX_Offset_start(const struct gen_device_info *devinfo)
186867    switch (devinfo->gen) {
186873       if (devinfo->is_haswell) {
186881       if (devinfo->is_g4x) {
186902 MI_STORE_DATA_INDEX_UsePerProcessHardwareStatusPage_bits(const struct gen_device_info *devinfo)
186904    switch (devinfo->gen) {
186910       if (devinfo->is_haswell) {
186918       if (devinfo->is_g4x) {
186936 MI_STORE_DATA_INDEX_UsePerProcessHardwareStatusPage_start(const struct gen_device_info *devinfo)
186938    switch (devinfo->gen) {
186944       if (devinfo->is_haswell) {
186952       if (devinfo->is_g4x) {
186979 MI_STORE_REGISTER_MEM_length(const struct gen_device_info *devinfo)
186981    switch (devinfo->gen) {
186987       if (devinfo->is_haswell) {
186995       if (devinfo->is_g4x) {
187013 MI_STORE_REGISTER_MEM_AddCSMMIOStartOffset_bits(const struct gen_device_info *devinfo)
187015    switch (devinfo->gen) {
187021       if (devinfo->is_haswell) {
187029       if (devinfo->is_g4x) {
187044 MI_STORE_REGISTER_MEM_AddCSMMIOStartOffset_start(const struct gen_device_info *devinfo)
187046    switch (devinfo->gen) {
187052       if (devinfo->is_haswell) {
187060       if (devinfo->is_g4x) {
187087 MI_STORE_REGISTER_MEM_CommandType_bits(const struct gen_device_info *devinfo)
187089    switch (devinfo->gen) {
187095       if (devinfo->is_haswell) {
187103       if (devinfo->is_g4x) {
187127 MI_STORE_REGISTER_MEM_CommandType_start(const struct gen_device_info *devinfo)
187129    switch (devinfo->gen) {
187135       if (devinfo->is_haswell) {
187143       if (devinfo->is_g4x) {
187170 MI_STORE_REGISTER_MEM_DWordLength_bits(const struct gen_device_info *devinfo)
187172    switch (devinfo->gen) {
187178       if (devinfo->is_haswell) {
187186       if (devinfo->is_g4x) {
187210 MI_STORE_REGISTER_MEM_DWordLength_start(const struct gen_device_info *devinfo)
187212    switch (devinfo->gen) {
187218       if (devinfo->is_haswell) {
187226       if (devinfo->is_g4x) {
187253 MI_STORE_REGISTER_MEM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
187255    switch (devinfo->gen) {
187261       if (devinfo->is_haswell) {
187269       if (devinfo->is_g4x) {
187293 MI_STORE_REGISTER_MEM_MICommandOpcode_start(const struct gen_device_info *devinfo)
187295    switch (devinfo->gen) {
187301       if (devinfo->is_haswell) {
187309       if (devinfo->is_g4x) {
187336 MI_STORE_REGISTER_MEM_MemoryAddress_bits(const struct gen_device_info *devinfo)
187338    switch (devinfo->gen) {
187344       if (devinfo->is_haswell) {
187352       if (devinfo->is_g4x) {
187376 MI_STORE_REGISTER_MEM_MemoryAddress_start(const struct gen_device_info *devinfo)
187378    switch (devinfo->gen) {
187384       if (devinfo->is_haswell) {
187392       if (devinfo->is_g4x) {
187411 MI_STORE_REGISTER_MEM_PhysicalStartAddressExtension_bits(const struct gen_device_info *devinfo)
187413    switch (devinfo->gen) {
187419       if (devinfo->is_haswell) {
187427       if (devinfo->is_g4x) {
187443 MI_STORE_REGISTER_MEM_PhysicalStartAddressExtension_start(const struct gen_device_info *devinfo)
187445    switch (devinfo->gen) {
187451       if (devinfo->is_haswell) {
187459       if (devinfo->is_g4x) {
187481 MI_STORE_REGISTER_MEM_PredicateEnable_bits(const struct gen_device_info *devinfo)
187483    switch (devinfo->gen) {
187489       if (devinfo->is_haswell) {
187497       if (devinfo->is_g4x) {
187516 MI_STORE_REGISTER_MEM_PredicateEnable_start(const struct gen_device_info *devinfo)
187518    switch (devinfo->gen) {
187524       if (devinfo->is_haswell) {
187532       if (devinfo->is_g4x) {
187559 MI_STORE_REGISTER_MEM_RegisterAddress_bits(const struct gen_device_info *devinfo)
187561    switch (devinfo->gen) {
187567       if (devinfo->is_haswell) {
187575       if (devinfo->is_g4x) {
187599 MI_STORE_REGISTER_MEM_RegisterAddress_start(const struct gen_device_info *devinfo)
187601    switch (devinfo->gen) {
187607       if (devinfo->is_haswell) {
187615       if (devinfo->is_g4x) {
187642 MI_STORE_REGISTER_MEM_UseGlobalGTT_bits(const struct gen_device_info *devinfo)
187644    switch (devinfo->gen) {
187650       if (devinfo->is_haswell) {
187658       if (devinfo->is_g4x) {
187682 MI_STORE_REGISTER_MEM_UseGlobalGTT_start(const struct gen_device_info *devinfo)
187684    switch (devinfo->gen) {
187690       if (devinfo->is_haswell) {
187698       if (devinfo->is_g4x) {
187718 MI_STORE_URB_MEM_length(const struct gen_device_info *devinfo)
187720    switch (devinfo->gen) {
187726       if (devinfo->is_haswell) {
187734       if (devinfo->is_g4x) {
187754 MI_STORE_URB_MEM_CommandType_bits(const struct gen_device_info *devinfo)
187756    switch (devinfo->gen) {
187762       if (devinfo->is_haswell) {
187770       if (devinfo->is_g4x) {
187787 MI_STORE_URB_MEM_CommandType_start(const struct gen_device_info *devinfo)
187789    switch (devinfo->gen) {
187795       if (devinfo->is_haswell) {
187803       if (devinfo->is_g4x) {
187823 MI_STORE_URB_MEM_DWordLength_bits(const struct gen_device_info *devinfo)
187825    switch (devinfo->gen) {
187831       if (devinfo->is_haswell) {
187839       if (devinfo->is_g4x) {
187856 MI_STORE_URB_MEM_DWordLength_start(const struct gen_device_info *devinfo)
187858    switch (devinfo->gen) {
187864       if (devinfo->is_haswell) {
187872       if (devinfo->is_g4x) {
187892 MI_STORE_URB_MEM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
187894    switch (devinfo->gen) {
187900       if (devinfo->is_haswell) {
187908       if (devinfo->is_g4x) {
187925 MI_STORE_URB_MEM_MICommandOpcode_start(const struct gen_device_info *devinfo)
187927    switch (devinfo->gen) {
187933       if (devinfo->is_haswell) {
187941       if (devinfo->is_g4x) {
187961 MI_STORE_URB_MEM_MemoryAddress_bits(const struct gen_device_info *devinfo)
187963    switch (devinfo->gen) {
187969       if (devinfo->is_haswell) {
187977       if (devinfo->is_g4x) {
187994 MI_STORE_URB_MEM_MemoryAddress_start(const struct gen_device_info *devinfo)
187996    switch (devinfo->gen) {
188002       if (devinfo->is_haswell) {
188010       if (devinfo->is_g4x) {
188030 MI_STORE_URB_MEM_URBAddress_bits(const struct gen_device_info *devinfo)
188032    switch (devinfo->gen) {
188038       if (devinfo->is_haswell) {
188046       if (devinfo->is_g4x) {
188063 MI_STORE_URB_MEM_URBAddress_start(const struct gen_device_info *devinfo)
188065    switch (devinfo->gen) {
188071       if (devinfo->is_haswell) {
188079       if (devinfo->is_g4x) {
188103 MI_SUSPEND_FLUSH_length(const struct gen_device_info *devinfo)
188105    switch (devinfo->gen) {
188111       if (devinfo->is_haswell) {
188119       if (devinfo->is_g4x) {
188143 MI_SUSPEND_FLUSH_CommandType_bits(const struct gen_device_info *devinfo)
188145    switch (devinfo->gen) {
188151       if (devinfo->is_haswell) {
188159       if (devinfo->is_g4x) {
188180 MI_SUSPEND_FLUSH_CommandType_start(const struct gen_device_info *devinfo)
188182    switch (devinfo->gen) {
188188       if (devinfo->is_haswell) {
188196       if (devinfo->is_g4x) {
188220 MI_SUSPEND_FLUSH_MICommandOpcode_bits(const struct gen_device_info *devinfo)
188222    switch (devinfo->gen) {
188228       if (devinfo->is_haswell) {
188236       if (devinfo->is_g4x) {
188257 MI_SUSPEND_FLUSH_MICommandOpcode_start(const struct gen_device_info *devinfo)
188259    switch (devinfo->gen) {
188265       if (devinfo->is_haswell) {
188273       if (devinfo->is_g4x) {
188297 MI_SUSPEND_FLUSH_SuspendFlush_bits(const struct gen_device_info *devinfo)
188299    switch (devinfo->gen) {
188305       if (devinfo->is_haswell) {
188313       if (devinfo->is_g4x) {
188334 MI_SUSPEND_FLUSH_SuspendFlush_start(const struct gen_device_info *devinfo)
188336    switch (devinfo->gen) {
188342       if (devinfo->is_haswell) {
188350       if (devinfo->is_g4x) {
188373 MI_TOPOLOGY_FILTER_length(const struct gen_device_info *devinfo)
188375    switch (devinfo->gen) {
188381       if (devinfo->is_haswell) {
188389       if (devinfo->is_g4x) {
188412 MI_TOPOLOGY_FILTER_CommandType_bits(const struct gen_device_info *devinfo)
188414    switch (devinfo->gen) {
188420       if (devinfo->is_haswell) {
188428       if (devinfo->is_g4x) {
188448 MI_TOPOLOGY_FILTER_CommandType_start(const struct gen_device_info *devinfo)
188450    switch (devinfo->gen) {
188456       if (devinfo->is_haswell) {
188464       if (devinfo->is_g4x) {
188487 MI_TOPOLOGY_FILTER_MICommandOpcode_bits(const struct gen_device_info *devinfo)
188489    switch (devinfo->gen) {
188495       if (devinfo->is_haswell) {
188503       if (devinfo->is_g4x) {
188523 MI_TOPOLOGY_FILTER_MICommandOpcode_start(const struct gen_device_info *devinfo)
188525    switch (devinfo->gen) {
188531       if (devinfo->is_haswell) {
188539       if (devinfo->is_g4x) {
188562 MI_TOPOLOGY_FILTER_TopologyFilterValue_bits(const struct gen_device_info *devinfo)
188564    switch (devinfo->gen) {
188570       if (devinfo->is_haswell) {
188578       if (devinfo->is_g4x) {
188598 MI_TOPOLOGY_FILTER_TopologyFilterValue_start(const struct gen_device_info *devinfo)
188600    switch (devinfo->gen) {
188606       if (devinfo->is_haswell) {
188614       if (devinfo->is_g4x) {
188638 MI_UPDATE_GTT_CommandType_bits(const struct gen_device_info *devinfo)
188640    switch (devinfo->gen) {
188646       if (devinfo->is_haswell) {
188654       if (devinfo->is_g4x) {
188669 MI_UPDATE_GTT_CommandType_start(const struct gen_device_info *devinfo)
188671    switch (devinfo->gen) {
188677       if (devinfo->is_haswell) {
188685       if (devinfo->is_g4x) {
188703 MI_UPDATE_GTT_DWordLength_bits(const struct gen_device_info *devinfo)
188705    switch (devinfo->gen) {
188711       if (devinfo->is_haswell) {
188719       if (devinfo->is_g4x) {
188734 MI_UPDATE_GTT_DWordLength_start(const struct gen_device_info *devinfo)
188736    switch (devinfo->gen) {
188742       if (devinfo->is_haswell) {
188750       if (devinfo->is_g4x) {
188768 MI_UPDATE_GTT_EntryAddress_bits(const struct gen_device_info *devinfo)
188770    switch (devinfo->gen) {
188776       if (devinfo->is_haswell) {
188784       if (devinfo->is_g4x) {
188799 MI_UPDATE_GTT_EntryAddress_start(const struct gen_device_info *devinfo)
188801    switch (devinfo->gen) {
188807       if (devinfo->is_haswell) {
188815       if (devinfo->is_g4x) {
188833 MI_UPDATE_GTT_EntryData_bits(const struct gen_device_info *devinfo)
188835    switch (devinfo->gen) {
188841       if (devinfo->is_haswell) {
188849       if (devinfo->is_g4x) {
188864 MI_UPDATE_GTT_EntryData_start(const struct gen_device_info *devinfo)
188866    switch (devinfo->gen) {
188872       if (devinfo->is_haswell) {
188880       if (devinfo->is_g4x) {
188898 MI_UPDATE_GTT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
188900    switch (devinfo->gen) {
188906       if (devinfo->is_haswell) {
188914       if (devinfo->is_g4x) {
188929 MI_UPDATE_GTT_MICommandOpcode_start(const struct gen_device_info *devinfo)
188931    switch (devinfo->gen) {
188937       if (devinfo->is_haswell) {
188945       if (devinfo->is_g4x) {
188965 MI_URB_ATOMIC_ALLOC_length(const struct gen_device_info *devinfo)
188967    switch (devinfo->gen) {
188973       if (devinfo->is_haswell) {
188981       if (devinfo->is_g4x) {
189001 MI_URB_ATOMIC_ALLOC_CommandType_bits(const struct gen_device_info *devinfo)
189003    switch (devinfo->gen) {
189009       if (devinfo->is_haswell) {
189017       if (devinfo->is_g4x) {
189034 MI_URB_ATOMIC_ALLOC_CommandType_start(const struct gen_device_info *devinfo)
189036    switch (devinfo->gen) {
189042       if (devinfo->is_haswell) {
189050       if (devinfo->is_g4x) {
189070 MI_URB_ATOMIC_ALLOC_MICommandOpcode_bits(const struct gen_device_info *devinfo)
189072    switch (devinfo->gen) {
189078       if (devinfo->is_haswell) {
189086       if (devinfo->is_g4x) {
189103 MI_URB_ATOMIC_ALLOC_MICommandOpcode_start(const struct gen_device_info *devinfo)
189105    switch (devinfo->gen) {
189111       if (devinfo->is_haswell) {
189119       if (devinfo->is_g4x) {
189139 MI_URB_ATOMIC_ALLOC_URBAtomicStorageOffset_bits(const struct gen_device_info *devinfo)
189141    switch (devinfo->gen) {
189147       if (devinfo->is_haswell) {
189155       if (devinfo->is_g4x) {
189172 MI_URB_ATOMIC_ALLOC_URBAtomicStorageOffset_start(const struct gen_device_info *devinfo)
189174    switch (devinfo->gen) {
189180       if (devinfo->is_haswell) {
189188       if (devinfo->is_g4x) {
189208 MI_URB_ATOMIC_ALLOC_URBAtomicStorageSize_bits(const struct gen_device_info *devinfo)
189210    switch (devinfo->gen) {
189216       if (devinfo->is_haswell) {
189224       if (devinfo->is_g4x) {
189241 MI_URB_ATOMIC_ALLOC_URBAtomicStorageSize_start(const struct gen_device_info *devinfo)
189243    switch (devinfo->gen) {
189249       if (devinfo->is_haswell) {
189257       if (devinfo->is_g4x) {
189278 MI_URB_CLEAR_length(const struct gen_device_info *devinfo)
189280    switch (devinfo->gen) {
189286       if (devinfo->is_haswell) {
189294       if (devinfo->is_g4x) {
189315 MI_URB_CLEAR_CommandType_bits(const struct gen_device_info *devinfo)
189317    switch (devinfo->gen) {
189323       if (devinfo->is_haswell) {
189331       if (devinfo->is_g4x) {
189349 MI_URB_CLEAR_CommandType_start(const struct gen_device_info *devinfo)
189351    switch (devinfo->gen) {
189357       if (devinfo->is_haswell) {
189365       if (devinfo->is_g4x) {
189386 MI_URB_CLEAR_DWordLength_bits(const struct gen_device_info *devinfo)
189388    switch (devinfo->gen) {
189394       if (devinfo->is_haswell) {
189402       if (devinfo->is_g4x) {
189420 MI_URB_CLEAR_DWordLength_start(const struct gen_device_info *devinfo)
189422    switch (devinfo->gen) {
189428       if (devinfo->is_haswell) {
189436       if (devinfo->is_g4x) {
189457 MI_URB_CLEAR_MICommandOpcode_bits(const struct gen_device_info *devinfo)
189459    switch (devinfo->gen) {
189465       if (devinfo->is_haswell) {
189473       if (devinfo->is_g4x) {
189491 MI_URB_CLEAR_MICommandOpcode_start(const struct gen_device_info *devinfo)
189493    switch (devinfo->gen) {
189499       if (devinfo->is_haswell) {
189507       if (devinfo->is_g4x) {
189528 MI_URB_CLEAR_URBAddress_bits(const struct gen_device_info *devinfo)
189530    switch (devinfo->gen) {
189536       if (devinfo->is_haswell) {
189544       if (devinfo->is_g4x) {
189562 MI_URB_CLEAR_URBAddress_start(const struct gen_device_info *devinfo)
189564    switch (devinfo->gen) {
189570       if (devinfo->is_haswell) {
189578       if (devinfo->is_g4x) {
189599 MI_URB_CLEAR_URBClearLength_bits(const struct gen_device_info *devinfo)
189601    switch (devinfo->gen) {
189607       if (devinfo->is_haswell) {
189615       if (devinfo->is_g4x) {
189633 MI_URB_CLEAR_URBClearLength_start(const struct gen_device_info *devinfo)
189635    switch (devinfo->gen) {
189641       if (devinfo->is_haswell) {
189649       if (devinfo->is_g4x) {
189673 MI_USER_INTERRUPT_length(const struct gen_device_info *devinfo)
189675    switch (devinfo->gen) {
189681       if (devinfo->is_haswell) {
189689       if (devinfo->is_g4x) {
189713 MI_USER_INTERRUPT_CommandType_bits(const struct gen_device_info *devinfo)
189715    switch (devinfo->gen) {
189721       if (devinfo->is_haswell) {
189729       if (devinfo->is_g4x) {
189750 MI_USER_INTERRUPT_CommandType_start(const struct gen_device_info *devinfo)
189752    switch (devinfo->gen) {
189758       if (devinfo->is_haswell) {
189766       if (devinfo->is_g4x) {
189790 MI_USER_INTERRUPT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
189792    switch (devinfo->gen) {
189798       if (devinfo->is_haswell) {
189806       if (devinfo->is_g4x) {
189827 MI_USER_INTERRUPT_MICommandOpcode_start(const struct gen_device_info *devinfo)
189829    switch (devinfo->gen) {
189835       if (devinfo->is_haswell) {
189843       if (devinfo->is_g4x) {
189867 MI_WAIT_FOR_EVENT_length(const struct gen_device_info *devinfo)
189869    switch (devinfo->gen) {
189875       if (devinfo->is_haswell) {
189883       if (devinfo->is_g4x) {
189907 MI_WAIT_FOR_EVENT_CommandType_bits(const struct gen_device_info *devinfo)
189909    switch (devinfo->gen) {
189915       if (devinfo->is_haswell) {
189923       if (devinfo->is_g4x) {
189944 MI_WAIT_FOR_EVENT_CommandType_start(const struct gen_device_info *devinfo)
189946    switch (devinfo->gen) {
189952       if (devinfo->is_haswell) {
189960       if (devinfo->is_g4x) {
189980 MI_WAIT_FOR_EVENT_ConditionCodeWaitSelect_bits(const struct gen_device_info *devinfo)
189982    switch (devinfo->gen) {
189988       if (devinfo->is_haswell) {
189996       if (devinfo->is_g4x) {
190013 MI_WAIT_FOR_EVENT_ConditionCodeWaitSelect_start(const struct gen_device_info *devinfo)
190015    switch (devinfo->gen) {
190021       if (devinfo->is_haswell) {
190029       if (devinfo->is_g4x) {
190049 MI_WAIT_FOR_EVENT_DisplayPipeAHorizontalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
190051    switch (devinfo->gen) {
190057       if (devinfo->is_haswell) {
190065       if (devinfo->is_g4x) {
190082 MI_WAIT_FOR_EVENT_DisplayPipeAHorizontalBlankWaitEnable_start(const struct gen_device_info *devinfo)
190084    switch (devinfo->gen) {
190090       if (devinfo->is_haswell) {
190098       if (devinfo->is_g4x) {
190119 MI_WAIT_FOR_EVENT_DisplayPipeAScanLineWaitEnable_bits(const struct gen_device_info *devinfo)
190121    switch (devinfo->gen) {
190127       if (devinfo->is_haswell) {
190135       if (devinfo->is_g4x) {
190153 MI_WAIT_FOR_EVENT_DisplayPipeAScanLineWaitEnable_start(const struct gen_device_info *devinfo)
190155    switch (devinfo->gen) {
190161       if (devinfo->is_haswell) {
190169       if (devinfo->is_g4x) {
190190 MI_WAIT_FOR_EVENT_DisplayPipeAVerticalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
190192    switch (devinfo->gen) {
190198       if (devinfo->is_haswell) {
190206       if (devinfo->is_g4x) {
190224 MI_WAIT_FOR_EVENT_DisplayPipeAVerticalBlankWaitEnable_start(const struct gen_device_info *devinfo)
190226    switch (devinfo->gen) {
190232       if (devinfo->is_haswell) {
190240       if (devinfo->is_g4x) {
190260 MI_WAIT_FOR_EVENT_DisplayPipeBHorizontalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
190262    switch (devinfo->gen) {
190268       if (devinfo->is_haswell) {
190276       if (devinfo->is_g4x) {
190293 MI_WAIT_FOR_EVENT_DisplayPipeBHorizontalBlankWaitEnable_start(const struct gen_device_info *devinfo)
190295    switch (devinfo->gen) {
190301       if (devinfo->is_haswell) {
190309       if (devinfo->is_g4x) {
190330 MI_WAIT_FOR_EVENT_DisplayPipeBScanLineWaitEnable_bits(const struct gen_device_info *devinfo)
190332    switch (devinfo->gen) {
190338       if (devinfo->is_haswell) {
190346       if (devinfo->is_g4x) {
190364 MI_WAIT_FOR_EVENT_DisplayPipeBScanLineWaitEnable_start(const struct gen_device_info *devinfo)
190366    switch (devinfo->gen) {
190372       if (devinfo->is_haswell) {
190380       if (devinfo->is_g4x) {
190401 MI_WAIT_FOR_EVENT_DisplayPipeBVerticalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
190403    switch (devinfo->gen) {
190409       if (devinfo->is_haswell) {
190417       if (devinfo->is_g4x) {
190435 MI_WAIT_FOR_EVENT_DisplayPipeBVerticalBlankWaitEnable_start(const struct gen_device_info *devinfo)
190437    switch (devinfo->gen) {
190443       if (devinfo->is_haswell) {
190451       if (devinfo->is_g4x) {
190470 MI_WAIT_FOR_EVENT_DisplayPipeCHorizontalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
190472    switch (devinfo->gen) {
190478       if (devinfo->is_haswell) {
190486       if (devinfo->is_g4x) {
190502 MI_WAIT_FOR_EVENT_DisplayPipeCHorizontalBlankWaitEnable_start(const struct gen_device_info *devinfo)
190504    switch (devinfo->gen) {
190510       if (devinfo->is_haswell) {
190518       if (devinfo->is_g4x) {
190538 MI_WAIT_FOR_EVENT_DisplayPipeCScanLineWaitEnable_bits(const struct gen_device_info *devinfo)
190540    switch (devinfo->gen) {
190546       if (devinfo->is_haswell) {
190554       if (devinfo->is_g4x) {
190571 MI_WAIT_FOR_EVENT_DisplayPipeCScanLineWaitEnable_start(const struct gen_device_info *devinfo)
190573    switch (devinfo->gen) {
190579       if (devinfo->is_haswell) {
190587       if (devinfo->is_g4x) {
190607 MI_WAIT_FOR_EVENT_DisplayPipeCVerticalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
190609    switch (devinfo->gen) {
190615       if (devinfo->is_haswell) {
190623       if (devinfo->is_g4x) {
190640 MI_WAIT_FOR_EVENT_DisplayPipeCVerticalBlankWaitEnable_start(const struct gen_device_info *devinfo)
190642    switch (devinfo->gen) {
190648       if (devinfo->is_haswell) {
190656       if (devinfo->is_g4x) {
190676 MI_WAIT_FOR_EVENT_DisplayPlane1AVerticalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
190678    switch (devinfo->gen) {
190684       if (devinfo->is_haswell) {
190692       if (devinfo->is_g4x) {
190709 MI_WAIT_FOR_EVENT_DisplayPlane1AVerticalBlankWaitEnable_start(const struct gen_device_info *devinfo)
190711    switch (devinfo->gen) {
190717       if (devinfo->is_haswell) {
190725       if (devinfo->is_g4x) {
190745 MI_WAIT_FOR_EVENT_DisplayPlane1BScanLineWaitEnable_bits(const struct gen_device_info *devinfo)
190747    switch (devinfo->gen) {
190753       if (devinfo->is_haswell) {
190761       if (devinfo->is_g4x) {
190778 MI_WAIT_FOR_EVENT_DisplayPlane1BScanLineWaitEnable_start(const struct gen_device_info *devinfo)
190780    switch (devinfo->gen) {
190786       if (devinfo->is_haswell) {
190794       if (devinfo->is_g4x) {
190814 MI_WAIT_FOR_EVENT_DisplayPlane1BVerticalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
190816    switch (devinfo->gen) {
190822       if (devinfo->is_haswell) {
190830       if (devinfo->is_g4x) {
190847 MI_WAIT_FOR_EVENT_DisplayPlane1BVerticalBlankWaitEnable_start(const struct gen_device_info *devinfo)
190849    switch (devinfo->gen) {
190855       if (devinfo->is_haswell) {
190863       if (devinfo->is_g4x) {
190883 MI_WAIT_FOR_EVENT_DisplayPlane1CScanLineWaitEnable_bits(const struct gen_device_info *devinfo)
190885    switch (devinfo->gen) {
190891       if (devinfo->is_haswell) {
190899       if (devinfo->is_g4x) {
190916 MI_WAIT_FOR_EVENT_DisplayPlane1CScanLineWaitEnable_start(const struct gen_device_info *devinfo)
190918    switch (devinfo->gen) {
190924       if (devinfo->is_haswell) {
190932       if (devinfo->is_g4x) {
190952 MI_WAIT_FOR_EVENT_DisplayPlane1CVerticalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
190954    switch (devinfo->gen) {
190960       if (devinfo->is_haswell) {
190968       if (devinfo->is_g4x) {
190985 MI_WAIT_FOR_EVENT_DisplayPlane1CVerticalBlankWaitEnable_start(const struct gen_device_info *devinfo)
190987    switch (devinfo->gen) {
190993       if (devinfo->is_haswell) {
191001       if (devinfo->is_g4x) {
191021 MI_WAIT_FOR_EVENT_DisplayPlane1FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191023    switch (devinfo->gen) {
191029       if (devinfo->is_haswell) {
191037       if (devinfo->is_g4x) {
191054 MI_WAIT_FOR_EVENT_DisplayPlane1FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191056    switch (devinfo->gen) {
191062       if (devinfo->is_haswell) {
191070       if (devinfo->is_g4x) {
191090 MI_WAIT_FOR_EVENT_DisplayPlane10FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191092    switch (devinfo->gen) {
191098       if (devinfo->is_haswell) {
191106       if (devinfo->is_g4x) {
191123 MI_WAIT_FOR_EVENT_DisplayPlane10FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191125    switch (devinfo->gen) {
191131       if (devinfo->is_haswell) {
191139       if (devinfo->is_g4x) {
191159 MI_WAIT_FOR_EVENT_DisplayPlane11FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191161    switch (devinfo->gen) {
191167       if (devinfo->is_haswell) {
191175       if (devinfo->is_g4x) {
191192 MI_WAIT_FOR_EVENT_DisplayPlane11FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191194    switch (devinfo->gen) {
191200       if (devinfo->is_haswell) {
191208       if (devinfo->is_g4x) {
191228 MI_WAIT_FOR_EVENT_DisplayPlane12FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191230    switch (devinfo->gen) {
191236       if (devinfo->is_haswell) {
191244       if (devinfo->is_g4x) {
191261 MI_WAIT_FOR_EVENT_DisplayPlane12FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191263    switch (devinfo->gen) {
191269       if (devinfo->is_haswell) {
191277       if (devinfo->is_g4x) {
191297 MI_WAIT_FOR_EVENT_DisplayPlane2FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191299    switch (devinfo->gen) {
191305       if (devinfo->is_haswell) {
191313       if (devinfo->is_g4x) {
191330 MI_WAIT_FOR_EVENT_DisplayPlane2FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191332    switch (devinfo->gen) {
191338       if (devinfo->is_haswell) {
191346       if (devinfo->is_g4x) {
191366 MI_WAIT_FOR_EVENT_DisplayPlane3FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191368    switch (devinfo->gen) {
191374       if (devinfo->is_haswell) {
191382       if (devinfo->is_g4x) {
191399 MI_WAIT_FOR_EVENT_DisplayPlane3FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191401    switch (devinfo->gen) {
191407       if (devinfo->is_haswell) {
191415       if (devinfo->is_g4x) {
191435 MI_WAIT_FOR_EVENT_DisplayPlane4FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191437    switch (devinfo->gen) {
191443       if (devinfo->is_haswell) {
191451       if (devinfo->is_g4x) {
191468 MI_WAIT_FOR_EVENT_DisplayPlane4FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191470    switch (devinfo->gen) {
191476       if (devinfo->is_haswell) {
191484       if (devinfo->is_g4x) {
191504 MI_WAIT_FOR_EVENT_DisplayPlane5FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191506    switch (devinfo->gen) {
191512       if (devinfo->is_haswell) {
191520       if (devinfo->is_g4x) {
191537 MI_WAIT_FOR_EVENT_DisplayPlane5FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191539    switch (devinfo->gen) {
191545       if (devinfo->is_haswell) {
191553       if (devinfo->is_g4x) {
191573 MI_WAIT_FOR_EVENT_DisplayPlane6FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191575    switch (devinfo->gen) {
191581       if (devinfo->is_haswell) {
191589       if (devinfo->is_g4x) {
191606 MI_WAIT_FOR_EVENT_DisplayPlane6FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191608    switch (devinfo->gen) {
191614       if (devinfo->is_haswell) {
191622       if (devinfo->is_g4x) {
191642 MI_WAIT_FOR_EVENT_DisplayPlane7FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191644    switch (devinfo->gen) {
191650       if (devinfo->is_haswell) {
191658       if (devinfo->is_g4x) {
191675 MI_WAIT_FOR_EVENT_DisplayPlane7FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191677    switch (devinfo->gen) {
191683       if (devinfo->is_haswell) {
191691       if (devinfo->is_g4x) {
191711 MI_WAIT_FOR_EVENT_DisplayPlane8FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191713    switch (devinfo->gen) {
191719       if (devinfo->is_haswell) {
191727       if (devinfo->is_g4x) {
191744 MI_WAIT_FOR_EVENT_DisplayPlane8FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191746    switch (devinfo->gen) {
191752       if (devinfo->is_haswell) {
191760       if (devinfo->is_g4x) {
191780 MI_WAIT_FOR_EVENT_DisplayPlane9FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191782    switch (devinfo->gen) {
191788       if (devinfo->is_haswell) {
191796       if (devinfo->is_g4x) {
191813 MI_WAIT_FOR_EVENT_DisplayPlane9FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191815    switch (devinfo->gen) {
191821       if (devinfo->is_haswell) {
191829       if (devinfo->is_g4x) {
191850 MI_WAIT_FOR_EVENT_DisplayPlaneAFlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191852    switch (devinfo->gen) {
191858       if (devinfo->is_haswell) {
191866       if (devinfo->is_g4x) {
191884 MI_WAIT_FOR_EVENT_DisplayPlaneAFlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191886    switch (devinfo->gen) {
191892       if (devinfo->is_haswell) {
191900       if (devinfo->is_g4x) {
191921 MI_WAIT_FOR_EVENT_DisplayPlaneBFlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191923    switch (devinfo->gen) {
191929       if (devinfo->is_haswell) {
191937       if (devinfo->is_g4x) {
191955 MI_WAIT_FOR_EVENT_DisplayPlaneBFlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
191957    switch (devinfo->gen) {
191963       if (devinfo->is_haswell) {
191971       if (devinfo->is_g4x) {
191991 MI_WAIT_FOR_EVENT_DisplayPlaneCFlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
191993    switch (devinfo->gen) {
191999       if (devinfo->is_haswell) {
192007       if (devinfo->is_g4x) {
192024 MI_WAIT_FOR_EVENT_DisplayPlaneCFlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
192026    switch (devinfo->gen) {
192032       if (devinfo->is_haswell) {
192040       if (devinfo->is_g4x) {
192060 MI_WAIT_FOR_EVENT_DisplayPlnae1AScanLineWaitEnable_bits(const struct gen_device_info *devinfo)
192062    switch (devinfo->gen) {
192068       if (devinfo->is_haswell) {
192076       if (devinfo->is_g4x) {
192093 MI_WAIT_FOR_EVENT_DisplayPlnae1AScanLineWaitEnable_start(const struct gen_device_info *devinfo)
192095    switch (devinfo->gen) {
192101       if (devinfo->is_haswell) {
192109       if (devinfo->is_g4x) {
192130 MI_WAIT_FOR_EVENT_DisplaySpriteAFlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
192132    switch (devinfo->gen) {
192138       if (devinfo->is_haswell) {
192146       if (devinfo->is_g4x) {
192164 MI_WAIT_FOR_EVENT_DisplaySpriteAFlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
192166    switch (devinfo->gen) {
192172       if (devinfo->is_haswell) {
192180       if (devinfo->is_g4x) {
192201 MI_WAIT_FOR_EVENT_DisplaySpriteBFlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
192203    switch (devinfo->gen) {
192209       if (devinfo->is_haswell) {
192217       if (devinfo->is_g4x) {
192235 MI_WAIT_FOR_EVENT_DisplaySpriteBFlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
192237    switch (devinfo->gen) {
192243       if (devinfo->is_haswell) {
192251       if (devinfo->is_g4x) {
192271 MI_WAIT_FOR_EVENT_DisplaySpriteCFlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
192273    switch (devinfo->gen) {
192279       if (devinfo->is_haswell) {
192287       if (devinfo->is_g4x) {
192304 MI_WAIT_FOR_EVENT_DisplaySpriteCFlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
192306    switch (devinfo->gen) {
192312       if (devinfo->is_haswell) {
192320       if (devinfo->is_g4x) {
192344 MI_WAIT_FOR_EVENT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
192346    switch (devinfo->gen) {
192352       if (devinfo->is_haswell) {
192360       if (devinfo->is_g4x) {
192381 MI_WAIT_FOR_EVENT_MICommandOpcode_start(const struct gen_device_info *devinfo)
192383    switch (devinfo->gen) {
192389       if (devinfo->is_haswell) {
192397       if (devinfo->is_g4x) {
192415 MI_WAIT_FOR_EVENT_2_length(const struct gen_device_info *devinfo)
192417    switch (devinfo->gen) {
192423       if (devinfo->is_haswell) {
192431       if (devinfo->is_g4x) {
192449 MI_WAIT_FOR_EVENT_2_CommandType_bits(const struct gen_device_info *devinfo)
192451    switch (devinfo->gen) {
192457       if (devinfo->is_haswell) {
192465       if (devinfo->is_g4x) {
192480 MI_WAIT_FOR_EVENT_2_CommandType_start(const struct gen_device_info *devinfo)
192482    switch (devinfo->gen) {
192488       if (devinfo->is_haswell) {
192496       if (devinfo->is_g4x) {
192514 MI_WAIT_FOR_EVENT_2_DisplayPipeScanLineWaitEnable_bits(const struct gen_device_info *devinfo)
192516    switch (devinfo->gen) {
192522       if (devinfo->is_haswell) {
192530       if (devinfo->is_g4x) {
192545 MI_WAIT_FOR_EVENT_2_DisplayPipeScanLineWaitEnable_start(const struct gen_device_info *devinfo)
192547    switch (devinfo->gen) {
192553       if (devinfo->is_haswell) {
192561       if (devinfo->is_g4x) {
192579 MI_WAIT_FOR_EVENT_2_DisplayPipeVerticalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
192581    switch (devinfo->gen) {
192587       if (devinfo->is_haswell) {
192595       if (devinfo->is_g4x) {
192610 MI_WAIT_FOR_EVENT_2_DisplayPipeVerticalBlankWaitEnable_start(const struct gen_device_info *devinfo)
192612    switch (devinfo->gen) {
192618       if (devinfo->is_haswell) {
192626       if (devinfo->is_g4x) {
192644 MI_WAIT_FOR_EVENT_2_DisplayPlaneFlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
192646    switch (devinfo->gen) {
192652       if (devinfo->is_haswell) {
192660       if (devinfo->is_g4x) {
192675 MI_WAIT_FOR_EVENT_2_DisplayPlaneFlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
192677    switch (devinfo->gen) {
192683       if (devinfo->is_haswell) {
192691       if (devinfo->is_g4x) {
192709 MI_WAIT_FOR_EVENT_2_MICommandOpcode_bits(const struct gen_device_info *devinfo)
192711    switch (devinfo->gen) {
192717       if (devinfo->is_haswell) {
192725       if (devinfo->is_g4x) {
192740 MI_WAIT_FOR_EVENT_2_MICommandOpcode_start(const struct gen_device_info *devinfo)
192742    switch (devinfo->gen) {
192748       if (devinfo->is_haswell) {
192756       if (devinfo->is_g4x) {
192780 PALETTE_ENTRY_length(const struct gen_device_info *devinfo)
192782    switch (devinfo->gen) {
192788       if (devinfo->is_haswell) {
192796       if (devinfo->is_g4x) {
192820 PALETTE_ENTRY_Alpha_bits(const struct gen_device_info *devinfo)
192822    switch (devinfo->gen) {
192828       if (devinfo->is_haswell) {
192836       if (devinfo->is_g4x) {
192857 PALETTE_ENTRY_Alpha_start(const struct gen_device_info *devinfo)
192859    switch (devinfo->gen) {
192865       if (devinfo->is_haswell) {
192873       if (devinfo->is_g4x) {
192897 PALETTE_ENTRY_Blue_bits(const struct gen_device_info *devinfo)
192899    switch (devinfo->gen) {
192905       if (devinfo->is_haswell) {
192913       if (devinfo->is_g4x) {
192934 PALETTE_ENTRY_Blue_start(const struct gen_device_info *devinfo)
192936    switch (devinfo->gen) {
192942       if (devinfo->is_haswell) {
192950       if (devinfo->is_g4x) {
192974 PALETTE_ENTRY_Green_bits(const struct gen_device_info *devinfo)
192976    switch (devinfo->gen) {
192982       if (devinfo->is_haswell) {
192990       if (devinfo->is_g4x) {
193011 PALETTE_ENTRY_Green_start(const struct gen_device_info *devinfo)
193013    switch (devinfo->gen) {
193019       if (devinfo->is_haswell) {
193027       if (devinfo->is_g4x) {
193051 PALETTE_ENTRY_Red_bits(const struct gen_device_info *devinfo)
193053    switch (devinfo->gen) {
193059       if (devinfo->is_haswell) {
193067       if (devinfo->is_g4x) {
193088 PALETTE_ENTRY_Red_start(const struct gen_device_info *devinfo)
193090    switch (devinfo->gen) {
193096       if (devinfo->is_haswell) {
193104       if (devinfo->is_g4x) {
193131 PIPELINE_SELECT_length(const struct gen_device_info *devinfo)
193133    switch (devinfo->gen) {
193139       if (devinfo->is_haswell) {
193147       if (devinfo->is_g4x) {
193174 PIPELINE_SELECT_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
193176    switch (devinfo->gen) {
193182       if (devinfo->is_haswell) {
193190       if (devinfo->is_g4x) {
193214 PIPELINE_SELECT_3DCommandOpcode_start(const struct gen_device_info *devinfo)
193216    switch (devinfo->gen) {
193222       if (devinfo->is_haswell) {
193230       if (devinfo->is_g4x) {
193257 PIPELINE_SELECT_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
193259    switch (devinfo->gen) {
193265       if (devinfo->is_haswell) {
193273       if (devinfo->is_g4x) {
193297 PIPELINE_SELECT_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
193299    switch (devinfo->gen) {
193305       if (devinfo->is_haswell) {
193313       if (devinfo->is_g4x) {
193340 PIPELINE_SELECT_CommandSubType_bits(const struct gen_device_info *devinfo)
193342    switch (devinfo->gen) {
193348       if (devinfo->is_haswell) {
193356       if (devinfo->is_g4x) {
193380 PIPELINE_SELECT_CommandSubType_start(const struct gen_device_info *devinfo)
193382    switch (devinfo->gen) {
193388       if (devinfo->is_haswell) {
193396       if (devinfo->is_g4x) {
193423 PIPELINE_SELECT_CommandType_bits(const struct gen_device_info *devinfo)
193425    switch (devinfo->gen) {
193431       if (devinfo->is_haswell) {
193439       if (devinfo->is_g4x) {
193463 PIPELINE_SELECT_CommandType_start(const struct gen_device_info *devinfo)
193465    switch (devinfo->gen) {
193471       if (devinfo->is_haswell) {
193479       if (devinfo->is_g4x) {
193499 PIPELINE_SELECT_ForceMediaAwake_bits(const struct gen_device_info *devinfo)
193501    switch (devinfo->gen) {
193507       if (devinfo->is_haswell) {
193515       if (devinfo->is_g4x) {
193532 PIPELINE_SELECT_ForceMediaAwake_start(const struct gen_device_info *devinfo)
193534    switch (devinfo->gen) {
193540       if (devinfo->is_haswell) {
193548       if (devinfo->is_g4x) {
193568 PIPELINE_SELECT_MaskBits_bits(const struct gen_device_info *devinfo)
193570    switch (devinfo->gen) {
193576       if (devinfo->is_haswell) {
193584       if (devinfo->is_g4x) {
193601 PIPELINE_SELECT_MaskBits_start(const struct gen_device_info *devinfo)
193603    switch (devinfo->gen) {
193609       if (devinfo->is_haswell) {
193617       if (devinfo->is_g4x) {
193637 PIPELINE_SELECT_MediaSamplerDOPClockGateEnable_bits(const struct gen_device_info *devinfo)
193639    switch (devinfo->gen) {
193645       if (devinfo->is_haswell) {
193653       if (devinfo->is_g4x) {
193670 PIPELINE_SELECT_MediaSamplerDOPClockGateEnable_start(const struct gen_device_info *devinfo)
193672    switch (devinfo->gen) {
193678       if (devinfo->is_haswell) {
193686       if (devinfo->is_g4x) {
193713 PIPELINE_SELECT_PipelineSelection_bits(const struct gen_device_info *devinfo)
193715    switch (devinfo->gen) {
193721       if (devinfo->is_haswell) {
193729       if (devinfo->is_g4x) {
193753 PIPELINE_SELECT_PipelineSelection_start(const struct gen_device_info *devinfo)
193755    switch (devinfo->gen) {
193761       if (devinfo->is_haswell) {
193769       if (devinfo->is_g4x) {
193796 PIPE_CONTROL_length(const struct gen_device_info *devinfo)
193798    switch (devinfo->gen) {
193804       if (devinfo->is_haswell) {
193812       if (devinfo->is_g4x) {
193839 PIPE_CONTROL_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
193841    switch (devinfo->gen) {
193847       if (devinfo->is_haswell) {
193855       if (devinfo->is_g4x) {
193879 PIPE_CONTROL_3DCommandOpcode_start(const struct gen_device_info *devinfo)
193881    switch (devinfo->gen) {
193887       if (devinfo->is_haswell) {
193895       if (devinfo->is_g4x) {
193922 PIPE_CONTROL_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
193924    switch (devinfo->gen) {
193930       if (devinfo->is_haswell) {
193938       if (devinfo->is_g4x) {
193962 PIPE_CONTROL_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
193964    switch (devinfo->gen) {
193970       if (devinfo->is_haswell) {
193978       if (devinfo->is_g4x) {
194005 PIPE_CONTROL_Address_bits(const struct gen_device_info *devinfo)
194007    switch (devinfo->gen) {
194013       if (devinfo->is_haswell) {
194021       if (devinfo->is_g4x) {
194045 PIPE_CONTROL_Address_start(const struct gen_device_info *devinfo)
194047    switch (devinfo->gen) {
194053       if (devinfo->is_haswell) {
194061       if (devinfo->is_g4x) {
194085 PIPE_CONTROL_CommandStreamerStallEnable_bits(const struct gen_device_info *devinfo)
194087    switch (devinfo->gen) {
194093       if (devinfo->is_haswell) {
194101       if (devinfo->is_g4x) {
194122 PIPE_CONTROL_CommandStreamerStallEnable_start(const struct gen_device_info *devinfo)
194124    switch (devinfo->gen) {
194130       if (devinfo->is_haswell) {
194138       if (devinfo->is_g4x) {
194165 PIPE_CONTROL_CommandSubType_bits(const struct gen_device_info *devinfo)
194167    switch (devinfo->gen) {
194173       if (devinfo->is_haswell) {
194181       if (devinfo->is_g4x) {
194205 PIPE_CONTROL_CommandSubType_start(const struct gen_device_info *devinfo)
194207    switch (devinfo->gen) {
194213       if (devinfo->is_haswell) {
194221       if (devinfo->is_g4x) {
194248 PIPE_CONTROL_CommandType_bits(const struct gen_device_info *devinfo)
194250    switch (devinfo->gen) {
194256       if (devinfo->is_haswell) {
194264       if (devinfo->is_g4x) {
194288 PIPE_CONTROL_CommandType_start(const struct gen_device_info *devinfo)
194290    switch (devinfo->gen) {
194296       if (devinfo->is_haswell) {
194304       if (devinfo->is_g4x) {
194328 PIPE_CONTROL_ConstantCacheInvalidationEnable_bits(const struct gen_device_info *devinfo)
194330    switch (devinfo->gen) {
194336       if (devinfo->is_haswell) {
194344       if (devinfo->is_g4x) {
194365 PIPE_CONTROL_ConstantCacheInvalidationEnable_start(const struct gen_device_info *devinfo)
194367    switch (devinfo->gen) {
194373       if (devinfo->is_haswell) {
194381       if (devinfo->is_g4x) {
194404 PIPE_CONTROL_DCFlushEnable_bits(const struct gen_device_info *devinfo)
194406    switch (devinfo->gen) {
194412       if (devinfo->is_haswell) {
194420       if (devinfo->is_g4x) {
194440 PIPE_CONTROL_DCFlushEnable_start(const struct gen_device_info *devinfo)
194442    switch (devinfo->gen) {
194448       if (devinfo->is_haswell) {
194456       if (devinfo->is_g4x) {
194483 PIPE_CONTROL_DWordLength_bits(const struct gen_device_info *devinfo)
194485    switch (devinfo->gen) {
194491       if (devinfo->is_haswell) {
194499       if (devinfo->is_g4x) {
194523 PIPE_CONTROL_DWordLength_start(const struct gen_device_info *devinfo)
194525    switch (devinfo->gen) {
194531       if (devinfo->is_haswell) {
194539       if (devinfo->is_g4x) {
194563 PIPE_CONTROL_DepthCacheFlushEnable_bits(const struct gen_device_info *devinfo)
194565    switch (devinfo->gen) {
194571       if (devinfo->is_haswell) {
194579       if (devinfo->is_g4x) {
194600 PIPE_CONTROL_DepthCacheFlushEnable_start(const struct gen_device_info *devinfo)
194602    switch (devinfo->gen) {
194608       if (devinfo->is_haswell) {
194616       if (devinfo->is_g4x) {
194634 PIPE_CONTROL_DepthCacheFlushInhibit_bits(const struct gen_device_info *devinfo)
194636    switch (devinfo->gen) {
194642       if (devinfo->is_haswell) {
194650       if (devinfo->is_g4x) {
194665 PIPE_CONTROL_DepthCacheFlushInhibit_start(const struct gen_device_info *devinfo)
194667    switch (devinfo->gen) {
194673       if (devinfo->is_haswell) {
194681       if (devinfo->is_g4x) {
194708 PIPE_CONTROL_DepthStallEnable_bits(const struct gen_device_info *devinfo)
194710    switch (devinfo->gen) {
194716       if (devinfo->is_haswell) {
194724       if (devinfo->is_g4x) {
194748 PIPE_CONTROL_DepthStallEnable_start(const struct gen_device_info *devinfo)
194750    switch (devinfo->gen) {
194756       if (devinfo->is_haswell) {
194764       if (devinfo->is_g4x) {
194791 PIPE_CONTROL_DestinationAddressType_bits(const struct gen_device_info *devinfo)
194793    switch (devinfo->gen) {
194799       if (devinfo->is_haswell) {
194807       if (devinfo->is_g4x) {
194831 PIPE_CONTROL_DestinationAddressType_start(const struct gen_device_info *devinfo)
194833    switch (devinfo->gen) {
194839       if (devinfo->is_haswell) {
194847       if (devinfo->is_g4x) {
194867 PIPE_CONTROL_FlushLLC_bits(const struct gen_device_info *devinfo)
194869    switch (devinfo->gen) {
194875       if (devinfo->is_haswell) {
194883       if (devinfo->is_g4x) {
194900 PIPE_CONTROL_FlushLLC_start(const struct gen_device_info *devinfo)
194902    switch (devinfo->gen) {
194908       if (devinfo->is_haswell) {
194916       if (devinfo->is_g4x) {
194940 PIPE_CONTROL_GenericMediaStateClear_bits(const struct gen_device_info *devinfo)
194942    switch (devinfo->gen) {
194948       if (devinfo->is_haswell) {
194956       if (devinfo->is_g4x) {
194977 PIPE_CONTROL_GenericMediaStateClear_start(const struct gen_device_info *devinfo)
194979    switch (devinfo->gen) {
194985       if (devinfo->is_haswell) {
194993       if (devinfo->is_g4x) {
195017 PIPE_CONTROL_GlobalSnapshotCountReset_bits(const struct gen_device_info *devinfo)
195019    switch (devinfo->gen) {
195025       if (devinfo->is_haswell) {
195033       if (devinfo->is_g4x) {
195054 PIPE_CONTROL_GlobalSnapshotCountReset_start(const struct gen_device_info *devinfo)
195056    switch (devinfo->gen) {
195062       if (devinfo->is_haswell) {
195070       if (devinfo->is_g4x) {
195097 PIPE_CONTROL_ImmediateData_bits(const struct gen_device_info *devinfo)
195099    switch (devinfo->gen) {
195105       if (devinfo->is_haswell) {
195113       if (devinfo->is_g4x) {
195137 PIPE_CONTROL_ImmediateData_start(const struct gen_device_info *devinfo)
195139    switch (devinfo->gen) {
195145       if (devinfo->is_haswell) {
195153       if (devinfo->is_g4x) {
195179 PIPE_CONTROL_IndirectStatePointersDisable_bits(const struct gen_device_info *devinfo)
195181    switch (devinfo->gen) {
195187       if (devinfo->is_haswell) {
195195       if (devinfo->is_g4x) {
195218 PIPE_CONTROL_IndirectStatePointersDisable_start(const struct gen_device_info *devinfo)
195220    switch (devinfo->gen) {
195226       if (devinfo->is_haswell) {
195234       if (devinfo->is_g4x) {
195261 PIPE_CONTROL_InstructionCacheInvalidateEnable_bits(const struct gen_device_info *devinfo)
195263    switch (devinfo->gen) {
195269       if (devinfo->is_haswell) {
195277       if (devinfo->is_g4x) {
195301 PIPE_CONTROL_InstructionCacheInvalidateEnable_start(const struct gen_device_info *devinfo)
195303    switch (devinfo->gen) {
195309       if (devinfo->is_haswell) {
195317       if (devinfo->is_g4x) {
195340 PIPE_CONTROL_LRIPostSyncOperation_bits(const struct gen_device_info *devinfo)
195342    switch (devinfo->gen) {
195348       if (devinfo->is_haswell) {
195356       if (devinfo->is_g4x) {
195376 PIPE_CONTROL_LRIPostSyncOperation_start(const struct gen_device_info *devinfo)
195378    switch (devinfo->gen) {
195384       if (devinfo->is_haswell) {
195392       if (devinfo->is_g4x) {
195419 PIPE_CONTROL_NotifyEnable_bits(const struct gen_device_info *devinfo)
195421    switch (devinfo->gen) {
195427       if (devinfo->is_haswell) {
195435       if (devinfo->is_g4x) {
195459 PIPE_CONTROL_NotifyEnable_start(const struct gen_device_info *devinfo)
195461    switch (devinfo->gen) {
195467       if (devinfo->is_haswell) {
195475       if (devinfo->is_g4x) {
195494 PIPE_CONTROL_PSDSyncEnable_bits(const struct gen_device_info *devinfo)
195496    switch (devinfo->gen) {
195502       if (devinfo->is_haswell) {
195510       if (devinfo->is_g4x) {
195526 PIPE_CONTROL_PSDSyncEnable_start(const struct gen_device_info *devinfo)
195528    switch (devinfo->gen) {
195534       if (devinfo->is_haswell) {
195542       if (devinfo->is_g4x) {
195565 PIPE_CONTROL_PipeControlFlushEnable_bits(const struct gen_device_info *devinfo)
195567    switch (devinfo->gen) {
195573       if (devinfo->is_haswell) {
195581       if (devinfo->is_g4x) {
195601 PIPE_CONTROL_PipeControlFlushEnable_start(const struct gen_device_info *devinfo)
195603    switch (devinfo->gen) {
195609       if (devinfo->is_haswell) {
195617       if (devinfo->is_g4x) {
195644 PIPE_CONTROL_PostSyncOperation_bits(const struct gen_device_info *devinfo)
195646    switch (devinfo->gen) {
195652       if (devinfo->is_haswell) {
195660       if (devinfo->is_g4x) {
195684 PIPE_CONTROL_PostSyncOperation_start(const struct gen_device_info *devinfo)
195686    switch (devinfo->gen) {
195692       if (devinfo->is_haswell) {
195700       if (devinfo->is_g4x) {
195724 PIPE_CONTROL_RenderTargetCacheFlushEnable_bits(const struct gen_device_info *devinfo)
195726    switch (devinfo->gen) {
195732       if (devinfo->is_haswell) {
195740       if (devinfo->is_g4x) {
195761 PIPE_CONTROL_RenderTargetCacheFlushEnable_start(const struct gen_device_info *devinfo)
195763    switch (devinfo->gen) {
195769       if (devinfo->is_haswell) {
195777       if (devinfo->is_g4x) {
195802 PIPE_CONTROL_StallAtPixelScoreboard_bits(const struct gen_device_info *devinfo)
195804    switch (devinfo->gen) {
195810       if (devinfo->is_haswell) {
195818       if (devinfo->is_g4x) {
195840 PIPE_CONTROL_StallAtPixelScoreboard_start(const struct gen_device_info *devinfo)
195842    switch (devinfo->gen) {
195848       if (devinfo->is_haswell) {
195856       if (devinfo->is_g4x) {
195880 PIPE_CONTROL_StateCacheInvalidationEnable_bits(const struct gen_device_info *devinfo)
195882    switch (devinfo->gen) {
195888       if (devinfo->is_haswell) {
195896       if (devinfo->is_g4x) {
195917 PIPE_CONTROL_StateCacheInvalidationEnable_start(const struct gen_device_info *devinfo)
195919    switch (devinfo->gen) {
195925       if (devinfo->is_haswell) {
195933       if (devinfo->is_g4x) {
195957 PIPE_CONTROL_StoreDataIndex_bits(const struct gen_device_info *devinfo)
195959    switch (devinfo->gen) {
195965       if (devinfo->is_haswell) {
195973       if (devinfo->is_g4x) {
195994 PIPE_CONTROL_StoreDataIndex_start(const struct gen_device_info *devinfo)
195996    switch (devinfo->gen) {
196002       if (devinfo->is_haswell) {
196010       if (devinfo->is_g4x) {
196028 PIPE_CONTROL_SynchronizeGFDTSurface_bits(const struct gen_device_info *devinfo)
196030    switch (devinfo->gen) {
196036       if (devinfo->is_haswell) {
196044       if (devinfo->is_g4x) {
196059 PIPE_CONTROL_SynchronizeGFDTSurface_start(const struct gen_device_info *devinfo)
196061    switch (devinfo->gen) {
196067       if (devinfo->is_haswell) {
196075       if (devinfo->is_g4x) {
196099 PIPE_CONTROL_TLBInvalidate_bits(const struct gen_device_info *devinfo)
196101    switch (devinfo->gen) {
196107       if (devinfo->is_haswell) {
196115       if (devinfo->is_g4x) {
196136 PIPE_CONTROL_TLBInvalidate_start(const struct gen_device_info *devinfo)
196138    switch (devinfo->gen) {
196144       if (devinfo->is_haswell) {
196152       if (devinfo->is_g4x) {
196171 PIPE_CONTROL_TextureCacheFlushEnable_bits(const struct gen_device_info *devinfo)
196173    switch (devinfo->gen) {
196179       if (devinfo->is_haswell) {
196187       if (devinfo->is_g4x) {
196203 PIPE_CONTROL_TextureCacheFlushEnable_start(const struct gen_device_info *devinfo)
196205    switch (devinfo->gen) {
196211       if (devinfo->is_haswell) {
196219       if (devinfo->is_g4x) {
196243 PIPE_CONTROL_TextureCacheInvalidationEnable_bits(const struct gen_device_info *devinfo)
196245    switch (devinfo->gen) {
196251       if (devinfo->is_haswell) {
196259       if (devinfo->is_g4x) {
196280 PIPE_CONTROL_TextureCacheInvalidationEnable_start(const struct gen_device_info *devinfo)
196282    switch (devinfo->gen) {
196288       if (devinfo->is_haswell) {
196296       if (devinfo->is_g4x) {
196320 PIPE_CONTROL_VFCacheInvalidationEnable_bits(const struct gen_device_info *devinfo)
196322    switch (devinfo->gen) {
196328       if (devinfo->is_haswell) {
196336       if (devinfo->is_g4x) {
196357 PIPE_CONTROL_VFCacheInvalidationEnable_start(const struct gen_device_info *devinfo)
196359    switch (devinfo->gen) {
196365       if (devinfo->is_haswell) {
196373       if (devinfo->is_g4x) {
196393 PIPE_CONTROL_WriteCacheFlush_bits(const struct gen_device_info *devinfo)
196395    switch (devinfo->gen) {
196401       if (devinfo->is_haswell) {
196409       if (devinfo->is_g4x) {
196426 PIPE_CONTROL_WriteCacheFlush_start(const struct gen_device_info *devinfo)
196428    switch (devinfo->gen) {
196434       if (devinfo->is_haswell) {
196442       if (devinfo->is_g4x) {
196465 PS_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
196467    switch (devinfo->gen) {
196473       if (devinfo->is_haswell) {
196481       if (devinfo->is_g4x) {
196504 PS_INVOCATION_COUNT_PSInvocationCountReport_bits(const struct gen_device_info *devinfo)
196506    switch (devinfo->gen) {
196512       if (devinfo->is_haswell) {
196520       if (devinfo->is_g4x) {
196540 PS_INVOCATION_COUNT_PSInvocationCountReport_start(const struct gen_device_info *devinfo)
196542    switch (devinfo->gen) {
196548       if (devinfo->is_haswell) {
196556       if (devinfo->is_g4x) {
196576 RCS_FAULT_REG_length(const struct gen_device_info *devinfo)
196578    switch (devinfo->gen) {
196584       if (devinfo->is_haswell) {
196592       if (devinfo->is_g4x) {
196612 RCS_FAULT_REG_FaultType_bits(const struct gen_device_info *devinfo)
196614    switch (devinfo->gen) {
196620       if (devinfo->is_haswell) {
196628       if (devinfo->is_g4x) {
196645 RCS_FAULT_REG_FaultType_start(const struct gen_device_info *devinfo)
196647    switch (devinfo->gen) {
196653       if (devinfo->is_haswell) {
196661       if (devinfo->is_g4x) {
196681 RCS_FAULT_REG_GTTSEL_bits(const struct gen_device_info *devinfo)
196683    switch (devinfo->gen) {
196689       if (devinfo->is_haswell) {
196697       if (devinfo->is_g4x) {
196714 RCS_FAULT_REG_GTTSEL_start(const struct gen_device_info *devinfo)
196716    switch (devinfo->gen) {
196722       if (devinfo->is_haswell) {
196730       if (devinfo->is_g4x) {
196750 RCS_FAULT_REG_SRCIDofFault_bits(const struct gen_device_info *devinfo)
196752    switch (devinfo->gen) {
196758       if (devinfo->is_haswell) {
196766       if (devinfo->is_g4x) {
196783 RCS_FAULT_REG_SRCIDofFault_start(const struct gen_device_info *devinfo)
196785    switch (devinfo->gen) {
196791       if (devinfo->is_haswell) {
196799       if (devinfo->is_g4x) {
196819 RCS_FAULT_REG_ValidBit_bits(const struct gen_device_info *devinfo)
196821    switch (devinfo->gen) {
196827       if (devinfo->is_haswell) {
196835       if (devinfo->is_g4x) {
196852 RCS_FAULT_REG_ValidBit_start(const struct gen_device_info *devinfo)
196854    switch (devinfo->gen) {
196860       if (devinfo->is_haswell) {
196868       if (devinfo->is_g4x) {
196888 RCS_FAULT_REG_VirtualAddressofFault_bits(const struct gen_device_info *devinfo)
196890    switch (devinfo->gen) {
196896       if (devinfo->is_haswell) {
196904       if (devinfo->is_g4x) {
196921 RCS_FAULT_REG_VirtualAddressofFault_start(const struct gen_device_info *devinfo)
196923    switch (devinfo->gen) {
196929       if (devinfo->is_haswell) {
196937       if (devinfo->is_g4x) {
196959 RCS_RING_BUFFER_CTL_length(const struct gen_device_info *devinfo)
196961    switch (devinfo->gen) {
196967       if (devinfo->is_haswell) {
196975       if (devinfo->is_g4x) {
196997 RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits(const struct gen_device_info *devinfo)
196999    switch (devinfo->gen) {
197005       if (devinfo->is_haswell) {
197013       if (devinfo->is_g4x) {
197032 RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start(const struct gen_device_info *devinfo)
197034    switch (devinfo->gen) {
197040       if (devinfo->is_haswell) {
197048       if (devinfo->is_g4x) {
197070 RCS_RING_BUFFER_CTL_BufferLengthinpages1_bits(const struct gen_device_info *devinfo)
197072    switch (devinfo->gen) {
197078       if (devinfo->is_haswell) {
197086       if (devinfo->is_g4x) {
197105 RCS_RING_BUFFER_CTL_BufferLengthinpages1_start(const struct gen_device_info *devinfo)
197107    switch (devinfo->gen) {
197113       if (devinfo->is_haswell) {
197121       if (devinfo->is_g4x) {
197143 RCS_RING_BUFFER_CTL_RBWait_bits(const struct gen_device_info *devinfo)
197145    switch (devinfo->gen) {
197151       if (devinfo->is_haswell) {
197159       if (devinfo->is_g4x) {
197178 RCS_RING_BUFFER_CTL_RBWait_start(const struct gen_device_info *devinfo)
197180    switch (devinfo->gen) {
197186       if (devinfo->is_haswell) {
197194       if (devinfo->is_g4x) {
197216 RCS_RING_BUFFER_CTL_RingBufferEnable_bits(const struct gen_device_info *devinfo)
197218    switch (devinfo->gen) {
197224       if (devinfo->is_haswell) {
197232       if (devinfo->is_g4x) {
197251 RCS_RING_BUFFER_CTL_RingBufferEnable_start(const struct gen_device_info *devinfo)
197253    switch (devinfo->gen) {
197259       if (devinfo->is_haswell) {
197267       if (devinfo->is_g4x) {
197289 RCS_RING_BUFFER_CTL_SemaphoreWait_bits(const struct gen_device_info *devinfo)
197291    switch (devinfo->gen) {
197297       if (devinfo->is_haswell) {
197305       if (devinfo->is_g4x) {
197324 RCS_RING_BUFFER_CTL_SemaphoreWait_start(const struct gen_device_info *devinfo)
197326    switch (devinfo->gen) {
197332       if (devinfo->is_haswell) {
197340       if (devinfo->is_g4x) {
197367 RENDER_SURFACE_STATE_length(const struct gen_device_info *devinfo)
197369    switch (devinfo->gen) {
197375       if (devinfo->is_haswell) {
197383       if (devinfo->is_g4x) {
197406 RENDER_SURFACE_STATE_AlphaClearColor_bits(const struct gen_device_info *devinfo)
197408    switch (devinfo->gen) {
197414       if (devinfo->is_haswell) {
197422       if (devinfo->is_g4x) {
197442 RENDER_SURFACE_STATE_AlphaClearColor_start(const struct gen_device_info *devinfo)
197444    switch (devinfo->gen) {
197450       if (devinfo->is_haswell) {
197458       if (devinfo->is_g4x) {
197477 RENDER_SURFACE_STATE_AppendCounterAddress_bits(const struct gen_device_info *devinfo)
197479    switch (devinfo->gen) {
197485       if (devinfo->is_haswell) {
197493       if (devinfo->is_g4x) {
197509 RENDER_SURFACE_STATE_AppendCounterAddress_start(const struct gen_device_info *devinfo)
197511    switch (devinfo->gen) {
197517       if (devinfo->is_haswell) {
197525       if (devinfo->is_g4x) {
197544 RENDER_SURFACE_STATE_AppendCounterEnable_bits(const struct gen_device_info *devinfo)
197546    switch (devinfo->gen) {
197552       if (devinfo->is_haswell) {
197560       if (devinfo->is_g4x) {
197576 RENDER_SURFACE_STATE_AppendCounterEnable_start(const struct gen_device_info *devinfo)
197578    switch (devinfo->gen) {
197584       if (devinfo->is_haswell) {
197592       if (devinfo->is_g4x) {
197615 RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_bits(const struct gen_device_info *devinfo)
197617    switch (devinfo->gen) {
197623       if (devinfo->is_haswell) {
197631       if (devinfo->is_g4x) {
197651 RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_start(const struct gen_device_info *devinfo)
197653    switch (devinfo->gen) {
197659       if (devinfo->is_haswell) {
197667       if (devinfo->is_g4x) {
197688 RENDER_SURFACE_STATE_AuxiliarySurfaceMode_bits(const struct gen_device_info *devinfo)
197690    switch (devinfo->gen) {
197696       if (devinfo->is_haswell) {
197704       if (devinfo->is_g4x) {
197722 RENDER_SURFACE_STATE_AuxiliarySurfaceMode_start(const struct gen_device_info *devinfo)
197724    switch (devinfo->gen) {
197730       if (devinfo->is_haswell) {
197738       if (devinfo->is_g4x) {
197761 RENDER_SURFACE_STATE_AuxiliarySurfacePitch_bits(const struct gen_device_info *devinfo)
197763    switch (devinfo->gen) {
197769       if (devinfo->is_haswell) {
197777       if (devinfo->is_g4x) {
197797 RENDER_SURFACE_STATE_AuxiliarySurfacePitch_start(const struct gen_device_info *devinfo)
197799    switch (devinfo->gen) {
197805       if (devinfo->is_haswell) {
197813       if (devinfo->is_g4x) {
197834 RENDER_SURFACE_STATE_AuxiliarySurfaceQPitch_bits(const struct gen_device_info *devinfo)
197836    switch (devinfo->gen) {
197842       if (devinfo->is_haswell) {
197850       if (devinfo->is_g4x) {
197868 RENDER_SURFACE_STATE_AuxiliarySurfaceQPitch_start(const struct gen_device_info *devinfo)
197870    switch (devinfo->gen) {
197876       if (devinfo->is_haswell) {
197884       if (devinfo->is_g4x) {
197905 RENDER_SURFACE_STATE_AuxiliaryTableIndexforMediaCompressedSurface_bits(const struct gen_device_info *devinfo)
197907    switch (devinfo->gen) {
197913       if (devinfo->is_haswell) {
197921       if (devinfo->is_g4x) {
197939 RENDER_SURFACE_STATE_AuxiliaryTableIndexforMediaCompressedSurface_start(const struct gen_device_info *devinfo)
197941    switch (devinfo->gen) {
197947       if (devinfo->is_haswell) {
197955       if (devinfo->is_g4x) {
197976 RENDER_SURFACE_STATE_BaseMipLevel_bits(const struct gen_device_info *devinfo)
197978    switch (devinfo->gen) {
197984       if (devinfo->is_haswell) {
197992       if (devinfo->is_g4x) {
198010 RENDER_SURFACE_STATE_BaseMipLevel_start(const struct gen_device_info *devinfo)
198012    switch (devinfo->gen) {
198018       if (devinfo->is_haswell) {
198026       if (devinfo->is_g4x) {
198049 RENDER_SURFACE_STATE_BlueClearColor_bits(const struct gen_device_info *devinfo)
198051    switch (devinfo->gen) {
198057       if (devinfo->is_haswell) {
198065       if (devinfo->is_g4x) {
198085 RENDER_SURFACE_STATE_BlueClearColor_start(const struct gen_device_info *devinfo)
198087    switch (devinfo->gen) {
198093       if (devinfo->is_haswell) {
198101       if (devinfo->is_g4x) {
198119 RENDER_SURFACE_STATE_ClearColorConversionEnable_bits(const struct gen_device_info *devinfo)
198121    switch (devinfo->gen) {
198127       if (devinfo->is_haswell) {
198135       if (devinfo->is_g4x) {
198150 RENDER_SURFACE_STATE_ClearColorConversionEnable_start(const struct gen_device_info *devinfo)
198152    switch (devinfo->gen) {
198158       if (devinfo->is_haswell) {
198166       if (devinfo->is_g4x) {
198185 RENDER_SURFACE_STATE_ClearValueAddress_bits(const struct gen_device_info *devinfo)
198187    switch (devinfo->gen) {
198193       if (devinfo->is_haswell) {
198201       if (devinfo->is_g4x) {
198217 RENDER_SURFACE_STATE_ClearValueAddress_start(const struct gen_device_info *devinfo)
198219    switch (devinfo->gen) {
198225       if (devinfo->is_haswell) {
198233       if (devinfo->is_g4x) {
198252 RENDER_SURFACE_STATE_ClearValueAddressEnable_bits(const struct gen_device_info *devinfo)
198254    switch (devinfo->gen) {
198260       if (devinfo->is_haswell) {
198268       if (devinfo->is_g4x) {
198284 RENDER_SURFACE_STATE_ClearValueAddressEnable_start(const struct gen_device_info *devinfo)
198286    switch (devinfo->gen) {
198292       if (devinfo->is_haswell) {
198300       if (devinfo->is_g4x) {
198321 RENDER_SURFACE_STATE_CoherencyType_bits(const struct gen_device_info *devinfo)
198323    switch (devinfo->gen) {
198329       if (devinfo->is_haswell) {
198337       if (devinfo->is_g4x) {
198355 RENDER_SURFACE_STATE_CoherencyType_start(const struct gen_device_info *devinfo)
198357    switch (devinfo->gen) {
198363       if (devinfo->is_haswell) {
198371       if (devinfo->is_g4x) {
198391 RENDER_SURFACE_STATE_ColorBlendEnable_bits(const struct gen_device_info *devinfo)
198393    switch (devinfo->gen) {
198399       if (devinfo->is_haswell) {
198407       if (devinfo->is_g4x) {
198424 RENDER_SURFACE_STATE_ColorBlendEnable_start(const struct gen_device_info *devinfo)
198426    switch (devinfo->gen) {
198432       if (devinfo->is_haswell) {
198440       if (devinfo->is_g4x) {
198460 RENDER_SURFACE_STATE_ColorBufferComponentWriteDisables_bits(const struct gen_device_info *devinfo)
198462    switch (devinfo->gen) {
198468       if (devinfo->is_haswell) {
198476       if (devinfo->is_g4x) {
198493 RENDER_SURFACE_STATE_ColorBufferComponentWriteDisables_start(const struct gen_device_info *devinfo)
198495    switch (devinfo->gen) {
198501       if (devinfo->is_haswell) {
198509       if (devinfo->is_g4x) {
198536 RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_bits(const struct gen_device_info *devinfo)
198538    switch (devinfo->gen) {
198544       if (devinfo->is_haswell) {
198552       if (devinfo->is_g4x) {
198576 RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_start(const struct gen_device_info *devinfo)
198578    switch (devinfo->gen) {
198584       if (devinfo->is_haswell) {
198592       if (devinfo->is_g4x) {
198619 RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_bits(const struct gen_device_info *devinfo)
198621    switch (devinfo->gen) {
198627       if (devinfo->is_haswell) {
198635       if (devinfo->is_g4x) {
198659 RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_start(const struct gen_device_info *devinfo)
198661    switch (devinfo->gen) {
198667       if (devinfo->is_haswell) {
198675       if (devinfo->is_g4x) {
198702 RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_bits(const struct gen_device_info *devinfo)
198704    switch (devinfo->gen) {
198710       if (devinfo->is_haswell) {
198718       if (devinfo->is_g4x) {
198742 RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_start(const struct gen_device_info *devinfo)
198744    switch (devinfo->gen) {
198750       if (devinfo->is_haswell) {
198758       if (devinfo->is_g4x) {
198785 RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_bits(const struct gen_device_info *devinfo)
198787    switch (devinfo->gen) {
198793       if (devinfo->is_haswell) {
198801       if (devinfo->is_g4x) {
198825 RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_start(const struct gen_device_info *devinfo)
198827    switch (devinfo->gen) {
198833       if (devinfo->is_haswell) {
198841       if (devinfo->is_g4x) {
198868 RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_bits(const struct gen_device_info *devinfo)
198870    switch (devinfo->gen) {
198876       if (devinfo->is_haswell) {
198884       if (devinfo->is_g4x) {
198908 RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_start(const struct gen_device_info *devinfo)
198910    switch (devinfo->gen) {
198916       if (devinfo->is_haswell) {
198924       if (devinfo->is_g4x) {
198951 RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_bits(const struct gen_device_info *devinfo)
198953    switch (devinfo->gen) {
198959       if (devinfo->is_haswell) {
198967       if (devinfo->is_g4x) {
198991 RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_start(const struct gen_device_info *devinfo)
198993    switch (devinfo->gen) {
198999       if (devinfo->is_haswell) {
199007       if (devinfo->is_g4x) {
199026 RENDER_SURFACE_STATE_CubeMapCornerMode_bits(const struct gen_device_info *devinfo)
199028    switch (devinfo->gen) {
199034       if (devinfo->is_haswell) {
199042       if (devinfo->is_g4x) {
199058 RENDER_SURFACE_STATE_CubeMapCornerMode_start(const struct gen_device_info *devinfo)
199060    switch (devinfo->gen) {
199066       if (devinfo->is_haswell) {
199074       if (devinfo->is_g4x) {
199095 RENDER_SURFACE_STATE_DataReturnFormat_bits(const struct gen_device_info *devinfo)
199097    switch (devinfo->gen) {
199103       if (devinfo->is_haswell) {
199111       if (devinfo->is_g4x) {
199129 RENDER_SURFACE_STATE_DataReturnFormat_start(const struct gen_device_info *devinfo)
199131    switch (devinfo->gen) {
199137       if (devinfo->is_haswell) {
199145       if (devinfo->is_g4x) {
199172 RENDER_SURFACE_STATE_Depth_bits(const struct gen_device_info *devinfo)
199174    switch (devinfo->gen) {
199180       if (devinfo->is_haswell) {
199188       if (devinfo->is_g4x) {
199212 RENDER_SURFACE_STATE_Depth_start(const struct gen_device_info *devinfo)
199214    switch (devinfo->gen) {
199220       if (devinfo->is_haswell) {
199228       if (devinfo->is_g4x) {
199249 RENDER_SURFACE_STATE_EWADisableForCube_bits(const struct gen_device_info *devinfo)
199251    switch (devinfo->gen) {
199257       if (devinfo->is_haswell) {
199265       if (devinfo->is_g4x) {
199283 RENDER_SURFACE_STATE_EWADisableForCube_start(const struct gen_device_info *devinfo)
199285    switch (devinfo->gen) {
199291       if (devinfo->is_haswell) {
199299       if (devinfo->is_g4x) {
199318 RENDER_SURFACE_STATE_ForceNonComparisonReductionType_bits(const struct gen_device_info *devinfo)
199320    switch (devinfo->gen) {
199326       if (devinfo->is_haswell) {
199334       if (devinfo->is_g4x) {
199350 RENDER_SURFACE_STATE_ForceNonComparisonReductionType_start(const struct gen_device_info *devinfo)
199352    switch (devinfo->gen) {
199358       if (devinfo->is_haswell) {
199366       if (devinfo->is_g4x) {
199389 RENDER_SURFACE_STATE_GreenClearColor_bits(const struct gen_device_info *devinfo)
199391    switch (devinfo->gen) {
199397       if (devinfo->is_haswell) {
199405       if (devinfo->is_g4x) {
199425 RENDER_SURFACE_STATE_GreenClearColor_start(const struct gen_device_info *devinfo)
199427    switch (devinfo->gen) {
199433       if (devinfo->is_haswell) {
199441       if (devinfo->is_g4x) {
199468 RENDER_SURFACE_STATE_Height_bits(const struct gen_device_info *devinfo)
199470    switch (devinfo->gen) {
199476       if (devinfo->is_haswell) {
199484       if (devinfo->is_g4x) {
199508 RENDER_SURFACE_STATE_Height_start(const struct gen_device_info *devinfo)
199510    switch (devinfo->gen) {
199516       if (devinfo->is_haswell) {
199524       if (devinfo->is_g4x) {
199542 RENDER_SURFACE_STATE_HierarchicalDepthClearValue_bits(const struct gen_device_info *devinfo)
199544    switch (devinfo->gen) {
199550       if (devinfo->is_haswell) {
199558       if (devinfo->is_g4x) {
199573 RENDER_SURFACE_STATE_HierarchicalDepthClearValue_start(const struct gen_device_info *devinfo)
199575    switch (devinfo->gen) {
199581       if (devinfo->is_haswell) {
199589       if (devinfo->is_g4x) {
199607 RENDER_SURFACE_STATE_IntegerSurfaceFormat_bits(const struct gen_device_info *devinfo)
199609    switch (devinfo->gen) {
199615       if (devinfo->is_haswell) {
199623       if (devinfo->is_g4x) {
199638 RENDER_SURFACE_STATE_IntegerSurfaceFormat_start(const struct gen_device_info *devinfo)
199640    switch (devinfo->gen) {
199646       if (devinfo->is_haswell) {
199654       if (devinfo->is_g4x) {
199673 RENDER_SURFACE_STATE_MCSEnable_bits(const struct gen_device_info *devinfo)
199675    switch (devinfo->gen) {
199681       if (devinfo->is_haswell) {
199689       if (devinfo->is_g4x) {
199705 RENDER_SURFACE_STATE_MCSEnable_start(const struct gen_device_info *devinfo)
199707    switch (devinfo->gen) {
199713       if (devinfo->is_haswell) {
199721       if (devinfo->is_g4x) {
199748 RENDER_SURFACE_STATE_MIPCountLOD_bits(const struct gen_device_info *devinfo)
199750    switch (devinfo->gen) {
199756       if (devinfo->is_haswell) {
199764       if (devinfo->is_g4x) {
199788 RENDER_SURFACE_STATE_MIPCountLOD_start(const struct gen_device_info *devinfo)
199790    switch (devinfo->gen) {
199796       if (devinfo->is_haswell) {
199804       if (devinfo->is_g4x) {
199825 RENDER_SURFACE_STATE_MIPMapLayoutMode_bits(const struct gen_device_info *devinfo)
199827    switch (devinfo->gen) {
199833       if (devinfo->is_haswell) {
199841       if (devinfo->is_g4x) {
199859 RENDER_SURFACE_STATE_MIPMapLayoutMode_start(const struct gen_device_info *devinfo)
199861    switch (devinfo->gen) {
199867       if (devinfo->is_haswell) {
199875       if (devinfo->is_g4x) {
199899 RENDER_SURFACE_STATE_MOCS_bits(const struct gen_device_info *devinfo)
199901    switch (devinfo->gen) {
199907       if (devinfo->is_haswell) {
199915       if (devinfo->is_g4x) {
199936 RENDER_SURFACE_STATE_MOCS_start(const struct gen_device_info *devinfo)
199938    switch (devinfo->gen) {
199944       if (devinfo->is_haswell) {
199952       if (devinfo->is_g4x) {
199979 RENDER_SURFACE_STATE_MediaBoundaryPixelMode_bits(const struct gen_device_info *devinfo)
199981    switch (devinfo->gen) {
199987       if (devinfo->is_haswell) {
199995       if (devinfo->is_g4x) {
200019 RENDER_SURFACE_STATE_MediaBoundaryPixelMode_start(const struct gen_device_info *devinfo)
200021    switch (devinfo->gen) {
200027       if (devinfo->is_haswell) {
200035       if (devinfo->is_g4x) {
200055 RENDER_SURFACE_STATE_MemoryCompressionEnable_bits(const struct gen_device_info *devinfo)
200057    switch (devinfo->gen) {
200063       if (devinfo->is_haswell) {
200071       if (devinfo->is_g4x) {
200088 RENDER_SURFACE_STATE_MemoryCompressionEnable_start(const struct gen_device_info *devinfo)
200090    switch (devinfo->gen) {
200096       if (devinfo->is_haswell) {
200104       if (devinfo->is_g4x) {
200124 RENDER_SURFACE_STATE_MemoryCompressionMode_bits(const struct gen_device_info *devinfo)
200126    switch (devinfo->gen) {
200132       if (devinfo->is_haswell) {
200140       if (devinfo->is_g4x) {
200157 RENDER_SURFACE_STATE_MemoryCompressionMode_start(const struct gen_device_info *devinfo)
200159    switch (devinfo->gen) {
200165       if (devinfo->is_haswell) {
200173       if (devinfo->is_g4x) {
200200 RENDER_SURFACE_STATE_MinimumArrayElement_bits(const struct gen_device_info *devinfo)
200202    switch (devinfo->gen) {
200208       if (devinfo->is_haswell) {
200216       if (devinfo->is_g4x) {
200240 RENDER_SURFACE_STATE_MinimumArrayElement_start(const struct gen_device_info *devinfo)
200242    switch (devinfo->gen) {
200248       if (devinfo->is_haswell) {
200256       if (devinfo->is_g4x) {
200276 RENDER_SURFACE_STATE_MipTailStartLOD_bits(const struct gen_device_info *devinfo)
200278    switch (devinfo->gen) {
200284       if (devinfo->is_haswell) {
200292       if (devinfo->is_g4x) {
200309 RENDER_SURFACE_STATE_MipTailStartLOD_start(const struct gen_device_info *devinfo)
200311    switch (devinfo->gen) {
200317       if (devinfo->is_haswell) {
200325       if (devinfo->is_g4x) {
200349 RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_bits(const struct gen_device_info *devinfo)
200351    switch (devinfo->gen) {
200357       if (devinfo->is_haswell) {
200365       if (devinfo->is_g4x) {
200386 RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_start(const struct gen_device_info *devinfo)
200388    switch (devinfo->gen) {
200394       if (devinfo->is_haswell) {
200402       if (devinfo->is_g4x) {
200425 RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_bits(const struct gen_device_info *devinfo)
200427    switch (devinfo->gen) {
200433       if (devinfo->is_haswell) {
200441       if (devinfo->is_g4x) {
200461 RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_start(const struct gen_device_info *devinfo)
200463    switch (devinfo->gen) {
200469       if (devinfo->is_haswell) {
200477       if (devinfo->is_g4x) {
200501 RENDER_SURFACE_STATE_NumberofMultisamples_bits(const struct gen_device_info *devinfo)
200503    switch (devinfo->gen) {
200509       if (devinfo->is_haswell) {
200517       if (devinfo->is_g4x) {
200538 RENDER_SURFACE_STATE_NumberofMultisamples_start(const struct gen_device_info *devinfo)
200540    switch (devinfo->gen) {
200546       if (devinfo->is_haswell) {
200554       if (devinfo->is_g4x) {
200574 RENDER_SURFACE_STATE_QuiltHeight_bits(const struct gen_device_info *devinfo)
200576    switch (devinfo->gen) {
200582       if (devinfo->is_haswell) {
200590       if (devinfo->is_g4x) {
200607 RENDER_SURFACE_STATE_QuiltHeight_start(const struct gen_device_info *devinfo)
200609    switch (devinfo->gen) {
200615       if (devinfo->is_haswell) {
200623       if (devinfo->is_g4x) {
200643 RENDER_SURFACE_STATE_QuiltWidth_bits(const struct gen_device_info *devinfo)
200645    switch (devinfo->gen) {
200651       if (devinfo->is_haswell) {
200659       if (devinfo->is_g4x) {
200676 RENDER_SURFACE_STATE_QuiltWidth_start(const struct gen_device_info *devinfo)
200678    switch (devinfo->gen) {
200684       if (devinfo->is_haswell) {
200692       if (devinfo->is_g4x) {
200715 RENDER_SURFACE_STATE_RedClearColor_bits(const struct gen_device_info *devinfo)
200717    switch (devinfo->gen) {
200723       if (devinfo->is_haswell) {
200731       if (devinfo->is_g4x) {
200751 RENDER_SURFACE_STATE_RedClearColor_start(const struct gen_device_info *devinfo)
200753    switch (devinfo->gen) {
200759       if (devinfo->is_haswell) {
200767       if (devinfo->is_g4x) {
200794 RENDER_SURFACE_STATE_RenderCacheReadWriteMode_bits(const struct gen_device_info *devinfo)
200796    switch (devinfo->gen) {
200802       if (devinfo->is_haswell) {
200810       if (devinfo->is_g4x) {
200834 RENDER_SURFACE_STATE_RenderCacheReadWriteMode_start(const struct gen_device_info *devinfo)
200836    switch (devinfo->gen) {
200842       if (devinfo->is_haswell) {
200850       if (devinfo->is_g4x) {
200871 RENDER_SURFACE_STATE_RenderTargetAndSampleUnormRotation_bits(const struct gen_device_info *devinfo)
200873    switch (devinfo->gen) {
200879       if (devinfo->is_haswell) {
200887       if (devinfo->is_g4x) {
200905 RENDER_SURFACE_STATE_RenderTargetAndSampleUnormRotation_start(const struct gen_device_info *devinfo)
200907    switch (devinfo->gen) {
200913       if (devinfo->is_haswell) {
200921       if (devinfo->is_g4x) {
200942 RENDER_SURFACE_STATE_RenderTargetRotation_bits(const struct gen_device_info *devinfo)
200944    switch (devinfo->gen) {
200950       if (devinfo->is_haswell) {
200958       if (devinfo->is_g4x) {
200976 RENDER_SURFACE_STATE_RenderTargetRotation_start(const struct gen_device_info *devinfo)
200978    switch (devinfo->gen) {
200984       if (devinfo->is_haswell) {
200992       if (devinfo->is_g4x) {
201019 RENDER_SURFACE_STATE_RenderTargetViewExtent_bits(const struct gen_device_info *devinfo)
201021    switch (devinfo->gen) {
201027       if (devinfo->is_haswell) {
201035       if (devinfo->is_g4x) {
201059 RENDER_SURFACE_STATE_RenderTargetViewExtent_start(const struct gen_device_info *devinfo)
201061    switch (devinfo->gen) {
201067       if (devinfo->is_haswell) {
201075       if (devinfo->is_g4x) {
201094 RENDER_SURFACE_STATE_ReservedMBZ_bits(const struct gen_device_info *devinfo)
201096    switch (devinfo->gen) {
201102       if (devinfo->is_haswell) {
201110       if (devinfo->is_g4x) {
201126 RENDER_SURFACE_STATE_ReservedMBZ_start(const struct gen_device_info *devinfo)
201128    switch (devinfo->gen) {
201134       if (devinfo->is_haswell) {
201142       if (devinfo->is_g4x) {
201165 RENDER_SURFACE_STATE_ResourceMinLOD_bits(const struct gen_device_info *devinfo)
201167    switch (devinfo->gen) {
201173       if (devinfo->is_haswell) {
201181       if (devinfo->is_g4x) {
201201 RENDER_SURFACE_STATE_ResourceMinLOD_start(const struct gen_device_info *devinfo)
201203    switch (devinfo->gen) {
201209       if (devinfo->is_haswell) {
201217       if (devinfo->is_g4x) {
201238 RENDER_SURFACE_STATE_SamplerL2BypassModeDisable_bits(const struct gen_device_info *devinfo)
201240    switch (devinfo->gen) {
201246       if (devinfo->is_haswell) {
201254       if (devinfo->is_g4x) {
201272 RENDER_SURFACE_STATE_SamplerL2BypassModeDisable_start(const struct gen_device_info *devinfo)
201274    switch (devinfo->gen) {
201280       if (devinfo->is_haswell) {
201288       if (devinfo->is_g4x) {
201309 RENDER_SURFACE_STATE_SeparateUVPlaneEnable_bits(const struct gen_device_info *devinfo)
201311    switch (devinfo->gen) {
201317       if (devinfo->is_haswell) {
201325       if (devinfo->is_g4x) {
201343 RENDER_SURFACE_STATE_SeparateUVPlaneEnable_start(const struct gen_device_info *devinfo)
201345    switch (devinfo->gen) {
201351       if (devinfo->is_haswell) {
201359       if (devinfo->is_g4x) {
201381 RENDER_SURFACE_STATE_ShaderChannelSelectAlpha_bits(const struct gen_device_info *devinfo)
201383    switch (devinfo->gen) {
201389       if (devinfo->is_haswell) {
201397       if (devinfo->is_g4x) {
201416 RENDER_SURFACE_STATE_ShaderChannelSelectAlpha_start(const struct gen_device_info *devinfo)
201418    switch (devinfo->gen) {
201424       if (devinfo->is_haswell) {
201432       if (devinfo->is_g4x) {
201454 RENDER_SURFACE_STATE_ShaderChannelSelectBlue_bits(const struct gen_device_info *devinfo)
201456    switch (devinfo->gen) {
201462       if (devinfo->is_haswell) {
201470       if (devinfo->is_g4x) {
201489 RENDER_SURFACE_STATE_ShaderChannelSelectBlue_start(const struct gen_device_info *devinfo)
201491    switch (devinfo->gen) {
201497       if (devinfo->is_haswell) {
201505       if (devinfo->is_g4x) {
201527 RENDER_SURFACE_STATE_ShaderChannelSelectGreen_bits(const struct gen_device_info *devinfo)
201529    switch (devinfo->gen) {
201535       if (devinfo->is_haswell) {
201543       if (devinfo->is_g4x) {
201562 RENDER_SURFACE_STATE_ShaderChannelSelectGreen_start(const struct gen_device_info *devinfo)
201564    switch (devinfo->gen) {
201570       if (devinfo->is_haswell) {
201578       if (devinfo->is_g4x) {
201600 RENDER_SURFACE_STATE_ShaderChannelSelectRed_bits(const struct gen_device_info *devinfo)
201602    switch (devinfo->gen) {
201608       if (devinfo->is_haswell) {
201616       if (devinfo->is_g4x) {
201635 RENDER_SURFACE_STATE_ShaderChannelSelectRed_start(const struct gen_device_info *devinfo)
201637    switch (devinfo->gen) {
201643       if (devinfo->is_haswell) {
201651       if (devinfo->is_g4x) {
201670 RENDER_SURFACE_STATE_StrbufMinimumArrayElement_bits(const struct gen_device_info *devinfo)
201672    switch (devinfo->gen) {
201678       if (devinfo->is_haswell) {
201686       if (devinfo->is_g4x) {
201702 RENDER_SURFACE_STATE_StrbufMinimumArrayElement_start(const struct gen_device_info *devinfo)
201704    switch (devinfo->gen) {
201710       if (devinfo->is_haswell) {
201718       if (devinfo->is_g4x) {
201741 RENDER_SURFACE_STATE_SurfaceArray_bits(const struct gen_device_info *devinfo)
201743    switch (devinfo->gen) {
201749       if (devinfo->is_haswell) {
201757       if (devinfo->is_g4x) {
201777 RENDER_SURFACE_STATE_SurfaceArray_start(const struct gen_device_info *devinfo)
201779    switch (devinfo->gen) {
201785       if (devinfo->is_haswell) {
201793       if (devinfo->is_g4x) {
201812 RENDER_SURFACE_STATE_SurfaceArraySpacing_bits(const struct gen_device_info *devinfo)
201814    switch (devinfo->gen) {
201820       if (devinfo->is_haswell) {
201828       if (devinfo->is_g4x) {
201844 RENDER_SURFACE_STATE_SurfaceArraySpacing_start(const struct gen_device_info *devinfo)
201846    switch (devinfo->gen) {
201852       if (devinfo->is_haswell) {
201860       if (devinfo->is_g4x) {
201887 RENDER_SURFACE_STATE_SurfaceBaseAddress_bits(const struct gen_device_info *devinfo)
201889    switch (devinfo->gen) {
201895       if (devinfo->is_haswell) {
201903       if (devinfo->is_g4x) {
201927 RENDER_SURFACE_STATE_SurfaceBaseAddress_start(const struct gen_device_info *devinfo)
201929    switch (devinfo->gen) {
201935       if (devinfo->is_haswell) {
201943       if (devinfo->is_g4x) {
201970 RENDER_SURFACE_STATE_SurfaceFormat_bits(const struct gen_device_info *devinfo)
201972    switch (devinfo->gen) {
201978       if (devinfo->is_haswell) {
201986       if (devinfo->is_g4x) {
202010 RENDER_SURFACE_STATE_SurfaceFormat_start(const struct gen_device_info *devinfo)
202012    switch (devinfo->gen) {
202018       if (devinfo->is_haswell) {
202026       if (devinfo->is_g4x) {
202049 RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_bits(const struct gen_device_info *devinfo)
202051    switch (devinfo->gen) {
202057       if (devinfo->is_haswell) {
202065       if (devinfo->is_g4x) {
202085 RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_start(const struct gen_device_info *devinfo)
202087    switch (devinfo->gen) {
202093       if (devinfo->is_haswell) {
202101       if (devinfo->is_g4x) {
202128 RENDER_SURFACE_STATE_SurfaceMinLOD_bits(const struct gen_device_info *devinfo)
202130    switch (devinfo->gen) {
202136       if (devinfo->is_haswell) {
202144       if (devinfo->is_g4x) {
202168 RENDER_SURFACE_STATE_SurfaceMinLOD_start(const struct gen_device_info *devinfo)
202170    switch (devinfo->gen) {
202176       if (devinfo->is_haswell) {
202184       if (devinfo->is_g4x) {
202211 RENDER_SURFACE_STATE_SurfacePitch_bits(const struct gen_device_info *devinfo)
202213    switch (devinfo->gen) {
202219       if (devinfo->is_haswell) {
202227       if (devinfo->is_g4x) {
202251 RENDER_SURFACE_STATE_SurfacePitch_start(const struct gen_device_info *devinfo)
202253    switch (devinfo->gen) {
202259       if (devinfo->is_haswell) {
202267       if (devinfo->is_g4x) {
202288 RENDER_SURFACE_STATE_SurfaceQPitch_bits(const struct gen_device_info *devinfo)
202290    switch (devinfo->gen) {
202296       if (devinfo->is_haswell) {
202304       if (devinfo->is_g4x) {
202322 RENDER_SURFACE_STATE_SurfaceQPitch_start(const struct gen_device_info *devinfo)
202324    switch (devinfo->gen) {
202330       if (devinfo->is_haswell) {
202338       if (devinfo->is_g4x) {
202365 RENDER_SURFACE_STATE_SurfaceType_bits(const struct gen_device_info *devinfo)
202367    switch (devinfo->gen) {
202373       if (devinfo->is_haswell) {
202381       if (devinfo->is_g4x) {
202405 RENDER_SURFACE_STATE_SurfaceType_start(const struct gen_device_info *devinfo)
202407    switch (devinfo->gen) {
202413       if (devinfo->is_haswell) {
202421       if (devinfo->is_g4x) {
202445 RENDER_SURFACE_STATE_SurfaceVerticalAlignment_bits(const struct gen_device_info *devinfo)
202447    switch (devinfo->gen) {
202453       if (devinfo->is_haswell) {
202461       if (devinfo->is_g4x) {
202482 RENDER_SURFACE_STATE_SurfaceVerticalAlignment_start(const struct gen_device_info *devinfo)
202484    switch (devinfo->gen) {
202490       if (devinfo->is_haswell) {
202498       if (devinfo->is_g4x) {
202517 RENDER_SURFACE_STATE_TileAddressMappingMode_bits(const struct gen_device_info *devinfo)
202519    switch (devinfo->gen) {
202525       if (devinfo->is_haswell) {
202533       if (devinfo->is_g4x) {
202549 RENDER_SURFACE_STATE_TileAddressMappingMode_start(const struct gen_device_info *devinfo)
202551    switch (devinfo->gen) {
202557       if (devinfo->is_haswell) {
202565       if (devinfo->is_g4x) {
202586 RENDER_SURFACE_STATE_TileMode_bits(const struct gen_device_info *devinfo)
202588    switch (devinfo->gen) {
202594       if (devinfo->is_haswell) {
202602       if (devinfo->is_g4x) {
202620 RENDER_SURFACE_STATE_TileMode_start(const struct gen_device_info *devinfo)
202622    switch (devinfo->gen) {
202628       if (devinfo->is_haswell) {
202636       if (devinfo->is_g4x) {
202659 RENDER_SURFACE_STATE_TileWalk_bits(const struct gen_device_info *devinfo)
202661    switch (devinfo->gen) {
202667       if (devinfo->is_haswell) {
202675       if (devinfo->is_g4x) {
202695 RENDER_SURFACE_STATE_TileWalk_start(const struct gen_device_info *devinfo)
202697    switch (devinfo->gen) {
202703       if (devinfo->is_haswell) {
202711       if (devinfo->is_g4x) {
202731 RENDER_SURFACE_STATE_TiledResourceMode_bits(const struct gen_device_info *devinfo)
202733    switch (devinfo->gen) {
202739       if (devinfo->is_haswell) {
202747       if (devinfo->is_g4x) {
202764 RENDER_SURFACE_STATE_TiledResourceMode_start(const struct gen_device_info *devinfo)
202766    switch (devinfo->gen) {
202772       if (devinfo->is_haswell) {
202780       if (devinfo->is_g4x) {
202803 RENDER_SURFACE_STATE_TiledSurface_bits(const struct gen_device_info *devinfo)
202805    switch (devinfo->gen) {
202811       if (devinfo->is_haswell) {
202819       if (devinfo->is_g4x) {
202839 RENDER_SURFACE_STATE_TiledSurface_start(const struct gen_device_info *devinfo)
202841    switch (devinfo->gen) {
202847       if (devinfo->is_haswell) {
202855       if (devinfo->is_g4x) {
202882 RENDER_SURFACE_STATE_VerticalLineStride_bits(const struct gen_device_info *devinfo)
202884    switch (devinfo->gen) {
202890       if (devinfo->is_haswell) {
202898       if (devinfo->is_g4x) {
202922 RENDER_SURFACE_STATE_VerticalLineStride_start(const struct gen_device_info *devinfo)
202924    switch (devinfo->gen) {
202930       if (devinfo->is_haswell) {
202938       if (devinfo->is_g4x) {
202965 RENDER_SURFACE_STATE_VerticalLineStrideOffset_bits(const struct gen_device_info *devinfo)
202967    switch (devinfo->gen) {
202973       if (devinfo->is_haswell) {
202981       if (devinfo->is_g4x) {
203005 RENDER_SURFACE_STATE_VerticalLineStrideOffset_start(const struct gen_device_info *devinfo)
203007    switch (devinfo->gen) {
203013       if (devinfo->is_haswell) {
203021       if (devinfo->is_g4x) {
203048 RENDER_SURFACE_STATE_Width_bits(const struct gen_device_info *devinfo)
203050    switch (devinfo->gen) {
203056       if (devinfo->is_haswell) {
203064       if (devinfo->is_g4x) {
203088 RENDER_SURFACE_STATE_Width_start(const struct gen_device_info *devinfo)
203090    switch (devinfo->gen) {
203096       if (devinfo->is_haswell) {
203104       if (devinfo->is_g4x) {
203130 RENDER_SURFACE_STATE_XOffset_bits(const struct gen_device_info *devinfo)
203132    switch (devinfo->gen) {
203138       if (devinfo->is_haswell) {
203146       if (devinfo->is_g4x) {
203169 RENDER_SURFACE_STATE_XOffset_start(const struct gen_device_info *devinfo)
203171    switch (devinfo->gen) {
203177       if (devinfo->is_haswell) {
203185       if (devinfo->is_g4x) {
203206 RENDER_SURFACE_STATE_XOffsetforUorUVPlane_bits(const struct gen_device_info *devinfo)
203208    switch (devinfo->gen) {
203214       if (devinfo->is_haswell) {
203222       if (devinfo->is_g4x) {
203240 RENDER_SURFACE_STATE_XOffsetforUorUVPlane_start(const struct gen_device_info *devinfo)
203242    switch (devinfo->gen) {
203248       if (devinfo->is_haswell) {
203256       if (devinfo->is_g4x) {
203275 RENDER_SURFACE_STATE_XOffsetforUVPlane_bits(const struct gen_device_info *devinfo)
203277    switch (devinfo->gen) {
203283       if (devinfo->is_haswell) {
203291       if (devinfo->is_g4x) {
203307 RENDER_SURFACE_STATE_XOffsetforUVPlane_start(const struct gen_device_info *devinfo)
203309    switch (devinfo->gen) {
203315       if (devinfo->is_haswell) {
203323       if (devinfo->is_g4x) {
203344 RENDER_SURFACE_STATE_XOffsetforVPlane_bits(const struct gen_device_info *devinfo)
203346    switch (devinfo->gen) {
203352       if (devinfo->is_haswell) {
203360       if (devinfo->is_g4x) {
203378 RENDER_SURFACE_STATE_XOffsetforVPlane_start(const struct gen_device_info *devinfo)
203380    switch (devinfo->gen) {
203386       if (devinfo->is_haswell) {
203394       if (devinfo->is_g4x) {
203420 RENDER_SURFACE_STATE_YOffset_bits(const struct gen_device_info *devinfo)
203422    switch (devinfo->gen) {
203428       if (devinfo->is_haswell) {
203436       if (devinfo->is_g4x) {
203459 RENDER_SURFACE_STATE_YOffset_start(const struct gen_device_info *devinfo)
203461    switch (devinfo->gen) {
203467       if (devinfo->is_haswell) {
203475       if (devinfo->is_g4x) {
203496 RENDER_SURFACE_STATE_YOffsetforUorUVPlane_bits(const struct gen_device_info *devinfo)
203498    switch (devinfo->gen) {
203504       if (devinfo->is_haswell) {
203512       if (devinfo->is_g4x) {
203530 RENDER_SURFACE_STATE_YOffsetforUorUVPlane_start(const struct gen_device_info *devinfo)
203532    switch (devinfo->gen) {
203538       if (devinfo->is_haswell) {
203546       if (devinfo->is_g4x) {
203565 RENDER_SURFACE_STATE_YOffsetforUVPlane_bits(const struct gen_device_info *devinfo)
203567    switch (devinfo->gen) {
203573       if (devinfo->is_haswell) {
203581       if (devinfo->is_g4x) {
203597 RENDER_SURFACE_STATE_YOffsetforUVPlane_start(const struct gen_device_info *devinfo)
203599    switch (devinfo->gen) {
203605       if (devinfo->is_haswell) {
203613       if (devinfo->is_g4x) {
203634 RENDER_SURFACE_STATE_YOffsetforVPlane_bits(const struct gen_device_info *devinfo)
203636    switch (devinfo->gen) {
203642       if (devinfo->is_haswell) {
203650       if (devinfo->is_g4x) {
203668 RENDER_SURFACE_STATE_YOffsetforVPlane_start(const struct gen_device_info *devinfo)
203670    switch (devinfo->gen) {
203676       if (devinfo->is_haswell) {
203684       if (devinfo->is_g4x) {
203704 ROUNDINGPRECISIONTABLE_3_BITS_length(const struct gen_device_info *devinfo)
203706    switch (devinfo->gen) {
203712       if (devinfo->is_haswell) {
203720       if (devinfo->is_g4x) {
203740 ROUNDINGPRECISIONTABLE_3_BITS_RoundingPrecision_bits(const struct gen_device_info *devinfo)
203742    switch (devinfo->gen) {
203748       if (devinfo->is_haswell) {
203756       if (devinfo->is_g4x) {
203773 ROUNDINGPRECISIONTABLE_3_BITS_RoundingPrecision_start(const struct gen_device_info *devinfo)
203775    switch (devinfo->gen) {
203781       if (devinfo->is_haswell) {
203789       if (devinfo->is_g4x) {
203812 ROW_INSTDONE_length(const struct gen_device_info *devinfo)
203814    switch (devinfo->gen) {
203820       if (devinfo->is_haswell) {
203828       if (devinfo->is_g4x) {
203851 ROW_INSTDONE_BCDone_bits(const struct gen_device_info *devinfo)
203853    switch (devinfo->gen) {
203859       if (devinfo->is_haswell) {
203867       if (devinfo->is_g4x) {
203887 ROW_INSTDONE_BCDone_start(const struct gen_device_info *devinfo)
203889    switch (devinfo->gen) {
203895       if (devinfo->is_haswell) {
203903       if (devinfo->is_g4x) {
203926 ROW_INSTDONE_DAPRDone_bits(const struct gen_device_info *devinfo)
203928    switch (devinfo->gen) {
203934       if (devinfo->is_haswell) {
203942       if (devinfo->is_g4x) {
203962 ROW_INSTDONE_DAPRDone_start(const struct gen_device_info *devinfo)
203964    switch (devinfo->gen) {
203970       if (devinfo->is_haswell) {
203978       if (devinfo->is_g4x) {
203997 ROW_INSTDONE_DCDone_bits(const struct gen_device_info *devinfo)
203999    switch (devinfo->gen) {
204005       if (devinfo->is_haswell) {
204013       if (devinfo->is_g4x) {
204029 ROW_INSTDONE_DCDone_start(const struct gen_device_info *devinfo)
204031    switch (devinfo->gen) {
204037       if (devinfo->is_haswell) {
204045       if (devinfo->is_g4x) {
204068 ROW_INSTDONE_EU00DoneSS0_bits(const struct gen_device_info *devinfo)
204070    switch (devinfo->gen) {
204076       if (devinfo->is_haswell) {
204084       if (devinfo->is_g4x) {
204104 ROW_INSTDONE_EU00DoneSS0_start(const struct gen_device_info *devinfo)
204106    switch (devinfo->gen) {
204112       if (devinfo->is_haswell) {
204120       if (devinfo->is_g4x) {
204143 ROW_INSTDONE_EU01DoneSS0_bits(const struct gen_device_info *devinfo)
204145    switch (devinfo->gen) {
204151       if (devinfo->is_haswell) {
204159       if (devinfo->is_g4x) {
204179 ROW_INSTDONE_EU01DoneSS0_start(const struct gen_device_info *devinfo)
204181    switch (devinfo->gen) {
204187       if (devinfo->is_haswell) {
204195       if (devinfo->is_g4x) {
204218 ROW_INSTDONE_EU02DoneSS0_bits(const struct gen_device_info *devinfo)
204220    switch (devinfo->gen) {
204226       if (devinfo->is_haswell) {
204234       if (devinfo->is_g4x) {
204254 ROW_INSTDONE_EU02DoneSS0_start(const struct gen_device_info *devinfo)
204256    switch (devinfo->gen) {
204262       if (devinfo->is_haswell) {
204270       if (devinfo->is_g4x) {
204293 ROW_INSTDONE_EU03DoneSS0_bits(const struct gen_device_info *devinfo)
204295    switch (devinfo->gen) {
204301       if (devinfo->is_haswell) {
204309       if (devinfo->is_g4x) {
204329 ROW_INSTDONE_EU03DoneSS0_start(const struct gen_device_info *devinfo)
204331    switch (devinfo->gen) {
204337       if (devinfo->is_haswell) {
204345       if (devinfo->is_g4x) {
204363 ROW_INSTDONE_EU04DoneSS0_bits(const struct gen_device_info *devinfo)
204365    switch (devinfo->gen) {
204371       if (devinfo->is_haswell) {
204379       if (devinfo->is_g4x) {
204394 ROW_INSTDONE_EU04DoneSS0_start(const struct gen_device_info *devinfo)
204396    switch (devinfo->gen) {
204402       if (devinfo->is_haswell) {
204410       if (devinfo->is_g4x) {
204433 ROW_INSTDONE_EU10DoneSS0_bits(const struct gen_device_info *devinfo)
204435    switch (devinfo->gen) {
204441       if (devinfo->is_haswell) {
204449       if (devinfo->is_g4x) {
204469 ROW_INSTDONE_EU10DoneSS0_start(const struct gen_device_info *devinfo)
204471    switch (devinfo->gen) {
204477       if (devinfo->is_haswell) {
204485       if (devinfo->is_g4x) {
204508 ROW_INSTDONE_EU11DoneSS0_bits(const struct gen_device_info *devinfo)
204510    switch (devinfo->gen) {
204516       if (devinfo->is_haswell) {
204524       if (devinfo->is_g4x) {
204544 ROW_INSTDONE_EU11DoneSS0_start(const struct gen_device_info *devinfo)
204546    switch (devinfo->gen) {
204552       if (devinfo->is_haswell) {
204560       if (devinfo->is_g4x) {
204583 ROW_INSTDONE_EU12DoneSS0_bits(const struct gen_device_info *devinfo)
204585    switch (devinfo->gen) {
204591       if (devinfo->is_haswell) {
204599       if (devinfo->is_g4x) {
204619 ROW_INSTDONE_EU12DoneSS0_start(const struct gen_device_info *devinfo)
204621    switch (devinfo->gen) {
204627       if (devinfo->is_haswell) {
204635       if (devinfo->is_g4x) {
204658 ROW_INSTDONE_EU13DoneSS0_bits(const struct gen_device_info *devinfo)
204660    switch (devinfo->gen) {
204666       if (devinfo->is_haswell) {
204674       if (devinfo->is_g4x) {
204694 ROW_INSTDONE_EU13DoneSS0_start(const struct gen_device_info *devinfo)
204696    switch (devinfo->gen) {
204702       if (devinfo->is_haswell) {
204710       if (devinfo->is_g4x) {
204728 ROW_INSTDONE_EU14DoneSS0_bits(const struct gen_device_info *devinfo)
204730    switch (devinfo->gen) {
204736       if (devinfo->is_haswell) {
204744       if (devinfo->is_g4x) {
204759 ROW_INSTDONE_EU14DoneSS0_start(const struct gen_device_info *devinfo)
204761    switch (devinfo->gen) {
204767       if (devinfo->is_haswell) {
204775       if (devinfo->is_g4x) {
204794 ROW_INSTDONE_GWDone_bits(const struct gen_device_info *devinfo)
204796    switch (devinfo->gen) {
204802       if (devinfo->is_haswell) {
204810       if (devinfo->is_g4x) {
204826 ROW_INSTDONE_GWDone_start(const struct gen_device_info *devinfo)
204828    switch (devinfo->gen) {
204834       if (devinfo->is_haswell) {
204842       if (devinfo->is_g4x) {
204865 ROW_INSTDONE_ICDone_bits(const struct gen_device_info *devinfo)
204867    switch (devinfo->gen) {
204873       if (devinfo->is_haswell) {
204881       if (devinfo->is_g4x) {
204901 ROW_INSTDONE_ICDone_start(const struct gen_device_info *devinfo)
204903    switch (devinfo->gen) {
204909       if (devinfo->is_haswell) {
204917       if (devinfo->is_g4x) {
204939 ROW_INSTDONE_MA0Done_bits(const struct gen_device_info *devinfo)
204941    switch (devinfo->gen) {
204947       if (devinfo->is_haswell) {
204955       if (devinfo->is_g4x) {
204974 ROW_INSTDONE_MA0Done_start(const struct gen_device_info *devinfo)
204976    switch (devinfo->gen) {
204982       if (devinfo->is_haswell) {
204990       if (devinfo->is_g4x) {
205008 ROW_INSTDONE_MA0DoneSS0_bits(const struct gen_device_info *devinfo)
205010    switch (devinfo->gen) {
205016       if (devinfo->is_haswell) {
205024       if (devinfo->is_g4x) {
205039 ROW_INSTDONE_MA0DoneSS0_start(const struct gen_device_info *devinfo)
205041    switch (devinfo->gen) {
205047       if (devinfo->is_haswell) {
205055       if (devinfo->is_g4x) {
205073 ROW_INSTDONE_MA1Done_bits(const struct gen_device_info *devinfo)
205075    switch (devinfo->gen) {
205081       if (devinfo->is_haswell) {
205089       if (devinfo->is_g4x) {
205104 ROW_INSTDONE_MA1Done_start(const struct gen_device_info *devinfo)
205106    switch (devinfo->gen) {
205112       if (devinfo->is_haswell) {
205120       if (devinfo->is_g4x) {
205142 ROW_INSTDONE_MA1DoneSS0_bits(const struct gen_device_info *devinfo)
205144    switch (devinfo->gen) {
205150       if (devinfo->is_haswell) {
205158       if (devinfo->is_g4x) {
205177 ROW_INSTDONE_MA1DoneSS0_start(const struct gen_device_info *devinfo)
205179    switch (devinfo->gen) {
205185       if (devinfo->is_haswell) {
205193       if (devinfo->is_g4x) {
205216 ROW_INSTDONE_PSDDone_bits(const struct gen_device_info *devinfo)
205218    switch (devinfo->gen) {
205224       if (devinfo->is_haswell) {
205232       if (devinfo->is_g4x) {
205252 ROW_INSTDONE_PSDDone_start(const struct gen_device_info *devinfo)
205254    switch (devinfo->gen) {
205260       if (devinfo->is_haswell) {
205268       if (devinfo->is_g4x) {
205291 ROW_INSTDONE_TDLDone_bits(const struct gen_device_info *devinfo)
205293    switch (devinfo->gen) {
205299       if (devinfo->is_haswell) {
205307       if (devinfo->is_g4x) {
205327 ROW_INSTDONE_TDLDone_start(const struct gen_device_info *devinfo)
205329    switch (devinfo->gen) {
205335       if (devinfo->is_haswell) {
205343       if (devinfo->is_g4x) {
205370 SAMPLER_BORDER_COLOR_STATE_length(const struct gen_device_info *devinfo)
205372    switch (devinfo->gen) {
205378       if (devinfo->is_haswell) {
205386       if (devinfo->is_g4x) {
205404 SAMPLER_BORDER_COLOR_STATE_BorderColor16bitAlpha_bits(const struct gen_device_info *devinfo)
205406    switch (devinfo->gen) {
205412       if (devinfo->is_haswell) {
205420       if (devinfo->is_g4x) {
205435 SAMPLER_BORDER_COLOR_STATE_BorderColor16bitAlpha_start(const struct gen_device_info *devinfo)
205437    switch (devinfo->gen) {
205443       if (devinfo->is_haswell) {
205451       if (devinfo->is_g4x) {
205469 SAMPLER_BORDER_COLOR_STATE_BorderColor16bitBlue_bits(const struct gen_device_info *devinfo)
205471    switch (devinfo->gen) {
205477       if (devinfo->is_haswell) {
205485       if (devinfo->is_g4x) {
205500 SAMPLER_BORDER_COLOR_STATE_BorderColor16bitBlue_start(const struct gen_device_info *devinfo)
205502    switch (devinfo->gen) {
205508       if (devinfo->is_haswell) {
205516       if (devinfo->is_g4x) {
205534 SAMPLER_BORDER_COLOR_STATE_BorderColor16bitGreen_bits(const struct gen_device_info *devinfo)
205536    switch (devinfo->gen) {
205542       if (devinfo->is_haswell) {
205550       if (devinfo->is_g4x) {
205565 SAMPLER_BORDER_COLOR_STATE_BorderColor16bitGreen_start(const struct gen_device_info *devinfo)
205567    switch (devinfo->gen) {
205573       if (devinfo->is_haswell) {
205581       if (devinfo->is_g4x) {
205599 SAMPLER_BORDER_COLOR_STATE_BorderColor16bitRed_bits(const struct gen_device_info *devinfo)
205601    switch (devinfo->gen) {
205607       if (devinfo->is_haswell) {
205615       if (devinfo->is_g4x) {
205630 SAMPLER_BORDER_COLOR_STATE_BorderColor16bitRed_start(const struct gen_device_info *devinfo)
205632    switch (devinfo->gen) {
205638       if (devinfo->is_haswell) {
205646       if (devinfo->is_g4x) {
205668 SAMPLER_BORDER_COLOR_STATE_BorderColor32bitAlpha_bits(const struct gen_device_info *devinfo)
205670    switch (devinfo->gen) {
205676       if (devinfo->is_haswell) {
205684       if (devinfo->is_g4x) {
205703 SAMPLER_BORDER_COLOR_STATE_BorderColor32bitAlpha_start(const struct gen_device_info *devinfo)
205705    switch (devinfo->gen) {
205711       if (devinfo->is_haswell) {
205719       if (devinfo->is_g4x) {
205741 SAMPLER_BORDER_COLOR_STATE_BorderColor32bitBlue_bits(const struct gen_device_info *devinfo)
205743    switch (devinfo->gen) {
205749       if (devinfo->is_haswell) {
205757       if (devinfo->is_g4x) {
205776 SAMPLER_BORDER_COLOR_STATE_BorderColor32bitBlue_start(const struct gen_device_info *devinfo)
205778    switch (devinfo->gen) {
205784       if (devinfo->is_haswell) {
205792       if (devinfo->is_g4x) {
205814 SAMPLER_BORDER_COLOR_STATE_BorderColor32bitGreen_bits(const struct gen_device_info *devinfo)
205816    switch (devinfo->gen) {
205822       if (devinfo->is_haswell) {
205830       if (devinfo->is_g4x) {
205849 SAMPLER_BORDER_COLOR_STATE_BorderColor32bitGreen_start(const struct gen_device_info *devinfo)
205851    switch (devinfo->gen) {
205857       if (devinfo->is_haswell) {
205865       if (devinfo->is_g4x) {
205887 SAMPLER_BORDER_COLOR_STATE_BorderColor32bitRed_bits(const struct gen_device_info *devinfo)
205889    switch (devinfo->gen) {
205895       if (devinfo->is_haswell) {
205903       if (devinfo->is_g4x) {
205922 SAMPLER_BORDER_COLOR_STATE_BorderColor32bitRed_start(const struct gen_device_info *devinfo)
205924    switch (devinfo->gen) {
205930       if (devinfo->is_haswell) {
205938       if (devinfo->is_g4x) {
205956 SAMPLER_BORDER_COLOR_STATE_BorderColor8bitAlpha_bits(const struct gen_device_info *devinfo)
205958    switch (devinfo->gen) {
205964       if (devinfo->is_haswell) {
205972       if (devinfo->is_g4x) {
205987 SAMPLER_BORDER_COLOR_STATE_BorderColor8bitAlpha_start(const struct gen_device_info *devinfo)
205989    switch (devinfo->gen) {
205995       if (devinfo->is_haswell) {
206003       if (devinfo->is_g4x) {
206021 SAMPLER_BORDER_COLOR_STATE_BorderColor8bitBlue_bits(const struct gen_device_info *devinfo)
206023    switch (devinfo->gen) {
206029       if (devinfo->is_haswell) {
206037       if (devinfo->is_g4x) {
206052 SAMPLER_BORDER_COLOR_STATE_BorderColor8bitBlue_start(const struct gen_device_info *devinfo)
206054    switch (devinfo->gen) {
206060       if (devinfo->is_haswell) {
206068       if (devinfo->is_g4x) {
206086 SAMPLER_BORDER_COLOR_STATE_BorderColor8bitGreen_bits(const struct gen_device_info *devinfo)
206088    switch (devinfo->gen) {
206094       if (devinfo->is_haswell) {
206102       if (devinfo->is_g4x) {
206117 SAMPLER_BORDER_COLOR_STATE_BorderColor8bitGreen_start(const struct gen_device_info *devinfo)
206119    switch (devinfo->gen) {
206125       if (devinfo->is_haswell) {
206133       if (devinfo->is_g4x) {
206151 SAMPLER_BORDER_COLOR_STATE_BorderColor8bitRed_bits(const struct gen_device_info *devinfo)
206153    switch (devinfo->gen) {
206159       if (devinfo->is_haswell) {
206167       if (devinfo->is_g4x) {
206182 SAMPLER_BORDER_COLOR_STATE_BorderColor8bitRed_start(const struct gen_device_info *devinfo)
206184    switch (devinfo->gen) {
206190       if (devinfo->is_haswell) {
206198       if (devinfo->is_g4x) {
206217 SAMPLER_BORDER_COLOR_STATE_BorderColorAlpha_bits(const struct gen_device_info *devinfo)
206219    switch (devinfo->gen) {
206225       if (devinfo->is_haswell) {
206233       if (devinfo->is_g4x) {
206249 SAMPLER_BORDER_COLOR_STATE_BorderColorAlpha_start(const struct gen_device_info *devinfo)
206251    switch (devinfo->gen) {
206257       if (devinfo->is_haswell) {
206265       if (devinfo->is_g4x) {
206284 SAMPLER_BORDER_COLOR_STATE_BorderColorBlue_bits(const struct gen_device_info *devinfo)
206286    switch (devinfo->gen) {
206292       if (devinfo->is_haswell) {
206300       if (devinfo->is_g4x) {
206316 SAMPLER_BORDER_COLOR_STATE_BorderColorBlue_start(const struct gen_device_info *devinfo)
206318    switch (devinfo->gen) {
206324       if (devinfo->is_haswell) {
206332       if (devinfo->is_g4x) {
206357 SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_bits(const struct gen_device_info *devinfo)
206359    switch (devinfo->gen) {
206365       if (devinfo->is_haswell) {
206373       if (devinfo->is_g4x) {
206395 SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_start(const struct gen_device_info *devinfo)
206397    switch (devinfo->gen) {
206403       if (devinfo->is_haswell) {
206411       if (devinfo->is_g4x) {
206436 SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_bits(const struct gen_device_info *devinfo)
206438    switch (devinfo->gen) {
206444       if (devinfo->is_haswell) {
206452       if (devinfo->is_g4x) {
206474 SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_start(const struct gen_device_info *devinfo)
206476    switch (devinfo->gen) {
206482       if (devinfo->is_haswell) {
206490       if (devinfo->is_g4x) {
206515 SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_bits(const struct gen_device_info *devinfo)
206517    switch (devinfo->gen) {
206523       if (devinfo->is_haswell) {
206531       if (devinfo->is_g4x) {
206553 SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_start(const struct gen_device_info *devinfo)
206555    switch (devinfo->gen) {
206561       if (devinfo->is_haswell) {
206569       if (devinfo->is_g4x) {
206594 SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_bits(const struct gen_device_info *devinfo)
206596    switch (devinfo->gen) {
206602       if (devinfo->is_haswell) {
206610       if (devinfo->is_g4x) {
206632 SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_start(const struct gen_device_info *devinfo)
206634    switch (devinfo->gen) {
206640       if (devinfo->is_haswell) {
206648       if (devinfo->is_g4x) {
206667 SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Alpha_bits(const struct gen_device_info *devinfo)
206669    switch (devinfo->gen) {
206675       if (devinfo->is_haswell) {
206683       if (devinfo->is_g4x) {
206699 SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Alpha_start(const struct gen_device_info *devinfo)
206701    switch (devinfo->gen) {
206707       if (devinfo->is_haswell) {
206715       if (devinfo->is_g4x) {
206734 SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Blue_bits(const struct gen_device_info *devinfo)
206736    switch (devinfo->gen) {
206742       if (devinfo->is_haswell) {
206750       if (devinfo->is_g4x) {
206766 SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Blue_start(const struct gen_device_info *devinfo)
206768    switch (devinfo->gen) {
206774       if (devinfo->is_haswell) {
206782       if (devinfo->is_g4x) {
206801 SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Green_bits(const struct gen_device_info *devinfo)
206803    switch (devinfo->gen) {
206809       if (devinfo->is_haswell) {
206817       if (devinfo->is_g4x) {
206833 SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Green_start(const struct gen_device_info *devinfo)
206835    switch (devinfo->gen) {
206841       if (devinfo->is_haswell) {
206849       if (devinfo->is_g4x) {
206868 SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Red_bits(const struct gen_device_info *devinfo)
206870    switch (devinfo->gen) {
206876       if (devinfo->is_haswell) {
206884       if (devinfo->is_g4x) {
206900 SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Red_start(const struct gen_device_info *devinfo)
206902    switch (devinfo->gen) {
206908       if (devinfo->is_haswell) {
206916       if (devinfo->is_g4x) {
206935 SAMPLER_BORDER_COLOR_STATE_BorderColorGreen_bits(const struct gen_device_info *devinfo)
206937    switch (devinfo->gen) {
206943       if (devinfo->is_haswell) {
206951       if (devinfo->is_g4x) {
206967 SAMPLER_BORDER_COLOR_STATE_BorderColorGreen_start(const struct gen_device_info *devinfo)
206969    switch (devinfo->gen) {
206975       if (devinfo->is_haswell) {
206983       if (devinfo->is_g4x) {
207002 SAMPLER_BORDER_COLOR_STATE_BorderColorRed_bits(const struct gen_device_info *devinfo)
207004    switch (devinfo->gen) {
207010       if (devinfo->is_haswell) {
207018       if (devinfo->is_g4x) {
207034 SAMPLER_BORDER_COLOR_STATE_BorderColorRed_start(const struct gen_device_info *devinfo)
207036    switch (devinfo->gen) {
207042       if (devinfo->is_haswell) {
207050       if (devinfo->is_g4x) {
207069 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Alpha_bits(const struct gen_device_info *devinfo)
207071    switch (devinfo->gen) {
207077       if (devinfo->is_haswell) {
207085       if (devinfo->is_g4x) {
207101 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Alpha_start(const struct gen_device_info *devinfo)
207103    switch (devinfo->gen) {
207109       if (devinfo->is_haswell) {
207117       if (devinfo->is_g4x) {
207136 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Blue_bits(const struct gen_device_info *devinfo)
207138    switch (devinfo->gen) {
207144       if (devinfo->is_haswell) {
207152       if (devinfo->is_g4x) {
207168 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Blue_start(const struct gen_device_info *devinfo)
207170    switch (devinfo->gen) {
207176       if (devinfo->is_haswell) {
207184       if (devinfo->is_g4x) {
207203 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Green_bits(const struct gen_device_info *devinfo)
207205    switch (devinfo->gen) {
207211       if (devinfo->is_haswell) {
207219       if (devinfo->is_g4x) {
207235 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Green_start(const struct gen_device_info *devinfo)
207237    switch (devinfo->gen) {
207243       if (devinfo->is_haswell) {
207251       if (devinfo->is_g4x) {
207270 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Red_bits(const struct gen_device_info *devinfo)
207272    switch (devinfo->gen) {
207278       if (devinfo->is_haswell) {
207286       if (devinfo->is_g4x) {
207302 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Red_start(const struct gen_device_info *devinfo)
207304    switch (devinfo->gen) {
207310       if (devinfo->is_haswell) {
207318       if (devinfo->is_g4x) {
207337 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Alpha_bits(const struct gen_device_info *devinfo)
207339    switch (devinfo->gen) {
207345       if (devinfo->is_haswell) {
207353       if (devinfo->is_g4x) {
207369 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Alpha_start(const struct gen_device_info *devinfo)
207371    switch (devinfo->gen) {
207377       if (devinfo->is_haswell) {
207385       if (devinfo->is_g4x) {
207404 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Blue_bits(const struct gen_device_info *devinfo)
207406    switch (devinfo->gen) {
207412       if (devinfo->is_haswell) {
207420       if (devinfo->is_g4x) {
207436 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Blue_start(const struct gen_device_info *devinfo)
207438    switch (devinfo->gen) {
207444       if (devinfo->is_haswell) {
207452       if (devinfo->is_g4x) {
207471 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Green_bits(const struct gen_device_info *devinfo)
207473    switch (devinfo->gen) {
207479       if (devinfo->is_haswell) {
207487       if (devinfo->is_g4x) {
207503 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Green_start(const struct gen_device_info *devinfo)
207505    switch (devinfo->gen) {
207511       if (devinfo->is_haswell) {
207519       if (devinfo->is_g4x) {
207538 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Red_bits(const struct gen_device_info *devinfo)
207540    switch (devinfo->gen) {
207546       if (devinfo->is_haswell) {
207554       if (devinfo->is_g4x) {
207570 SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Red_start(const struct gen_device_info *devinfo)
207572    switch (devinfo->gen) {
207578       if (devinfo->is_haswell) {
207586       if (devinfo->is_g4x) {
207606 SAMPLER_BORDER_COLOR_STATE_BorderColorUnormAlpha_bits(const struct gen_device_info *devinfo)
207608    switch (devinfo->gen) {
207614       if (devinfo->is_haswell) {
207622       if (devinfo->is_g4x) {
207639 SAMPLER_BORDER_COLOR_STATE_BorderColorUnormAlpha_start(const struct gen_device_info *devinfo)
207641    switch (devinfo->gen) {
207647       if (devinfo->is_haswell) {
207655       if (devinfo->is_g4x) {
207675 SAMPLER_BORDER_COLOR_STATE_BorderColorUnormBlue_bits(const struct gen_device_info *devinfo)
207677    switch (devinfo->gen) {
207683       if (devinfo->is_haswell) {
207691       if (devinfo->is_g4x) {
207708 SAMPLER_BORDER_COLOR_STATE_BorderColorUnormBlue_start(const struct gen_device_info *devinfo)
207710    switch (devinfo->gen) {
207716       if (devinfo->is_haswell) {
207724       if (devinfo->is_g4x) {
207744 SAMPLER_BORDER_COLOR_STATE_BorderColorUnormGreen_bits(const struct gen_device_info *devinfo)
207746    switch (devinfo->gen) {
207752       if (devinfo->is_haswell) {
207760       if (devinfo->is_g4x) {
207777 SAMPLER_BORDER_COLOR_STATE_BorderColorUnormGreen_start(const struct gen_device_info *devinfo)
207779    switch (devinfo->gen) {
207785       if (devinfo->is_haswell) {
207793       if (devinfo->is_g4x) {
207813 SAMPLER_BORDER_COLOR_STATE_BorderColorUnormRed_bits(const struct gen_device_info *devinfo)
207815    switch (devinfo->gen) {
207821       if (devinfo->is_haswell) {
207829       if (devinfo->is_g4x) {
207846 SAMPLER_BORDER_COLOR_STATE_BorderColorUnormRed_start(const struct gen_device_info *devinfo)
207848    switch (devinfo->gen) {
207854       if (devinfo->is_haswell) {
207862       if (devinfo->is_g4x) {
207881 SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Alpha_bits(const struct gen_device_info *devinfo)
207883    switch (devinfo->gen) {
207889       if (devinfo->is_haswell) {
207897       if (devinfo->is_g4x) {
207913 SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Alpha_start(const struct gen_device_info *devinfo)
207915    switch (devinfo->gen) {
207921       if (devinfo->is_haswell) {
207929       if (devinfo->is_g4x) {
207948 SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Blue_bits(const struct gen_device_info *devinfo)
207950    switch (devinfo->gen) {
207956       if (devinfo->is_haswell) {
207964       if (devinfo->is_g4x) {
207980 SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Blue_start(const struct gen_device_info *devinfo)
207982    switch (devinfo->gen) {
207988       if (devinfo->is_haswell) {
207996       if (devinfo->is_g4x) {
208015 SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Green_bits(const struct gen_device_info *devinfo)
208017    switch (devinfo->gen) {
208023       if (devinfo->is_haswell) {
208031       if (devinfo->is_g4x) {
208047 SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Green_start(const struct gen_device_info *devinfo)
208049    switch (devinfo->gen) {
208055       if (devinfo->is_haswell) {
208063       if (devinfo->is_g4x) {
208082 SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Red_bits(const struct gen_device_info *devinfo)
208084    switch (devinfo->gen) {
208090       if (devinfo->is_haswell) {
208098       if (devinfo->is_g4x) {
208114 SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Red_start(const struct gen_device_info *devinfo)
208116    switch (devinfo->gen) {
208122       if (devinfo->is_haswell) {
208130       if (devinfo->is_g4x) {
208149 SAMPLER_INDIRECT_STATE_BORDER_COLOR_length(const struct gen_device_info *devinfo)
208151    switch (devinfo->gen) {
208157       if (devinfo->is_haswell) {
208165       if (devinfo->is_g4x) {
208184 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsFloat_bits(const struct gen_device_info *devinfo)
208186    switch (devinfo->gen) {
208192       if (devinfo->is_haswell) {
208200       if (devinfo->is_g4x) {
208216 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsFloat_start(const struct gen_device_info *devinfo)
208218    switch (devinfo->gen) {
208224       if (devinfo->is_haswell) {
208232       if (devinfo->is_g4x) {
208251 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsS31_bits(const struct gen_device_info *devinfo)
208253    switch (devinfo->gen) {
208259       if (devinfo->is_haswell) {
208267       if (devinfo->is_g4x) {
208283 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsS31_start(const struct gen_device_info *devinfo)
208285    switch (devinfo->gen) {
208291       if (devinfo->is_haswell) {
208299       if (devinfo->is_g4x) {
208318 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsU32_bits(const struct gen_device_info *devinfo)
208320    switch (devinfo->gen) {
208326       if (devinfo->is_haswell) {
208334       if (devinfo->is_g4x) {
208350 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsU32_start(const struct gen_device_info *devinfo)
208352    switch (devinfo->gen) {
208358       if (devinfo->is_haswell) {
208366       if (devinfo->is_g4x) {
208385 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsU8_bits(const struct gen_device_info *devinfo)
208387    switch (devinfo->gen) {
208393       if (devinfo->is_haswell) {
208401       if (devinfo->is_g4x) {
208417 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsU8_start(const struct gen_device_info *devinfo)
208419    switch (devinfo->gen) {
208425       if (devinfo->is_haswell) {
208433       if (devinfo->is_g4x) {
208452 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsFloat_bits(const struct gen_device_info *devinfo)
208454    switch (devinfo->gen) {
208460       if (devinfo->is_haswell) {
208468       if (devinfo->is_g4x) {
208484 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsFloat_start(const struct gen_device_info *devinfo)
208486    switch (devinfo->gen) {
208492       if (devinfo->is_haswell) {
208500       if (devinfo->is_g4x) {
208519 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsS31_bits(const struct gen_device_info *devinfo)
208521    switch (devinfo->gen) {
208527       if (devinfo->is_haswell) {
208535       if (devinfo->is_g4x) {
208551 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsS31_start(const struct gen_device_info *devinfo)
208553    switch (devinfo->gen) {
208559       if (devinfo->is_haswell) {
208567       if (devinfo->is_g4x) {
208586 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsU32_bits(const struct gen_device_info *devinfo)
208588    switch (devinfo->gen) {
208594       if (devinfo->is_haswell) {
208602       if (devinfo->is_g4x) {
208618 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsU32_start(const struct gen_device_info *devinfo)
208620    switch (devinfo->gen) {
208626       if (devinfo->is_haswell) {
208634       if (devinfo->is_g4x) {
208653 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsU8_bits(const struct gen_device_info *devinfo)
208655    switch (devinfo->gen) {
208661       if (devinfo->is_haswell) {
208669       if (devinfo->is_g4x) {
208685 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsU8_start(const struct gen_device_info *devinfo)
208687    switch (devinfo->gen) {
208693       if (devinfo->is_haswell) {
208701       if (devinfo->is_g4x) {
208720 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsFloat_bits(const struct gen_device_info *devinfo)
208722    switch (devinfo->gen) {
208728       if (devinfo->is_haswell) {
208736       if (devinfo->is_g4x) {
208752 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsFloat_start(const struct gen_device_info *devinfo)
208754    switch (devinfo->gen) {
208760       if (devinfo->is_haswell) {
208768       if (devinfo->is_g4x) {
208787 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsS31_bits(const struct gen_device_info *devinfo)
208789    switch (devinfo->gen) {
208795       if (devinfo->is_haswell) {
208803       if (devinfo->is_g4x) {
208819 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsS31_start(const struct gen_device_info *devinfo)
208821    switch (devinfo->gen) {
208827       if (devinfo->is_haswell) {
208835       if (devinfo->is_g4x) {
208854 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsU32_bits(const struct gen_device_info *devinfo)
208856    switch (devinfo->gen) {
208862       if (devinfo->is_haswell) {
208870       if (devinfo->is_g4x) {
208886 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsU32_start(const struct gen_device_info *devinfo)
208888    switch (devinfo->gen) {
208894       if (devinfo->is_haswell) {
208902       if (devinfo->is_g4x) {
208921 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsU8_bits(const struct gen_device_info *devinfo)
208923    switch (devinfo->gen) {
208929       if (devinfo->is_haswell) {
208937       if (devinfo->is_g4x) {
208953 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsU8_start(const struct gen_device_info *devinfo)
208955    switch (devinfo->gen) {
208961       if (devinfo->is_haswell) {
208969       if (devinfo->is_g4x) {
208988 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsFloat_bits(const struct gen_device_info *devinfo)
208990    switch (devinfo->gen) {
208996       if (devinfo->is_haswell) {
209004       if (devinfo->is_g4x) {
209020 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsFloat_start(const struct gen_device_info *devinfo)
209022    switch (devinfo->gen) {
209028       if (devinfo->is_haswell) {
209036       if (devinfo->is_g4x) {
209055 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsS31_bits(const struct gen_device_info *devinfo)
209057    switch (devinfo->gen) {
209063       if (devinfo->is_haswell) {
209071       if (devinfo->is_g4x) {
209087 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsS31_start(const struct gen_device_info *devinfo)
209089    switch (devinfo->gen) {
209095       if (devinfo->is_haswell) {
209103       if (devinfo->is_g4x) {
209122 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsU32_bits(const struct gen_device_info *devinfo)
209124    switch (devinfo->gen) {
209130       if (devinfo->is_haswell) {
209138       if (devinfo->is_g4x) {
209154 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsU32_start(const struct gen_device_info *devinfo)
209156    switch (devinfo->gen) {
209162       if (devinfo->is_haswell) {
209170       if (devinfo->is_g4x) {
209189 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsU8_bits(const struct gen_device_info *devinfo)
209191    switch (devinfo->gen) {
209197       if (devinfo->is_haswell) {
209205       if (devinfo->is_g4x) {
209221 SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsU8_start(const struct gen_device_info *devinfo)
209223    switch (devinfo->gen) {
209229       if (devinfo->is_haswell) {
209237       if (devinfo->is_g4x) {
209260 SAMPLER_INSTDONE_length(const struct gen_device_info *devinfo)
209262    switch (devinfo->gen) {
209268       if (devinfo->is_haswell) {
209276       if (devinfo->is_g4x) {
209299 SAMPLER_INSTDONE_AVSDone_bits(const struct gen_device_info *devinfo)
209301    switch (devinfo->gen) {
209307       if (devinfo->is_haswell) {
209315       if (devinfo->is_g4x) {
209335 SAMPLER_INSTDONE_AVSDone_start(const struct gen_device_info *devinfo)
209337    switch (devinfo->gen) {
209343       if (devinfo->is_haswell) {
209351       if (devinfo->is_g4x) {
209372 SAMPLER_INSTDONE_BDMDone_bits(const struct gen_device_info *devinfo)
209374    switch (devinfo->gen) {
209380       if (devinfo->is_haswell) {
209388       if (devinfo->is_g4x) {
209406 SAMPLER_INSTDONE_BDMDone_start(const struct gen_device_info *devinfo)
209408    switch (devinfo->gen) {
209414       if (devinfo->is_haswell) {
209422       if (devinfo->is_g4x) {
209444 SAMPLER_INSTDONE_CREDone_bits(const struct gen_device_info *devinfo)
209446    switch (devinfo->gen) {
209452       if (devinfo->is_haswell) {
209460       if (devinfo->is_g4x) {
209479 SAMPLER_INSTDONE_CREDone_start(const struct gen_device_info *devinfo)
209481    switch (devinfo->gen) {
209487       if (devinfo->is_haswell) {
209495       if (devinfo->is_g4x) {
209518 SAMPLER_INSTDONE_DG0Done_bits(const struct gen_device_info *devinfo)
209520    switch (devinfo->gen) {
209526       if (devinfo->is_haswell) {
209534       if (devinfo->is_g4x) {
209554 SAMPLER_INSTDONE_DG0Done_start(const struct gen_device_info *devinfo)
209556    switch (devinfo->gen) {
209562       if (devinfo->is_haswell) {
209570       if (devinfo->is_g4x) {
209593 SAMPLER_INSTDONE_DM0Done_bits(const struct gen_device_info *devinfo)
209595    switch (devinfo->gen) {
209601       if (devinfo->is_haswell) {
209609       if (devinfo->is_g4x) {
209629 SAMPLER_INSTDONE_DM0Done_start(const struct gen_device_info *devinfo)
209631    switch (devinfo->gen) {
209637       if (devinfo->is_haswell) {
209645       if (devinfo->is_g4x) {
209663 SAMPLER_INSTDONE_DM1Done_bits(const struct gen_device_info *devinfo)
209665    switch (devinfo->gen) {
209671       if (devinfo->is_haswell) {
209679       if (devinfo->is_g4x) {
209694 SAMPLER_INSTDONE_DM1Done_start(const struct gen_device_info *devinfo)
209696    switch (devinfo->gen) {
209702       if (devinfo->is_haswell) {
209710       if (devinfo->is_g4x) {
209733 SAMPLER_INSTDONE_FL0Done_bits(const struct gen_device_info *devinfo)
209735    switch (devinfo->gen) {
209741       if (devinfo->is_haswell) {
209749       if (devinfo->is_g4x) {
209769 SAMPLER_INSTDONE_FL0Done_start(const struct gen_device_info *devinfo)
209771    switch (devinfo->gen) {
209777       if (devinfo->is_haswell) {
209785       if (devinfo->is_g4x) {
209808 SAMPLER_INSTDONE_FT0Done_bits(const struct gen_device_info *devinfo)
209810    switch (devinfo->gen) {
209816       if (devinfo->is_haswell) {
209824       if (devinfo->is_g4x) {
209844 SAMPLER_INSTDONE_FT0Done_start(const struct gen_device_info *devinfo)
209846    switch (devinfo->gen) {
209852       if (devinfo->is_haswell) {
209860       if (devinfo->is_g4x) {
209878 SAMPLER_INSTDONE_FT1Done_bits(const struct gen_device_info *devinfo)
209880    switch (devinfo->gen) {
209886       if (devinfo->is_haswell) {
209894       if (devinfo->is_g4x) {
209909 SAMPLER_INSTDONE_FT1Done_start(const struct gen_device_info *devinfo)
209911    switch (devinfo->gen) {
209917       if (devinfo->is_haswell) {
209925       if (devinfo->is_g4x) {
209948 SAMPLER_INSTDONE_IEFDone_bits(const struct gen_device_info *devinfo)
209950    switch (devinfo->gen) {
209956       if (devinfo->is_haswell) {
209964       if (devinfo->is_g4x) {
209984 SAMPLER_INSTDONE_IEFDone_start(const struct gen_device_info *devinfo)
209986    switch (devinfo->gen) {
209992       if (devinfo->is_haswell) {
210000       if (devinfo->is_g4x) {
210022 SAMPLER_INSTDONE_IMEDone_bits(const struct gen_device_info *devinfo)
210024    switch (devinfo->gen) {
210030       if (devinfo->is_haswell) {
210038       if (devinfo->is_g4x) {
210057 SAMPLER_INSTDONE_IMEDone_start(const struct gen_device_info *devinfo)
210059    switch (devinfo->gen) {
210065       if (devinfo->is_haswell) {
210073       if (devinfo->is_g4x) {
210096 SAMPLER_INSTDONE_MT0Done_bits(const struct gen_device_info *devinfo)
210098    switch (devinfo->gen) {
210104       if (devinfo->is_haswell) {
210112       if (devinfo->is_g4x) {
210132 SAMPLER_INSTDONE_MT0Done_start(const struct gen_device_info *devinfo)
210134    switch (devinfo->gen) {
210140       if (devinfo->is_haswell) {
210148       if (devinfo->is_g4x) {
210166 SAMPLER_INSTDONE_MT1Done_bits(const struct gen_device_info *devinfo)
210168    switch (devinfo->gen) {
210174       if (devinfo->is_haswell) {
210182       if (devinfo->is_g4x) {
210197 SAMPLER_INSTDONE_MT1Done_start(const struct gen_device_info *devinfo)
210199    switch (devinfo->gen) {
210205       if (devinfo->is_haswell) {
210213       if (devinfo->is_g4x) {
210236 SAMPLER_INSTDONE_PL0Done_bits(const struct gen_device_info *devinfo)
210238    switch (devinfo->gen) {
210244       if (devinfo->is_haswell) {
210252       if (devinfo->is_g4x) {
210272 SAMPLER_INSTDONE_PL0Done_start(const struct gen_device_info *devinfo)
210274    switch (devinfo->gen) {
210280       if (devinfo->is_haswell) {
210288       if (devinfo->is_g4x) {
210311 SAMPLER_INSTDONE_QCDone_bits(const struct gen_device_info *devinfo)
210313    switch (devinfo->gen) {
210319       if (devinfo->is_haswell) {
210327       if (devinfo->is_g4x) {
210347 SAMPLER_INSTDONE_QCDone_start(const struct gen_device_info *devinfo)
210349    switch (devinfo->gen) {
210355       if (devinfo->is_haswell) {
210363       if (devinfo->is_g4x) {
210386 SAMPLER_INSTDONE_SCDone_bits(const struct gen_device_info *devinfo)
210388    switch (devinfo->gen) {
210394       if (devinfo->is_haswell) {
210402       if (devinfo->is_g4x) {
210422 SAMPLER_INSTDONE_SCDone_start(const struct gen_device_info *devinfo)
210424    switch (devinfo->gen) {
210430       if (devinfo->is_haswell) {
210438       if (devinfo->is_g4x) {
210461 SAMPLER_INSTDONE_SI0Done_bits(const struct gen_device_info *devinfo)
210463    switch (devinfo->gen) {
210469       if (devinfo->is_haswell) {
210477       if (devinfo->is_g4x) {
210497 SAMPLER_INSTDONE_SI0Done_start(const struct gen_device_info *devinfo)
210499    switch (devinfo->gen) {
210505       if (devinfo->is_haswell) {
210513       if (devinfo->is_g4x) {
210536 SAMPLER_INSTDONE_SO0Done_bits(const struct gen_device_info *devinfo)
210538    switch (devinfo->gen) {
210544       if (devinfo->is_haswell) {
210552       if (devinfo->is_g4x) {
210572 SAMPLER_INSTDONE_SO0Done_start(const struct gen_device_info *devinfo)
210574    switch (devinfo->gen) {
210580       if (devinfo->is_haswell) {
210588       if (devinfo->is_g4x) {
210611 SAMPLER_INSTDONE_SVSMARB1_bits(const struct gen_device_info *devinfo)
210613    switch (devinfo->gen) {
210619       if (devinfo->is_haswell) {
210627       if (devinfo->is_g4x) {
210647 SAMPLER_INSTDONE_SVSMARB1_start(const struct gen_device_info *devinfo)
210649    switch (devinfo->gen) {
210655       if (devinfo->is_haswell) {
210663       if (devinfo->is_g4x) {
210686 SAMPLER_INSTDONE_SVSMARB2_bits(const struct gen_device_info *devinfo)
210688    switch (devinfo->gen) {
210694       if (devinfo->is_haswell) {
210702       if (devinfo->is_g4x) {
210722 SAMPLER_INSTDONE_SVSMARB2_start(const struct gen_device_info *devinfo)
210724    switch (devinfo->gen) {
210730       if (devinfo->is_haswell) {
210738       if (devinfo->is_g4x) {
210759 SAMPLER_INSTDONE_SVSMARB3_bits(const struct gen_device_info *devinfo)
210761    switch (devinfo->gen) {
210767       if (devinfo->is_haswell) {
210775       if (devinfo->is_g4x) {
210793 SAMPLER_INSTDONE_SVSMARB3_start(const struct gen_device_info *devinfo)
210795    switch (devinfo->gen) {
210801       if (devinfo->is_haswell) {
210809       if (devinfo->is_g4x) {
210832 SAMPLER_INSTDONE_SVSMAdapter_bits(const struct gen_device_info *devinfo)
210834    switch (devinfo->gen) {
210840       if (devinfo->is_haswell) {
210848       if (devinfo->is_g4x) {
210868 SAMPLER_INSTDONE_SVSMAdapter_start(const struct gen_device_info *devinfo)
210870    switch (devinfo->gen) {
210876       if (devinfo->is_haswell) {
210884       if (devinfo->is_g4x) {
210907 SAMPLER_INSTDONE_SVSMDone_bits(const struct gen_device_info *devinfo)
210909    switch (devinfo->gen) {
210915       if (devinfo->is_haswell) {
210923       if (devinfo->is_g4x) {
210943 SAMPLER_INSTDONE_SVSMDone_start(const struct gen_device_info *devinfo)
210945    switch (devinfo->gen) {
210951       if (devinfo->is_haswell) {
210959       if (devinfo->is_g4x) {
210978 SAMPLER_INSTDONE_SVSM_ARB_SIFM_bits(const struct gen_device_info *devinfo)
210980    switch (devinfo->gen) {
210986       if (devinfo->is_haswell) {
210994       if (devinfo->is_g4x) {
211010 SAMPLER_INSTDONE_SVSM_ARB_SIFM_start(const struct gen_device_info *devinfo)
211012    switch (devinfo->gen) {
211018       if (devinfo->is_haswell) {
211026       if (devinfo->is_g4x) {
211044 SAMPLER_INSTDONE_VDIDone_bits(const struct gen_device_info *devinfo)
211046    switch (devinfo->gen) {
211052       if (devinfo->is_haswell) {
211060       if (devinfo->is_g4x) {
211075 SAMPLER_INSTDONE_VDIDone_start(const struct gen_device_info *devinfo)
211077    switch (devinfo->gen) {
211083       if (devinfo->is_haswell) {
211091       if (devinfo->is_g4x) {
211109 SAMPLER_INSTDONE_VMEDone_bits(const struct gen_device_info *devinfo)
211111    switch (devinfo->gen) {
211117       if (devinfo->is_haswell) {
211125       if (devinfo->is_g4x) {
211140 SAMPLER_INSTDONE_VMEDone_start(const struct gen_device_info *devinfo)
211142    switch (devinfo->gen) {
211148       if (devinfo->is_haswell) {
211156       if (devinfo->is_g4x) {
211174 SAMPLER_MODE_length(const struct gen_device_info *devinfo)
211176    switch (devinfo->gen) {
211182       if (devinfo->is_haswell) {
211190       if (devinfo->is_g4x) {
211208 SAMPLER_MODE_HeaderlessMessageforPreemptableContexts_bits(const struct gen_device_info *devinfo)
211210    switch (devinfo->gen) {
211216       if (devinfo->is_haswell) {
211224       if (devinfo->is_g4x) {
211239 SAMPLER_MODE_HeaderlessMessageforPreemptableContexts_start(const struct gen_device_info *devinfo)
211241    switch (devinfo->gen) {
211247       if (devinfo->is_haswell) {
211255       if (devinfo->is_g4x) {
211273 SAMPLER_MODE_HeaderlessMessageforPreemptableContextsMask_bits(const struct gen_device_info *devinfo)
211275    switch (devinfo->gen) {
211281       if (devinfo->is_haswell) {
211289       if (devinfo->is_g4x) {
211304 SAMPLER_MODE_HeaderlessMessageforPreemptableContextsMask_start(const struct gen_device_info *devinfo)
211306    switch (devinfo->gen) {
211312       if (devinfo->is_haswell) {
211320       if (devinfo->is_g4x) {
211347 SAMPLER_STATE_length(const struct gen_device_info *devinfo)
211349    switch (devinfo->gen) {
211355       if (devinfo->is_haswell) {
211363       if (devinfo->is_g4x) {
211386 SAMPLER_STATE_AnisotropicAlgorithm_bits(const struct gen_device_info *devinfo)
211388    switch (devinfo->gen) {
211394       if (devinfo->is_haswell) {
211402       if (devinfo->is_g4x) {
211422 SAMPLER_STATE_AnisotropicAlgorithm_start(const struct gen_device_info *devinfo)
211424    switch (devinfo->gen) {
211430       if (devinfo->is_haswell) {
211438       if (devinfo->is_g4x) {
211462 SAMPLER_STATE_BaseMipLevel_bits(const struct gen_device_info *devinfo)
211464    switch (devinfo->gen) {
211470       if (devinfo->is_haswell) {
211478       if (devinfo->is_g4x) {
211499 SAMPLER_STATE_BaseMipLevel_start(const struct gen_device_info *devinfo)
211501    switch (devinfo->gen) {
211507       if (devinfo->is_haswell) {
211515       if (devinfo->is_g4x) {
211542 SAMPLER_STATE_BorderColorPointer_bits(const struct gen_device_info *devinfo)
211544    switch (devinfo->gen) {
211550       if (devinfo->is_haswell) {
211558       if (devinfo->is_g4x) {
211582 SAMPLER_STATE_BorderColorPointer_start(const struct gen_device_info *devinfo)
211584    switch (devinfo->gen) {
211590       if (devinfo->is_haswell) {
211598       if (devinfo->is_g4x) {
211625 SAMPLER_STATE_ChromaKeyEnable_bits(const struct gen_device_info *devinfo)
211627    switch (devinfo->gen) {
211633       if (devinfo->is_haswell) {
211641       if (devinfo->is_g4x) {
211665 SAMPLER_STATE_ChromaKeyEnable_start(const struct gen_device_info *devinfo)
211667    switch (devinfo->gen) {
211673       if (devinfo->is_haswell) {
211681       if (devinfo->is_g4x) {
211708 SAMPLER_STATE_ChromaKeyIndex_bits(const struct gen_device_info *devinfo)
211710    switch (devinfo->gen) {
211716       if (devinfo->is_haswell) {
211724       if (devinfo->is_g4x) {
211748 SAMPLER_STATE_ChromaKeyIndex_start(const struct gen_device_info *devinfo)
211750    switch (devinfo->gen) {
211756       if (devinfo->is_haswell) {
211764       if (devinfo->is_g4x) {
211791 SAMPLER_STATE_ChromaKeyMode_bits(const struct gen_device_info *devinfo)
211793    switch (devinfo->gen) {
211799       if (devinfo->is_haswell) {
211807       if (devinfo->is_g4x) {
211831 SAMPLER_STATE_ChromaKeyMode_start(const struct gen_device_info *devinfo)
211833    switch (devinfo->gen) {
211839       if (devinfo->is_haswell) {
211847       if (devinfo->is_g4x) {
211867 SAMPLER_STATE_CoarseLODQualityMode_bits(const struct gen_device_info *devinfo)
211869    switch (devinfo->gen) {
211875       if (devinfo->is_haswell) {
211883       if (devinfo->is_g4x) {
211900 SAMPLER_STATE_CoarseLODQualityMode_start(const struct gen_device_info *devinfo)
211902    switch (devinfo->gen) {
211908       if (devinfo->is_haswell) {
211916       if (devinfo->is_g4x) {
211943 SAMPLER_STATE_CubeSurfaceControlMode_bits(const struct gen_device_info *devinfo)
211945    switch (devinfo->gen) {
211951       if (devinfo->is_haswell) {
211959       if (devinfo->is_g4x) {
211983 SAMPLER_STATE_CubeSurfaceControlMode_start(const struct gen_device_info *devinfo)
211985    switch (devinfo->gen) {
211991       if (devinfo->is_haswell) {
211999       if (devinfo->is_g4x) {
212018 SAMPLER_STATE_Forcegather4Behavior_bits(const struct gen_device_info *devinfo)
212020    switch (devinfo->gen) {
212026       if (devinfo->is_haswell) {
212034       if (devinfo->is_g4x) {
212050 SAMPLER_STATE_Forcegather4Behavior_start(const struct gen_device_info *devinfo)
212052    switch (devinfo->gen) {
212058       if (devinfo->is_haswell) {
212066       if (devinfo->is_g4x) {
212087 SAMPLER_STATE_LODClampMagnificationMode_bits(const struct gen_device_info *devinfo)
212089    switch (devinfo->gen) {
212095       if (devinfo->is_haswell) {
212103       if (devinfo->is_g4x) {
212121 SAMPLER_STATE_LODClampMagnificationMode_start(const struct gen_device_info *devinfo)
212123    switch (devinfo->gen) {
212129       if (devinfo->is_haswell) {
212137       if (devinfo->is_g4x) {
212160 SAMPLER_STATE_LODPreClampEnable_bits(const struct gen_device_info *devinfo)
212162    switch (devinfo->gen) {
212168       if (devinfo->is_haswell) {
212176       if (devinfo->is_g4x) {
212196 SAMPLER_STATE_LODPreClampEnable_start(const struct gen_device_info *devinfo)
212198    switch (devinfo->gen) {
212204       if (devinfo->is_haswell) {
212212       if (devinfo->is_g4x) {
212233 SAMPLER_STATE_LODPreClampMode_bits(const struct gen_device_info *devinfo)
212235    switch (devinfo->gen) {
212241       if (devinfo->is_haswell) {
212249       if (devinfo->is_g4x) {
212267 SAMPLER_STATE_LODPreClampMode_start(const struct gen_device_info *devinfo)
212269    switch (devinfo->gen) {
212275       if (devinfo->is_haswell) {
212283       if (devinfo->is_g4x) {
212310 SAMPLER_STATE_MagModeFilter_bits(const struct gen_device_info *devinfo)
212312    switch (devinfo->gen) {
212318       if (devinfo->is_haswell) {
212326       if (devinfo->is_g4x) {
212350 SAMPLER_STATE_MagModeFilter_start(const struct gen_device_info *devinfo)
212352    switch (devinfo->gen) {
212358       if (devinfo->is_haswell) {
212366       if (devinfo->is_g4x) {
212393 SAMPLER_STATE_MaxLOD_bits(const struct gen_device_info *devinfo)
212395    switch (devinfo->gen) {
212401       if (devinfo->is_haswell) {
212409       if (devinfo->is_g4x) {
212433 SAMPLER_STATE_MaxLOD_start(const struct gen_device_info *devinfo)
212435    switch (devinfo->gen) {
212441       if (devinfo->is_haswell) {
212449       if (devinfo->is_g4x) {
212476 SAMPLER_STATE_MaximumAnisotropy_bits(const struct gen_device_info *devinfo)
212478    switch (devinfo->gen) {
212484       if (devinfo->is_haswell) {
212492       if (devinfo->is_g4x) {
212516 SAMPLER_STATE_MaximumAnisotropy_start(const struct gen_device_info *devinfo)
212518    switch (devinfo->gen) {
212524       if (devinfo->is_haswell) {
212532       if (devinfo->is_g4x) {
212559 SAMPLER_STATE_MinLOD_bits(const struct gen_device_info *devinfo)
212561    switch (devinfo->gen) {
212567       if (devinfo->is_haswell) {
212575       if (devinfo->is_g4x) {
212599 SAMPLER_STATE_MinLOD_start(const struct gen_device_info *devinfo)
212601    switch (devinfo->gen) {
212607       if (devinfo->is_haswell) {
212615       if (devinfo->is_g4x) {
212642 SAMPLER_STATE_MinModeFilter_bits(const struct gen_device_info *devinfo)
212644    switch (devinfo->gen) {
212650       if (devinfo->is_haswell) {
212658       if (devinfo->is_g4x) {
212682 SAMPLER_STATE_MinModeFilter_start(const struct gen_device_info *devinfo)
212684    switch (devinfo->gen) {
212690       if (devinfo->is_haswell) {
212698       if (devinfo->is_g4x) {
212716 SAMPLER_STATE_MinandMagStateNotEqual_bits(const struct gen_device_info *devinfo)
212718    switch (devinfo->gen) {
212724       if (devinfo->is_haswell) {
212732       if (devinfo->is_g4x) {
212747 SAMPLER_STATE_MinandMagStateNotEqual_start(const struct gen_device_info *devinfo)
212749    switch (devinfo->gen) {
212755       if (devinfo->is_haswell) {
212763       if (devinfo->is_g4x) {
212790 SAMPLER_STATE_MipModeFilter_bits(const struct gen_device_info *devinfo)
212792    switch (devinfo->gen) {
212798       if (devinfo->is_haswell) {
212806       if (devinfo->is_g4x) {
212830 SAMPLER_STATE_MipModeFilter_start(const struct gen_device_info *devinfo)
212832    switch (devinfo->gen) {
212838       if (devinfo->is_haswell) {
212846       if (devinfo->is_g4x) {
212865 SAMPLER_STATE_MonochromeFilterHeight_bits(const struct gen_device_info *devinfo)
212867    switch (devinfo->gen) {
212873       if (devinfo->is_haswell) {
212881       if (devinfo->is_g4x) {
212897 SAMPLER_STATE_MonochromeFilterHeight_start(const struct gen_device_info *devinfo)
212899    switch (devinfo->gen) {
212905       if (devinfo->is_haswell) {
212913       if (devinfo->is_g4x) {
212931 SAMPLER_STATE_MonochromeFilterHeightReserved_bits(const struct gen_device_info *devinfo)
212933    switch (devinfo->gen) {
212939       if (devinfo->is_haswell) {
212947       if (devinfo->is_g4x) {
212962 SAMPLER_STATE_MonochromeFilterHeightReserved_start(const struct gen_device_info *devinfo)
212964    switch (devinfo->gen) {
212970       if (devinfo->is_haswell) {
212978       if (devinfo->is_g4x) {
212998 SAMPLER_STATE_MonochromeFilterWidth_bits(const struct gen_device_info *devinfo)
213000    switch (devinfo->gen) {
213006       if (devinfo->is_haswell) {
213014       if (devinfo->is_g4x) {
213031 SAMPLER_STATE_MonochromeFilterWidth_start(const struct gen_device_info *devinfo)
213033    switch (devinfo->gen) {
213039       if (devinfo->is_haswell) {
213047       if (devinfo->is_g4x) {
213071 SAMPLER_STATE_NonnormalizedCoordinateEnable_bits(const struct gen_device_info *devinfo)
213073    switch (devinfo->gen) {
213079       if (devinfo->is_haswell) {
213087       if (devinfo->is_g4x) {
213108 SAMPLER_STATE_NonnormalizedCoordinateEnable_start(const struct gen_device_info *devinfo)
213110    switch (devinfo->gen) {
213116       if (devinfo->is_haswell) {
213124       if (devinfo->is_g4x) {
213151 SAMPLER_STATE_RAddressMagFilterRoundingEnable_bits(const struct gen_device_info *devinfo)
213153    switch (devinfo->gen) {
213159       if (devinfo->is_haswell) {
213167       if (devinfo->is_g4x) {
213191 SAMPLER_STATE_RAddressMagFilterRoundingEnable_start(const struct gen_device_info *devinfo)
213193    switch (devinfo->gen) {
213199       if (devinfo->is_haswell) {
213207       if (devinfo->is_g4x) {
213234 SAMPLER_STATE_RAddressMinFilterRoundingEnable_bits(const struct gen_device_info *devinfo)
213236    switch (devinfo->gen) {
213242       if (devinfo->is_haswell) {
213250       if (devinfo->is_g4x) {
213274 SAMPLER_STATE_RAddressMinFilterRoundingEnable_start(const struct gen_device_info *devinfo)
213276    switch (devinfo->gen) {
213282       if (devinfo->is_haswell) {
213290       if (devinfo->is_g4x) {
213310 SAMPLER_STATE_ReductionType_bits(const struct gen_device_info *devinfo)
213312    switch (devinfo->gen) {
213318       if (devinfo->is_haswell) {
213326       if (devinfo->is_g4x) {
213343 SAMPLER_STATE_ReductionType_start(const struct gen_device_info *devinfo)
213345    switch (devinfo->gen) {
213351       if (devinfo->is_haswell) {
213359       if (devinfo->is_g4x) {
213379 SAMPLER_STATE_ReductionTypeEnable_bits(const struct gen_device_info *devinfo)
213381    switch (devinfo->gen) {
213387       if (devinfo->is_haswell) {
213395       if (devinfo->is_g4x) {
213412 SAMPLER_STATE_ReductionTypeEnable_start(const struct gen_device_info *devinfo)
213414    switch (devinfo->gen) {
213420       if (devinfo->is_haswell) {
213428       if (devinfo->is_g4x) {
213446 SAMPLER_STATE_ReturnFilterWeightforBorderTexels_bits(const struct gen_device_info *devinfo)
213448    switch (devinfo->gen) {
213454       if (devinfo->is_haswell) {
213462       if (devinfo->is_g4x) {
213477 SAMPLER_STATE_ReturnFilterWeightforBorderTexels_start(const struct gen_device_info *devinfo)
213479    switch (devinfo->gen) {
213485       if (devinfo->is_haswell) {
213493       if (devinfo->is_g4x) {
213511 SAMPLER_STATE_ReturnFilterWeightforNullTexels_bits(const struct gen_device_info *devinfo)
213513    switch (devinfo->gen) {
213519       if (devinfo->is_haswell) {
213527       if (devinfo->is_g4x) {
213542 SAMPLER_STATE_ReturnFilterWeightforNullTexels_start(const struct gen_device_info *devinfo)
213544    switch (devinfo->gen) {
213550       if (devinfo->is_haswell) {
213558       if (devinfo->is_g4x) {
213576 SAMPLER_STATE_SRGBDECODE_bits(const struct gen_device_info *devinfo)
213578    switch (devinfo->gen) {
213584       if (devinfo->is_haswell) {
213592       if (devinfo->is_g4x) {
213607 SAMPLER_STATE_SRGBDECODE_start(const struct gen_device_info *devinfo)
213609    switch (devinfo->gen) {
213615       if (devinfo->is_haswell) {
213623       if (devinfo->is_g4x) {
213650 SAMPLER_STATE_SamplerDisable_bits(const struct gen_device_info *devinfo)
213652    switch (devinfo->gen) {
213658       if (devinfo->is_haswell) {
213666       if (devinfo->is_g4x) {
213690 SAMPLER_STATE_SamplerDisable_start(const struct gen_device_info *devinfo)
213692    switch (devinfo->gen) {
213698       if (devinfo->is_haswell) {
213706       if (devinfo->is_g4x) {
213733 SAMPLER_STATE_ShadowFunction_bits(const struct gen_device_info *devinfo)
213735    switch (devinfo->gen) {
213741       if (devinfo->is_haswell) {
213749       if (devinfo->is_g4x) {
213773 SAMPLER_STATE_ShadowFunction_start(const struct gen_device_info *devinfo)
213775    switch (devinfo->gen) {
213781       if (devinfo->is_haswell) {
213789       if (devinfo->is_g4x) {
213816 SAMPLER_STATE_TCXAddressControlMode_bits(const struct gen_device_info *devinfo)
213818    switch (devinfo->gen) {
213824       if (devinfo->is_haswell) {
213832       if (devinfo->is_g4x) {
213856 SAMPLER_STATE_TCXAddressControlMode_start(const struct gen_device_info *devinfo)
213858    switch (devinfo->gen) {
213864       if (devinfo->is_haswell) {
213872       if (devinfo->is_g4x) {
213899 SAMPLER_STATE_TCYAddressControlMode_bits(const struct gen_device_info *devinfo)
213901    switch (devinfo->gen) {
213907       if (devinfo->is_haswell) {
213915       if (devinfo->is_g4x) {
213939 SAMPLER_STATE_TCYAddressControlMode_start(const struct gen_device_info *devinfo)
213941    switch (devinfo->gen) {
213947       if (devinfo->is_haswell) {
213955       if (devinfo->is_g4x) {
213982 SAMPLER_STATE_TCZAddressControlMode_bits(const struct gen_device_info *devinfo)
213984    switch (devinfo->gen) {
213990       if (devinfo->is_haswell) {
213998       if (devinfo->is_g4x) {
214022 SAMPLER_STATE_TCZAddressControlMode_start(const struct gen_device_info *devinfo)
214024    switch (devinfo->gen) {
214030       if (devinfo->is_haswell) {
214038       if (devinfo->is_g4x) {
214062 SAMPLER_STATE_TextureBorderColorMode_bits(const struct gen_device_info *devinfo)
214064    switch (devinfo->gen) {
214070       if (devinfo->is_haswell) {
214078       if (devinfo->is_g4x) {
214099 SAMPLER_STATE_TextureBorderColorMode_start(const struct gen_device_info *devinfo)
214101    switch (devinfo->gen) {
214107       if (devinfo->is_haswell) {
214115       if (devinfo->is_g4x) {
214142 SAMPLER_STATE_TextureLODBias_bits(const struct gen_device_info *devinfo)
214144    switch (devinfo->gen) {
214150       if (devinfo->is_haswell) {
214158       if (devinfo->is_g4x) {
214182 SAMPLER_STATE_TextureLODBias_start(const struct gen_device_info *devinfo)
214184    switch (devinfo->gen) {
214190       if (devinfo->is_haswell) {
214198       if (devinfo->is_g4x) {
214221 SAMPLER_STATE_TrilinearFilterQuality_bits(const struct gen_device_info *devinfo)
214223    switch (devinfo->gen) {
214229       if (devinfo->is_haswell) {
214237       if (devinfo->is_g4x) {
214257 SAMPLER_STATE_TrilinearFilterQuality_start(const struct gen_device_info *devinfo)
214259    switch (devinfo->gen) {
214265       if (devinfo->is_haswell) {
214273       if (devinfo->is_g4x) {
214300 SAMPLER_STATE_UAddressMagFilterRoundingEnable_bits(const struct gen_device_info *devinfo)
214302    switch (devinfo->gen) {
214308       if (devinfo->is_haswell) {
214316       if (devinfo->is_g4x) {
214340 SAMPLER_STATE_UAddressMagFilterRoundingEnable_start(const struct gen_device_info *devinfo)
214342    switch (devinfo->gen) {
214348       if (devinfo->is_haswell) {
214356       if (devinfo->is_g4x) {
214383 SAMPLER_STATE_UAddressMinFilterRoundingEnable_bits(const struct gen_device_info *devinfo)
214385    switch (devinfo->gen) {
214391       if (devinfo->is_haswell) {
214399       if (devinfo->is_g4x) {
214423 SAMPLER_STATE_UAddressMinFilterRoundingEnable_start(const struct gen_device_info *devinfo)
214425    switch (devinfo->gen) {
214431       if (devinfo->is_haswell) {
214439       if (devinfo->is_g4x) {
214466 SAMPLER_STATE_VAddressMagFilterRoundingEnable_bits(const struct gen_device_info *devinfo)
214468    switch (devinfo->gen) {
214474       if (devinfo->is_haswell) {
214482       if (devinfo->is_g4x) {
214506 SAMPLER_STATE_VAddressMagFilterRoundingEnable_start(const struct gen_device_info *devinfo)
214508    switch (devinfo->gen) {
214514       if (devinfo->is_haswell) {
214522       if (devinfo->is_g4x) {
214549 SAMPLER_STATE_VAddressMinFilterRoundingEnable_bits(const struct gen_device_info *devinfo)
214551    switch (devinfo->gen) {
214557       if (devinfo->is_haswell) {
214565       if (devinfo->is_g4x) {
214589 SAMPLER_STATE_VAddressMinFilterRoundingEnable_start(const struct gen_device_info *devinfo)
214591    switch (devinfo->gen) {
214597       if (devinfo->is_haswell) {
214605       if (devinfo->is_g4x) {
214626 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_length(const struct gen_device_info *devinfo)
214628    switch (devinfo->gen) {
214634       if (devinfo->is_haswell) {
214642       if (devinfo->is_g4x) {
214662 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0FilterCoefficient_bits(const struct gen_device_info *devinfo)
214664    switch (devinfo->gen) {
214670       if (devinfo->is_haswell) {
214678       if (devinfo->is_g4x) {
214695 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0FilterCoefficient_start(const struct gen_device_info *devinfo)
214697    switch (devinfo->gen) {
214703       if (devinfo->is_haswell) {
214711       if (devinfo->is_g4x) {
214729 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn0_bits(const struct gen_device_info *devinfo)
214731    switch (devinfo->gen) {
214737       if (devinfo->is_haswell) {
214745       if (devinfo->is_g4x) {
214760 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn0_start(const struct gen_device_info *devinfo)
214762    switch (devinfo->gen) {
214768       if (devinfo->is_haswell) {
214776       if (devinfo->is_g4x) {
214794 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn1_bits(const struct gen_device_info *devinfo)
214796    switch (devinfo->gen) {
214802       if (devinfo->is_haswell) {
214810       if (devinfo->is_g4x) {
214825 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn1_start(const struct gen_device_info *devinfo)
214827    switch (devinfo->gen) {
214833       if (devinfo->is_haswell) {
214841       if (devinfo->is_g4x) {
214859 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
214861    switch (devinfo->gen) {
214867       if (devinfo->is_haswell) {
214875       if (devinfo->is_g4x) {
214890 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn2_start(const struct gen_device_info *devinfo)
214892    switch (devinfo->gen) {
214898       if (devinfo->is_haswell) {
214906       if (devinfo->is_g4x) {
214924 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
214926    switch (devinfo->gen) {
214932       if (devinfo->is_haswell) {
214940       if (devinfo->is_g4x) {
214955 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn3_start(const struct gen_device_info *devinfo)
214957    switch (devinfo->gen) {
214963       if (devinfo->is_haswell) {
214971       if (devinfo->is_g4x) {
214989 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
214991    switch (devinfo->gen) {
214997       if (devinfo->is_haswell) {
215005       if (devinfo->is_g4x) {
215020 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn4_start(const struct gen_device_info *devinfo)
215022    switch (devinfo->gen) {
215028       if (devinfo->is_haswell) {
215036       if (devinfo->is_g4x) {
215054 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
215056    switch (devinfo->gen) {
215062       if (devinfo->is_haswell) {
215070       if (devinfo->is_g4x) {
215085 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn5_start(const struct gen_device_info *devinfo)
215087    switch (devinfo->gen) {
215093       if (devinfo->is_haswell) {
215101       if (devinfo->is_g4x) {
215119 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn6_bits(const struct gen_device_info *devinfo)
215121    switch (devinfo->gen) {
215127       if (devinfo->is_haswell) {
215135       if (devinfo->is_g4x) {
215150 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn6_start(const struct gen_device_info *devinfo)
215152    switch (devinfo->gen) {
215158       if (devinfo->is_haswell) {
215166       if (devinfo->is_g4x) {
215184 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn7_bits(const struct gen_device_info *devinfo)
215186    switch (devinfo->gen) {
215192       if (devinfo->is_haswell) {
215200       if (devinfo->is_g4x) {
215215 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn7_start(const struct gen_device_info *devinfo)
215217    switch (devinfo->gen) {
215223       if (devinfo->is_haswell) {
215231       if (devinfo->is_g4x) {
215249 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn0_bits(const struct gen_device_info *devinfo)
215251    switch (devinfo->gen) {
215257       if (devinfo->is_haswell) {
215265       if (devinfo->is_g4x) {
215280 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn0_start(const struct gen_device_info *devinfo)
215282    switch (devinfo->gen) {
215288       if (devinfo->is_haswell) {
215296       if (devinfo->is_g4x) {
215314 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn1_bits(const struct gen_device_info *devinfo)
215316    switch (devinfo->gen) {
215322       if (devinfo->is_haswell) {
215330       if (devinfo->is_g4x) {
215345 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn1_start(const struct gen_device_info *devinfo)
215347    switch (devinfo->gen) {
215353       if (devinfo->is_haswell) {
215361       if (devinfo->is_g4x) {
215379 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
215381    switch (devinfo->gen) {
215387       if (devinfo->is_haswell) {
215395       if (devinfo->is_g4x) {
215410 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn2_start(const struct gen_device_info *devinfo)
215412    switch (devinfo->gen) {
215418       if (devinfo->is_haswell) {
215426       if (devinfo->is_g4x) {
215444 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
215446    switch (devinfo->gen) {
215452       if (devinfo->is_haswell) {
215460       if (devinfo->is_g4x) {
215475 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn3_start(const struct gen_device_info *devinfo)
215477    switch (devinfo->gen) {
215483       if (devinfo->is_haswell) {
215491       if (devinfo->is_g4x) {
215509 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
215511    switch (devinfo->gen) {
215517       if (devinfo->is_haswell) {
215525       if (devinfo->is_g4x) {
215540 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn4_start(const struct gen_device_info *devinfo)
215542    switch (devinfo->gen) {
215548       if (devinfo->is_haswell) {
215556       if (devinfo->is_g4x) {
215574 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
215576    switch (devinfo->gen) {
215582       if (devinfo->is_haswell) {
215590       if (devinfo->is_g4x) {
215605 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn5_start(const struct gen_device_info *devinfo)
215607    switch (devinfo->gen) {
215613       if (devinfo->is_haswell) {
215621       if (devinfo->is_g4x) {
215639 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn6_bits(const struct gen_device_info *devinfo)
215641    switch (devinfo->gen) {
215647       if (devinfo->is_haswell) {
215655       if (devinfo->is_g4x) {
215670 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn6_start(const struct gen_device_info *devinfo)
215672    switch (devinfo->gen) {
215678       if (devinfo->is_haswell) {
215686       if (devinfo->is_g4x) {
215704 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn7_bits(const struct gen_device_info *devinfo)
215706    switch (devinfo->gen) {
215712       if (devinfo->is_haswell) {
215720       if (devinfo->is_g4x) {
215735 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn7_start(const struct gen_device_info *devinfo)
215737    switch (devinfo->gen) {
215743       if (devinfo->is_haswell) {
215751       if (devinfo->is_g4x) {
215771 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1FilterCoefficient0_bits(const struct gen_device_info *devinfo)
215773    switch (devinfo->gen) {
215779       if (devinfo->is_haswell) {
215787       if (devinfo->is_g4x) {
215804 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1FilterCoefficient0_start(const struct gen_device_info *devinfo)
215806    switch (devinfo->gen) {
215812       if (devinfo->is_haswell) {
215820       if (devinfo->is_g4x) {
215840 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1FilterCoefficient1_bits(const struct gen_device_info *devinfo)
215842    switch (devinfo->gen) {
215848       if (devinfo->is_haswell) {
215856       if (devinfo->is_g4x) {
215873 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1FilterCoefficient1_start(const struct gen_device_info *devinfo)
215875    switch (devinfo->gen) {
215881       if (devinfo->is_haswell) {
215889       if (devinfo->is_g4x) {
215907 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
215909    switch (devinfo->gen) {
215915       if (devinfo->is_haswell) {
215923       if (devinfo->is_g4x) {
215938 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn2_start(const struct gen_device_info *devinfo)
215940    switch (devinfo->gen) {
215946       if (devinfo->is_haswell) {
215954       if (devinfo->is_g4x) {
215972 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
215974    switch (devinfo->gen) {
215980       if (devinfo->is_haswell) {
215988       if (devinfo->is_g4x) {
216003 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn3_start(const struct gen_device_info *devinfo)
216005    switch (devinfo->gen) {
216011       if (devinfo->is_haswell) {
216019       if (devinfo->is_g4x) {
216037 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
216039    switch (devinfo->gen) {
216045       if (devinfo->is_haswell) {
216053       if (devinfo->is_g4x) {
216068 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn4_start(const struct gen_device_info *devinfo)
216070    switch (devinfo->gen) {
216076       if (devinfo->is_haswell) {
216084       if (devinfo->is_g4x) {
216102 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
216104    switch (devinfo->gen) {
216110       if (devinfo->is_haswell) {
216118       if (devinfo->is_g4x) {
216133 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn5_start(const struct gen_device_info *devinfo)
216135    switch (devinfo->gen) {
216141       if (devinfo->is_haswell) {
216149       if (devinfo->is_g4x) {
216167 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
216169    switch (devinfo->gen) {
216175       if (devinfo->is_haswell) {
216183       if (devinfo->is_g4x) {
216198 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn2_start(const struct gen_device_info *devinfo)
216200    switch (devinfo->gen) {
216206       if (devinfo->is_haswell) {
216214       if (devinfo->is_g4x) {
216232 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
216234    switch (devinfo->gen) {
216240       if (devinfo->is_haswell) {
216248       if (devinfo->is_g4x) {
216263 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn3_start(const struct gen_device_info *devinfo)
216265    switch (devinfo->gen) {
216271       if (devinfo->is_haswell) {
216279       if (devinfo->is_g4x) {
216297 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
216299    switch (devinfo->gen) {
216305       if (devinfo->is_haswell) {
216313       if (devinfo->is_g4x) {
216328 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn4_start(const struct gen_device_info *devinfo)
216330    switch (devinfo->gen) {
216336       if (devinfo->is_haswell) {
216344       if (devinfo->is_g4x) {
216362 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
216364    switch (devinfo->gen) {
216370       if (devinfo->is_haswell) {
216378       if (devinfo->is_g4x) {
216393 SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn5_start(const struct gen_device_info *devinfo)
216395    switch (devinfo->gen) {
216401       if (devinfo->is_haswell) {
216409       if (devinfo->is_g4x) {
216436 SCISSOR_RECT_length(const struct gen_device_info *devinfo)
216438    switch (devinfo->gen) {
216444       if (devinfo->is_haswell) {
216452       if (devinfo->is_g4x) {
216479 SCISSOR_RECT_ScissorRectangleXMax_bits(const struct gen_device_info *devinfo)
216481    switch (devinfo->gen) {
216487       if (devinfo->is_haswell) {
216495       if (devinfo->is_g4x) {
216519 SCISSOR_RECT_ScissorRectangleXMax_start(const struct gen_device_info *devinfo)
216521    switch (devinfo->gen) {
216527       if (devinfo->is_haswell) {
216535       if (devinfo->is_g4x) {
216562 SCISSOR_RECT_ScissorRectangleXMin_bits(const struct gen_device_info *devinfo)
216564    switch (devinfo->gen) {
216570       if (devinfo->is_haswell) {
216578       if (devinfo->is_g4x) {
216602 SCISSOR_RECT_ScissorRectangleXMin_start(const struct gen_device_info *devinfo)
216604    switch (devinfo->gen) {
216610       if (devinfo->is_haswell) {
216618       if (devinfo->is_g4x) {
216645 SCISSOR_RECT_ScissorRectangleYMax_bits(const struct gen_device_info *devinfo)
216647    switch (devinfo->gen) {
216653       if (devinfo->is_haswell) {
216661       if (devinfo->is_g4x) {
216685 SCISSOR_RECT_ScissorRectangleYMax_start(const struct gen_device_info *devinfo)
216687    switch (devinfo->gen) {
216693       if (devinfo->is_haswell) {
216701       if (devinfo->is_g4x) {
216728 SCISSOR_RECT_ScissorRectangleYMin_bits(const struct gen_device_info *devinfo)
216730    switch (devinfo->gen) {
216736       if (devinfo->is_haswell) {
216744       if (devinfo->is_g4x) {
216768 SCISSOR_RECT_ScissorRectangleYMin_start(const struct gen_device_info *devinfo)
216770    switch (devinfo->gen) {
216776       if (devinfo->is_haswell) {
216784       if (devinfo->is_g4x) {
216802 SCRATCH1_length(const struct gen_device_info *devinfo)
216804    switch (devinfo->gen) {
216810       if (devinfo->is_haswell) {
216818       if (devinfo->is_g4x) {
216836 SCRATCH1_L3AtomicDisable_bits(const struct gen_device_info *devinfo)
216838    switch (devinfo->gen) {
216844       if (devinfo->is_haswell) {
216852       if (devinfo->is_g4x) {
216867 SCRATCH1_L3AtomicDisable_start(const struct gen_device_info *devinfo)
216869    switch (devinfo->gen) {
216875       if (devinfo->is_haswell) {
216883       if (devinfo->is_g4x) {
216906 SC_INSTDONE_length(const struct gen_device_info *devinfo)
216908    switch (devinfo->gen) {
216914       if (devinfo->is_haswell) {
216922       if (devinfo->is_g4x) {
216945 SC_INSTDONE_DAPBDone_bits(const struct gen_device_info *devinfo)
216947    switch (devinfo->gen) {
216953       if (devinfo->is_haswell) {
216961       if (devinfo->is_g4x) {
216981 SC_INSTDONE_DAPBDone_start(const struct gen_device_info *devinfo)
216983    switch (devinfo->gen) {
216989       if (devinfo->is_haswell) {
216997       if (devinfo->is_g4x) {
217020 SC_INSTDONE_DAPRBEDone_bits(const struct gen_device_info *devinfo)
217022    switch (devinfo->gen) {
217028       if (devinfo->is_haswell) {
217036       if (devinfo->is_g4x) {
217056 SC_INSTDONE_DAPRBEDone_start(const struct gen_device_info *devinfo)
217058    switch (devinfo->gen) {
217064       if (devinfo->is_haswell) {
217072       if (devinfo->is_g4x) {
217093 SC_INSTDONE_DC0Done_bits(const struct gen_device_info *devinfo)
217095    switch (devinfo->gen) {
217101       if (devinfo->is_haswell) {
217109       if (devinfo->is_g4x) {
217127 SC_INSTDONE_DC0Done_start(const struct gen_device_info *devinfo)
217129    switch (devinfo->gen) {
217135       if (devinfo->is_haswell) {
217143       if (devinfo->is_g4x) {
217164 SC_INSTDONE_DC1Done_bits(const struct gen_device_info *devinfo)
217166    switch (devinfo->gen) {
217172       if (devinfo->is_haswell) {
217180       if (devinfo->is_g4x) {
217198 SC_INSTDONE_DC1Done_start(const struct gen_device_info *devinfo)
217200    switch (devinfo->gen) {
217206       if (devinfo->is_haswell) {
217214       if (devinfo->is_g4x) {
217235 SC_INSTDONE_DC2Done_bits(const struct gen_device_info *devinfo)
217237    switch (devinfo->gen) {
217243       if (devinfo->is_haswell) {
217251       if (devinfo->is_g4x) {
217269 SC_INSTDONE_DC2Done_start(const struct gen_device_info *devinfo)
217271    switch (devinfo->gen) {
217277       if (devinfo->is_haswell) {
217285       if (devinfo->is_g4x) {
217305 SC_INSTDONE_DC3Done_bits(const struct gen_device_info *devinfo)
217307    switch (devinfo->gen) {
217313       if (devinfo->is_haswell) {
217321       if (devinfo->is_g4x) {
217338 SC_INSTDONE_DC3Done_start(const struct gen_device_info *devinfo)
217340    switch (devinfo->gen) {
217346       if (devinfo->is_haswell) {
217354       if (devinfo->is_g4x) {
217375 SC_INSTDONE_GW0Done_bits(const struct gen_device_info *devinfo)
217377    switch (devinfo->gen) {
217383       if (devinfo->is_haswell) {
217391       if (devinfo->is_g4x) {
217409 SC_INSTDONE_GW0Done_start(const struct gen_device_info *devinfo)
217411    switch (devinfo->gen) {
217417       if (devinfo->is_haswell) {
217425       if (devinfo->is_g4x) {
217446 SC_INSTDONE_GW1Done_bits(const struct gen_device_info *devinfo)
217448    switch (devinfo->gen) {
217454       if (devinfo->is_haswell) {
217462       if (devinfo->is_g4x) {
217480 SC_INSTDONE_GW1Done_start(const struct gen_device_info *devinfo)
217482    switch (devinfo->gen) {
217488       if (devinfo->is_haswell) {
217496       if (devinfo->is_g4x) {
217517 SC_INSTDONE_GW2Done_bits(const struct gen_device_info *devinfo)
217519    switch (devinfo->gen) {
217525       if (devinfo->is_haswell) {
217533       if (devinfo->is_g4x) {
217551 SC_INSTDONE_GW2Done_start(const struct gen_device_info *devinfo)
217553    switch (devinfo->gen) {
217559       if (devinfo->is_haswell) {
217567       if (devinfo->is_g4x) {
217587 SC_INSTDONE_GW3Done_bits(const struct gen_device_info *devinfo)
217589    switch (devinfo->gen) {
217595       if (devinfo->is_haswell) {
217603       if (devinfo->is_g4x) {
217620 SC_INSTDONE_GW3Done_start(const struct gen_device_info *devinfo)
217622    switch (devinfo->gen) {
217628       if (devinfo->is_haswell) {
217636       if (devinfo->is_g4x) {
217659 SC_INSTDONE_HIZDone_bits(const struct gen_device_info *devinfo)
217661    switch (devinfo->gen) {
217667       if (devinfo->is_haswell) {
217675       if (devinfo->is_g4x) {
217695 SC_INSTDONE_HIZDone_start(const struct gen_device_info *devinfo)
217697    switch (devinfo->gen) {
217703       if (devinfo->is_haswell) {
217711       if (devinfo->is_g4x) {
217729 SC_INSTDONE_IECPDone_bits(const struct gen_device_info *devinfo)
217731    switch (devinfo->gen) {
217737       if (devinfo->is_haswell) {
217745       if (devinfo->is_g4x) {
217760 SC_INSTDONE_IECPDone_start(const struct gen_device_info *devinfo)
217762    switch (devinfo->gen) {
217768       if (devinfo->is_haswell) {
217776       if (devinfo->is_g4x) {
217799 SC_INSTDONE_IZDone_bits(const struct gen_device_info *devinfo)
217801    switch (devinfo->gen) {
217807       if (devinfo->is_haswell) {
217815       if (devinfo->is_g4x) {
217835 SC_INSTDONE_IZDone_start(const struct gen_device_info *devinfo)
217837    switch (devinfo->gen) {
217843       if (devinfo->is_haswell) {
217851       if (devinfo->is_g4x) {
217874 SC_INSTDONE_RCCDone_bits(const struct gen_device_info *devinfo)
217876    switch (devinfo->gen) {
217882       if (devinfo->is_haswell) {
217890       if (devinfo->is_g4x) {
217910 SC_INSTDONE_RCCDone_start(const struct gen_device_info *devinfo)
217912    switch (devinfo->gen) {
217918       if (devinfo->is_haswell) {
217926       if (devinfo->is_g4x) {
217949 SC_INSTDONE_RCPBEDone_bits(const struct gen_device_info *devinfo)
217951    switch (devinfo->gen) {
217957       if (devinfo->is_haswell) {
217965       if (devinfo->is_g4x) {
217985 SC_INSTDONE_RCPBEDone_start(const struct gen_device_info *devinfo)
217987    switch (devinfo->gen) {
217993       if (devinfo->is_haswell) {
218001       if (devinfo->is_g4x) {
218024 SC_INSTDONE_RCPFEDone_bits(const struct gen_device_info *devinfo)
218026    switch (devinfo->gen) {
218032       if (devinfo->is_haswell) {
218040       if (devinfo->is_g4x) {
218060 SC_INSTDONE_RCPFEDone_start(const struct gen_device_info *devinfo)
218062    switch (devinfo->gen) {
218068       if (devinfo->is_haswell) {
218076       if (devinfo->is_g4x) {
218099 SC_INSTDONE_RCZDone_bits(const struct gen_device_info *devinfo)
218101    switch (devinfo->gen) {
218107       if (devinfo->is_haswell) {
218115       if (devinfo->is_g4x) {
218135 SC_INSTDONE_RCZDone_start(const struct gen_device_info *devinfo)
218137    switch (devinfo->gen) {
218143       if (devinfo->is_haswell) {
218151       if (devinfo->is_g4x) {
218174 SC_INSTDONE_SARBDone_bits(const struct gen_device_info *devinfo)
218176    switch (devinfo->gen) {
218182       if (devinfo->is_haswell) {
218190       if (devinfo->is_g4x) {
218210 SC_INSTDONE_SARBDone_start(const struct gen_device_info *devinfo)
218212    switch (devinfo->gen) {
218218       if (devinfo->is_haswell) {
218226       if (devinfo->is_g4x) {
218249 SC_INSTDONE_SBEDone_bits(const struct gen_device_info *devinfo)
218251    switch (devinfo->gen) {
218257       if (devinfo->is_haswell) {
218265       if (devinfo->is_g4x) {
218285 SC_INSTDONE_SBEDone_start(const struct gen_device_info *devinfo)
218287    switch (devinfo->gen) {
218293       if (devinfo->is_haswell) {
218301       if (devinfo->is_g4x) {
218320 SC_INSTDONE_SFBEDone_bits(const struct gen_device_info *devinfo)
218322    switch (devinfo->gen) {
218328       if (devinfo->is_haswell) {
218336       if (devinfo->is_g4x) {
218352 SC_INSTDONE_SFBEDone_start(const struct gen_device_info *devinfo)
218354    switch (devinfo->gen) {
218360       if (devinfo->is_haswell) {
218368       if (devinfo->is_g4x) {
218391 SC_INSTDONE_STCDone_bits(const struct gen_device_info *devinfo)
218393    switch (devinfo->gen) {
218399       if (devinfo->is_haswell) {
218407       if (devinfo->is_g4x) {
218427 SC_INSTDONE_STCDone_start(const struct gen_device_info *devinfo)
218429    switch (devinfo->gen) {
218435       if (devinfo->is_haswell) {
218443       if (devinfo->is_g4x) {
218466 SC_INSTDONE_SVLDone_bits(const struct gen_device_info *devinfo)
218468    switch (devinfo->gen) {
218474       if (devinfo->is_haswell) {
218482       if (devinfo->is_g4x) {
218502 SC_INSTDONE_SVLDone_start(const struct gen_device_info *devinfo)
218504    switch (devinfo->gen) {
218510       if (devinfo->is_haswell) {
218518       if (devinfo->is_g4x) {
218539 SC_INSTDONE_TDCDone_bits(const struct gen_device_info *devinfo)
218541    switch (devinfo->gen) {
218547       if (devinfo->is_haswell) {
218555       if (devinfo->is_g4x) {
218573 SC_INSTDONE_TDCDone_start(const struct gen_device_info *devinfo)
218575    switch (devinfo->gen) {
218581       if (devinfo->is_haswell) {
218589       if (devinfo->is_g4x) {
218607 SC_INSTDONE_VSCDone_bits(const struct gen_device_info *devinfo)
218609    switch (devinfo->gen) {
218615       if (devinfo->is_haswell) {
218623       if (devinfo->is_g4x) {
218638 SC_INSTDONE_VSCDone_start(const struct gen_device_info *devinfo)
218640    switch (devinfo->gen) {
218646       if (devinfo->is_haswell) {
218654       if (devinfo->is_g4x) {
218677 SC_INSTDONE_WMBEDone_bits(const struct gen_device_info *devinfo)
218679    switch (devinfo->gen) {
218685       if (devinfo->is_haswell) {
218693       if (devinfo->is_g4x) {
218713 SC_INSTDONE_WMBEDone_start(const struct gen_device_info *devinfo)
218715    switch (devinfo->gen) {
218721       if (devinfo->is_haswell) {
218729       if (devinfo->is_g4x) {
218752 SC_INSTDONE_WMFEDone_bits(const struct gen_device_info *devinfo)
218754    switch (devinfo->gen) {
218760       if (devinfo->is_haswell) {
218768       if (devinfo->is_g4x) {
218788 SC_INSTDONE_WMFEDone_start(const struct gen_device_info *devinfo)
218790    switch (devinfo->gen) {
218796       if (devinfo->is_haswell) {
218804       if (devinfo->is_g4x) {
218824 SFC_AVS_CHROMA_COEFF_TABLE_BODY_length(const struct gen_device_info *devinfo)
218826    switch (devinfo->gen) {
218832       if (devinfo->is_haswell) {
218840       if (devinfo->is_g4x) {
218860 SFC_AVS_CHROMA_COEFF_TABLE_BODY_FilterCoefficients_bits(const struct gen_device_info *devinfo)
218862    switch (devinfo->gen) {
218868       if (devinfo->is_haswell) {
218876       if (devinfo->is_g4x) {
218893 SFC_AVS_CHROMA_COEFF_TABLE_BODY_FilterCoefficients_start(const struct gen_device_info *devinfo)
218895    switch (devinfo->gen) {
218901       if (devinfo->is_haswell) {
218909       if (devinfo->is_g4x) {
218929 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1XFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
218931    switch (devinfo->gen) {
218937       if (devinfo->is_haswell) {
218945       if (devinfo->is_g4x) {
218962 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1XFilterCoefficientn2_start(const struct gen_device_info *devinfo)
218964    switch (devinfo->gen) {
218970       if (devinfo->is_haswell) {
218978       if (devinfo->is_g4x) {
218998 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1XFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
219000    switch (devinfo->gen) {
219006       if (devinfo->is_haswell) {
219014       if (devinfo->is_g4x) {
219031 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1XFilterCoefficientn3_start(const struct gen_device_info *devinfo)
219033    switch (devinfo->gen) {
219039       if (devinfo->is_haswell) {
219047       if (devinfo->is_g4x) {
219067 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1XFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
219069    switch (devinfo->gen) {
219075       if (devinfo->is_haswell) {
219083       if (devinfo->is_g4x) {
219100 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1XFilterCoefficientn4_start(const struct gen_device_info *devinfo)
219102    switch (devinfo->gen) {
219108       if (devinfo->is_haswell) {
219116       if (devinfo->is_g4x) {
219136 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1XFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
219138    switch (devinfo->gen) {
219144       if (devinfo->is_haswell) {
219152       if (devinfo->is_g4x) {
219169 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1XFilterCoefficientn5_start(const struct gen_device_info *devinfo)
219171    switch (devinfo->gen) {
219177       if (devinfo->is_haswell) {
219185       if (devinfo->is_g4x) {
219205 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1YFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
219207    switch (devinfo->gen) {
219213       if (devinfo->is_haswell) {
219221       if (devinfo->is_g4x) {
219238 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1YFilterCoefficientn2_start(const struct gen_device_info *devinfo)
219240    switch (devinfo->gen) {
219246       if (devinfo->is_haswell) {
219254       if (devinfo->is_g4x) {
219274 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1YFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
219276    switch (devinfo->gen) {
219282       if (devinfo->is_haswell) {
219290       if (devinfo->is_g4x) {
219307 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1YFilterCoefficientn3_start(const struct gen_device_info *devinfo)
219309    switch (devinfo->gen) {
219315       if (devinfo->is_haswell) {
219323       if (devinfo->is_g4x) {
219343 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1YFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
219345    switch (devinfo->gen) {
219351       if (devinfo->is_haswell) {
219359       if (devinfo->is_g4x) {
219376 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1YFilterCoefficientn4_start(const struct gen_device_info *devinfo)
219378    switch (devinfo->gen) {
219384       if (devinfo->is_haswell) {
219392       if (devinfo->is_g4x) {
219412 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1YFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
219414    switch (devinfo->gen) {
219420       if (devinfo->is_haswell) {
219428       if (devinfo->is_g4x) {
219445 SFC_AVS_CHROMA_COEFF_TABLE_BODY_Table1YFilterCoefficientn5_start(const struct gen_device_info *devinfo)
219447    switch (devinfo->gen) {
219453       if (devinfo->is_haswell) {
219461       if (devinfo->is_g4x) {
219481 SFC_AVS_LUMA_COEFF_TABLE_BODY_length(const struct gen_device_info *devinfo)
219483    switch (devinfo->gen) {
219489       if (devinfo->is_haswell) {
219497       if (devinfo->is_g4x) {
219517 SFC_AVS_LUMA_COEFF_TABLE_BODY_FilterCoefficients_bits(const struct gen_device_info *devinfo)
219519    switch (devinfo->gen) {
219525       if (devinfo->is_haswell) {
219533       if (devinfo->is_g4x) {
219550 SFC_AVS_LUMA_COEFF_TABLE_BODY_FilterCoefficients_start(const struct gen_device_info *devinfo)
219552    switch (devinfo->gen) {
219558       if (devinfo->is_haswell) {
219566       if (devinfo->is_g4x) {
219586 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn0_bits(const struct gen_device_info *devinfo)
219588    switch (devinfo->gen) {
219594       if (devinfo->is_haswell) {
219602       if (devinfo->is_g4x) {
219619 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn0_start(const struct gen_device_info *devinfo)
219621    switch (devinfo->gen) {
219627       if (devinfo->is_haswell) {
219635       if (devinfo->is_g4x) {
219655 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn1_bits(const struct gen_device_info *devinfo)
219657    switch (devinfo->gen) {
219663       if (devinfo->is_haswell) {
219671       if (devinfo->is_g4x) {
219688 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn1_start(const struct gen_device_info *devinfo)
219690    switch (devinfo->gen) {
219696       if (devinfo->is_haswell) {
219704       if (devinfo->is_g4x) {
219724 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
219726    switch (devinfo->gen) {
219732       if (devinfo->is_haswell) {
219740       if (devinfo->is_g4x) {
219757 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn2_start(const struct gen_device_info *devinfo)
219759    switch (devinfo->gen) {
219765       if (devinfo->is_haswell) {
219773       if (devinfo->is_g4x) {
219793 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
219795    switch (devinfo->gen) {
219801       if (devinfo->is_haswell) {
219809       if (devinfo->is_g4x) {
219826 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn3_start(const struct gen_device_info *devinfo)
219828    switch (devinfo->gen) {
219834       if (devinfo->is_haswell) {
219842       if (devinfo->is_g4x) {
219862 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
219864    switch (devinfo->gen) {
219870       if (devinfo->is_haswell) {
219878       if (devinfo->is_g4x) {
219895 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn4_start(const struct gen_device_info *devinfo)
219897    switch (devinfo->gen) {
219903       if (devinfo->is_haswell) {
219911       if (devinfo->is_g4x) {
219931 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
219933    switch (devinfo->gen) {
219939       if (devinfo->is_haswell) {
219947       if (devinfo->is_g4x) {
219964 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn5_start(const struct gen_device_info *devinfo)
219966    switch (devinfo->gen) {
219972       if (devinfo->is_haswell) {
219980       if (devinfo->is_g4x) {
220000 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn6_bits(const struct gen_device_info *devinfo)
220002    switch (devinfo->gen) {
220008       if (devinfo->is_haswell) {
220016       if (devinfo->is_g4x) {
220033 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn6_start(const struct gen_device_info *devinfo)
220035    switch (devinfo->gen) {
220041       if (devinfo->is_haswell) {
220049       if (devinfo->is_g4x) {
220069 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn7_bits(const struct gen_device_info *devinfo)
220071    switch (devinfo->gen) {
220077       if (devinfo->is_haswell) {
220085       if (devinfo->is_g4x) {
220102 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0XFilterCoefficientn7_start(const struct gen_device_info *devinfo)
220104    switch (devinfo->gen) {
220110       if (devinfo->is_haswell) {
220118       if (devinfo->is_g4x) {
220138 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn0_bits(const struct gen_device_info *devinfo)
220140    switch (devinfo->gen) {
220146       if (devinfo->is_haswell) {
220154       if (devinfo->is_g4x) {
220171 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn0_start(const struct gen_device_info *devinfo)
220173    switch (devinfo->gen) {
220179       if (devinfo->is_haswell) {
220187       if (devinfo->is_g4x) {
220207 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn1_bits(const struct gen_device_info *devinfo)
220209    switch (devinfo->gen) {
220215       if (devinfo->is_haswell) {
220223       if (devinfo->is_g4x) {
220240 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn1_start(const struct gen_device_info *devinfo)
220242    switch (devinfo->gen) {
220248       if (devinfo->is_haswell) {
220256       if (devinfo->is_g4x) {
220276 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
220278    switch (devinfo->gen) {
220284       if (devinfo->is_haswell) {
220292       if (devinfo->is_g4x) {
220309 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn2_start(const struct gen_device_info *devinfo)
220311    switch (devinfo->gen) {
220317       if (devinfo->is_haswell) {
220325       if (devinfo->is_g4x) {
220345 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
220347    switch (devinfo->gen) {
220353       if (devinfo->is_haswell) {
220361       if (devinfo->is_g4x) {
220378 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn3_start(const struct gen_device_info *devinfo)
220380    switch (devinfo->gen) {
220386       if (devinfo->is_haswell) {
220394       if (devinfo->is_g4x) {
220414 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
220416    switch (devinfo->gen) {
220422       if (devinfo->is_haswell) {
220430       if (devinfo->is_g4x) {
220447 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn4_start(const struct gen_device_info *devinfo)
220449    switch (devinfo->gen) {
220455       if (devinfo->is_haswell) {
220463       if (devinfo->is_g4x) {
220483 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
220485    switch (devinfo->gen) {
220491       if (devinfo->is_haswell) {
220499       if (devinfo->is_g4x) {
220516 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn5_start(const struct gen_device_info *devinfo)
220518    switch (devinfo->gen) {
220524       if (devinfo->is_haswell) {
220532       if (devinfo->is_g4x) {
220552 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn6_bits(const struct gen_device_info *devinfo)
220554    switch (devinfo->gen) {
220560       if (devinfo->is_haswell) {
220568       if (devinfo->is_g4x) {
220585 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn6_start(const struct gen_device_info *devinfo)
220587    switch (devinfo->gen) {
220593       if (devinfo->is_haswell) {
220601       if (devinfo->is_g4x) {
220621 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn7_bits(const struct gen_device_info *devinfo)
220623    switch (devinfo->gen) {
220629       if (devinfo->is_haswell) {
220637       if (devinfo->is_g4x) {
220654 SFC_AVS_LUMA_COEFF_TABLE_BODY_Table0YFilterCoefficientn7_start(const struct gen_device_info *devinfo)
220656    switch (devinfo->gen) {
220662       if (devinfo->is_haswell) {
220670       if (devinfo->is_g4x) {
220690 SFC_AVS_STATE_BODY_length(const struct gen_device_info *devinfo)
220692    switch (devinfo->gen) {
220698       if (devinfo->is_haswell) {
220706       if (devinfo->is_g4x) {
220724 SFC_AVS_STATE_BODY_InputVerticalSiting_bits(const struct gen_device_info *devinfo)
220726    switch (devinfo->gen) {
220732       if (devinfo->is_haswell) {
220740       if (devinfo->is_g4x) {
220755 SFC_AVS_STATE_BODY_InputVerticalSiting_start(const struct gen_device_info *devinfo)
220757    switch (devinfo->gen) {
220763       if (devinfo->is_haswell) {
220771       if (devinfo->is_g4x) {
220791 SFC_AVS_STATE_BODY_MaxDerivative4Pixels_bits(const struct gen_device_info *devinfo)
220793    switch (devinfo->gen) {
220799       if (devinfo->is_haswell) {
220807       if (devinfo->is_g4x) {
220824 SFC_AVS_STATE_BODY_MaxDerivative4Pixels_start(const struct gen_device_info *devinfo)
220826    switch (devinfo->gen) {
220832       if (devinfo->is_haswell) {
220840       if (devinfo->is_g4x) {
220860 SFC_AVS_STATE_BODY_MaxDerivative8Pixels_bits(const struct gen_device_info *devinfo)
220862    switch (devinfo->gen) {
220868       if (devinfo->is_haswell) {
220876       if (devinfo->is_g4x) {
220893 SFC_AVS_STATE_BODY_MaxDerivative8Pixels_start(const struct gen_device_info *devinfo)
220895    switch (devinfo->gen) {
220901       if (devinfo->is_haswell) {
220909       if (devinfo->is_g4x) {
220929 SFC_AVS_STATE_BODY_SharpnessLevel_bits(const struct gen_device_info *devinfo)
220931    switch (devinfo->gen) {
220937       if (devinfo->is_haswell) {
220945       if (devinfo->is_g4x) {
220962 SFC_AVS_STATE_BODY_SharpnessLevel_start(const struct gen_device_info *devinfo)
220964    switch (devinfo->gen) {
220970       if (devinfo->is_haswell) {
220978       if (devinfo->is_g4x) {
220998 SFC_AVS_STATE_BODY_TransitionAreawith4Pixels_bits(const struct gen_device_info *devinfo)
221000    switch (devinfo->gen) {
221006       if (devinfo->is_haswell) {
221014       if (devinfo->is_g4x) {
221031 SFC_AVS_STATE_BODY_TransitionAreawith4Pixels_start(const struct gen_device_info *devinfo)
221033    switch (devinfo->gen) {
221039       if (devinfo->is_haswell) {
221047       if (devinfo->is_g4x) {
221067 SFC_AVS_STATE_BODY_TransitionAreawith8Pixels_bits(const struct gen_device_info *devinfo)
221069    switch (devinfo->gen) {
221075       if (devinfo->is_haswell) {
221083       if (devinfo->is_g4x) {
221100 SFC_AVS_STATE_BODY_TransitionAreawith8Pixels_start(const struct gen_device_info *devinfo)
221102    switch (devinfo->gen) {
221108       if (devinfo->is_haswell) {
221116       if (devinfo->is_g4x) {
221136 SFC_IEF_STATE_BODY_length(const struct gen_device_info *devinfo)
221138    switch (devinfo->gen) {
221144       if (devinfo->is_haswell) {
221152       if (devinfo->is_g4x) {
221172 SFC_IEF_STATE_BODY_B0L_bits(const struct gen_device_info *devinfo)
221174    switch (devinfo->gen) {
221180       if (devinfo->is_haswell) {
221188       if (devinfo->is_g4x) {
221205 SFC_IEF_STATE_BODY_B0L_start(const struct gen_device_info *devinfo)
221207    switch (devinfo->gen) {
221213       if (devinfo->is_haswell) {
221221       if (devinfo->is_g4x) {
221241 SFC_IEF_STATE_BODY_B0U_bits(const struct gen_device_info *devinfo)
221243    switch (devinfo->gen) {
221249       if (devinfo->is_haswell) {
221257       if (devinfo->is_g4x) {
221274 SFC_IEF_STATE_BODY_B0U_start(const struct gen_device_info *devinfo)
221276    switch (devinfo->gen) {
221282       if (devinfo->is_haswell) {
221290       if (devinfo->is_g4x) {
221310 SFC_IEF_STATE_BODY_B1L_bits(const struct gen_device_info *devinfo)
221312    switch (devinfo->gen) {
221318       if (devinfo->is_haswell) {
221326       if (devinfo->is_g4x) {
221343 SFC_IEF_STATE_BODY_B1L_start(const struct gen_device_info *devinfo)
221345    switch (devinfo->gen) {
221351       if (devinfo->is_haswell) {
221359       if (devinfo->is_g4x) {
221379 SFC_IEF_STATE_BODY_B1U_bits(const struct gen_device_info *devinfo)
221381    switch (devinfo->gen) {
221387       if (devinfo->is_haswell) {
221395       if (devinfo->is_g4x) {
221412 SFC_IEF_STATE_BODY_B1U_start(const struct gen_device_info *devinfo)
221414    switch (devinfo->gen) {
221420       if (devinfo->is_haswell) {
221428       if (devinfo->is_g4x) {
221448 SFC_IEF_STATE_BODY_B2L_bits(const struct gen_device_info *devinfo)
221450    switch (devinfo->gen) {
221456       if (devinfo->is_haswell) {
221464       if (devinfo->is_g4x) {
221481 SFC_IEF_STATE_BODY_B2L_start(const struct gen_device_info *devinfo)
221483    switch (devinfo->gen) {
221489       if (devinfo->is_haswell) {
221497       if (devinfo->is_g4x) {
221517 SFC_IEF_STATE_BODY_B2U_bits(const struct gen_device_info *devinfo)
221519    switch (devinfo->gen) {
221525       if (devinfo->is_haswell) {
221533       if (devinfo->is_g4x) {
221550 SFC_IEF_STATE_BODY_B2U_start(const struct gen_device_info *devinfo)
221552    switch (devinfo->gen) {
221558       if (devinfo->is_haswell) {
221566       if (devinfo->is_g4x) {
221586 SFC_IEF_STATE_BODY_B3L_bits(const struct gen_device_info *devinfo)
221588    switch (devinfo->gen) {
221594       if (devinfo->is_haswell) {
221602       if (devinfo->is_g4x) {
221619 SFC_IEF_STATE_BODY_B3L_start(const struct gen_device_info *devinfo)
221621    switch (devinfo->gen) {
221627       if (devinfo->is_haswell) {
221635       if (devinfo->is_g4x) {
221655 SFC_IEF_STATE_BODY_B3U_bits(const struct gen_device_info *devinfo)
221657    switch (devinfo->gen) {
221663       if (devinfo->is_haswell) {
221671       if (devinfo->is_g4x) {
221688 SFC_IEF_STATE_BODY_B3U_start(const struct gen_device_info *devinfo)
221690    switch (devinfo->gen) {
221696       if (devinfo->is_haswell) {
221704       if (devinfo->is_g4x) {
221724 SFC_IEF_STATE_BODY_C0_bits(const struct gen_device_info *devinfo)
221726    switch (devinfo->gen) {
221732       if (devinfo->is_haswell) {
221740       if (devinfo->is_g4x) {
221757 SFC_IEF_STATE_BODY_C0_start(const struct gen_device_info *devinfo)
221759    switch (devinfo->gen) {
221765       if (devinfo->is_haswell) {
221773       if (devinfo->is_g4x) {
221793 SFC_IEF_STATE_BODY_C1_bits(const struct gen_device_info *devinfo)
221795    switch (devinfo->gen) {
221801       if (devinfo->is_haswell) {
221809       if (devinfo->is_g4x) {
221826 SFC_IEF_STATE_BODY_C1_start(const struct gen_device_info *devinfo)
221828    switch (devinfo->gen) {
221834       if (devinfo->is_haswell) {
221842       if (devinfo->is_g4x) {
221862 SFC_IEF_STATE_BODY_C2_bits(const struct gen_device_info *devinfo)
221864    switch (devinfo->gen) {
221870       if (devinfo->is_haswell) {
221878       if (devinfo->is_g4x) {
221895 SFC_IEF_STATE_BODY_C2_start(const struct gen_device_info *devinfo)
221897    switch (devinfo->gen) {
221903       if (devinfo->is_haswell) {
221911       if (devinfo->is_g4x) {
221931 SFC_IEF_STATE_BODY_C3_bits(const struct gen_device_info *devinfo)
221933    switch (devinfo->gen) {
221939       if (devinfo->is_haswell) {
221947       if (devinfo->is_g4x) {
221964 SFC_IEF_STATE_BODY_C3_start(const struct gen_device_info *devinfo)
221966    switch (devinfo->gen) {
221972       if (devinfo->is_haswell) {
221980       if (devinfo->is_g4x) {
222000 SFC_IEF_STATE_BODY_C4_bits(const struct gen_device_info *devinfo)
222002    switch (devinfo->gen) {
222008       if (devinfo->is_haswell) {
222016       if (devinfo->is_g4x) {
222033 SFC_IEF_STATE_BODY_C4_start(const struct gen_device_info *devinfo)
222035    switch (devinfo->gen) {
222041       if (devinfo->is_haswell) {
222049       if (devinfo->is_g4x) {
222069 SFC_IEF_STATE_BODY_C5_bits(const struct gen_device_info *devinfo)
222071    switch (devinfo->gen) {
222077       if (devinfo->is_haswell) {
222085       if (devinfo->is_g4x) {
222102 SFC_IEF_STATE_BODY_C5_start(const struct gen_device_info *devinfo)
222104    switch (devinfo->gen) {
222110       if (devinfo->is_haswell) {
222118       if (devinfo->is_g4x) {
222138 SFC_IEF_STATE_BODY_C6_bits(const struct gen_device_info *devinfo)
222140    switch (devinfo->gen) {
222146       if (devinfo->is_haswell) {
222154       if (devinfo->is_g4x) {
222171 SFC_IEF_STATE_BODY_C6_start(const struct gen_device_info *devinfo)
222173    switch (devinfo->gen) {
222179       if (devinfo->is_haswell) {
222187       if (devinfo->is_g4x) {
222207 SFC_IEF_STATE_BODY_C7_bits(const struct gen_device_info *devinfo)
222209    switch (devinfo->gen) {
222215       if (devinfo->is_haswell) {
222223       if (devinfo->is_g4x) {
222240 SFC_IEF_STATE_BODY_C7_start(const struct gen_device_info *devinfo)
222242    switch (devinfo->gen) {
222248       if (devinfo->is_haswell) {
222256       if (devinfo->is_g4x) {
222276 SFC_IEF_STATE_BODY_C8_bits(const struct gen_device_info *devinfo)
222278    switch (devinfo->gen) {
222284       if (devinfo->is_haswell) {
222292       if (devinfo->is_g4x) {
222309 SFC_IEF_STATE_BODY_C8_start(const struct gen_device_info *devinfo)
222311    switch (devinfo->gen) {
222317       if (devinfo->is_haswell) {
222325       if (devinfo->is_g4x) {
222345 SFC_IEF_STATE_BODY_DiamondMargin_bits(const struct gen_device_info *devinfo)
222347    switch (devinfo->gen) {
222353       if (devinfo->is_haswell) {
222361       if (devinfo->is_g4x) {
222378 SFC_IEF_STATE_BODY_DiamondMargin_start(const struct gen_device_info *devinfo)
222380    switch (devinfo->gen) {
222386       if (devinfo->is_haswell) {
222394       if (devinfo->is_g4x) {
222414 SFC_IEF_STATE_BODY_Diamond_Th_bits(const struct gen_device_info *devinfo)
222416    switch (devinfo->gen) {
222422       if (devinfo->is_haswell) {
222430       if (devinfo->is_g4x) {
222447 SFC_IEF_STATE_BODY_Diamond_Th_start(const struct gen_device_info *devinfo)
222449    switch (devinfo->gen) {
222455       if (devinfo->is_haswell) {
222463       if (devinfo->is_g4x) {
222483 SFC_IEF_STATE_BODY_Diamond_alpha_bits(const struct gen_device_info *devinfo)
222485    switch (devinfo->gen) {
222491       if (devinfo->is_haswell) {
222499       if (devinfo->is_g4x) {
222516 SFC_IEF_STATE_BODY_Diamond_alpha_start(const struct gen_device_info *devinfo)
222518    switch (devinfo->gen) {
222524       if (devinfo->is_haswell) {
222532       if (devinfo->is_g4x) {
222552 SFC_IEF_STATE_BODY_Diamond_du_bits(const struct gen_device_info *devinfo)
222554    switch (devinfo->gen) {
222560       if (devinfo->is_haswell) {
222568       if (devinfo->is_g4x) {
222585 SFC_IEF_STATE_BODY_Diamond_du_start(const struct gen_device_info *devinfo)
222587    switch (devinfo->gen) {
222593       if (devinfo->is_haswell) {
222601       if (devinfo->is_g4x) {
222621 SFC_IEF_STATE_BODY_Diamond_dv_bits(const struct gen_device_info *devinfo)
222623    switch (devinfo->gen) {
222629       if (devinfo->is_haswell) {
222637       if (devinfo->is_g4x) {
222654 SFC_IEF_STATE_BODY_Diamond_dv_start(const struct gen_device_info *devinfo)
222656    switch (devinfo->gen) {
222662       if (devinfo->is_haswell) {
222670       if (devinfo->is_g4x) {
222690 SFC_IEF_STATE_BODY_GainFactor_bits(const struct gen_device_info *devinfo)
222692    switch (devinfo->gen) {
222698       if (devinfo->is_haswell) {
222706       if (devinfo->is_g4x) {
222723 SFC_IEF_STATE_BODY_GainFactor_start(const struct gen_device_info *devinfo)
222725    switch (devinfo->gen) {
222731       if (devinfo->is_haswell) {
222739       if (devinfo->is_g4x) {
222759 SFC_IEF_STATE_BODY_GlobalNoiseEstimation_bits(const struct gen_device_info *devinfo)
222761    switch (devinfo->gen) {
222767       if (devinfo->is_haswell) {
222775       if (devinfo->is_g4x) {
222792 SFC_IEF_STATE_BODY_GlobalNoiseEstimation_start(const struct gen_device_info *devinfo)
222794    switch (devinfo->gen) {
222800       if (devinfo->is_haswell) {
222808       if (devinfo->is_g4x) {
222828 SFC_IEF_STATE_BODY_HS_margin_bits(const struct gen_device_info *devinfo)
222830    switch (devinfo->gen) {
222836       if (devinfo->is_haswell) {
222844       if (devinfo->is_g4x) {
222861 SFC_IEF_STATE_BODY_HS_margin_start(const struct gen_device_info *devinfo)
222863    switch (devinfo->gen) {
222869       if (devinfo->is_haswell) {
222877       if (devinfo->is_g4x) {
222897 SFC_IEF_STATE_BODY_Hue_Max_bits(const struct gen_device_info *devinfo)
222899    switch (devinfo->gen) {
222905       if (devinfo->is_haswell) {
222913       if (devinfo->is_g4x) {
222930 SFC_IEF_STATE_BODY_Hue_Max_start(const struct gen_device_info *devinfo)
222932    switch (devinfo->gen) {
222938       if (devinfo->is_haswell) {
222946       if (devinfo->is_g4x) {
222966 SFC_IEF_STATE_BODY_INV_Margin_VYL_bits(const struct gen_device_info *devinfo)
222968    switch (devinfo->gen) {
222974       if (devinfo->is_haswell) {
222982       if (devinfo->is_g4x) {
222999 SFC_IEF_STATE_BODY_INV_Margin_VYL_start(const struct gen_device_info *devinfo)
223001    switch (devinfo->gen) {
223007       if (devinfo->is_haswell) {
223015       if (devinfo->is_g4x) {
223035 SFC_IEF_STATE_BODY_INV_Margin_VYU_bits(const struct gen_device_info *devinfo)
223037    switch (devinfo->gen) {
223043       if (devinfo->is_haswell) {
223051       if (devinfo->is_g4x) {
223068 SFC_IEF_STATE_BODY_INV_Margin_VYU_start(const struct gen_device_info *devinfo)
223070    switch (devinfo->gen) {
223076       if (devinfo->is_haswell) {
223084       if (devinfo->is_g4x) {
223104 SFC_IEF_STATE_BODY_NonEdgeWeight_bits(const struct gen_device_info *devinfo)
223106    switch (devinfo->gen) {
223112       if (devinfo->is_haswell) {
223120       if (devinfo->is_g4x) {
223137 SFC_IEF_STATE_BODY_NonEdgeWeight_start(const struct gen_device_info *devinfo)
223139    switch (devinfo->gen) {
223145       if (devinfo->is_haswell) {
223153       if (devinfo->is_g4x) {
223173 SFC_IEF_STATE_BODY_OffsetIn1_bits(const struct gen_device_info *devinfo)
223175    switch (devinfo->gen) {
223181       if (devinfo->is_haswell) {
223189       if (devinfo->is_g4x) {
223206 SFC_IEF_STATE_BODY_OffsetIn1_start(const struct gen_device_info *devinfo)
223208    switch (devinfo->gen) {
223214       if (devinfo->is_haswell) {
223222       if (devinfo->is_g4x) {
223242 SFC_IEF_STATE_BODY_OffsetIn2_bits(const struct gen_device_info *devinfo)
223244    switch (devinfo->gen) {
223250       if (devinfo->is_haswell) {
223258       if (devinfo->is_g4x) {
223275 SFC_IEF_STATE_BODY_OffsetIn2_start(const struct gen_device_info *devinfo)
223277    switch (devinfo->gen) {
223283       if (devinfo->is_haswell) {
223291       if (devinfo->is_g4x) {
223311 SFC_IEF_STATE_BODY_OffsetIn3_bits(const struct gen_device_info *devinfo)
223313    switch (devinfo->gen) {
223319       if (devinfo->is_haswell) {
223327       if (devinfo->is_g4x) {
223344 SFC_IEF_STATE_BODY_OffsetIn3_start(const struct gen_device_info *devinfo)
223346    switch (devinfo->gen) {
223352       if (devinfo->is_haswell) {
223360       if (devinfo->is_g4x) {
223380 SFC_IEF_STATE_BODY_OffsetOut1_bits(const struct gen_device_info *devinfo)
223382    switch (devinfo->gen) {
223388       if (devinfo->is_haswell) {
223396       if (devinfo->is_g4x) {
223413 SFC_IEF_STATE_BODY_OffsetOut1_start(const struct gen_device_info *devinfo)
223415    switch (devinfo->gen) {
223421       if (devinfo->is_haswell) {
223429       if (devinfo->is_g4x) {
223449 SFC_IEF_STATE_BODY_OffsetOut2_bits(const struct gen_device_info *devinfo)
223451    switch (devinfo->gen) {
223457       if (devinfo->is_haswell) {
223465       if (devinfo->is_g4x) {
223482 SFC_IEF_STATE_BODY_OffsetOut2_start(const struct gen_device_info *devinfo)
223484    switch (devinfo->gen) {
223490       if (devinfo->is_haswell) {
223498       if (devinfo->is_g4x) {
223518 SFC_IEF_STATE_BODY_OffsetOut3_bits(const struct gen_device_info *devinfo)
223520    switch (devinfo->gen) {
223526       if (devinfo->is_haswell) {
223534       if (devinfo->is_g4x) {
223551 SFC_IEF_STATE_BODY_OffsetOut3_start(const struct gen_device_info *devinfo)
223553    switch (devinfo->gen) {
223559       if (devinfo->is_haswell) {
223567       if (devinfo->is_g4x) {
223587 SFC_IEF_STATE_BODY_P0L_bits(const struct gen_device_info *devinfo)
223589    switch (devinfo->gen) {
223595       if (devinfo->is_haswell) {
223603       if (devinfo->is_g4x) {
223620 SFC_IEF_STATE_BODY_P0L_start(const struct gen_device_info *devinfo)
223622    switch (devinfo->gen) {
223628       if (devinfo->is_haswell) {
223636       if (devinfo->is_g4x) {
223656 SFC_IEF_STATE_BODY_P0U_bits(const struct gen_device_info *devinfo)
223658    switch (devinfo->gen) {
223664       if (devinfo->is_haswell) {
223672       if (devinfo->is_g4x) {
223689 SFC_IEF_STATE_BODY_P0U_start(const struct gen_device_info *devinfo)
223691    switch (devinfo->gen) {
223697       if (devinfo->is_haswell) {
223705       if (devinfo->is_g4x) {
223725 SFC_IEF_STATE_BODY_P1L_bits(const struct gen_device_info *devinfo)
223727    switch (devinfo->gen) {
223733       if (devinfo->is_haswell) {
223741       if (devinfo->is_g4x) {
223758 SFC_IEF_STATE_BODY_P1L_start(const struct gen_device_info *devinfo)
223760    switch (devinfo->gen) {
223766       if (devinfo->is_haswell) {
223774       if (devinfo->is_g4x) {
223794 SFC_IEF_STATE_BODY_P1U_bits(const struct gen_device_info *devinfo)
223796    switch (devinfo->gen) {
223802       if (devinfo->is_haswell) {
223810       if (devinfo->is_g4x) {
223827 SFC_IEF_STATE_BODY_P1U_start(const struct gen_device_info *devinfo)
223829    switch (devinfo->gen) {
223835       if (devinfo->is_haswell) {
223843       if (devinfo->is_g4x) {
223863 SFC_IEF_STATE_BODY_P2L_bits(const struct gen_device_info *devinfo)
223865    switch (devinfo->gen) {
223871       if (devinfo->is_haswell) {
223879       if (devinfo->is_g4x) {
223896 SFC_IEF_STATE_BODY_P2L_start(const struct gen_device_info *devinfo)
223898    switch (devinfo->gen) {
223904       if (devinfo->is_haswell) {
223912       if (devinfo->is_g4x) {
223932 SFC_IEF_STATE_BODY_P2U_bits(const struct gen_device_info *devinfo)
223934    switch (devinfo->gen) {
223940       if (devinfo->is_haswell) {
223948       if (devinfo->is_g4x) {
223965 SFC_IEF_STATE_BODY_P2U_start(const struct gen_device_info *devinfo)
223967    switch (devinfo->gen) {
223973       if (devinfo->is_haswell) {
223981       if (devinfo->is_g4x) {
224001 SFC_IEF_STATE_BODY_P3L_bits(const struct gen_device_info *devinfo)
224003    switch (devinfo->gen) {
224009       if (devinfo->is_haswell) {
224017       if (devinfo->is_g4x) {
224034 SFC_IEF_STATE_BODY_P3L_start(const struct gen_device_info *devinfo)
224036    switch (devinfo->gen) {
224042       if (devinfo->is_haswell) {
224050       if (devinfo->is_g4x) {
224070 SFC_IEF_STATE_BODY_P3U_bits(const struct gen_device_info *devinfo)
224072    switch (devinfo->gen) {
224078       if (devinfo->is_haswell) {
224086       if (devinfo->is_g4x) {
224103 SFC_IEF_STATE_BODY_P3U_start(const struct gen_device_info *devinfo)
224105    switch (devinfo->gen) {
224111       if (devinfo->is_haswell) {
224119       if (devinfo->is_g4x) {
224139 SFC_IEF_STATE_BODY_R3cCoefficient_bits(const struct gen_device_info *devinfo)
224141    switch (devinfo->gen) {
224147       if (devinfo->is_haswell) {
224155       if (devinfo->is_g4x) {
224172 SFC_IEF_STATE_BODY_R3cCoefficient_start(const struct gen_device_info *devinfo)
224174    switch (devinfo->gen) {
224180       if (devinfo->is_haswell) {
224188       if (devinfo->is_g4x) {
224208 SFC_IEF_STATE_BODY_R3xCoefficient_bits(const struct gen_device_info *devinfo)
224210    switch (devinfo->gen) {
224216       if (devinfo->is_haswell) {
224224       if (devinfo->is_g4x) {
224241 SFC_IEF_STATE_BODY_R3xCoefficient_start(const struct gen_device_info *devinfo)
224243    switch (devinfo->gen) {
224249       if (devinfo->is_haswell) {
224257       if (devinfo->is_g4x) {
224277 SFC_IEF_STATE_BODY_R5cCoefficient_bits(const struct gen_device_info *devinfo)
224279    switch (devinfo->gen) {
224285       if (devinfo->is_haswell) {
224293       if (devinfo->is_g4x) {
224310 SFC_IEF_STATE_BODY_R5cCoefficient_start(const struct gen_device_info *devinfo)
224312    switch (devinfo->gen) {
224318       if (devinfo->is_haswell) {
224326       if (devinfo->is_g4x) {
224346 SFC_IEF_STATE_BODY_R5cxCoefficient_bits(const struct gen_device_info *devinfo)
224348    switch (devinfo->gen) {
224354       if (devinfo->is_haswell) {
224362       if (devinfo->is_g4x) {
224379 SFC_IEF_STATE_BODY_R5cxCoefficient_start(const struct gen_device_info *devinfo)
224381    switch (devinfo->gen) {
224387       if (devinfo->is_haswell) {
224395       if (devinfo->is_g4x) {
224415 SFC_IEF_STATE_BODY_R5xCoefficient_bits(const struct gen_device_info *devinfo)
224417    switch (devinfo->gen) {
224423       if (devinfo->is_haswell) {
224431       if (devinfo->is_g4x) {
224448 SFC_IEF_STATE_BODY_R5xCoefficient_start(const struct gen_device_info *devinfo)
224450    switch (devinfo->gen) {
224456       if (devinfo->is_haswell) {
224464       if (devinfo->is_g4x) {
224484 SFC_IEF_STATE_BODY_RegularWeight_bits(const struct gen_device_info *devinfo)
224486    switch (devinfo->gen) {
224492       if (devinfo->is_haswell) {
224500       if (devinfo->is_g4x) {
224517 SFC_IEF_STATE_BODY_RegularWeight_start(const struct gen_device_info *devinfo)
224519    switch (devinfo->gen) {
224525       if (devinfo->is_haswell) {
224533       if (devinfo->is_g4x) {
224553 SFC_IEF_STATE_BODY_S0L_bits(const struct gen_device_info *devinfo)
224555    switch (devinfo->gen) {
224561       if (devinfo->is_haswell) {
224569       if (devinfo->is_g4x) {
224586 SFC_IEF_STATE_BODY_S0L_start(const struct gen_device_info *devinfo)
224588    switch (devinfo->gen) {
224594       if (devinfo->is_haswell) {
224602       if (devinfo->is_g4x) {
224622 SFC_IEF_STATE_BODY_S0U_bits(const struct gen_device_info *devinfo)
224624    switch (devinfo->gen) {
224630       if (devinfo->is_haswell) {
224638       if (devinfo->is_g4x) {
224655 SFC_IEF_STATE_BODY_S0U_start(const struct gen_device_info *devinfo)
224657    switch (devinfo->gen) {
224663       if (devinfo->is_haswell) {
224671       if (devinfo->is_g4x) {
224691 SFC_IEF_STATE_BODY_S1L_bits(const struct gen_device_info *devinfo)
224693    switch (devinfo->gen) {
224699       if (devinfo->is_haswell) {
224707       if (devinfo->is_g4x) {
224724 SFC_IEF_STATE_BODY_S1L_start(const struct gen_device_info *devinfo)
224726    switch (devinfo->gen) {
224732       if (devinfo->is_haswell) {
224740       if (devinfo->is_g4x) {
224760 SFC_IEF_STATE_BODY_S1U_bits(const struct gen_device_info *devinfo)
224762    switch (devinfo->gen) {
224768       if (devinfo->is_haswell) {
224776       if (devinfo->is_g4x) {
224793 SFC_IEF_STATE_BODY_S1U_start(const struct gen_device_info *devinfo)
224795    switch (devinfo->gen) {
224801       if (devinfo->is_haswell) {
224809       if (devinfo->is_g4x) {
224829 SFC_IEF_STATE_BODY_S2L_bits(const struct gen_device_info *devinfo)
224831    switch (devinfo->gen) {
224837       if (devinfo->is_haswell) {
224845       if (devinfo->is_g4x) {
224862 SFC_IEF_STATE_BODY_S2L_start(const struct gen_device_info *devinfo)
224864    switch (devinfo->gen) {
224870       if (devinfo->is_haswell) {
224878       if (devinfo->is_g4x) {
224898 SFC_IEF_STATE_BODY_S2U_bits(const struct gen_device_info *devinfo)
224900    switch (devinfo->gen) {
224906       if (devinfo->is_haswell) {
224914       if (devinfo->is_g4x) {
224931 SFC_IEF_STATE_BODY_S2U_start(const struct gen_device_info *devinfo)
224933    switch (devinfo->gen) {
224939       if (devinfo->is_haswell) {
224947       if (devinfo->is_g4x) {
224967 SFC_IEF_STATE_BODY_S3L_bits(const struct gen_device_info *devinfo)
224969    switch (devinfo->gen) {
224975       if (devinfo->is_haswell) {
224983       if (devinfo->is_g4x) {
225000 SFC_IEF_STATE_BODY_S3L_start(const struct gen_device_info *devinfo)
225002    switch (devinfo->gen) {
225008       if (devinfo->is_haswell) {
225016       if (devinfo->is_g4x) {
225036 SFC_IEF_STATE_BODY_S3U_bits(const struct gen_device_info *devinfo)
225038    switch (devinfo->gen) {
225044       if (devinfo->is_haswell) {
225052       if (devinfo->is_g4x) {
225069 SFC_IEF_STATE_BODY_S3U_start(const struct gen_device_info *devinfo)
225071    switch (devinfo->gen) {
225077       if (devinfo->is_haswell) {
225085       if (devinfo->is_g4x) {
225105 SFC_IEF_STATE_BODY_STDCosalpha_bits(const struct gen_device_info *devinfo)
225107    switch (devinfo->gen) {
225113       if (devinfo->is_haswell) {
225121       if (devinfo->is_g4x) {
225138 SFC_IEF_STATE_BODY_STDCosalpha_start(const struct gen_device_info *devinfo)
225140    switch (devinfo->gen) {
225146       if (devinfo->is_haswell) {
225154       if (devinfo->is_g4x) {
225174 SFC_IEF_STATE_BODY_STDSinalpha_bits(const struct gen_device_info *devinfo)
225176    switch (devinfo->gen) {
225182       if (devinfo->is_haswell) {
225190       if (devinfo->is_g4x) {
225207 SFC_IEF_STATE_BODY_STDSinalpha_start(const struct gen_device_info *devinfo)
225209    switch (devinfo->gen) {
225215       if (devinfo->is_haswell) {
225223       if (devinfo->is_g4x) {
225243 SFC_IEF_STATE_BODY_Sat_Max_bits(const struct gen_device_info *devinfo)
225245    switch (devinfo->gen) {
225251       if (devinfo->is_haswell) {
225259       if (devinfo->is_g4x) {
225276 SFC_IEF_STATE_BODY_Sat_Max_start(const struct gen_device_info *devinfo)
225278    switch (devinfo->gen) {
225284       if (devinfo->is_haswell) {
225292       if (devinfo->is_g4x) {
225312 SFC_IEF_STATE_BODY_SkinDetailFactor_bits(const struct gen_device_info *devinfo)
225314    switch (devinfo->gen) {
225320       if (devinfo->is_haswell) {
225328       if (devinfo->is_g4x) {
225345 SFC_IEF_STATE_BODY_SkinDetailFactor_start(const struct gen_device_info *devinfo)
225347    switch (devinfo->gen) {
225353       if (devinfo->is_haswell) {
225361       if (devinfo->is_g4x) {
225381 SFC_IEF_STATE_BODY_StrongEdgeThreshold_bits(const struct gen_device_info *devinfo)
225383    switch (devinfo->gen) {
225389       if (devinfo->is_haswell) {
225397       if (devinfo->is_g4x) {
225414 SFC_IEF_STATE_BODY_StrongEdgeThreshold_start(const struct gen_device_info *devinfo)
225416    switch (devinfo->gen) {
225422       if (devinfo->is_haswell) {
225430       if (devinfo->is_g4x) {
225450 SFC_IEF_STATE_BODY_StrongEdgeWeight_bits(const struct gen_device_info *devinfo)
225452    switch (devinfo->gen) {
225458       if (devinfo->is_haswell) {
225466       if (devinfo->is_g4x) {
225483 SFC_IEF_STATE_BODY_StrongEdgeWeight_start(const struct gen_device_info *devinfo)
225485    switch (devinfo->gen) {
225491       if (devinfo->is_haswell) {
225499       if (devinfo->is_g4x) {
225519 SFC_IEF_STATE_BODY_TransformEnable_bits(const struct gen_device_info *devinfo)
225521    switch (devinfo->gen) {
225527       if (devinfo->is_haswell) {
225535       if (devinfo->is_g4x) {
225552 SFC_IEF_STATE_BODY_TransformEnable_start(const struct gen_device_info *devinfo)
225554    switch (devinfo->gen) {
225560       if (devinfo->is_haswell) {
225568       if (devinfo->is_g4x) {
225588 SFC_IEF_STATE_BODY_U_Mid_bits(const struct gen_device_info *devinfo)
225590    switch (devinfo->gen) {
225596       if (devinfo->is_haswell) {
225604       if (devinfo->is_g4x) {
225621 SFC_IEF_STATE_BODY_U_Mid_start(const struct gen_device_info *devinfo)
225623    switch (devinfo->gen) {
225629       if (devinfo->is_haswell) {
225637       if (devinfo->is_g4x) {
225657 SFC_IEF_STATE_BODY_VY_STD_Enable_bits(const struct gen_device_info *devinfo)
225659    switch (devinfo->gen) {
225665       if (devinfo->is_haswell) {
225673       if (devinfo->is_g4x) {
225690 SFC_IEF_STATE_BODY_VY_STD_Enable_start(const struct gen_device_info *devinfo)
225692    switch (devinfo->gen) {
225698       if (devinfo->is_haswell) {
225706       if (devinfo->is_g4x) {
225726 SFC_IEF_STATE_BODY_V_Mid_bits(const struct gen_device_info *devinfo)
225728    switch (devinfo->gen) {
225734       if (devinfo->is_haswell) {
225742       if (devinfo->is_g4x) {
225759 SFC_IEF_STATE_BODY_V_Mid_start(const struct gen_device_info *devinfo)
225761    switch (devinfo->gen) {
225767       if (devinfo->is_haswell) {
225775       if (devinfo->is_g4x) {
225795 SFC_IEF_STATE_BODY_WeakEdgeThreshold_bits(const struct gen_device_info *devinfo)
225797    switch (devinfo->gen) {
225803       if (devinfo->is_haswell) {
225811       if (devinfo->is_g4x) {
225828 SFC_IEF_STATE_BODY_WeakEdgeThreshold_start(const struct gen_device_info *devinfo)
225830    switch (devinfo->gen) {
225836       if (devinfo->is_haswell) {
225844       if (devinfo->is_g4x) {
225864 SFC_IEF_STATE_BODY_YUVChannelSwap_bits(const struct gen_device_info *devinfo)
225866    switch (devinfo->gen) {
225872       if (devinfo->is_haswell) {
225880       if (devinfo->is_g4x) {
225897 SFC_IEF_STATE_BODY_YUVChannelSwap_start(const struct gen_device_info *devinfo)
225899    switch (devinfo->gen) {
225905       if (devinfo->is_haswell) {
225913       if (devinfo->is_g4x) {
225933 SFC_IEF_STATE_BODY_Y_Slope1_bits(const struct gen_device_info *devinfo)
225935    switch (devinfo->gen) {
225941       if (devinfo->is_haswell) {
225949       if (devinfo->is_g4x) {
225966 SFC_IEF_STATE_BODY_Y_Slope1_start(const struct gen_device_info *devinfo)
225968    switch (devinfo->gen) {
225974       if (devinfo->is_haswell) {
225982       if (devinfo->is_g4x) {
226002 SFC_IEF_STATE_BODY_Y_Slope_2_bits(const struct gen_device_info *devinfo)
226004    switch (devinfo->gen) {
226010       if (devinfo->is_haswell) {
226018       if (devinfo->is_g4x) {
226035 SFC_IEF_STATE_BODY_Y_Slope_2_start(const struct gen_device_info *devinfo)
226037    switch (devinfo->gen) {
226043       if (devinfo->is_haswell) {
226051       if (devinfo->is_g4x) {
226071 SFC_IEF_STATE_BODY_Y_point_1_bits(const struct gen_device_info *devinfo)
226073    switch (devinfo->gen) {
226079       if (devinfo->is_haswell) {
226087       if (devinfo->is_g4x) {
226104 SFC_IEF_STATE_BODY_Y_point_1_start(const struct gen_device_info *devinfo)
226106    switch (devinfo->gen) {
226112       if (devinfo->is_haswell) {
226120       if (devinfo->is_g4x) {
226140 SFC_IEF_STATE_BODY_Y_point_2_bits(const struct gen_device_info *devinfo)
226142    switch (devinfo->gen) {
226148       if (devinfo->is_haswell) {
226156       if (devinfo->is_g4x) {
226173 SFC_IEF_STATE_BODY_Y_point_2_start(const struct gen_device_info *devinfo)
226175    switch (devinfo->gen) {
226181       if (devinfo->is_haswell) {
226189       if (devinfo->is_g4x) {
226209 SFC_IEF_STATE_BODY_Y_point_3_bits(const struct gen_device_info *devinfo)
226211    switch (devinfo->gen) {
226217       if (devinfo->is_haswell) {
226225       if (devinfo->is_g4x) {
226242 SFC_IEF_STATE_BODY_Y_point_3_start(const struct gen_device_info *devinfo)
226244    switch (devinfo->gen) {
226250       if (devinfo->is_haswell) {
226258       if (devinfo->is_g4x) {
226278 SFC_IEF_STATE_BODY_Y_point_4_bits(const struct gen_device_info *devinfo)
226280    switch (devinfo->gen) {
226286       if (devinfo->is_haswell) {
226294       if (devinfo->is_g4x) {
226311 SFC_IEF_STATE_BODY_Y_point_4_start(const struct gen_device_info *devinfo)
226313    switch (devinfo->gen) {
226319       if (devinfo->is_haswell) {
226327       if (devinfo->is_g4x) {
226347 SFC_LOCK_BODY_length(const struct gen_device_info *devinfo)
226349    switch (devinfo->gen) {
226355       if (devinfo->is_haswell) {
226363       if (devinfo->is_g4x) {
226383 SFC_LOCK_BODY_PreScaledOutputSurfaceOutputEnable_bits(const struct gen_device_info *devinfo)
226385    switch (devinfo->gen) {
226391       if (devinfo->is_haswell) {
226399       if (devinfo->is_g4x) {
226416 SFC_LOCK_BODY_PreScaledOutputSurfaceOutputEnable_start(const struct gen_device_info *devinfo)
226418    switch (devinfo->gen) {
226424       if (devinfo->is_haswell) {
226432       if (devinfo->is_g4x) {
226452 SFC_LOCK_BODY_VESFCPipeSelect_bits(const struct gen_device_info *devinfo)
226454    switch (devinfo->gen) {
226460       if (devinfo->is_haswell) {
226468       if (devinfo->is_g4x) {
226485 SFC_LOCK_BODY_VESFCPipeSelect_start(const struct gen_device_info *devinfo)
226487    switch (devinfo->gen) {
226493       if (devinfo->is_haswell) {
226501       if (devinfo->is_g4x) {
226524 SF_CLIP_VIEWPORT_length(const struct gen_device_info *devinfo)
226526    switch (devinfo->gen) {
226532       if (devinfo->is_haswell) {
226540       if (devinfo->is_g4x) {
226563 SF_CLIP_VIEWPORT_ViewportMatrixElementm00_bits(const struct gen_device_info *devinfo)
226565    switch (devinfo->gen) {
226571       if (devinfo->is_haswell) {
226579       if (devinfo->is_g4x) {
226599 SF_CLIP_VIEWPORT_ViewportMatrixElementm00_start(const struct gen_device_info *devinfo)
226601    switch (devinfo->gen) {
226607       if (devinfo->is_haswell) {
226615       if (devinfo->is_g4x) {
226638 SF_CLIP_VIEWPORT_ViewportMatrixElementm11_bits(const struct gen_device_info *devinfo)
226640    switch (devinfo->gen) {
226646       if (devinfo->is_haswell) {
226654       if (devinfo->is_g4x) {
226674 SF_CLIP_VIEWPORT_ViewportMatrixElementm11_start(const struct gen_device_info *devinfo)
226676    switch (devinfo->gen) {
226682       if (devinfo->is_haswell) {
226690       if (devinfo->is_g4x) {
226713 SF_CLIP_VIEWPORT_ViewportMatrixElementm22_bits(const struct gen_device_info *devinfo)
226715    switch (devinfo->gen) {
226721       if (devinfo->is_haswell) {
226729       if (devinfo->is_g4x) {
226749 SF_CLIP_VIEWPORT_ViewportMatrixElementm22_start(const struct gen_device_info *devinfo)
226751    switch (devinfo->gen) {
226757       if (devinfo->is_haswell) {
226765       if (devinfo->is_g4x) {
226788 SF_CLIP_VIEWPORT_ViewportMatrixElementm30_bits(const struct gen_device_info *devinfo)
226790    switch (devinfo->gen) {
226796       if (devinfo->is_haswell) {
226804       if (devinfo->is_g4x) {
226824 SF_CLIP_VIEWPORT_ViewportMatrixElementm30_start(const struct gen_device_info *devinfo)
226826    switch (devinfo->gen) {
226832       if (devinfo->is_haswell) {
226840       if (devinfo->is_g4x) {
226863 SF_CLIP_VIEWPORT_ViewportMatrixElementm31_bits(const struct gen_device_info *devinfo)
226865    switch (devinfo->gen) {
226871       if (devinfo->is_haswell) {
226879       if (devinfo->is_g4x) {
226899 SF_CLIP_VIEWPORT_ViewportMatrixElementm31_start(const struct gen_device_info *devinfo)
226901    switch (devinfo->gen) {
226907       if (devinfo->is_haswell) {
226915       if (devinfo->is_g4x) {
226938 SF_CLIP_VIEWPORT_ViewportMatrixElementm32_bits(const struct gen_device_info *devinfo)
226940    switch (devinfo->gen) {
226946       if (devinfo->is_haswell) {
226954       if (devinfo->is_g4x) {
226974 SF_CLIP_VIEWPORT_ViewportMatrixElementm32_start(const struct gen_device_info *devinfo)
226976    switch (devinfo->gen) {
226982       if (devinfo->is_haswell) {
226990       if (devinfo->is_g4x) {
227013 SF_CLIP_VIEWPORT_XMaxClipGuardband_bits(const struct gen_device_info *devinfo)
227015    switch (devinfo->gen) {
227021       if (devinfo->is_haswell) {
227029       if (devinfo->is_g4x) {
227049 SF_CLIP_VIEWPORT_XMaxClipGuardband_start(const struct gen_device_info *devinfo)
227051    switch (devinfo->gen) {
227057       if (devinfo->is_haswell) {
227065       if (devinfo->is_g4x) {
227086 SF_CLIP_VIEWPORT_XMaxViewPort_bits(const struct gen_device_info *devinfo)
227088    switch (devinfo->gen) {
227094       if (devinfo->is_haswell) {
227102       if (devinfo->is_g4x) {
227120 SF_CLIP_VIEWPORT_XMaxViewPort_start(const struct gen_device_info *devinfo)
227122    switch (devinfo->gen) {
227128       if (devinfo->is_haswell) {
227136       if (devinfo->is_g4x) {
227159 SF_CLIP_VIEWPORT_XMinClipGuardband_bits(const struct gen_device_info *devinfo)
227161    switch (devinfo->gen) {
227167       if (devinfo->is_haswell) {
227175       if (devinfo->is_g4x) {
227195 SF_CLIP_VIEWPORT_XMinClipGuardband_start(const struct gen_device_info *devinfo)
227197    switch (devinfo->gen) {
227203       if (devinfo->is_haswell) {
227211       if (devinfo->is_g4x) {
227232 SF_CLIP_VIEWPORT_XMinViewPort_bits(const struct gen_device_info *devinfo)
227234    switch (devinfo->gen) {
227240       if (devinfo->is_haswell) {
227248       if (devinfo->is_g4x) {
227266 SF_CLIP_VIEWPORT_XMinViewPort_start(const struct gen_device_info *devinfo)
227268    switch (devinfo->gen) {
227274       if (devinfo->is_haswell) {
227282       if (devinfo->is_g4x) {
227305 SF_CLIP_VIEWPORT_YMaxClipGuardband_bits(const struct gen_device_info *devinfo)
227307    switch (devinfo->gen) {
227313       if (devinfo->is_haswell) {
227321       if (devinfo->is_g4x) {
227341 SF_CLIP_VIEWPORT_YMaxClipGuardband_start(const struct gen_device_info *devinfo)
227343    switch (devinfo->gen) {
227349       if (devinfo->is_haswell) {
227357       if (devinfo->is_g4x) {
227378 SF_CLIP_VIEWPORT_YMaxViewPort_bits(const struct gen_device_info *devinfo)
227380    switch (devinfo->gen) {
227386       if (devinfo->is_haswell) {
227394       if (devinfo->is_g4x) {
227412 SF_CLIP_VIEWPORT_YMaxViewPort_start(const struct gen_device_info *devinfo)
227414    switch (devinfo->gen) {
227420       if (devinfo->is_haswell) {
227428       if (devinfo->is_g4x) {
227451 SF_CLIP_VIEWPORT_YMinClipGuardband_bits(const struct gen_device_info *devinfo)
227453    switch (devinfo->gen) {
227459       if (devinfo->is_haswell) {
227467       if (devinfo->is_g4x) {
227487 SF_CLIP_VIEWPORT_YMinClipGuardband_start(const struct gen_device_info *devinfo)
227489    switch (devinfo->gen) {
227495       if (devinfo->is_haswell) {
227503       if (devinfo->is_g4x) {
227524 SF_CLIP_VIEWPORT_YMinViewPort_bits(const struct gen_device_info *devinfo)
227526    switch (devinfo->gen) {
227532       if (devinfo->is_haswell) {
227540       if (devinfo->is_g4x) {
227558 SF_CLIP_VIEWPORT_YMinViewPort_start(const struct gen_device_info *devinfo)
227560    switch (devinfo->gen) {
227566       if (devinfo->is_haswell) {
227574       if (devinfo->is_g4x) {
227598 SF_OUTPUT_ATTRIBUTE_DETAIL_length(const struct gen_device_info *devinfo)
227600    switch (devinfo->gen) {
227606       if (devinfo->is_haswell) {
227614       if (devinfo->is_g4x) {
227638 SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_bits(const struct gen_device_info *devinfo)
227640    switch (devinfo->gen) {
227646       if (devinfo->is_haswell) {
227654       if (devinfo->is_g4x) {
227675 SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_start(const struct gen_device_info *devinfo)
227677    switch (devinfo->gen) {
227683       if (devinfo->is_haswell) {
227691       if (devinfo->is_g4x) {
227715 SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_bits(const struct gen_device_info *devinfo)
227717    switch (devinfo->gen) {
227723       if (devinfo->is_haswell) {
227731       if (devinfo->is_g4x) {
227752 SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_start(const struct gen_device_info *devinfo)
227754    switch (devinfo->gen) {
227760       if (devinfo->is_haswell) {
227768       if (devinfo->is_g4x) {
227792 SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_bits(const struct gen_device_info *devinfo)
227794    switch (devinfo->gen) {
227800       if (devinfo->is_haswell) {
227808       if (devinfo->is_g4x) {
227829 SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_start(const struct gen_device_info *devinfo)
227831    switch (devinfo->gen) {
227837       if (devinfo->is_haswell) {
227845       if (devinfo->is_g4x) {
227869 SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_bits(const struct gen_device_info *devinfo)
227871    switch (devinfo->gen) {
227877       if (devinfo->is_haswell) {
227885       if (devinfo->is_g4x) {
227906 SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_start(const struct gen_device_info *devinfo)
227908    switch (devinfo->gen) {
227914       if (devinfo->is_haswell) {
227922       if (devinfo->is_g4x) {
227946 SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_bits(const struct gen_device_info *devinfo)
227948    switch (devinfo->gen) {
227954       if (devinfo->is_haswell) {
227962       if (devinfo->is_g4x) {
227983 SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_start(const struct gen_device_info *devinfo)
227985    switch (devinfo->gen) {
227991       if (devinfo->is_haswell) {
227999       if (devinfo->is_g4x) {
228023 SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_bits(const struct gen_device_info *devinfo)
228025    switch (devinfo->gen) {
228031       if (devinfo->is_haswell) {
228039       if (devinfo->is_g4x) {
228060 SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_start(const struct gen_device_info *devinfo)
228062    switch (devinfo->gen) {
228068       if (devinfo->is_haswell) {
228076       if (devinfo->is_g4x) {
228100 SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_bits(const struct gen_device_info *devinfo)
228102    switch (devinfo->gen) {
228108       if (devinfo->is_haswell) {
228116       if (devinfo->is_g4x) {
228137 SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_start(const struct gen_device_info *devinfo)
228139    switch (devinfo->gen) {
228145       if (devinfo->is_haswell) {
228153       if (devinfo->is_g4x) {
228177 SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_bits(const struct gen_device_info *devinfo)
228179    switch (devinfo->gen) {
228185       if (devinfo->is_haswell) {
228193       if (devinfo->is_g4x) {
228214 SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_start(const struct gen_device_info *devinfo)
228216    switch (devinfo->gen) {
228222       if (devinfo->is_haswell) {
228230       if (devinfo->is_g4x) {
228250 SF_STATE_length(const struct gen_device_info *devinfo)
228252    switch (devinfo->gen) {
228258       if (devinfo->is_haswell) {
228266       if (devinfo->is_g4x) {
228286 SF_STATE_2x2PixelTriangleFilterDisable_bits(const struct gen_device_info *devinfo)
228288    switch (devinfo->gen) {
228294       if (devinfo->is_haswell) {
228302       if (devinfo->is_g4x) {
228319 SF_STATE_2x2PixelTriangleFilterDisable_start(const struct gen_device_info *devinfo)
228321    switch (devinfo->gen) {
228327       if (devinfo->is_haswell) {
228335       if (devinfo->is_g4x) {
228354 SF_STATE_AALineDistanceMode_bits(const struct gen_device_info *devinfo)
228356    switch (devinfo->gen) {
228362       if (devinfo->is_haswell) {
228370       if (devinfo->is_g4x) {
228386 SF_STATE_AALineDistanceMode_start(const struct gen_device_info *devinfo)
228388    switch (devinfo->gen) {
228394       if (devinfo->is_haswell) {
228402       if (devinfo->is_g4x) {
228422 SF_STATE_AntiAliasingEnable_bits(const struct gen_device_info *devinfo)
228424    switch (devinfo->gen) {
228430       if (devinfo->is_haswell) {
228438       if (devinfo->is_g4x) {
228455 SF_STATE_AntiAliasingEnable_start(const struct gen_device_info *devinfo)
228457    switch (devinfo->gen) {
228463       if (devinfo->is_haswell) {
228471       if (devinfo->is_g4x) {
228491 SF_STATE_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
228493    switch (devinfo->gen) {
228499       if (devinfo->is_haswell) {
228507       if (devinfo->is_g4x) {
228524 SF_STATE_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
228526    switch (devinfo->gen) {
228532       if (devinfo->is_haswell) {
228540       if (devinfo->is_g4x) {
228560 SF_STATE_ConstantURBEntryReadLength_bits(const struct gen_device_info *devinfo)
228562    switch (devinfo->gen) {
228568       if (devinfo->is_haswell) {
228576       if (devinfo->is_g4x) {
228593 SF_STATE_ConstantURBEntryReadLength_start(const struct gen_device_info *devinfo)
228595    switch (devinfo->gen) {
228601       if (devinfo->is_haswell) {
228609       if (devinfo->is_g4x) {
228629 SF_STATE_ConstantURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
228631    switch (devinfo->gen) {
228637       if (devinfo->is_haswell) {
228645       if (devinfo->is_g4x) {
228662 SF_STATE_ConstantURBEntryReadOffset_start(const struct gen_device_info *devinfo)
228664    switch (devinfo->gen) {
228670       if (devinfo->is_haswell) {
228678       if (devinfo->is_g4x) {
228698 SF_STATE_CullMode_bits(const struct gen_device_info *devinfo)
228700    switch (devinfo->gen) {
228706       if (devinfo->is_haswell) {
228714       if (devinfo->is_g4x) {
228731 SF_STATE_CullMode_start(const struct gen_device_info *devinfo)
228733    switch (devinfo->gen) {
228739       if (devinfo->is_haswell) {
228747       if (devinfo->is_g4x) {
228767 SF_STATE_DestinationOriginHorizontalBias_bits(const struct gen_device_info *devinfo)
228769    switch (devinfo->gen) {
228775       if (devinfo->is_haswell) {
228783       if (devinfo->is_g4x) {
228800 SF_STATE_DestinationOriginHorizontalBias_start(const struct gen_device_info *devinfo)
228802    switch (devinfo->gen) {
228808       if (devinfo->is_haswell) {
228816       if (devinfo->is_g4x) {
228836 SF_STATE_DestinationOriginVerticalBias_bits(const struct gen_device_info *devinfo)
228838    switch (devinfo->gen) {
228844       if (devinfo->is_haswell) {
228852       if (devinfo->is_g4x) {
228869 SF_STATE_DestinationOriginVerticalBias_start(const struct gen_device_info *devinfo)
228871    switch (devinfo->gen) {
228877       if (devinfo->is_haswell) {
228885       if (devinfo->is_g4x) {
228905 SF_STATE_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
228907    switch (devinfo->gen) {
228913       if (devinfo->is_haswell) {
228921       if (devinfo->is_g4x) {
228938 SF_STATE_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
228940    switch (devinfo->gen) {
228946       if (devinfo->is_haswell) {
228954       if (devinfo->is_g4x) {
228974 SF_STATE_FastScissorClipDisable_bits(const struct gen_device_info *devinfo)
228976    switch (devinfo->gen) {
228982       if (devinfo->is_haswell) {
228990       if (devinfo->is_g4x) {
229007 SF_STATE_FastScissorClipDisable_start(const struct gen_device_info *devinfo)
229009    switch (devinfo->gen) {
229015       if (devinfo->is_haswell) {
229023       if (devinfo->is_g4x) {
229043 SF_STATE_FloatingPointMode_bits(const struct gen_device_info *devinfo)
229045    switch (devinfo->gen) {
229051       if (devinfo->is_haswell) {
229059       if (devinfo->is_g4x) {
229076 SF_STATE_FloatingPointMode_start(const struct gen_device_info *devinfo)
229078    switch (devinfo->gen) {
229084       if (devinfo->is_haswell) {
229092       if (devinfo->is_g4x) {
229112 SF_STATE_FrontWinding_bits(const struct gen_device_info *devinfo)
229114    switch (devinfo->gen) {
229120       if (devinfo->is_haswell) {
229128       if (devinfo->is_g4x) {
229145 SF_STATE_FrontWinding_start(const struct gen_device_info *devinfo)
229147    switch (devinfo->gen) {
229153       if (devinfo->is_haswell) {
229161       if (devinfo->is_g4x) {
229181 SF_STATE_GRFRegisterCount_bits(const struct gen_device_info *devinfo)
229183    switch (devinfo->gen) {
229189       if (devinfo->is_haswell) {
229197       if (devinfo->is_g4x) {
229214 SF_STATE_GRFRegisterCount_start(const struct gen_device_info *devinfo)
229216    switch (devinfo->gen) {
229222       if (devinfo->is_haswell) {
229230       if (devinfo->is_g4x) {
229250 SF_STATE_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
229252    switch (devinfo->gen) {
229258       if (devinfo->is_haswell) {
229266       if (devinfo->is_g4x) {
229283 SF_STATE_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
229285    switch (devinfo->gen) {
229291       if (devinfo->is_haswell) {
229299       if (devinfo->is_g4x) {
229319 SF_STATE_KernelStartPointer_bits(const struct gen_device_info *devinfo)
229321    switch (devinfo->gen) {
229327       if (devinfo->is_haswell) {
229335       if (devinfo->is_g4x) {
229352 SF_STATE_KernelStartPointer_start(const struct gen_device_info *devinfo)
229354    switch (devinfo->gen) {
229360       if (devinfo->is_haswell) {
229368       if (devinfo->is_g4x) {
229388 SF_STATE_LastPixelEnable_bits(const struct gen_device_info *devinfo)
229390    switch (devinfo->gen) {
229396       if (devinfo->is_haswell) {
229404       if (devinfo->is_g4x) {
229421 SF_STATE_LastPixelEnable_start(const struct gen_device_info *devinfo)
229423    switch (devinfo->gen) {
229429       if (devinfo->is_haswell) {
229437       if (devinfo->is_g4x) {
229457 SF_STATE_LineEndCapAntialiasingRegionWidth_bits(const struct gen_device_info *devinfo)
229459    switch (devinfo->gen) {
229465       if (devinfo->is_haswell) {
229473       if (devinfo->is_g4x) {
229490 SF_STATE_LineEndCapAntialiasingRegionWidth_start(const struct gen_device_info *devinfo)
229492    switch (devinfo->gen) {
229498       if (devinfo->is_haswell) {
229506       if (devinfo->is_g4x) {
229526 SF_STATE_LineStripListProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
229528    switch (devinfo->gen) {
229534       if (devinfo->is_haswell) {
229542       if (devinfo->is_g4x) {
229559 SF_STATE_LineStripListProvokingVertexSelect_start(const struct gen_device_info *devinfo)
229561    switch (devinfo->gen) {
229567       if (devinfo->is_haswell) {
229575       if (devinfo->is_g4x) {
229595 SF_STATE_LineWidth_bits(const struct gen_device_info *devinfo)
229597    switch (devinfo->gen) {
229603       if (devinfo->is_haswell) {
229611       if (devinfo->is_g4x) {
229628 SF_STATE_LineWidth_start(const struct gen_device_info *devinfo)
229630    switch (devinfo->gen) {
229636       if (devinfo->is_haswell) {
229644       if (devinfo->is_g4x) {
229664 SF_STATE_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
229666    switch (devinfo->gen) {
229672       if (devinfo->is_haswell) {
229680       if (devinfo->is_g4x) {
229697 SF_STATE_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
229699    switch (devinfo->gen) {
229705       if (devinfo->is_haswell) {
229713       if (devinfo->is_g4x) {
229733 SF_STATE_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
229735    switch (devinfo->gen) {
229741       if (devinfo->is_haswell) {
229749       if (devinfo->is_g4x) {
229766 SF_STATE_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
229768    switch (devinfo->gen) {
229774       if (devinfo->is_haswell) {
229782       if (devinfo->is_g4x) {
229802 SF_STATE_NumberofURBEntries_bits(const struct gen_device_info *devinfo)
229804    switch (devinfo->gen) {
229810       if (devinfo->is_haswell) {
229818       if (devinfo->is_g4x) {
229835 SF_STATE_NumberofURBEntries_start(const struct gen_device_info *devinfo)
229837    switch (devinfo->gen) {
229843       if (devinfo->is_haswell) {
229851       if (devinfo->is_g4x) {
229871 SF_STATE_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
229873    switch (devinfo->gen) {
229879       if (devinfo->is_haswell) {
229887       if (devinfo->is_g4x) {
229904 SF_STATE_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
229906    switch (devinfo->gen) {
229912       if (devinfo->is_haswell) {
229920       if (devinfo->is_g4x) {
229940 SF_STATE_PointRasterizationRule_bits(const struct gen_device_info *devinfo)
229942    switch (devinfo->gen) {
229948       if (devinfo->is_haswell) {
229956       if (devinfo->is_g4x) {
229973 SF_STATE_PointRasterizationRule_start(const struct gen_device_info *devinfo)
229975    switch (devinfo->gen) {
229981       if (devinfo->is_haswell) {
229989       if (devinfo->is_g4x) {
230009 SF_STATE_PointWidth_bits(const struct gen_device_info *devinfo)
230011    switch (devinfo->gen) {
230017       if (devinfo->is_haswell) {
230025       if (devinfo->is_g4x) {
230042 SF_STATE_PointWidth_start(const struct gen_device_info *devinfo)
230044    switch (devinfo->gen) {
230050       if (devinfo->is_haswell) {
230058       if (devinfo->is_g4x) {
230078 SF_STATE_PointWidthSource_bits(const struct gen_device_info *devinfo)
230080    switch (devinfo->gen) {
230086       if (devinfo->is_haswell) {
230094       if (devinfo->is_g4x) {
230111 SF_STATE_PointWidthSource_start(const struct gen_device_info *devinfo)
230113    switch (devinfo->gen) {
230119       if (devinfo->is_haswell) {
230127       if (devinfo->is_g4x) {
230147 SF_STATE_ScissorRectangleEnable_bits(const struct gen_device_info *devinfo)
230149    switch (devinfo->gen) {
230155       if (devinfo->is_haswell) {
230163       if (devinfo->is_g4x) {
230180 SF_STATE_ScissorRectangleEnable_start(const struct gen_device_info *devinfo)
230182    switch (devinfo->gen) {
230188       if (devinfo->is_haswell) {
230196       if (devinfo->is_g4x) {
230216 SF_STATE_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
230218    switch (devinfo->gen) {
230224       if (devinfo->is_haswell) {
230232       if (devinfo->is_g4x) {
230249 SF_STATE_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
230251    switch (devinfo->gen) {
230257       if (devinfo->is_haswell) {
230265       if (devinfo->is_g4x) {
230285 SF_STATE_SetupViewportStateOffset_bits(const struct gen_device_info *devinfo)
230287    switch (devinfo->gen) {
230293       if (devinfo->is_haswell) {
230301       if (devinfo->is_g4x) {
230318 SF_STATE_SetupViewportStateOffset_start(const struct gen_device_info *devinfo)
230320    switch (devinfo->gen) {
230326       if (devinfo->is_haswell) {
230334       if (devinfo->is_g4x) {
230354 SF_STATE_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
230356    switch (devinfo->gen) {
230362       if (devinfo->is_haswell) {
230370       if (devinfo->is_g4x) {
230387 SF_STATE_SingleProgramFlow_start(const struct gen_device_info *devinfo)
230389    switch (devinfo->gen) {
230395       if (devinfo->is_haswell) {
230403       if (devinfo->is_g4x) {
230423 SF_STATE_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
230425    switch (devinfo->gen) {
230431       if (devinfo->is_haswell) {
230439       if (devinfo->is_g4x) {
230456 SF_STATE_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
230458    switch (devinfo->gen) {
230464       if (devinfo->is_haswell) {
230472       if (devinfo->is_g4x) {
230492 SF_STATE_SpritePointEnable_bits(const struct gen_device_info *devinfo)
230494    switch (devinfo->gen) {
230500       if (devinfo->is_haswell) {
230508       if (devinfo->is_g4x) {
230525 SF_STATE_SpritePointEnable_start(const struct gen_device_info *devinfo)
230527    switch (devinfo->gen) {
230533       if (devinfo->is_haswell) {
230541       if (devinfo->is_g4x) {
230559 SF_STATE_StatisticsEnable_bits(const struct gen_device_info *devinfo)
230561    switch (devinfo->gen) {
230567       if (devinfo->is_haswell) {
230575       if (devinfo->is_g4x) {
230590 SF_STATE_StatisticsEnable_start(const struct gen_device_info *devinfo)
230592    switch (devinfo->gen) {
230598       if (devinfo->is_haswell) {
230606       if (devinfo->is_g4x) {
230626 SF_STATE_ThreadPriority_bits(const struct gen_device_info *devinfo)
230628    switch (devinfo->gen) {
230634       if (devinfo->is_haswell) {
230642       if (devinfo->is_g4x) {
230659 SF_STATE_ThreadPriority_start(const struct gen_device_info *devinfo)
230661    switch (devinfo->gen) {
230667       if (devinfo->is_haswell) {
230675       if (devinfo->is_g4x) {
230695 SF_STATE_TriangleFanProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
230697    switch (devinfo->gen) {
230703       if (devinfo->is_haswell) {
230711       if (devinfo->is_g4x) {
230728 SF_STATE_TriangleFanProvokingVertexSelect_start(const struct gen_device_info *devinfo)
230730    switch (devinfo->gen) {
230736       if (devinfo->is_haswell) {
230744       if (devinfo->is_g4x) {
230764 SF_STATE_TriangleStripListProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
230766    switch (devinfo->gen) {
230772       if (devinfo->is_haswell) {
230780       if (devinfo->is_g4x) {
230797 SF_STATE_TriangleStripListProvokingVertexSelect_start(const struct gen_device_info *devinfo)
230799    switch (devinfo->gen) {
230805       if (devinfo->is_haswell) {
230813       if (devinfo->is_g4x) {
230833 SF_STATE_URBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
230835    switch (devinfo->gen) {
230841       if (devinfo->is_haswell) {
230849       if (devinfo->is_g4x) {
230866 SF_STATE_URBEntryAllocationSize_start(const struct gen_device_info *devinfo)
230868    switch (devinfo->gen) {
230874       if (devinfo->is_haswell) {
230882       if (devinfo->is_g4x) {
230902 SF_STATE_VertexSubPixelPrecisionSelect_bits(const struct gen_device_info *devinfo)
230904    switch (devinfo->gen) {
230910       if (devinfo->is_haswell) {
230918       if (devinfo->is_g4x) {
230935 SF_STATE_VertexSubPixelPrecisionSelect_start(const struct gen_device_info *devinfo)
230937    switch (devinfo->gen) {
230943       if (devinfo->is_haswell) {
230951       if (devinfo->is_g4x) {
230971 SF_STATE_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
230973    switch (devinfo->gen) {
230979       if (devinfo->is_haswell) {
230987       if (devinfo->is_g4x) {
231004 SF_STATE_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
231006    switch (devinfo->gen) {
231012       if (devinfo->is_haswell) {
231020       if (devinfo->is_g4x) {
231040 SF_STATE_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
231042    switch (devinfo->gen) {
231048       if (devinfo->is_haswell) {
231056       if (devinfo->is_g4x) {
231073 SF_STATE_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
231075    switch (devinfo->gen) {
231081       if (devinfo->is_haswell) {
231089       if (devinfo->is_g4x) {
231109 SF_STATE_ViewportTransformEnable_bits(const struct gen_device_info *devinfo)
231111    switch (devinfo->gen) {
231117       if (devinfo->is_haswell) {
231125       if (devinfo->is_g4x) {
231142 SF_STATE_ViewportTransformEnable_start(const struct gen_device_info *devinfo)
231144    switch (devinfo->gen) {
231150       if (devinfo->is_haswell) {
231158       if (devinfo->is_g4x) {
231178 SF_STATE_ZeroPixelTriangleFilterDisable_bits(const struct gen_device_info *devinfo)
231180    switch (devinfo->gen) {
231186       if (devinfo->is_haswell) {
231194       if (devinfo->is_g4x) {
231211 SF_STATE_ZeroPixelTriangleFilterDisable_start(const struct gen_device_info *devinfo)
231213    switch (devinfo->gen) {
231219       if (devinfo->is_haswell) {
231227       if (devinfo->is_g4x) {
231248 SF_VIEWPORT_length(const struct gen_device_info *devinfo)
231250    switch (devinfo->gen) {
231256       if (devinfo->is_haswell) {
231264       if (devinfo->is_g4x) {
231284 SF_VIEWPORT_ScissorRectangle_bits(const struct gen_device_info *devinfo)
231286    switch (devinfo->gen) {
231292       if (devinfo->is_haswell) {
231300       if (devinfo->is_g4x) {
231317 SF_VIEWPORT_ScissorRectangle_start(const struct gen_device_info *devinfo)
231319    switch (devinfo->gen) {
231325       if (devinfo->is_haswell) {
231333       if (devinfo->is_g4x) {
231354 SF_VIEWPORT_ViewportMatrixElementm00_bits(const struct gen_device_info *devinfo)
231356    switch (devinfo->gen) {
231362       if (devinfo->is_haswell) {
231370       if (devinfo->is_g4x) {
231388 SF_VIEWPORT_ViewportMatrixElementm00_start(const struct gen_device_info *devinfo)
231390    switch (devinfo->gen) {
231396       if (devinfo->is_haswell) {
231404       if (devinfo->is_g4x) {
231425 SF_VIEWPORT_ViewportMatrixElementm11_bits(const struct gen_device_info *devinfo)
231427    switch (devinfo->gen) {
231433       if (devinfo->is_haswell) {
231441       if (devinfo->is_g4x) {
231459 SF_VIEWPORT_ViewportMatrixElementm11_start(const struct gen_device_info *devinfo)
231461    switch (devinfo->gen) {
231467       if (devinfo->is_haswell) {
231475       if (devinfo->is_g4x) {
231496 SF_VIEWPORT_ViewportMatrixElementm22_bits(const struct gen_device_info *devinfo)
231498    switch (devinfo->gen) {
231504       if (devinfo->is_haswell) {
231512       if (devinfo->is_g4x) {
231530 SF_VIEWPORT_ViewportMatrixElementm22_start(const struct gen_device_info *devinfo)
231532    switch (devinfo->gen) {
231538       if (devinfo->is_haswell) {
231546       if (devinfo->is_g4x) {
231567 SF_VIEWPORT_ViewportMatrixElementm30_bits(const struct gen_device_info *devinfo)
231569    switch (devinfo->gen) {
231575       if (devinfo->is_haswell) {
231583       if (devinfo->is_g4x) {
231601 SF_VIEWPORT_ViewportMatrixElementm30_start(const struct gen_device_info *devinfo)
231603    switch (devinfo->gen) {
231609       if (devinfo->is_haswell) {
231617       if (devinfo->is_g4x) {
231638 SF_VIEWPORT_ViewportMatrixElementm31_bits(const struct gen_device_info *devinfo)
231640    switch (devinfo->gen) {
231646       if (devinfo->is_haswell) {
231654       if (devinfo->is_g4x) {
231672 SF_VIEWPORT_ViewportMatrixElementm31_start(const struct gen_device_info *devinfo)
231674    switch (devinfo->gen) {
231680       if (devinfo->is_haswell) {
231688       if (devinfo->is_g4x) {
231709 SF_VIEWPORT_ViewportMatrixElementm32_bits(const struct gen_device_info *devinfo)
231711    switch (devinfo->gen) {
231717       if (devinfo->is_haswell) {
231725       if (devinfo->is_g4x) {
231743 SF_VIEWPORT_ViewportMatrixElementm32_start(const struct gen_device_info *devinfo)
231745    switch (devinfo->gen) {
231751       if (devinfo->is_haswell) {
231759       if (devinfo->is_g4x) {
231778 SLICE_COMMON_ECO_CHICKEN1_length(const struct gen_device_info *devinfo)
231780    switch (devinfo->gen) {
231786       if (devinfo->is_haswell) {
231794       if (devinfo->is_g4x) {
231812 SLICE_COMMON_ECO_CHICKEN1_GLKBarrierMode_bits(const struct gen_device_info *devinfo)
231814    switch (devinfo->gen) {
231820       if (devinfo->is_haswell) {
231828       if (devinfo->is_g4x) {
231843 SLICE_COMMON_ECO_CHICKEN1_GLKBarrierMode_start(const struct gen_device_info *devinfo)
231845    switch (devinfo->gen) {
231851       if (devinfo->is_haswell) {
231859       if (devinfo->is_g4x) {
231877 SLICE_COMMON_ECO_CHICKEN1_GLKBarrierModeMask_bits(const struct gen_device_info *devinfo)
231879    switch (devinfo->gen) {
231885       if (devinfo->is_haswell) {
231893       if (devinfo->is_g4x) {
231908 SLICE_COMMON_ECO_CHICKEN1_GLKBarrierModeMask_start(const struct gen_device_info *devinfo)
231910    switch (devinfo->gen) {
231916       if (devinfo->is_haswell) {
231924       if (devinfo->is_g4x) {
231942 SLICE_COMMON_ECO_CHICKEN1_StateCacheRedirectToCSSectionEnable_bits(const struct gen_device_info *devinfo)
231944    switch (devinfo->gen) {
231950       if (devinfo->is_haswell) {
231958       if (devinfo->is_g4x) {
231973 SLICE_COMMON_ECO_CHICKEN1_StateCacheRedirectToCSSectionEnable_start(const struct gen_device_info *devinfo)
231975    switch (devinfo->gen) {
231981       if (devinfo->is_haswell) {
231989       if (devinfo->is_g4x) {
232007 SLICE_COMMON_ECO_CHICKEN1_StateCacheRedirectToCSSectionEnableMask_bits(const struct gen_device_info *devinfo)
232009    switch (devinfo->gen) {
232015       if (devinfo->is_haswell) {
232023       if (devinfo->is_g4x) {
232038 SLICE_COMMON_ECO_CHICKEN1_StateCacheRedirectToCSSectionEnableMask_start(const struct gen_device_info *devinfo)
232040    switch (devinfo->gen) {
232046       if (devinfo->is_haswell) {
232054       if (devinfo->is_g4x) {
232077 SO_DECL_length(const struct gen_device_info *devinfo)
232079    switch (devinfo->gen) {
232085       if (devinfo->is_haswell) {
232093       if (devinfo->is_g4x) {
232116 SO_DECL_ComponentMask_bits(const struct gen_device_info *devinfo)
232118    switch (devinfo->gen) {
232124       if (devinfo->is_haswell) {
232132       if (devinfo->is_g4x) {
232152 SO_DECL_ComponentMask_start(const struct gen_device_info *devinfo)
232154    switch (devinfo->gen) {
232160       if (devinfo->is_haswell) {
232168       if (devinfo->is_g4x) {
232191 SO_DECL_HoleFlag_bits(const struct gen_device_info *devinfo)
232193    switch (devinfo->gen) {
232199       if (devinfo->is_haswell) {
232207       if (devinfo->is_g4x) {
232227 SO_DECL_HoleFlag_start(const struct gen_device_info *devinfo)
232229    switch (devinfo->gen) {
232235       if (devinfo->is_haswell) {
232243       if (devinfo->is_g4x) {
232266 SO_DECL_OutputBufferSlot_bits(const struct gen_device_info *devinfo)
232268    switch (devinfo->gen) {
232274       if (devinfo->is_haswell) {
232282       if (devinfo->is_g4x) {
232302 SO_DECL_OutputBufferSlot_start(const struct gen_device_info *devinfo)
232304    switch (devinfo->gen) {
232310       if (devinfo->is_haswell) {
232318       if (devinfo->is_g4x) {
232341 SO_DECL_RegisterIndex_bits(const struct gen_device_info *devinfo)
232343    switch (devinfo->gen) {
232349       if (devinfo->is_haswell) {
232357       if (devinfo->is_g4x) {
232377 SO_DECL_RegisterIndex_start(const struct gen_device_info *devinfo)
232379    switch (devinfo->gen) {
232385       if (devinfo->is_haswell) {
232393       if (devinfo->is_g4x) {
232416 SO_DECL_ENTRY_length(const struct gen_device_info *devinfo)
232418    switch (devinfo->gen) {
232424       if (devinfo->is_haswell) {
232432       if (devinfo->is_g4x) {
232455 SO_DECL_ENTRY_Stream0Decl_bits(const struct gen_device_info *devinfo)
232457    switch (devinfo->gen) {
232463       if (devinfo->is_haswell) {
232471       if (devinfo->is_g4x) {
232491 SO_DECL_ENTRY_Stream0Decl_start(const struct gen_device_info *devinfo)
232493    switch (devinfo->gen) {
232499       if (devinfo->is_haswell) {
232507       if (devinfo->is_g4x) {
232530 SO_DECL_ENTRY_Stream1Decl_bits(const struct gen_device_info *devinfo)
232532    switch (devinfo->gen) {
232538       if (devinfo->is_haswell) {
232546       if (devinfo->is_g4x) {
232566 SO_DECL_ENTRY_Stream1Decl_start(const struct gen_device_info *devinfo)
232568    switch (devinfo->gen) {
232574       if (devinfo->is_haswell) {
232582       if (devinfo->is_g4x) {
232605 SO_DECL_ENTRY_Stream2Decl_bits(const struct gen_device_info *devinfo)
232607    switch (devinfo->gen) {
232613       if (devinfo->is_haswell) {
232621       if (devinfo->is_g4x) {
232641 SO_DECL_ENTRY_Stream2Decl_start(const struct gen_device_info *devinfo)
232643    switch (devinfo->gen) {
232649       if (devinfo->is_haswell) {
232657       if (devinfo->is_g4x) {
232680 SO_DECL_ENTRY_Stream3Decl_bits(const struct gen_device_info *devinfo)
232682    switch (devinfo->gen) {
232688       if (devinfo->is_haswell) {
232696       if (devinfo->is_g4x) {
232716 SO_DECL_ENTRY_Stream3Decl_start(const struct gen_device_info *devinfo)
232718    switch (devinfo->gen) {
232724       if (devinfo->is_haswell) {
232732       if (devinfo->is_g4x) {
232755 SO_NUM_PRIMS_WRITTEN0_length(const struct gen_device_info *devinfo)
232757    switch (devinfo->gen) {
232763       if (devinfo->is_haswell) {
232771       if (devinfo->is_g4x) {
232794 SO_NUM_PRIMS_WRITTEN0_NumPrimsWrittenCount_bits(const struct gen_device_info *devinfo)
232796    switch (devinfo->gen) {
232802       if (devinfo->is_haswell) {
232810       if (devinfo->is_g4x) {
232830 SO_NUM_PRIMS_WRITTEN0_NumPrimsWrittenCount_start(const struct gen_device_info *devinfo)
232832    switch (devinfo->gen) {
232838       if (devinfo->is_haswell) {
232846       if (devinfo->is_g4x) {
232869 SO_NUM_PRIMS_WRITTEN1_length(const struct gen_device_info *devinfo)
232871    switch (devinfo->gen) {
232877       if (devinfo->is_haswell) {
232885       if (devinfo->is_g4x) {
232908 SO_NUM_PRIMS_WRITTEN1_NumPrimsWrittenCount_bits(const struct gen_device_info *devinfo)
232910    switch (devinfo->gen) {
232916       if (devinfo->is_haswell) {
232924       if (devinfo->is_g4x) {
232944 SO_NUM_PRIMS_WRITTEN1_NumPrimsWrittenCount_start(const struct gen_device_info *devinfo)
232946    switch (devinfo->gen) {
232952       if (devinfo->is_haswell) {
232960       if (devinfo->is_g4x) {
232983 SO_NUM_PRIMS_WRITTEN2_length(const struct gen_device_info *devinfo)
232985    switch (devinfo->gen) {
232991       if (devinfo->is_haswell) {
232999       if (devinfo->is_g4x) {
233022 SO_NUM_PRIMS_WRITTEN2_NumPrimsWrittenCount_bits(const struct gen_device_info *devinfo)
233024    switch (devinfo->gen) {
233030       if (devinfo->is_haswell) {
233038       if (devinfo->is_g4x) {
233058 SO_NUM_PRIMS_WRITTEN2_NumPrimsWrittenCount_start(const struct gen_device_info *devinfo)
233060    switch (devinfo->gen) {
233066       if (devinfo->is_haswell) {
233074       if (devinfo->is_g4x) {
233097 SO_NUM_PRIMS_WRITTEN3_length(const struct gen_device_info *devinfo)
233099    switch (devinfo->gen) {
233105       if (devinfo->is_haswell) {
233113       if (devinfo->is_g4x) {
233136 SO_NUM_PRIMS_WRITTEN3_NumPrimsWrittenCount_bits(const struct gen_device_info *devinfo)
233138    switch (devinfo->gen) {
233144       if (devinfo->is_haswell) {
233152       if (devinfo->is_g4x) {
233172 SO_NUM_PRIMS_WRITTEN3_NumPrimsWrittenCount_start(const struct gen_device_info *devinfo)
233174    switch (devinfo->gen) {
233180       if (devinfo->is_haswell) {
233188       if (devinfo->is_g4x) {
233211 SO_PRIM_STORAGE_NEEDED0_length(const struct gen_device_info *devinfo)
233213    switch (devinfo->gen) {
233219       if (devinfo->is_haswell) {
233227       if (devinfo->is_g4x) {
233250 SO_PRIM_STORAGE_NEEDED0_PrimStorageNeededCount_bits(const struct gen_device_info *devinfo)
233252    switch (devinfo->gen) {
233258       if (devinfo->is_haswell) {
233266       if (devinfo->is_g4x) {
233286 SO_PRIM_STORAGE_NEEDED0_PrimStorageNeededCount_start(const struct gen_device_info *devinfo)
233288    switch (devinfo->gen) {
233294       if (devinfo->is_haswell) {
233302       if (devinfo->is_g4x) {
233325 SO_PRIM_STORAGE_NEEDED1_length(const struct gen_device_info *devinfo)
233327    switch (devinfo->gen) {
233333       if (devinfo->is_haswell) {
233341       if (devinfo->is_g4x) {
233364 SO_PRIM_STORAGE_NEEDED1_PrimStorageNeededCount_bits(const struct gen_device_info *devinfo)
233366    switch (devinfo->gen) {
233372       if (devinfo->is_haswell) {
233380       if (devinfo->is_g4x) {
233400 SO_PRIM_STORAGE_NEEDED1_PrimStorageNeededCount_start(const struct gen_device_info *devinfo)
233402    switch (devinfo->gen) {
233408       if (devinfo->is_haswell) {
233416       if (devinfo->is_g4x) {
233439 SO_PRIM_STORAGE_NEEDED2_length(const struct gen_device_info *devinfo)
233441    switch (devinfo->gen) {
233447       if (devinfo->is_haswell) {
233455       if (devinfo->is_g4x) {
233478 SO_PRIM_STORAGE_NEEDED2_PrimStorageNeededCount_bits(const struct gen_device_info *devinfo)
233480    switch (devinfo->gen) {
233486       if (devinfo->is_haswell) {
233494       if (devinfo->is_g4x) {
233514 SO_PRIM_STORAGE_NEEDED2_PrimStorageNeededCount_start(const struct gen_device_info *devinfo)
233516    switch (devinfo->gen) {
233522       if (devinfo->is_haswell) {
233530       if (devinfo->is_g4x) {
233553 SO_PRIM_STORAGE_NEEDED3_length(const struct gen_device_info *devinfo)
233555    switch (devinfo->gen) {
233561       if (devinfo->is_haswell) {
233569       if (devinfo->is_g4x) {
233592 SO_PRIM_STORAGE_NEEDED3_PrimStorageNeededCount_bits(const struct gen_device_info *devinfo)
233594    switch (devinfo->gen) {
233600       if (devinfo->is_haswell) {
233608       if (devinfo->is_g4x) {
233628 SO_PRIM_STORAGE_NEEDED3_PrimStorageNeededCount_start(const struct gen_device_info *devinfo)
233630    switch (devinfo->gen) {
233636       if (devinfo->is_haswell) {
233644       if (devinfo->is_g4x) {
233667 SO_WRITE_OFFSET0_length(const struct gen_device_info *devinfo)
233669    switch (devinfo->gen) {
233675       if (devinfo->is_haswell) {
233683       if (devinfo->is_g4x) {
233706 SO_WRITE_OFFSET0_WriteOffset_bits(const struct gen_device_info *devinfo)
233708    switch (devinfo->gen) {
233714       if (devinfo->is_haswell) {
233722       if (devinfo->is_g4x) {
233742 SO_WRITE_OFFSET0_WriteOffset_start(const struct gen_device_info *devinfo)
233744    switch (devinfo->gen) {
233750       if (devinfo->is_haswell) {
233758       if (devinfo->is_g4x) {
233781 SO_WRITE_OFFSET1_length(const struct gen_device_info *devinfo)
233783    switch (devinfo->gen) {
233789       if (devinfo->is_haswell) {
233797       if (devinfo->is_g4x) {
233820 SO_WRITE_OFFSET1_WriteOffset_bits(const struct gen_device_info *devinfo)
233822    switch (devinfo->gen) {
233828       if (devinfo->is_haswell) {
233836       if (devinfo->is_g4x) {
233856 SO_WRITE_OFFSET1_WriteOffset_start(const struct gen_device_info *devinfo)
233858    switch (devinfo->gen) {
233864       if (devinfo->is_haswell) {
233872       if (devinfo->is_g4x) {
233895 SO_WRITE_OFFSET2_length(const struct gen_device_info *devinfo)
233897    switch (devinfo->gen) {
233903       if (devinfo->is_haswell) {
233911       if (devinfo->is_g4x) {
233934 SO_WRITE_OFFSET2_WriteOffset_bits(const struct gen_device_info *devinfo)
233936    switch (devinfo->gen) {
233942       if (devinfo->is_haswell) {
233950       if (devinfo->is_g4x) {
233970 SO_WRITE_OFFSET2_WriteOffset_start(const struct gen_device_info *devinfo)
233972    switch (devinfo->gen) {
233978       if (devinfo->is_haswell) {
233986       if (devinfo->is_g4x) {
234009 SO_WRITE_OFFSET3_length(const struct gen_device_info *devinfo)
234011    switch (devinfo->gen) {
234017       if (devinfo->is_haswell) {
234025       if (devinfo->is_g4x) {
234048 SO_WRITE_OFFSET3_WriteOffset_bits(const struct gen_device_info *devinfo)
234050    switch (devinfo->gen) {
234056       if (devinfo->is_haswell) {
234064       if (devinfo->is_g4x) {
234084 SO_WRITE_OFFSET3_WriteOffset_start(const struct gen_device_info *devinfo)
234086    switch (devinfo->gen) {
234092       if (devinfo->is_haswell) {
234100       if (devinfo->is_g4x) {
234127 STATE_BASE_ADDRESS_length(const struct gen_device_info *devinfo)
234129    switch (devinfo->gen) {
234135       if (devinfo->is_haswell) {
234143       if (devinfo->is_g4x) {
234170 STATE_BASE_ADDRESS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
234172    switch (devinfo->gen) {
234178       if (devinfo->is_haswell) {
234186       if (devinfo->is_g4x) {
234210 STATE_BASE_ADDRESS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
234212    switch (devinfo->gen) {
234218       if (devinfo->is_haswell) {
234226       if (devinfo->is_g4x) {
234253 STATE_BASE_ADDRESS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
234255    switch (devinfo->gen) {
234261       if (devinfo->is_haswell) {
234269       if (devinfo->is_g4x) {
234293 STATE_BASE_ADDRESS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
234295    switch (devinfo->gen) {
234301       if (devinfo->is_haswell) {
234309       if (devinfo->is_g4x) {
234328 STATE_BASE_ADDRESS_BindlessSamplerStateBaseAddress_bits(const struct gen_device_info *devinfo)
234330    switch (devinfo->gen) {
234336       if (devinfo->is_haswell) {
234344       if (devinfo->is_g4x) {
234360 STATE_BASE_ADDRESS_BindlessSamplerStateBaseAddress_start(const struct gen_device_info *devinfo)
234362    switch (devinfo->gen) {
234368       if (devinfo->is_haswell) {
234376       if (devinfo->is_g4x) {
234395 STATE_BASE_ADDRESS_BindlessSamplerStateBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
234397    switch (devinfo->gen) {
234403       if (devinfo->is_haswell) {
234411       if (devinfo->is_g4x) {
234427 STATE_BASE_ADDRESS_BindlessSamplerStateBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
234429    switch (devinfo->gen) {
234435       if (devinfo->is_haswell) {
234443       if (devinfo->is_g4x) {
234462 STATE_BASE_ADDRESS_BindlessSamplerStateBufferSize_bits(const struct gen_device_info *devinfo)
234464    switch (devinfo->gen) {
234470       if (devinfo->is_haswell) {
234478       if (devinfo->is_g4x) {
234494 STATE_BASE_ADDRESS_BindlessSamplerStateBufferSize_start(const struct gen_device_info *devinfo)
234496    switch (devinfo->gen) {
234502       if (devinfo->is_haswell) {
234510       if (devinfo->is_g4x) {
234529 STATE_BASE_ADDRESS_BindlessSamplerStateMOCS_bits(const struct gen_device_info *devinfo)
234531    switch (devinfo->gen) {
234537       if (devinfo->is_haswell) {
234545       if (devinfo->is_g4x) {
234561 STATE_BASE_ADDRESS_BindlessSamplerStateMOCS_start(const struct gen_device_info *devinfo)
234563    switch (devinfo->gen) {
234569       if (devinfo->is_haswell) {
234577       if (devinfo->is_g4x) {
234597 STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddress_bits(const struct gen_device_info *devinfo)
234599    switch (devinfo->gen) {
234605       if (devinfo->is_haswell) {
234613       if (devinfo->is_g4x) {
234630 STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddress_start(const struct gen_device_info *devinfo)
234632    switch (devinfo->gen) {
234638       if (devinfo->is_haswell) {
234646       if (devinfo->is_g4x) {
234666 STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
234668    switch (devinfo->gen) {
234674       if (devinfo->is_haswell) {
234682       if (devinfo->is_g4x) {
234699 STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
234701    switch (devinfo->gen) {
234707       if (devinfo->is_haswell) {
234715       if (devinfo->is_g4x) {
234735 STATE_BASE_ADDRESS_BindlessSurfaceStateMOCS_bits(const struct gen_device_info *devinfo)
234737    switch (devinfo->gen) {
234743       if (devinfo->is_haswell) {
234751       if (devinfo->is_g4x) {
234768 STATE_BASE_ADDRESS_BindlessSurfaceStateMOCS_start(const struct gen_device_info *devinfo)
234770    switch (devinfo->gen) {
234776       if (devinfo->is_haswell) {
234784       if (devinfo->is_g4x) {
234804 STATE_BASE_ADDRESS_BindlessSurfaceStateSize_bits(const struct gen_device_info *devinfo)
234806    switch (devinfo->gen) {
234812       if (devinfo->is_haswell) {
234820       if (devinfo->is_g4x) {
234837 STATE_BASE_ADDRESS_BindlessSurfaceStateSize_start(const struct gen_device_info *devinfo)
234839    switch (devinfo->gen) {
234845       if (devinfo->is_haswell) {
234853       if (devinfo->is_g4x) {
234880 STATE_BASE_ADDRESS_CommandSubType_bits(const struct gen_device_info *devinfo)
234882    switch (devinfo->gen) {
234888       if (devinfo->is_haswell) {
234896       if (devinfo->is_g4x) {
234920 STATE_BASE_ADDRESS_CommandSubType_start(const struct gen_device_info *devinfo)
234922    switch (devinfo->gen) {
234928       if (devinfo->is_haswell) {
234936       if (devinfo->is_g4x) {
234963 STATE_BASE_ADDRESS_CommandType_bits(const struct gen_device_info *devinfo)
234965    switch (devinfo->gen) {
234971       if (devinfo->is_haswell) {
234979       if (devinfo->is_g4x) {
235003 STATE_BASE_ADDRESS_CommandType_start(const struct gen_device_info *devinfo)
235005    switch (devinfo->gen) {
235011       if (devinfo->is_haswell) {
235019       if (devinfo->is_g4x) {
235046 STATE_BASE_ADDRESS_DWordLength_bits(const struct gen_device_info *devinfo)
235048    switch (devinfo->gen) {
235054       if (devinfo->is_haswell) {
235062       if (devinfo->is_g4x) {
235086 STATE_BASE_ADDRESS_DWordLength_start(const struct gen_device_info *devinfo)
235088    switch (devinfo->gen) {
235094       if (devinfo->is_haswell) {
235102       if (devinfo->is_g4x) {
235122 STATE_BASE_ADDRESS_DynamicStateAccessUpperBound_bits(const struct gen_device_info *devinfo)
235124    switch (devinfo->gen) {
235130       if (devinfo->is_haswell) {
235138       if (devinfo->is_g4x) {
235155 STATE_BASE_ADDRESS_DynamicStateAccessUpperBound_start(const struct gen_device_info *devinfo)
235157    switch (devinfo->gen) {
235163       if (devinfo->is_haswell) {
235171       if (devinfo->is_g4x) {
235191 STATE_BASE_ADDRESS_DynamicStateAccessUpperBoundModifyEnable_bits(const struct gen_device_info *devinfo)
235193    switch (devinfo->gen) {
235199       if (devinfo->is_haswell) {
235207       if (devinfo->is_g4x) {
235224 STATE_BASE_ADDRESS_DynamicStateAccessUpperBoundModifyEnable_start(const struct gen_device_info *devinfo)
235226    switch (devinfo->gen) {
235232       if (devinfo->is_haswell) {
235240       if (devinfo->is_g4x) {
235264 STATE_BASE_ADDRESS_DynamicStateBaseAddress_bits(const struct gen_device_info *devinfo)
235266    switch (devinfo->gen) {
235272       if (devinfo->is_haswell) {
235280       if (devinfo->is_g4x) {
235301 STATE_BASE_ADDRESS_DynamicStateBaseAddress_start(const struct gen_device_info *devinfo)
235303    switch (devinfo->gen) {
235309       if (devinfo->is_haswell) {
235317       if (devinfo->is_g4x) {
235341 STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
235343    switch (devinfo->gen) {
235349       if (devinfo->is_haswell) {
235357       if (devinfo->is_g4x) {
235378 STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
235380    switch (devinfo->gen) {
235386       if (devinfo->is_haswell) {
235394       if (devinfo->is_g4x) {
235415 STATE_BASE_ADDRESS_DynamicStateBufferSize_bits(const struct gen_device_info *devinfo)
235417    switch (devinfo->gen) {
235423       if (devinfo->is_haswell) {
235431       if (devinfo->is_g4x) {
235449 STATE_BASE_ADDRESS_DynamicStateBufferSize_start(const struct gen_device_info *devinfo)
235451    switch (devinfo->gen) {
235457       if (devinfo->is_haswell) {
235465       if (devinfo->is_g4x) {
235486 STATE_BASE_ADDRESS_DynamicStateBufferSizeModifyEnable_bits(const struct gen_device_info *devinfo)
235488    switch (devinfo->gen) {
235494       if (devinfo->is_haswell) {
235502       if (devinfo->is_g4x) {
235520 STATE_BASE_ADDRESS_DynamicStateBufferSizeModifyEnable_start(const struct gen_device_info *devinfo)
235522    switch (devinfo->gen) {
235528       if (devinfo->is_haswell) {
235536       if (devinfo->is_g4x) {
235560 STATE_BASE_ADDRESS_DynamicStateMOCS_bits(const struct gen_device_info *devinfo)
235562    switch (devinfo->gen) {
235568       if (devinfo->is_haswell) {
235576       if (devinfo->is_g4x) {
235597 STATE_BASE_ADDRESS_DynamicStateMOCS_start(const struct gen_device_info *devinfo)
235599    switch (devinfo->gen) {
235605       if (devinfo->is_haswell) {
235613       if (devinfo->is_g4x) {
235636 STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_bits(const struct gen_device_info *devinfo)
235638    switch (devinfo->gen) {
235644       if (devinfo->is_haswell) {
235652       if (devinfo->is_g4x) {
235672 STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_start(const struct gen_device_info *devinfo)
235674    switch (devinfo->gen) {
235680       if (devinfo->is_haswell) {
235688       if (devinfo->is_g4x) {
235711 STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_bits(const struct gen_device_info *devinfo)
235713    switch (devinfo->gen) {
235719       if (devinfo->is_haswell) {
235727       if (devinfo->is_g4x) {
235747 STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_start(const struct gen_device_info *devinfo)
235749    switch (devinfo->gen) {
235755       if (devinfo->is_haswell) {
235763       if (devinfo->is_g4x) {
235790 STATE_BASE_ADDRESS_GeneralStateBaseAddress_bits(const struct gen_device_info *devinfo)
235792    switch (devinfo->gen) {
235798       if (devinfo->is_haswell) {
235806       if (devinfo->is_g4x) {
235830 STATE_BASE_ADDRESS_GeneralStateBaseAddress_start(const struct gen_device_info *devinfo)
235832    switch (devinfo->gen) {
235838       if (devinfo->is_haswell) {
235846       if (devinfo->is_g4x) {
235873 STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
235875    switch (devinfo->gen) {
235881       if (devinfo->is_haswell) {
235889       if (devinfo->is_g4x) {
235913 STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
235915    switch (devinfo->gen) {
235921       if (devinfo->is_haswell) {
235929       if (devinfo->is_g4x) {
235950 STATE_BASE_ADDRESS_GeneralStateBufferSize_bits(const struct gen_device_info *devinfo)
235952    switch (devinfo->gen) {
235958       if (devinfo->is_haswell) {
235966       if (devinfo->is_g4x) {
235984 STATE_BASE_ADDRESS_GeneralStateBufferSize_start(const struct gen_device_info *devinfo)
235986    switch (devinfo->gen) {
235992       if (devinfo->is_haswell) {
236000       if (devinfo->is_g4x) {
236021 STATE_BASE_ADDRESS_GeneralStateBufferSizeModifyEnable_bits(const struct gen_device_info *devinfo)
236023    switch (devinfo->gen) {
236029       if (devinfo->is_haswell) {
236037       if (devinfo->is_g4x) {
236055 STATE_BASE_ADDRESS_GeneralStateBufferSizeModifyEnable_start(const struct gen_device_info *devinfo)
236057    switch (devinfo->gen) {
236063       if (devinfo->is_haswell) {
236071       if (devinfo->is_g4x) {
236095 STATE_BASE_ADDRESS_GeneralStateMOCS_bits(const struct gen_device_info *devinfo)
236097    switch (devinfo->gen) {
236103       if (devinfo->is_haswell) {
236111       if (devinfo->is_g4x) {
236132 STATE_BASE_ADDRESS_GeneralStateMOCS_start(const struct gen_device_info *devinfo)
236134    switch (devinfo->gen) {
236140       if (devinfo->is_haswell) {
236148       if (devinfo->is_g4x) {
236170 STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_bits(const struct gen_device_info *devinfo)
236172    switch (devinfo->gen) {
236178       if (devinfo->is_haswell) {
236186       if (devinfo->is_g4x) {
236205 STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_start(const struct gen_device_info *devinfo)
236207    switch (devinfo->gen) {
236213       if (devinfo->is_haswell) {
236221       if (devinfo->is_g4x) {
236243 STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_bits(const struct gen_device_info *devinfo)
236245    switch (devinfo->gen) {
236251       if (devinfo->is_haswell) {
236259       if (devinfo->is_g4x) {
236278 STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_start(const struct gen_device_info *devinfo)
236280    switch (devinfo->gen) {
236286       if (devinfo->is_haswell) {
236294       if (devinfo->is_g4x) {
236321 STATE_BASE_ADDRESS_IndirectObjectBaseAddress_bits(const struct gen_device_info *devinfo)
236323    switch (devinfo->gen) {
236329       if (devinfo->is_haswell) {
236337       if (devinfo->is_g4x) {
236361 STATE_BASE_ADDRESS_IndirectObjectBaseAddress_start(const struct gen_device_info *devinfo)
236363    switch (devinfo->gen) {
236369       if (devinfo->is_haswell) {
236377       if (devinfo->is_g4x) {
236404 STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
236406    switch (devinfo->gen) {
236412       if (devinfo->is_haswell) {
236420       if (devinfo->is_g4x) {
236444 STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
236446    switch (devinfo->gen) {
236452       if (devinfo->is_haswell) {
236460       if (devinfo->is_g4x) {
236481 STATE_BASE_ADDRESS_IndirectObjectBufferSize_bits(const struct gen_device_info *devinfo)
236483    switch (devinfo->gen) {
236489       if (devinfo->is_haswell) {
236497       if (devinfo->is_g4x) {
236515 STATE_BASE_ADDRESS_IndirectObjectBufferSize_start(const struct gen_device_info *devinfo)
236517    switch (devinfo->gen) {
236523       if (devinfo->is_haswell) {
236531       if (devinfo->is_g4x) {
236552 STATE_BASE_ADDRESS_IndirectObjectBufferSizeModifyEnable_bits(const struct gen_device_info *devinfo)
236554    switch (devinfo->gen) {
236560       if (devinfo->is_haswell) {
236568       if (devinfo->is_g4x) {
236586 STATE_BASE_ADDRESS_IndirectObjectBufferSizeModifyEnable_start(const struct gen_device_info *devinfo)
236588    switch (devinfo->gen) {
236594       if (devinfo->is_haswell) {
236602       if (devinfo->is_g4x) {
236626 STATE_BASE_ADDRESS_IndirectObjectMOCS_bits(const struct gen_device_info *devinfo)
236628    switch (devinfo->gen) {
236634       if (devinfo->is_haswell) {
236642       if (devinfo->is_g4x) {
236663 STATE_BASE_ADDRESS_IndirectObjectMOCS_start(const struct gen_device_info *devinfo)
236665    switch (devinfo->gen) {
236671       if (devinfo->is_haswell) {
236679       if (devinfo->is_g4x) {
236701 STATE_BASE_ADDRESS_InstructionAccessUpperBound_bits(const struct gen_device_info *devinfo)
236703    switch (devinfo->gen) {
236709       if (devinfo->is_haswell) {
236717       if (devinfo->is_g4x) {
236736 STATE_BASE_ADDRESS_InstructionAccessUpperBound_start(const struct gen_device_info *devinfo)
236738    switch (devinfo->gen) {
236744       if (devinfo->is_haswell) {
236752       if (devinfo->is_g4x) {
236774 STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_bits(const struct gen_device_info *devinfo)
236776    switch (devinfo->gen) {
236782       if (devinfo->is_haswell) {
236790       if (devinfo->is_g4x) {
236809 STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_start(const struct gen_device_info *devinfo)
236811    switch (devinfo->gen) {
236817       if (devinfo->is_haswell) {
236825       if (devinfo->is_g4x) {
236850 STATE_BASE_ADDRESS_InstructionBaseAddress_bits(const struct gen_device_info *devinfo)
236852    switch (devinfo->gen) {
236858       if (devinfo->is_haswell) {
236866       if (devinfo->is_g4x) {
236888 STATE_BASE_ADDRESS_InstructionBaseAddress_start(const struct gen_device_info *devinfo)
236890    switch (devinfo->gen) {
236896       if (devinfo->is_haswell) {
236904       if (devinfo->is_g4x) {
236929 STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
236931    switch (devinfo->gen) {
236937       if (devinfo->is_haswell) {
236945       if (devinfo->is_g4x) {
236967 STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
236969    switch (devinfo->gen) {
236975       if (devinfo->is_haswell) {
236983       if (devinfo->is_g4x) {
237004 STATE_BASE_ADDRESS_InstructionBufferSize_bits(const struct gen_device_info *devinfo)
237006    switch (devinfo->gen) {
237012       if (devinfo->is_haswell) {
237020       if (devinfo->is_g4x) {
237038 STATE_BASE_ADDRESS_InstructionBufferSize_start(const struct gen_device_info *devinfo)
237040    switch (devinfo->gen) {
237046       if (devinfo->is_haswell) {
237054       if (devinfo->is_g4x) {
237075 STATE_BASE_ADDRESS_InstructionBuffersizeModifyEnable_bits(const struct gen_device_info *devinfo)
237077    switch (devinfo->gen) {
237083       if (devinfo->is_haswell) {
237091       if (devinfo->is_g4x) {
237109 STATE_BASE_ADDRESS_InstructionBuffersizeModifyEnable_start(const struct gen_device_info *devinfo)
237111    switch (devinfo->gen) {
237117       if (devinfo->is_haswell) {
237125       if (devinfo->is_g4x) {
237149 STATE_BASE_ADDRESS_InstructionMOCS_bits(const struct gen_device_info *devinfo)
237151    switch (devinfo->gen) {
237157       if (devinfo->is_haswell) {
237165       if (devinfo->is_g4x) {
237186 STATE_BASE_ADDRESS_InstructionMOCS_start(const struct gen_device_info *devinfo)
237188    switch (devinfo->gen) {
237194       if (devinfo->is_haswell) {
237202       if (devinfo->is_g4x) {
237221 STATE_BASE_ADDRESS_StatelessDataPortAccessForceWriteThru_bits(const struct gen_device_info *devinfo)
237223    switch (devinfo->gen) {
237229       if (devinfo->is_haswell) {
237237       if (devinfo->is_g4x) {
237253 STATE_BASE_ADDRESS_StatelessDataPortAccessForceWriteThru_start(const struct gen_device_info *devinfo)
237255    switch (devinfo->gen) {
237261       if (devinfo->is_haswell) {
237269       if (devinfo->is_g4x) {
237293 STATE_BASE_ADDRESS_StatelessDataPortAccessMOCS_bits(const struct gen_device_info *devinfo)
237295    switch (devinfo->gen) {
237301       if (devinfo->is_haswell) {
237309       if (devinfo->is_g4x) {
237330 STATE_BASE_ADDRESS_StatelessDataPortAccessMOCS_start(const struct gen_device_info *devinfo)
237332    switch (devinfo->gen) {
237338       if (devinfo->is_haswell) {
237346       if (devinfo->is_g4x) {
237373 STATE_BASE_ADDRESS_SurfaceStateBaseAddress_bits(const struct gen_device_info *devinfo)
237375    switch (devinfo->gen) {
237381       if (devinfo->is_haswell) {
237389       if (devinfo->is_g4x) {
237413 STATE_BASE_ADDRESS_SurfaceStateBaseAddress_start(const struct gen_device_info *devinfo)
237415    switch (devinfo->gen) {
237421       if (devinfo->is_haswell) {
237429       if (devinfo->is_g4x) {
237456 STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
237458    switch (devinfo->gen) {
237464       if (devinfo->is_haswell) {
237472       if (devinfo->is_g4x) {
237496 STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
237498    switch (devinfo->gen) {
237504       if (devinfo->is_haswell) {
237512       if (devinfo->is_g4x) {
237536 STATE_BASE_ADDRESS_SurfaceStateMOCS_bits(const struct gen_device_info *devinfo)
237538    switch (devinfo->gen) {
237544       if (devinfo->is_haswell) {
237552       if (devinfo->is_g4x) {
237573 STATE_BASE_ADDRESS_SurfaceStateMOCS_start(const struct gen_device_info *devinfo)
237575    switch (devinfo->gen) {
237581       if (devinfo->is_haswell) {
237589       if (devinfo->is_g4x) {
237611 STATE_PREFETCH_length(const struct gen_device_info *devinfo)
237613    switch (devinfo->gen) {
237619       if (devinfo->is_haswell) {
237627       if (devinfo->is_g4x) {
237649 STATE_PREFETCH_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
237651    switch (devinfo->gen) {
237657       if (devinfo->is_haswell) {
237665       if (devinfo->is_g4x) {
237684 STATE_PREFETCH_3DCommandOpcode_start(const struct gen_device_info *devinfo)
237686    switch (devinfo->gen) {
237692       if (devinfo->is_haswell) {
237700       if (devinfo->is_g4x) {
237722 STATE_PREFETCH_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
237724    switch (devinfo->gen) {
237730       if (devinfo->is_haswell) {
237738       if (devinfo->is_g4x) {
237757 STATE_PREFETCH_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
237759    switch (devinfo->gen) {
237765       if (devinfo->is_haswell) {
237773       if (devinfo->is_g4x) {
237795 STATE_PREFETCH_CommandSubType_bits(const struct gen_device_info *devinfo)
237797    switch (devinfo->gen) {
237803       if (devinfo->is_haswell) {
237811       if (devinfo->is_g4x) {
237830 STATE_PREFETCH_CommandSubType_start(const struct gen_device_info *devinfo)
237832    switch (devinfo->gen) {
237838       if (devinfo->is_haswell) {
237846       if (devinfo->is_g4x) {
237868 STATE_PREFETCH_CommandType_bits(const struct gen_device_info *devinfo)
237870    switch (devinfo->gen) {
237876       if (devinfo->is_haswell) {
237884       if (devinfo->is_g4x) {
237903 STATE_PREFETCH_CommandType_start(const struct gen_device_info *devinfo)
237905    switch (devinfo->gen) {
237911       if (devinfo->is_haswell) {
237919       if (devinfo->is_g4x) {
237941 STATE_PREFETCH_DWordLength_bits(const struct gen_device_info *devinfo)
237943    switch (devinfo->gen) {
237949       if (devinfo->is_haswell) {
237957       if (devinfo->is_g4x) {
237976 STATE_PREFETCH_DWordLength_start(const struct gen_device_info *devinfo)
237978    switch (devinfo->gen) {
237984       if (devinfo->is_haswell) {
237992       if (devinfo->is_g4x) {
238014 STATE_PREFETCH_PrefetchCount_bits(const struct gen_device_info *devinfo)
238016    switch (devinfo->gen) {
238022       if (devinfo->is_haswell) {
238030       if (devinfo->is_g4x) {
238049 STATE_PREFETCH_PrefetchCount_start(const struct gen_device_info *devinfo)
238051    switch (devinfo->gen) {
238057       if (devinfo->is_haswell) {
238065       if (devinfo->is_g4x) {
238087 STATE_PREFETCH_PrefetchPointer_bits(const struct gen_device_info *devinfo)
238089    switch (devinfo->gen) {
238095       if (devinfo->is_haswell) {
238103       if (devinfo->is_g4x) {
238122 STATE_PREFETCH_PrefetchPointer_start(const struct gen_device_info *devinfo)
238124    switch (devinfo->gen) {
238130       if (devinfo->is_haswell) {
238138       if (devinfo->is_g4x) {
238165 STATE_SIP_length(const struct gen_device_info *devinfo)
238167    switch (devinfo->gen) {
238173       if (devinfo->is_haswell) {
238181       if (devinfo->is_g4x) {
238208 STATE_SIP_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
238210    switch (devinfo->gen) {
238216       if (devinfo->is_haswell) {
238224       if (devinfo->is_g4x) {
238248 STATE_SIP_3DCommandOpcode_start(const struct gen_device_info *devinfo)
238250    switch (devinfo->gen) {
238256       if (devinfo->is_haswell) {
238264       if (devinfo->is_g4x) {
238291 STATE_SIP_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
238293    switch (devinfo->gen) {
238299       if (devinfo->is_haswell) {
238307       if (devinfo->is_g4x) {
238331 STATE_SIP_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
238333    switch (devinfo->gen) {
238339       if (devinfo->is_haswell) {
238347       if (devinfo->is_g4x) {
238374 STATE_SIP_CommandSubType_bits(const struct gen_device_info *devinfo)
238376    switch (devinfo->gen) {
238382       if (devinfo->is_haswell) {
238390       if (devinfo->is_g4x) {
238414 STATE_SIP_CommandSubType_start(const struct gen_device_info *devinfo)
238416    switch (devinfo->gen) {
238422       if (devinfo->is_haswell) {
238430       if (devinfo->is_g4x) {
238457 STATE_SIP_CommandType_bits(const struct gen_device_info *devinfo)
238459    switch (devinfo->gen) {
238465       if (devinfo->is_haswell) {
238473       if (devinfo->is_g4x) {
238497 STATE_SIP_CommandType_start(const struct gen_device_info *devinfo)
238499    switch (devinfo->gen) {
238505       if (devinfo->is_haswell) {
238513       if (devinfo->is_g4x) {
238540 STATE_SIP_DWordLength_bits(const struct gen_device_info *devinfo)
238542    switch (devinfo->gen) {
238548       if (devinfo->is_haswell) {
238556       if (devinfo->is_g4x) {
238580 STATE_SIP_DWordLength_start(const struct gen_device_info *devinfo)
238582    switch (devinfo->gen) {
238588       if (devinfo->is_haswell) {
238596       if (devinfo->is_g4x) {
238623 STATE_SIP_SystemInstructionPointer_bits(const struct gen_device_info *devinfo)
238625    switch (devinfo->gen) {
238631       if (devinfo->is_haswell) {
238639       if (devinfo->is_g4x) {
238663 STATE_SIP_SystemInstructionPointer_start(const struct gen_device_info *devinfo)
238665    switch (devinfo->gen) {
238671       if (devinfo->is_haswell) {
238679       if (devinfo->is_g4x) {
238699 SWTESS_BASE_ADDRESS_length(const struct gen_device_info *devinfo)
238701    switch (devinfo->gen) {
238707       if (devinfo->is_haswell) {
238715       if (devinfo->is_g4x) {
238735 SWTESS_BASE_ADDRESS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
238737    switch (devinfo->gen) {
238743       if (devinfo->is_haswell) {
238751       if (devinfo->is_g4x) {
238768 SWTESS_BASE_ADDRESS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
238770    switch (devinfo->gen) {
238776       if (devinfo->is_haswell) {
238784       if (devinfo->is_g4x) {
238804 SWTESS_BASE_ADDRESS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
238806    switch (devinfo->gen) {
238812       if (devinfo->is_haswell) {
238820       if (devinfo->is_g4x) {
238837 SWTESS_BASE_ADDRESS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
238839    switch (devinfo->gen) {
238845       if (devinfo->is_haswell) {
238853       if (devinfo->is_g4x) {
238873 SWTESS_BASE_ADDRESS_CommandSubType_bits(const struct gen_device_info *devinfo)
238875    switch (devinfo->gen) {
238881       if (devinfo->is_haswell) {
238889       if (devinfo->is_g4x) {
238906 SWTESS_BASE_ADDRESS_CommandSubType_start(const struct gen_device_info *devinfo)
238908    switch (devinfo->gen) {
238914       if (devinfo->is_haswell) {
238922       if (devinfo->is_g4x) {
238942 SWTESS_BASE_ADDRESS_CommandType_bits(const struct gen_device_info *devinfo)
238944    switch (devinfo->gen) {
238950       if (devinfo->is_haswell) {
238958       if (devinfo->is_g4x) {
238975 SWTESS_BASE_ADDRESS_CommandType_start(const struct gen_device_info *devinfo)
238977    switch (devinfo->gen) {
238983       if (devinfo->is_haswell) {
238991       if (devinfo->is_g4x) {
239011 SWTESS_BASE_ADDRESS_DWordLength_bits(const struct gen_device_info *devinfo)
239013    switch (devinfo->gen) {
239019       if (devinfo->is_haswell) {
239027       if (devinfo->is_g4x) {
239044 SWTESS_BASE_ADDRESS_DWordLength_start(const struct gen_device_info *devinfo)
239046    switch (devinfo->gen) {
239052       if (devinfo->is_haswell) {
239060       if (devinfo->is_g4x) {
239080 SWTESS_BASE_ADDRESS_SWTessellationBaseAddress_bits(const struct gen_device_info *devinfo)
239082    switch (devinfo->gen) {
239088       if (devinfo->is_haswell) {
239096       if (devinfo->is_g4x) {
239113 SWTESS_BASE_ADDRESS_SWTessellationBaseAddress_start(const struct gen_device_info *devinfo)
239115    switch (devinfo->gen) {
239121       if (devinfo->is_haswell) {
239129       if (devinfo->is_g4x) {
239149 SWTESS_BASE_ADDRESS_SWTessellationMOCS_bits(const struct gen_device_info *devinfo)
239151    switch (devinfo->gen) {
239157       if (devinfo->is_haswell) {
239165       if (devinfo->is_g4x) {
239182 SWTESS_BASE_ADDRESS_SWTessellationMOCS_start(const struct gen_device_info *devinfo)
239184    switch (devinfo->gen) {
239190       if (devinfo->is_haswell) {
239198       if (devinfo->is_g4x) {
239218 URB_FENCE_length(const struct gen_device_info *devinfo)
239220    switch (devinfo->gen) {
239226       if (devinfo->is_haswell) {
239234       if (devinfo->is_g4x) {
239254 URB_FENCE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
239256    switch (devinfo->gen) {
239262       if (devinfo->is_haswell) {
239270       if (devinfo->is_g4x) {
239287 URB_FENCE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
239289    switch (devinfo->gen) {
239295       if (devinfo->is_haswell) {
239303       if (devinfo->is_g4x) {
239323 URB_FENCE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
239325    switch (devinfo->gen) {
239331       if (devinfo->is_haswell) {
239339       if (devinfo->is_g4x) {
239356 URB_FENCE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
239358    switch (devinfo->gen) {
239364       if (devinfo->is_haswell) {
239372       if (devinfo->is_g4x) {
239392 URB_FENCE_CLIPFence_bits(const struct gen_device_info *devinfo)
239394    switch (devinfo->gen) {
239400       if (devinfo->is_haswell) {
239408       if (devinfo->is_g4x) {
239425 URB_FENCE_CLIPFence_start(const struct gen_device_info *devinfo)
239427    switch (devinfo->gen) {
239433       if (devinfo->is_haswell) {
239441       if (devinfo->is_g4x) {
239461 URB_FENCE_CLIPUnitURBReallocationRequest_bits(const struct gen_device_info *devinfo)
239463    switch (devinfo->gen) {
239469       if (devinfo->is_haswell) {
239477       if (devinfo->is_g4x) {
239494 URB_FENCE_CLIPUnitURBReallocationRequest_start(const struct gen_device_info *devinfo)
239496    switch (devinfo->gen) {
239502       if (devinfo->is_haswell) {
239510       if (devinfo->is_g4x) {
239530 URB_FENCE_CSFence_bits(const struct gen_device_info *devinfo)
239532    switch (devinfo->gen) {
239538       if (devinfo->is_haswell) {
239546       if (devinfo->is_g4x) {
239563 URB_FENCE_CSFence_start(const struct gen_device_info *devinfo)
239565    switch (devinfo->gen) {
239571       if (devinfo->is_haswell) {
239579       if (devinfo->is_g4x) {
239599 URB_FENCE_CSUnitURBReallocationRequest_bits(const struct gen_device_info *devinfo)
239601    switch (devinfo->gen) {
239607       if (devinfo->is_haswell) {
239615       if (devinfo->is_g4x) {
239632 URB_FENCE_CSUnitURBReallocationRequest_start(const struct gen_device_info *devinfo)
239634    switch (devinfo->gen) {
239640       if (devinfo->is_haswell) {
239648       if (devinfo->is_g4x) {
239668 URB_FENCE_CommandSubType_bits(const struct gen_device_info *devinfo)
239670    switch (devinfo->gen) {
239676       if (devinfo->is_haswell) {
239684       if (devinfo->is_g4x) {
239701 URB_FENCE_CommandSubType_start(const struct gen_device_info *devinfo)
239703    switch (devinfo->gen) {
239709       if (devinfo->is_haswell) {
239717       if (devinfo->is_g4x) {
239737 URB_FENCE_CommandType_bits(const struct gen_device_info *devinfo)
239739    switch (devinfo->gen) {
239745       if (devinfo->is_haswell) {
239753       if (devinfo->is_g4x) {
239770 URB_FENCE_CommandType_start(const struct gen_device_info *devinfo)
239772    switch (devinfo->gen) {
239778       if (devinfo->is_haswell) {
239786       if (devinfo->is_g4x) {
239806 URB_FENCE_DWordLength_bits(const struct gen_device_info *devinfo)
239808    switch (devinfo->gen) {
239814       if (devinfo->is_haswell) {
239822       if (devinfo->is_g4x) {
239839 URB_FENCE_DWordLength_start(const struct gen_device_info *devinfo)
239841    switch (devinfo->gen) {
239847       if (devinfo->is_haswell) {
239855       if (devinfo->is_g4x) {
239875 URB_FENCE_GSFence_bits(const struct gen_device_info *devinfo)
239877    switch (devinfo->gen) {
239883       if (devinfo->is_haswell) {
239891       if (devinfo->is_g4x) {
239908 URB_FENCE_GSFence_start(const struct gen_device_info *devinfo)
239910    switch (devinfo->gen) {
239916       if (devinfo->is_haswell) {
239924       if (devinfo->is_g4x) {
239944 URB_FENCE_GSUnitURBReallocationRequest_bits(const struct gen_device_info *devinfo)
239946    switch (devinfo->gen) {
239952       if (devinfo->is_haswell) {
239960       if (devinfo->is_g4x) {
239977 URB_FENCE_GSUnitURBReallocationRequest_start(const struct gen_device_info *devinfo)
239979    switch (devinfo->gen) {
239985       if (devinfo->is_haswell) {
239993       if (devinfo->is_g4x) {
240013 URB_FENCE_SFFence_bits(const struct gen_device_info *devinfo)
240015    switch (devinfo->gen) {
240021       if (devinfo->is_haswell) {
240029       if (devinfo->is_g4x) {
240046 URB_FENCE_SFFence_start(const struct gen_device_info *devinfo)
240048    switch (devinfo->gen) {
240054       if (devinfo->is_haswell) {
240062       if (devinfo->is_g4x) {
240082 URB_FENCE_SFUnitURBReallocationRequest_bits(const struct gen_device_info *devinfo)
240084    switch (devinfo->gen) {
240090       if (devinfo->is_haswell) {
240098       if (devinfo->is_g4x) {
240115 URB_FENCE_SFUnitURBReallocationRequest_start(const struct gen_device_info *devinfo)
240117    switch (devinfo->gen) {
240123       if (devinfo->is_haswell) {
240131       if (devinfo->is_g4x) {
240151 URB_FENCE_VFEFence_bits(const struct gen_device_info *devinfo)
240153    switch (devinfo->gen) {
240159       if (devinfo->is_haswell) {
240167       if (devinfo->is_g4x) {
240184 URB_FENCE_VFEFence_start(const struct gen_device_info *devinfo)
240186    switch (devinfo->gen) {
240192       if (devinfo->is_haswell) {
240200       if (devinfo->is_g4x) {
240220 URB_FENCE_VFEUnitURBReallocationRequest_bits(const struct gen_device_info *devinfo)
240222    switch (devinfo->gen) {
240228       if (devinfo->is_haswell) {
240236       if (devinfo->is_g4x) {
240253 URB_FENCE_VFEUnitURBReallocationRequest_start(const struct gen_device_info *devinfo)
240255    switch (devinfo->gen) {
240261       if (devinfo->is_haswell) {
240269       if (devinfo->is_g4x) {
240289 URB_FENCE_VSFence_bits(const struct gen_device_info *devinfo)
240291    switch (devinfo->gen) {
240297       if (devinfo->is_haswell) {
240305       if (devinfo->is_g4x) {
240322 URB_FENCE_VSFence_start(const struct gen_device_info *devinfo)
240324    switch (devinfo->gen) {
240330       if (devinfo->is_haswell) {
240338       if (devinfo->is_g4x) {
240358 URB_FENCE_VSUnitURBReallocationRequest_bits(const struct gen_device_info *devinfo)
240360    switch (devinfo->gen) {
240366       if (devinfo->is_haswell) {
240374       if (devinfo->is_g4x) {
240391 URB_FENCE_VSUnitURBReallocationRequest_start(const struct gen_device_info *devinfo)
240393    switch (devinfo->gen) {
240399       if (devinfo->is_haswell) {
240407       if (devinfo->is_g4x) {
240426 VCS2_RING_BUFFER_CTL_length(const struct gen_device_info *devinfo)
240428    switch (devinfo->gen) {
240434       if (devinfo->is_haswell) {
240442       if (devinfo->is_g4x) {
240461 VCS2_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits(const struct gen_device_info *devinfo)
240463    switch (devinfo->gen) {
240469       if (devinfo->is_haswell) {
240477       if (devinfo->is_g4x) {
240493 VCS2_RING_BUFFER_CTL_AutomaticReportHeadPointer_start(const struct gen_device_info *devinfo)
240495    switch (devinfo->gen) {
240501       if (devinfo->is_haswell) {
240509       if (devinfo->is_g4x) {
240528 VCS2_RING_BUFFER_CTL_BufferLengthinpages1_bits(const struct gen_device_info *devinfo)
240530    switch (devinfo->gen) {
240536       if (devinfo->is_haswell) {
240544       if (devinfo->is_g4x) {
240560 VCS2_RING_BUFFER_CTL_BufferLengthinpages1_start(const struct gen_device_info *devinfo)
240562    switch (devinfo->gen) {
240568       if (devinfo->is_haswell) {
240576       if (devinfo->is_g4x) {
240595 VCS2_RING_BUFFER_CTL_DisableRegisterAccesses_bits(const struct gen_device_info *devinfo)
240597    switch (devinfo->gen) {
240603       if (devinfo->is_haswell) {
240611       if (devinfo->is_g4x) {
240627 VCS2_RING_BUFFER_CTL_DisableRegisterAccesses_start(const struct gen_device_info *devinfo)
240629    switch (devinfo->gen) {
240635       if (devinfo->is_haswell) {
240643       if (devinfo->is_g4x) {
240662 VCS2_RING_BUFFER_CTL_RBWait_bits(const struct gen_device_info *devinfo)
240664    switch (devinfo->gen) {
240670       if (devinfo->is_haswell) {
240678       if (devinfo->is_g4x) {
240694 VCS2_RING_BUFFER_CTL_RBWait_start(const struct gen_device_info *devinfo)
240696    switch (devinfo->gen) {
240702       if (devinfo->is_haswell) {
240710       if (devinfo->is_g4x) {
240729 VCS2_RING_BUFFER_CTL_RingBufferEnable_bits(const struct gen_device_info *devinfo)
240731    switch (devinfo->gen) {
240737       if (devinfo->is_haswell) {
240745       if (devinfo->is_g4x) {
240761 VCS2_RING_BUFFER_CTL_RingBufferEnable_start(const struct gen_device_info *devinfo)
240763    switch (devinfo->gen) {
240769       if (devinfo->is_haswell) {
240777       if (devinfo->is_g4x) {
240796 VCS2_RING_BUFFER_CTL_SemaphoreWait_bits(const struct gen_device_info *devinfo)
240798    switch (devinfo->gen) {
240804       if (devinfo->is_haswell) {
240812       if (devinfo->is_g4x) {
240828 VCS2_RING_BUFFER_CTL_SemaphoreWait_start(const struct gen_device_info *devinfo)
240830    switch (devinfo->gen) {
240836       if (devinfo->is_haswell) {
240844       if (devinfo->is_g4x) {
240863 VCS_ACTHD_UDW_length(const struct gen_device_info *devinfo)
240865    switch (devinfo->gen) {
240871       if (devinfo->is_haswell) {
240879       if (devinfo->is_g4x) {
240898 VCS_ACTHD_UDW_HeadPointerUpperDWORD_bits(const struct gen_device_info *devinfo)
240900    switch (devinfo->gen) {
240906       if (devinfo->is_haswell) {
240914       if (devinfo->is_g4x) {
240930 VCS_ACTHD_UDW_HeadPointerUpperDWORD_start(const struct gen_device_info *devinfo)
240932    switch (devinfo->gen) {
240938       if (devinfo->is_haswell) {
240946       if (devinfo->is_g4x) {
240966 VCS_FAULT_REG_length(const struct gen_device_info *devinfo)
240968    switch (devinfo->gen) {
240974       if (devinfo->is_haswell) {
240982       if (devinfo->is_g4x) {
241002 VCS_FAULT_REG_FaultType_bits(const struct gen_device_info *devinfo)
241004    switch (devinfo->gen) {
241010       if (devinfo->is_haswell) {
241018       if (devinfo->is_g4x) {
241035 VCS_FAULT_REG_FaultType_start(const struct gen_device_info *devinfo)
241037    switch (devinfo->gen) {
241043       if (devinfo->is_haswell) {
241051       if (devinfo->is_g4x) {
241071 VCS_FAULT_REG_GTTSEL_bits(const struct gen_device_info *devinfo)
241073    switch (devinfo->gen) {
241079       if (devinfo->is_haswell) {
241087       if (devinfo->is_g4x) {
241104 VCS_FAULT_REG_GTTSEL_start(const struct gen_device_info *devinfo)
241106    switch (devinfo->gen) {
241112       if (devinfo->is_haswell) {
241120       if (devinfo->is_g4x) {
241140 VCS_FAULT_REG_SRCIDofFault_bits(const struct gen_device_info *devinfo)
241142    switch (devinfo->gen) {
241148       if (devinfo->is_haswell) {
241156       if (devinfo->is_g4x) {
241173 VCS_FAULT_REG_SRCIDofFault_start(const struct gen_device_info *devinfo)
241175    switch (devinfo->gen) {
241181       if (devinfo->is_haswell) {
241189       if (devinfo->is_g4x) {
241209 VCS_FAULT_REG_ValidBit_bits(const struct gen_device_info *devinfo)
241211    switch (devinfo->gen) {
241217       if (devinfo->is_haswell) {
241225       if (devinfo->is_g4x) {
241242 VCS_FAULT_REG_ValidBit_start(const struct gen_device_info *devinfo)
241244    switch (devinfo->gen) {
241250       if (devinfo->is_haswell) {
241258       if (devinfo->is_g4x) {
241278 VCS_FAULT_REG_VirtualAddressofFault_bits(const struct gen_device_info *devinfo)
241280    switch (devinfo->gen) {
241286       if (devinfo->is_haswell) {
241294       if (devinfo->is_g4x) {
241311 VCS_FAULT_REG_VirtualAddressofFault_start(const struct gen_device_info *devinfo)
241313    switch (devinfo->gen) {
241319       if (devinfo->is_haswell) {
241327       if (devinfo->is_g4x) {
241351 VCS_INSTDONE_length(const struct gen_device_info *devinfo)
241353    switch (devinfo->gen) {
241359       if (devinfo->is_haswell) {
241367       if (devinfo->is_g4x) {
241391 VCS_INSTDONE_BSPDone_bits(const struct gen_device_info *devinfo)
241393    switch (devinfo->gen) {
241399       if (devinfo->is_haswell) {
241407       if (devinfo->is_g4x) {
241428 VCS_INSTDONE_BSPDone_start(const struct gen_device_info *devinfo)
241430    switch (devinfo->gen) {
241436       if (devinfo->is_haswell) {
241444       if (devinfo->is_g4x) {
241468 VCS_INSTDONE_GACDone_bits(const struct gen_device_info *devinfo)
241470    switch (devinfo->gen) {
241476       if (devinfo->is_haswell) {
241484       if (devinfo->is_g4x) {
241505 VCS_INSTDONE_GACDone_start(const struct gen_device_info *devinfo)
241507    switch (devinfo->gen) {
241513       if (devinfo->is_haswell) {
241521       if (devinfo->is_g4x) {
241545 VCS_INSTDONE_JPGDone_bits(const struct gen_device_info *devinfo)
241547    switch (devinfo->gen) {
241553       if (devinfo->is_haswell) {
241561       if (devinfo->is_g4x) {
241582 VCS_INSTDONE_JPGDone_start(const struct gen_device_info *devinfo)
241584    switch (devinfo->gen) {
241590       if (devinfo->is_haswell) {
241598       if (devinfo->is_g4x) {
241622 VCS_INSTDONE_MPCDone_bits(const struct gen_device_info *devinfo)
241624    switch (devinfo->gen) {
241630       if (devinfo->is_haswell) {
241638       if (devinfo->is_g4x) {
241659 VCS_INSTDONE_MPCDone_start(const struct gen_device_info *devinfo)
241661    switch (devinfo->gen) {
241667       if (devinfo->is_haswell) {
241675       if (devinfo->is_g4x) {
241699 VCS_INSTDONE_QRCDone_bits(const struct gen_device_info *devinfo)
241701    switch (devinfo->gen) {
241707       if (devinfo->is_haswell) {
241715       if (devinfo->is_g4x) {
241736 VCS_INSTDONE_QRCDone_start(const struct gen_device_info *devinfo)
241738    switch (devinfo->gen) {
241744       if (devinfo->is_haswell) {
241752       if (devinfo->is_g4x) {
241774 VCS_INSTDONE_Reserved_bits(const struct gen_device_info *devinfo)
241776    switch (devinfo->gen) {
241782       if (devinfo->is_haswell) {
241790       if (devinfo->is_g4x) {
241809 VCS_INSTDONE_Reserved_start(const struct gen_device_info *devinfo)
241811    switch (devinfo->gen) {
241817       if (devinfo->is_haswell) {
241825       if (devinfo->is_g4x) {
241849 VCS_INSTDONE_RingEnable_bits(const struct gen_device_info *devinfo)
241851    switch (devinfo->gen) {
241857       if (devinfo->is_haswell) {
241865       if (devinfo->is_g4x) {
241886 VCS_INSTDONE_RingEnable_start(const struct gen_device_info *devinfo)
241888    switch (devinfo->gen) {
241894       if (devinfo->is_haswell) {
241902       if (devinfo->is_g4x) {
241926 VCS_INSTDONE_SECDone_bits(const struct gen_device_info *devinfo)
241928    switch (devinfo->gen) {
241934       if (devinfo->is_haswell) {
241942       if (devinfo->is_g4x) {
241963 VCS_INSTDONE_SECDone_start(const struct gen_device_info *devinfo)
241965    switch (devinfo->gen) {
241971       if (devinfo->is_haswell) {
241979       if (devinfo->is_g4x) {
242003 VCS_INSTDONE_USBDone_bits(const struct gen_device_info *devinfo)
242005    switch (devinfo->gen) {
242011       if (devinfo->is_haswell) {
242019       if (devinfo->is_g4x) {
242040 VCS_INSTDONE_USBDone_start(const struct gen_device_info *devinfo)
242042    switch (devinfo->gen) {
242048       if (devinfo->is_haswell) {
242056       if (devinfo->is_g4x) {
242080 VCS_INSTDONE_VACDone_bits(const struct gen_device_info *devinfo)
242082    switch (devinfo->gen) {
242088       if (devinfo->is_haswell) {
242096       if (devinfo->is_g4x) {
242117 VCS_INSTDONE_VACDone_start(const struct gen_device_info *devinfo)
242119    switch (devinfo->gen) {
242125       if (devinfo->is_haswell) {
242133       if (devinfo->is_g4x) {
242157 VCS_INSTDONE_VADDone_bits(const struct gen_device_info *devinfo)
242159    switch (devinfo->gen) {
242165       if (devinfo->is_haswell) {
242173       if (devinfo->is_g4x) {
242194 VCS_INSTDONE_VADDone_start(const struct gen_device_info *devinfo)
242196    switch (devinfo->gen) {
242202       if (devinfo->is_haswell) {
242210       if (devinfo->is_g4x) {
242234 VCS_INSTDONE_VAMDone_bits(const struct gen_device_info *devinfo)
242236    switch (devinfo->gen) {
242242       if (devinfo->is_haswell) {
242250       if (devinfo->is_g4x) {
242271 VCS_INSTDONE_VAMDone_start(const struct gen_device_info *devinfo)
242273    switch (devinfo->gen) {
242279       if (devinfo->is_haswell) {
242287       if (devinfo->is_g4x) {
242311 VCS_INSTDONE_VBPDone_bits(const struct gen_device_info *devinfo)
242313    switch (devinfo->gen) {
242319       if (devinfo->is_haswell) {
242327       if (devinfo->is_g4x) {
242348 VCS_INSTDONE_VBPDone_start(const struct gen_device_info *devinfo)
242350    switch (devinfo->gen) {
242356       if (devinfo->is_haswell) {
242364       if (devinfo->is_g4x) {
242388 VCS_INSTDONE_VCDDone_bits(const struct gen_device_info *devinfo)
242390    switch (devinfo->gen) {
242396       if (devinfo->is_haswell) {
242404       if (devinfo->is_g4x) {
242425 VCS_INSTDONE_VCDDone_start(const struct gen_device_info *devinfo)
242427    switch (devinfo->gen) {
242433       if (devinfo->is_haswell) {
242441       if (devinfo->is_g4x) {
242465 VCS_INSTDONE_VCIDone_bits(const struct gen_device_info *devinfo)
242467    switch (devinfo->gen) {
242473       if (devinfo->is_haswell) {
242481       if (devinfo->is_g4x) {
242502 VCS_INSTDONE_VCIDone_start(const struct gen_device_info *devinfo)
242504    switch (devinfo->gen) {
242510       if (devinfo->is_haswell) {
242518       if (devinfo->is_g4x) {
242542 VCS_INSTDONE_VCPDone_bits(const struct gen_device_info *devinfo)
242544    switch (devinfo->gen) {
242550       if (devinfo->is_haswell) {
242558       if (devinfo->is_g4x) {
242579 VCS_INSTDONE_VCPDone_start(const struct gen_device_info *devinfo)
242581    switch (devinfo->gen) {
242587       if (devinfo->is_haswell) {
242595       if (devinfo->is_g4x) {
242618 VCS_INSTDONE_VCRDone_bits(const struct gen_device_info *devinfo)
242620    switch (devinfo->gen) {
242626       if (devinfo->is_haswell) {
242634       if (devinfo->is_g4x) {
242654 VCS_INSTDONE_VCRDone_start(const struct gen_device_info *devinfo)
242656    switch (devinfo->gen) {
242662       if (devinfo->is_haswell) {
242670       if (devinfo->is_g4x) {
242694 VCS_INSTDONE_VCSDone_bits(const struct gen_device_info *devinfo)
242696    switch (devinfo->gen) {
242702       if (devinfo->is_haswell) {
242710       if (devinfo->is_g4x) {
242731 VCS_INSTDONE_VCSDone_start(const struct gen_device_info *devinfo)
242733    switch (devinfo->gen) {
242739       if (devinfo->is_haswell) {
242747       if (devinfo->is_g4x) {
242771 VCS_INSTDONE_VDSDone_bits(const struct gen_device_info *devinfo)
242773    switch (devinfo->gen) {
242779       if (devinfo->is_haswell) {
242787       if (devinfo->is_g4x) {
242808 VCS_INSTDONE_VDSDone_start(const struct gen_device_info *devinfo)
242810    switch (devinfo->gen) {
242816       if (devinfo->is_haswell) {
242824       if (devinfo->is_g4x) {
242848 VCS_INSTDONE_VFTDone_bits(const struct gen_device_info *devinfo)
242850    switch (devinfo->gen) {
242856       if (devinfo->is_haswell) {
242864       if (devinfo->is_g4x) {
242885 VCS_INSTDONE_VFTDone_start(const struct gen_device_info *devinfo)
242887    switch (devinfo->gen) {
242893       if (devinfo->is_haswell) {
242901       if (devinfo->is_g4x) {
242925 VCS_INSTDONE_VHRDone_bits(const struct gen_device_info *devinfo)
242927    switch (devinfo->gen) {
242933       if (devinfo->is_haswell) {
242941       if (devinfo->is_g4x) {
242962 VCS_INSTDONE_VHRDone_start(const struct gen_device_info *devinfo)
242964    switch (devinfo->gen) {
242970       if (devinfo->is_haswell) {
242978       if (devinfo->is_g4x) {
243002 VCS_INSTDONE_VINDone_bits(const struct gen_device_info *devinfo)
243004    switch (devinfo->gen) {
243010       if (devinfo->is_haswell) {
243018       if (devinfo->is_g4x) {
243039 VCS_INSTDONE_VINDone_start(const struct gen_device_info *devinfo)
243041    switch (devinfo->gen) {
243047       if (devinfo->is_haswell) {
243055       if (devinfo->is_g4x) {
243079 VCS_INSTDONE_VIPDone_bits(const struct gen_device_info *devinfo)
243081    switch (devinfo->gen) {
243087       if (devinfo->is_haswell) {
243095       if (devinfo->is_g4x) {
243116 VCS_INSTDONE_VIPDone_start(const struct gen_device_info *devinfo)
243118    switch (devinfo->gen) {
243124       if (devinfo->is_haswell) {
243132       if (devinfo->is_g4x) {
243156 VCS_INSTDONE_VISDone_bits(const struct gen_device_info *devinfo)
243158    switch (devinfo->gen) {
243164       if (devinfo->is_haswell) {
243172       if (devinfo->is_g4x) {
243193 VCS_INSTDONE_VISDone_start(const struct gen_device_info *devinfo)
243195    switch (devinfo->gen) {
243201       if (devinfo->is_haswell) {
243209       if (devinfo->is_g4x) {
243233 VCS_INSTDONE_VITDone_bits(const struct gen_device_info *devinfo)
243235    switch (devinfo->gen) {
243241       if (devinfo->is_haswell) {
243249       if (devinfo->is_g4x) {
243270 VCS_INSTDONE_VITDone_start(const struct gen_device_info *devinfo)
243272    switch (devinfo->gen) {
243278       if (devinfo->is_haswell) {
243286       if (devinfo->is_g4x) {
243310 VCS_INSTDONE_VLFDone_bits(const struct gen_device_info *devinfo)
243312    switch (devinfo->gen) {
243318       if (devinfo->is_haswell) {
243326       if (devinfo->is_g4x) {
243347 VCS_INSTDONE_VLFDone_start(const struct gen_device_info *devinfo)
243349    switch (devinfo->gen) {
243355       if (devinfo->is_haswell) {
243363       if (devinfo->is_g4x) {
243387 VCS_INSTDONE_VMCDone_bits(const struct gen_device_info *devinfo)
243389    switch (devinfo->gen) {
243395       if (devinfo->is_haswell) {
243403       if (devinfo->is_g4x) {
243424 VCS_INSTDONE_VMCDone_start(const struct gen_device_info *devinfo)
243426    switch (devinfo->gen) {
243432       if (devinfo->is_haswell) {
243440       if (devinfo->is_g4x) {
243464 VCS_INSTDONE_VMDDone_bits(const struct gen_device_info *devinfo)
243466    switch (devinfo->gen) {
243472       if (devinfo->is_haswell) {
243480       if (devinfo->is_g4x) {
243501 VCS_INSTDONE_VMDDone_start(const struct gen_device_info *devinfo)
243503    switch (devinfo->gen) {
243509       if (devinfo->is_haswell) {
243517       if (devinfo->is_g4x) {
243541 VCS_INSTDONE_VMXDone_bits(const struct gen_device_info *devinfo)
243543    switch (devinfo->gen) {
243549       if (devinfo->is_haswell) {
243557       if (devinfo->is_g4x) {
243578 VCS_INSTDONE_VMXDone_start(const struct gen_device_info *devinfo)
243580    switch (devinfo->gen) {
243586       if (devinfo->is_haswell) {
243594       if (devinfo->is_g4x) {
243618 VCS_INSTDONE_VOPDone_bits(const struct gen_device_info *devinfo)
243620    switch (devinfo->gen) {
243626       if (devinfo->is_haswell) {
243634       if (devinfo->is_g4x) {
243655 VCS_INSTDONE_VOPDone_start(const struct gen_device_info *devinfo)
243657    switch (devinfo->gen) {
243663       if (devinfo->is_haswell) {
243671       if (devinfo->is_g4x) {
243695 VCS_INSTDONE_VPRDone_bits(const struct gen_device_info *devinfo)
243697    switch (devinfo->gen) {
243703       if (devinfo->is_haswell) {
243711       if (devinfo->is_g4x) {
243732 VCS_INSTDONE_VPRDone_start(const struct gen_device_info *devinfo)
243734    switch (devinfo->gen) {
243740       if (devinfo->is_haswell) {
243748       if (devinfo->is_g4x) {
243772 VCS_INSTDONE_VTQDone_bits(const struct gen_device_info *devinfo)
243774    switch (devinfo->gen) {
243780       if (devinfo->is_haswell) {
243788       if (devinfo->is_g4x) {
243809 VCS_INSTDONE_VTQDone_start(const struct gen_device_info *devinfo)
243811    switch (devinfo->gen) {
243817       if (devinfo->is_haswell) {
243825       if (devinfo->is_g4x) {
243847 VCS_RING_BUFFER_CTL_length(const struct gen_device_info *devinfo)
243849    switch (devinfo->gen) {
243855       if (devinfo->is_haswell) {
243863       if (devinfo->is_g4x) {
243885 VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits(const struct gen_device_info *devinfo)
243887    switch (devinfo->gen) {
243893       if (devinfo->is_haswell) {
243901       if (devinfo->is_g4x) {
243920 VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start(const struct gen_device_info *devinfo)
243922    switch (devinfo->gen) {
243928       if (devinfo->is_haswell) {
243936       if (devinfo->is_g4x) {
243958 VCS_RING_BUFFER_CTL_BufferLengthinpages1_bits(const struct gen_device_info *devinfo)
243960    switch (devinfo->gen) {
243966       if (devinfo->is_haswell) {
243974       if (devinfo->is_g4x) {
243993 VCS_RING_BUFFER_CTL_BufferLengthinpages1_start(const struct gen_device_info *devinfo)
243995    switch (devinfo->gen) {
244001       if (devinfo->is_haswell) {
244009       if (devinfo->is_g4x) {
244031 VCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits(const struct gen_device_info *devinfo)
244033    switch (devinfo->gen) {
244039       if (devinfo->is_haswell) {
244047       if (devinfo->is_g4x) {
244066 VCS_RING_BUFFER_CTL_DisableRegisterAccesses_start(const struct gen_device_info *devinfo)
244068    switch (devinfo->gen) {
244074       if (devinfo->is_haswell) {
244082       if (devinfo->is_g4x) {
244104 VCS_RING_BUFFER_CTL_RBWait_bits(const struct gen_device_info *devinfo)
244106    switch (devinfo->gen) {
244112       if (devinfo->is_haswell) {
244120       if (devinfo->is_g4x) {
244139 VCS_RING_BUFFER_CTL_RBWait_start(const struct gen_device_info *devinfo)
244141    switch (devinfo->gen) {
244147       if (devinfo->is_haswell) {
244155       if (devinfo->is_g4x) {
244177 VCS_RING_BUFFER_CTL_RingBufferEnable_bits(const struct gen_device_info *devinfo)
244179    switch (devinfo->gen) {
244185       if (devinfo->is_haswell) {
244193       if (devinfo->is_g4x) {
244212 VCS_RING_BUFFER_CTL_RingBufferEnable_start(const struct gen_device_info *devinfo)
244214    switch (devinfo->gen) {
244220       if (devinfo->is_haswell) {
244228       if (devinfo->is_g4x) {
244250 VCS_RING_BUFFER_CTL_SemaphoreWait_bits(const struct gen_device_info *devinfo)
244252    switch (devinfo->gen) {
244258       if (devinfo->is_haswell) {
244266       if (devinfo->is_g4x) {
244285 VCS_RING_BUFFER_CTL_SemaphoreWait_start(const struct gen_device_info *devinfo)
244287    switch (devinfo->gen) {
244293       if (devinfo->is_haswell) {
244301       if (devinfo->is_g4x) {
244321 VDENC_PICTURE_length(const struct gen_device_info *devinfo)
244323    switch (devinfo->gen) {
244329       if (devinfo->is_haswell) {
244337       if (devinfo->is_g4x) {
244357 VDENC_PICTURE_Address_bits(const struct gen_device_info *devinfo)
244359    switch (devinfo->gen) {
244365       if (devinfo->is_haswell) {
244373       if (devinfo->is_g4x) {
244390 VDENC_PICTURE_Address_start(const struct gen_device_info *devinfo)
244392    switch (devinfo->gen) {
244398       if (devinfo->is_haswell) {
244406       if (devinfo->is_g4x) {
244426 VDENC_PICTURE_PictureFields_bits(const struct gen_device_info *devinfo)
244428    switch (devinfo->gen) {
244434       if (devinfo->is_haswell) {
244442       if (devinfo->is_g4x) {
244459 VDENC_PICTURE_PictureFields_start(const struct gen_device_info *devinfo)
244461    switch (devinfo->gen) {
244467       if (devinfo->is_haswell) {
244475       if (devinfo->is_g4x) {
244495 VDENC_SURFACE_CONTROL_BITS_length(const struct gen_device_info *devinfo)
244497    switch (devinfo->gen) {
244503       if (devinfo->is_haswell) {
244511       if (devinfo->is_g4x) {
244531 VDENC_SURFACE_CONTROL_BITS_ArbitrationPriorityControl_bits(const struct gen_device_info *devinfo)
244533    switch (devinfo->gen) {
244539       if (devinfo->is_haswell) {
244547       if (devinfo->is_g4x) {
244564 VDENC_SURFACE_CONTROL_BITS_ArbitrationPriorityControl_start(const struct gen_device_info *devinfo)
244566    switch (devinfo->gen) {
244572       if (devinfo->is_haswell) {
244580       if (devinfo->is_g4x) {
244600 VDENC_SURFACE_CONTROL_BITS_CacheSelect_bits(const struct gen_device_info *devinfo)
244602    switch (devinfo->gen) {
244608       if (devinfo->is_haswell) {
244616       if (devinfo->is_g4x) {
244633 VDENC_SURFACE_CONTROL_BITS_CacheSelect_start(const struct gen_device_info *devinfo)
244635    switch (devinfo->gen) {
244641       if (devinfo->is_haswell) {
244649       if (devinfo->is_g4x) {
244669 VDENC_SURFACE_CONTROL_BITS_MOCS_bits(const struct gen_device_info *devinfo)
244671    switch (devinfo->gen) {
244677       if (devinfo->is_haswell) {
244685       if (devinfo->is_g4x) {
244702 VDENC_SURFACE_CONTROL_BITS_MOCS_start(const struct gen_device_info *devinfo)
244704    switch (devinfo->gen) {
244710       if (devinfo->is_haswell) {
244718       if (devinfo->is_g4x) {
244738 VDENC_SURFACE_CONTROL_BITS_MemoryCompressionEnable_bits(const struct gen_device_info *devinfo)
244740    switch (devinfo->gen) {
244746       if (devinfo->is_haswell) {
244754       if (devinfo->is_g4x) {
244771 VDENC_SURFACE_CONTROL_BITS_MemoryCompressionEnable_start(const struct gen_device_info *devinfo)
244773    switch (devinfo->gen) {
244779       if (devinfo->is_haswell) {
244787       if (devinfo->is_g4x) {
244807 VDENC_SURFACE_CONTROL_BITS_MemoryCompressionMode_bits(const struct gen_device_info *devinfo)
244809    switch (devinfo->gen) {
244815       if (devinfo->is_haswell) {
244823       if (devinfo->is_g4x) {
244840 VDENC_SURFACE_CONTROL_BITS_MemoryCompressionMode_start(const struct gen_device_info *devinfo)
244842    switch (devinfo->gen) {
244848       if (devinfo->is_haswell) {
244856       if (devinfo->is_g4x) {
244876 VDENC_SURFACE_CONTROL_BITS_TiledResourceMode_bits(const struct gen_device_info *devinfo)
244878    switch (devinfo->gen) {
244884       if (devinfo->is_haswell) {
244892       if (devinfo->is_g4x) {
244909 VDENC_SURFACE_CONTROL_BITS_TiledResourceMode_start(const struct gen_device_info *devinfo)
244911    switch (devinfo->gen) {
244917       if (devinfo->is_haswell) {
244925       if (devinfo->is_g4x) {
244945 VDENC_SURFACE_STATE_FIELDS_length(const struct gen_device_info *devinfo)
244947    switch (devinfo->gen) {
244953       if (devinfo->is_haswell) {
244961       if (devinfo->is_g4x) {
244980 VDENC_SURFACE_STATE_FIELDS_ChromaDownsampleFilterControl_bits(const struct gen_device_info *devinfo)
244982    switch (devinfo->gen) {
244988       if (devinfo->is_haswell) {
244996       if (devinfo->is_g4x) {
245012 VDENC_SURFACE_STATE_FIELDS_ChromaDownsampleFilterControl_start(const struct gen_device_info *devinfo)
245014    switch (devinfo->gen) {
245020       if (devinfo->is_haswell) {
245028       if (devinfo->is_g4x) {
245046 VDENC_SURFACE_STATE_FIELDS_ColorSpaceSelection_bits(const struct gen_device_info *devinfo)
245048    switch (devinfo->gen) {
245054       if (devinfo->is_haswell) {
245062       if (devinfo->is_g4x) {
245077 VDENC_SURFACE_STATE_FIELDS_ColorSpaceSelection_start(const struct gen_device_info *devinfo)
245079    switch (devinfo->gen) {
245085       if (devinfo->is_haswell) {
245093       if (devinfo->is_g4x) {
245112 VDENC_SURFACE_STATE_FIELDS_Colorspaceselection_bits(const struct gen_device_info *devinfo)
245114    switch (devinfo->gen) {
245120       if (devinfo->is_haswell) {
245128       if (devinfo->is_g4x) {
245144 VDENC_SURFACE_STATE_FIELDS_Colorspaceselection_start(const struct gen_device_info *devinfo)
245146    switch (devinfo->gen) {
245152       if (devinfo->is_haswell) {
245160       if (devinfo->is_g4x) {
245180 VDENC_SURFACE_STATE_FIELDS_CrVCbUPixelOffsetVDirection_bits(const struct gen_device_info *devinfo)
245182    switch (devinfo->gen) {
245188       if (devinfo->is_haswell) {
245196       if (devinfo->is_g4x) {
245213 VDENC_SURFACE_STATE_FIELDS_CrVCbUPixelOffsetVDirection_start(const struct gen_device_info *devinfo)
245215    switch (devinfo->gen) {
245221       if (devinfo->is_haswell) {
245229       if (devinfo->is_g4x) {
245249 VDENC_SURFACE_STATE_FIELDS_Format_bits(const struct gen_device_info *devinfo)
245251    switch (devinfo->gen) {
245257       if (devinfo->is_haswell) {
245265       if (devinfo->is_g4x) {
245282 VDENC_SURFACE_STATE_FIELDS_Format_start(const struct gen_device_info *devinfo)
245284    switch (devinfo->gen) {
245290       if (devinfo->is_haswell) {
245298       if (devinfo->is_g4x) {
245318 VDENC_SURFACE_STATE_FIELDS_HalfPitchforChroma_bits(const struct gen_device_info *devinfo)
245320    switch (devinfo->gen) {
245326       if (devinfo->is_haswell) {
245334       if (devinfo->is_g4x) {
245351 VDENC_SURFACE_STATE_FIELDS_HalfPitchforChroma_start(const struct gen_device_info *devinfo)
245353    switch (devinfo->gen) {
245359       if (devinfo->is_haswell) {
245367       if (devinfo->is_g4x) {
245387 VDENC_SURFACE_STATE_FIELDS_Height_bits(const struct gen_device_info *devinfo)
245389    switch (devinfo->gen) {
245395       if (devinfo->is_haswell) {
245403       if (devinfo->is_g4x) {
245420 VDENC_SURFACE_STATE_FIELDS_Height_start(const struct gen_device_info *devinfo)
245422    switch (devinfo->gen) {
245428       if (devinfo->is_haswell) {
245436       if (devinfo->is_g4x) {
245456 VDENC_SURFACE_STATE_FIELDS_SurfaceFormat_bits(const struct gen_device_info *devinfo)
245458    switch (devinfo->gen) {
245464       if (devinfo->is_haswell) {
245472       if (devinfo->is_g4x) {
245489 VDENC_SURFACE_STATE_FIELDS_SurfaceFormat_start(const struct gen_device_info *devinfo)
245491    switch (devinfo->gen) {
245497       if (devinfo->is_haswell) {
245505       if (devinfo->is_g4x) {
245525 VDENC_SURFACE_STATE_FIELDS_SurfaceFormatByteSwizzle_bits(const struct gen_device_info *devinfo)
245527    switch (devinfo->gen) {
245533       if (devinfo->is_haswell) {
245541       if (devinfo->is_g4x) {
245558 VDENC_SURFACE_STATE_FIELDS_SurfaceFormatByteSwizzle_start(const struct gen_device_info *devinfo)
245560    switch (devinfo->gen) {
245566       if (devinfo->is_haswell) {
245574       if (devinfo->is_g4x) {
245594 VDENC_SURFACE_STATE_FIELDS_SurfacePitch_bits(const struct gen_device_info *devinfo)
245596    switch (devinfo->gen) {
245602       if (devinfo->is_haswell) {
245610       if (devinfo->is_g4x) {
245627 VDENC_SURFACE_STATE_FIELDS_SurfacePitch_start(const struct gen_device_info *devinfo)
245629    switch (devinfo->gen) {
245635       if (devinfo->is_haswell) {
245643       if (devinfo->is_g4x) {
245663 VDENC_SURFACE_STATE_FIELDS_TileWalk_bits(const struct gen_device_info *devinfo)
245665    switch (devinfo->gen) {
245671       if (devinfo->is_haswell) {
245679       if (devinfo->is_g4x) {
245696 VDENC_SURFACE_STATE_FIELDS_TileWalk_start(const struct gen_device_info *devinfo)
245698    switch (devinfo->gen) {
245704       if (devinfo->is_haswell) {
245712       if (devinfo->is_g4x) {
245732 VDENC_SURFACE_STATE_FIELDS_TiledSurface_bits(const struct gen_device_info *devinfo)
245734    switch (devinfo->gen) {
245740       if (devinfo->is_haswell) {
245748       if (devinfo->is_g4x) {
245765 VDENC_SURFACE_STATE_FIELDS_TiledSurface_start(const struct gen_device_info *devinfo)
245767    switch (devinfo->gen) {
245773       if (devinfo->is_haswell) {
245781       if (devinfo->is_g4x) {
245801 VDENC_SURFACE_STATE_FIELDS_Width_bits(const struct gen_device_info *devinfo)
245803    switch (devinfo->gen) {
245809       if (devinfo->is_haswell) {
245817       if (devinfo->is_g4x) {
245834 VDENC_SURFACE_STATE_FIELDS_Width_start(const struct gen_device_info *devinfo)
245836    switch (devinfo->gen) {
245842       if (devinfo->is_haswell) {
245850       if (devinfo->is_g4x) {
245870 VDENC_SURFACE_STATE_FIELDS_XOffsetforUCb_bits(const struct gen_device_info *devinfo)
245872    switch (devinfo->gen) {
245878       if (devinfo->is_haswell) {
245886       if (devinfo->is_g4x) {
245903 VDENC_SURFACE_STATE_FIELDS_XOffsetforUCb_start(const struct gen_device_info *devinfo)
245905    switch (devinfo->gen) {
245911       if (devinfo->is_haswell) {
245919       if (devinfo->is_g4x) {
245939 VDENC_SURFACE_STATE_FIELDS_XOffsetforVCr_bits(const struct gen_device_info *devinfo)
245941    switch (devinfo->gen) {
245947       if (devinfo->is_haswell) {
245955       if (devinfo->is_g4x) {
245972 VDENC_SURFACE_STATE_FIELDS_XOffsetforVCr_start(const struct gen_device_info *devinfo)
245974    switch (devinfo->gen) {
245980       if (devinfo->is_haswell) {
245988       if (devinfo->is_g4x) {
246008 VDENC_SURFACE_STATE_FIELDS_YOffsetforUCb_bits(const struct gen_device_info *devinfo)
246010    switch (devinfo->gen) {
246016       if (devinfo->is_haswell) {
246024       if (devinfo->is_g4x) {
246041 VDENC_SURFACE_STATE_FIELDS_YOffsetforUCb_start(const struct gen_device_info *devinfo)
246043    switch (devinfo->gen) {
246049       if (devinfo->is_haswell) {
246057       if (devinfo->is_g4x) {
246077 VDENC_SURFACE_STATE_FIELDS_YOffsetforVCr_bits(const struct gen_device_info *devinfo)
246079    switch (devinfo->gen) {
246085       if (devinfo->is_haswell) {
246093       if (devinfo->is_g4x) {
246110 VDENC_SURFACE_STATE_FIELDS_YOffsetforVCr_start(const struct gen_device_info *devinfo)
246112    switch (devinfo->gen) {
246118       if (devinfo->is_haswell) {
246126       if (devinfo->is_g4x) {
246145 VECS_ACTHD_UDW_length(const struct gen_device_info *devinfo)
246147    switch (devinfo->gen) {
246153       if (devinfo->is_haswell) {
246161       if (devinfo->is_g4x) {
246180 VECS_ACTHD_UDW_HeadPointerUpperDWORD_bits(const struct gen_device_info *devinfo)
246182    switch (devinfo->gen) {
246188       if (devinfo->is_haswell) {
246196       if (devinfo->is_g4x) {
246212 VECS_ACTHD_UDW_HeadPointerUpperDWORD_start(const struct gen_device_info *devinfo)
246214    switch (devinfo->gen) {
246220       if (devinfo->is_haswell) {
246228       if (devinfo->is_g4x) {
246246 VECS_FAULT_REG_length(const struct gen_device_info *devinfo)
246248    switch (devinfo->gen) {
246254       if (devinfo->is_haswell) {
246262       if (devinfo->is_g4x) {
246280 VECS_FAULT_REG_FaultType_bits(const struct gen_device_info *devinfo)
246282    switch (devinfo->gen) {
246288       if (devinfo->is_haswell) {
246296       if (devinfo->is_g4x) {
246311 VECS_FAULT_REG_FaultType_start(const struct gen_device_info *devinfo)
246313    switch (devinfo->gen) {
246319       if (devinfo->is_haswell) {
246327       if (devinfo->is_g4x) {
246345 VECS_FAULT_REG_GTTSEL_bits(const struct gen_device_info *devinfo)
246347    switch (devinfo->gen) {
246353       if (devinfo->is_haswell) {
246361       if (devinfo->is_g4x) {
246376 VECS_FAULT_REG_GTTSEL_start(const struct gen_device_info *devinfo)
246378    switch (devinfo->gen) {
246384       if (devinfo->is_haswell) {
246392       if (devinfo->is_g4x) {
246410 VECS_FAULT_REG_SRCIDofFault_bits(const struct gen_device_info *devinfo)
246412    switch (devinfo->gen) {
246418       if (devinfo->is_haswell) {
246426       if (devinfo->is_g4x) {
246441 VECS_FAULT_REG_SRCIDofFault_start(const struct gen_device_info *devinfo)
246443    switch (devinfo->gen) {
246449       if (devinfo->is_haswell) {
246457       if (devinfo->is_g4x) {
246475 VECS_FAULT_REG_ValidBit_bits(const struct gen_device_info *devinfo)
246477    switch (devinfo->gen) {
246483       if (devinfo->is_haswell) {
246491       if (devinfo->is_g4x) {
246506 VECS_FAULT_REG_ValidBit_start(const struct gen_device_info *devinfo)
246508    switch (devinfo->gen) {
246514       if (devinfo->is_haswell) {
246522       if (devinfo->is_g4x) {
246540 VECS_FAULT_REG_VirtualAddressofFault_bits(const struct gen_device_info *devinfo)
246542    switch (devinfo->gen) {
246548       if (devinfo->is_haswell) {
246556       if (devinfo->is_g4x) {
246571 VECS_FAULT_REG_VirtualAddressofFault_start(const struct gen_device_info *devinfo)
246573    switch (devinfo->gen) {
246579       if (devinfo->is_haswell) {
246587       if (devinfo->is_g4x) {
246608 VECS_INSTDONE_length(const struct gen_device_info *devinfo)
246610    switch (devinfo->gen) {
246616       if (devinfo->is_haswell) {
246624       if (devinfo->is_g4x) {
246645 VECS_INSTDONE_GAMDone_bits(const struct gen_device_info *devinfo)
246647    switch (devinfo->gen) {
246653       if (devinfo->is_haswell) {
246661       if (devinfo->is_g4x) {
246679 VECS_INSTDONE_GAMDone_start(const struct gen_device_info *devinfo)
246681    switch (devinfo->gen) {
246687       if (devinfo->is_haswell) {
246695       if (devinfo->is_g4x) {
246716 VECS_INSTDONE_RingEnable_bits(const struct gen_device_info *devinfo)
246718    switch (devinfo->gen) {
246724       if (devinfo->is_haswell) {
246732       if (devinfo->is_g4x) {
246750 VECS_INSTDONE_RingEnable_start(const struct gen_device_info *devinfo)
246752    switch (devinfo->gen) {
246758       if (devinfo->is_haswell) {
246766       if (devinfo->is_g4x) {
246787 VECS_INSTDONE_VECSDone_bits(const struct gen_device_info *devinfo)
246789    switch (devinfo->gen) {
246795       if (devinfo->is_haswell) {
246803       if (devinfo->is_g4x) {
246821 VECS_INSTDONE_VECSDone_start(const struct gen_device_info *devinfo)
246823    switch (devinfo->gen) {
246829       if (devinfo->is_haswell) {
246837       if (devinfo->is_g4x) {
246857 VECS_RING_BUFFER_CTL_length(const struct gen_device_info *devinfo)
246859    switch (devinfo->gen) {
246865       if (devinfo->is_haswell) {
246873       if (devinfo->is_g4x) {
246893 VECS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits(const struct gen_device_info *devinfo)
246895    switch (devinfo->gen) {
246901       if (devinfo->is_haswell) {
246909       if (devinfo->is_g4x) {
246926 VECS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start(const struct gen_device_info *devinfo)
246928    switch (devinfo->gen) {
246934       if (devinfo->is_haswell) {
246942       if (devinfo->is_g4x) {
246962 VECS_RING_BUFFER_CTL_BufferLengthinpages1_bits(const struct gen_device_info *devinfo)
246964    switch (devinfo->gen) {
246970       if (devinfo->is_haswell) {
246978       if (devinfo->is_g4x) {
246995 VECS_RING_BUFFER_CTL_BufferLengthinpages1_start(const struct gen_device_info *devinfo)
246997    switch (devinfo->gen) {
247003       if (devinfo->is_haswell) {
247011       if (devinfo->is_g4x) {
247031 VECS_RING_BUFFER_CTL_DisableRegisterAccesses_bits(const struct gen_device_info *devinfo)
247033    switch (devinfo->gen) {
247039       if (devinfo->is_haswell) {
247047       if (devinfo->is_g4x) {
247064 VECS_RING_BUFFER_CTL_DisableRegisterAccesses_start(const struct gen_device_info *devinfo)
247066    switch (devinfo->gen) {
247072       if (devinfo->is_haswell) {
247080       if (devinfo->is_g4x) {
247100 VECS_RING_BUFFER_CTL_RBWait_bits(const struct gen_device_info *devinfo)
247102    switch (devinfo->gen) {
247108       if (devinfo->is_haswell) {
247116       if (devinfo->is_g4x) {
247133 VECS_RING_BUFFER_CTL_RBWait_start(const struct gen_device_info *devinfo)
247135    switch (devinfo->gen) {
247141       if (devinfo->is_haswell) {
247149       if (devinfo->is_g4x) {
247169 VECS_RING_BUFFER_CTL_RingBufferEnable_bits(const struct gen_device_info *devinfo)
247171    switch (devinfo->gen) {
247177       if (devinfo->is_haswell) {
247185       if (devinfo->is_g4x) {
247202 VECS_RING_BUFFER_CTL_RingBufferEnable_start(const struct gen_device_info *devinfo)
247204    switch (devinfo->gen) {
247210       if (devinfo->is_haswell) {
247218       if (devinfo->is_g4x) {
247238 VECS_RING_BUFFER_CTL_SemaphoreWait_bits(const struct gen_device_info *devinfo)
247240    switch (devinfo->gen) {
247246       if (devinfo->is_haswell) {
247254       if (devinfo->is_g4x) {
247271 VECS_RING_BUFFER_CTL_SemaphoreWait_start(const struct gen_device_info *devinfo)
247273    switch (devinfo->gen) {
247279       if (devinfo->is_haswell) {
247287       if (devinfo->is_g4x) {
247314 VERTEX_BUFFER_STATE_length(const struct gen_device_info *devinfo)
247316    switch (devinfo->gen) {
247322       if (devinfo->is_haswell) {
247330       if (devinfo->is_g4x) {
247353 VERTEX_BUFFER_STATE_AddressModifyEnable_bits(const struct gen_device_info *devinfo)
247355    switch (devinfo->gen) {
247361       if (devinfo->is_haswell) {
247369       if (devinfo->is_g4x) {
247389 VERTEX_BUFFER_STATE_AddressModifyEnable_start(const struct gen_device_info *devinfo)
247391    switch (devinfo->gen) {
247397       if (devinfo->is_haswell) {
247405       if (devinfo->is_g4x) {
247428 VERTEX_BUFFER_STATE_BufferAccessType_bits(const struct gen_device_info *devinfo)
247430    switch (devinfo->gen) {
247436       if (devinfo->is_haswell) {
247444       if (devinfo->is_g4x) {
247464 VERTEX_BUFFER_STATE_BufferAccessType_start(const struct gen_device_info *devinfo)
247466    switch (devinfo->gen) {
247472       if (devinfo->is_haswell) {
247480       if (devinfo->is_g4x) {
247507 VERTEX_BUFFER_STATE_BufferPitch_bits(const struct gen_device_info *devinfo)
247509    switch (devinfo->gen) {
247515       if (devinfo->is_haswell) {
247523       if (devinfo->is_g4x) {
247547 VERTEX_BUFFER_STATE_BufferPitch_start(const struct gen_device_info *devinfo)
247549    switch (devinfo->gen) {
247555       if (devinfo->is_haswell) {
247563       if (devinfo->is_g4x) {
247584 VERTEX_BUFFER_STATE_BufferSize_bits(const struct gen_device_info *devinfo)
247586    switch (devinfo->gen) {
247592       if (devinfo->is_haswell) {
247600       if (devinfo->is_g4x) {
247618 VERTEX_BUFFER_STATE_BufferSize_start(const struct gen_device_info *devinfo)
247620    switch (devinfo->gen) {
247626       if (devinfo->is_haswell) {
247634       if (devinfo->is_g4x) {
247661 VERTEX_BUFFER_STATE_BufferStartingAddress_bits(const struct gen_device_info *devinfo)
247663    switch (devinfo->gen) {
247669       if (devinfo->is_haswell) {
247677       if (devinfo->is_g4x) {
247701 VERTEX_BUFFER_STATE_BufferStartingAddress_start(const struct gen_device_info *devinfo)
247703    switch (devinfo->gen) {
247709       if (devinfo->is_haswell) {
247717       if (devinfo->is_g4x) {
247738 VERTEX_BUFFER_STATE_EndAddress_bits(const struct gen_device_info *devinfo)
247740    switch (devinfo->gen) {
247746       if (devinfo->is_haswell) {
247754       if (devinfo->is_g4x) {
247772 VERTEX_BUFFER_STATE_EndAddress_start(const struct gen_device_info *devinfo)
247774    switch (devinfo->gen) {
247780       if (devinfo->is_haswell) {
247788       if (devinfo->is_g4x) {
247811 VERTEX_BUFFER_STATE_InstanceDataStepRate_bits(const struct gen_device_info *devinfo)
247813    switch (devinfo->gen) {
247819       if (devinfo->is_haswell) {
247827       if (devinfo->is_g4x) {
247847 VERTEX_BUFFER_STATE_InstanceDataStepRate_start(const struct gen_device_info *devinfo)
247849    switch (devinfo->gen) {
247855       if (devinfo->is_haswell) {
247863       if (devinfo->is_g4x) {
247887 VERTEX_BUFFER_STATE_MOCS_bits(const struct gen_device_info *devinfo)
247889    switch (devinfo->gen) {
247895       if (devinfo->is_haswell) {
247903       if (devinfo->is_g4x) {
247924 VERTEX_BUFFER_STATE_MOCS_start(const struct gen_device_info *devinfo)
247926    switch (devinfo->gen) {
247932       if (devinfo->is_haswell) {
247940       if (devinfo->is_g4x) {
247959 VERTEX_BUFFER_STATE_MaxIndex_bits(const struct gen_device_info *devinfo)
247961    switch (devinfo->gen) {
247967       if (devinfo->is_haswell) {
247975       if (devinfo->is_g4x) {
247991 VERTEX_BUFFER_STATE_MaxIndex_start(const struct gen_device_info *devinfo)
247993    switch (devinfo->gen) {
247999       if (devinfo->is_haswell) {
248007       if (devinfo->is_g4x) {
248032 VERTEX_BUFFER_STATE_NullVertexBuffer_bits(const struct gen_device_info *devinfo)
248034    switch (devinfo->gen) {
248040       if (devinfo->is_haswell) {
248048       if (devinfo->is_g4x) {
248070 VERTEX_BUFFER_STATE_NullVertexBuffer_start(const struct gen_device_info *devinfo)
248072    switch (devinfo->gen) {
248078       if (devinfo->is_haswell) {
248086       if (devinfo->is_g4x) {
248113 VERTEX_BUFFER_STATE_VertexBufferIndex_bits(const struct gen_device_info *devinfo)
248115    switch (devinfo->gen) {
248121       if (devinfo->is_haswell) {
248129       if (devinfo->is_g4x) {
248153 VERTEX_BUFFER_STATE_VertexBufferIndex_start(const struct gen_device_info *devinfo)
248155    switch (devinfo->gen) {
248161       if (devinfo->is_haswell) {
248169       if (devinfo->is_g4x) {
248189 VERTEX_BUFFER_STATE_VertexFetchInvalidate_bits(const struct gen_device_info *devinfo)
248191    switch (devinfo->gen) {
248197       if (devinfo->is_haswell) {
248205       if (devinfo->is_g4x) {
248222 VERTEX_BUFFER_STATE_VertexFetchInvalidate_start(const struct gen_device_info *devinfo)
248224    switch (devinfo->gen) {
248230       if (devinfo->is_haswell) {
248238       if (devinfo->is_g4x) {
248265 VERTEX_ELEMENT_STATE_length(const struct gen_device_info *devinfo)
248267    switch (devinfo->gen) {
248273       if (devinfo->is_haswell) {
248281       if (devinfo->is_g4x) {
248308 VERTEX_ELEMENT_STATE_Component0Control_bits(const struct gen_device_info *devinfo)
248310    switch (devinfo->gen) {
248316       if (devinfo->is_haswell) {
248324       if (devinfo->is_g4x) {
248348 VERTEX_ELEMENT_STATE_Component0Control_start(const struct gen_device_info *devinfo)
248350    switch (devinfo->gen) {
248356       if (devinfo->is_haswell) {
248364       if (devinfo->is_g4x) {
248391 VERTEX_ELEMENT_STATE_Component1Control_bits(const struct gen_device_info *devinfo)
248393    switch (devinfo->gen) {
248399       if (devinfo->is_haswell) {
248407       if (devinfo->is_g4x) {
248431 VERTEX_ELEMENT_STATE_Component1Control_start(const struct gen_device_info *devinfo)
248433    switch (devinfo->gen) {
248439       if (devinfo->is_haswell) {
248447       if (devinfo->is_g4x) {
248474 VERTEX_ELEMENT_STATE_Component2Control_bits(const struct gen_device_info *devinfo)
248476    switch (devinfo->gen) {
248482       if (devinfo->is_haswell) {
248490       if (devinfo->is_g4x) {
248514 VERTEX_ELEMENT_STATE_Component2Control_start(const struct gen_device_info *devinfo)
248516    switch (devinfo->gen) {
248522       if (devinfo->is_haswell) {
248530       if (devinfo->is_g4x) {
248557 VERTEX_ELEMENT_STATE_Component3Control_bits(const struct gen_device_info *devinfo)
248559    switch (devinfo->gen) {
248565       if (devinfo->is_haswell) {
248573       if (devinfo->is_g4x) {
248597 VERTEX_ELEMENT_STATE_Component3Control_start(const struct gen_device_info *devinfo)
248599    switch (devinfo->gen) {
248605       if (devinfo->is_haswell) {
248613       if (devinfo->is_g4x) {
248633 VERTEX_ELEMENT_STATE_DestinationElementOffset_bits(const struct gen_device_info *devinfo)
248635    switch (devinfo->gen) {
248641       if (devinfo->is_haswell) {
248649       if (devinfo->is_g4x) {
248666 VERTEX_ELEMENT_STATE_DestinationElementOffset_start(const struct gen_device_info *devinfo)
248668    switch (devinfo->gen) {
248674       if (devinfo->is_haswell) {
248682       if (devinfo->is_g4x) {
248706 VERTEX_ELEMENT_STATE_EdgeFlagEnable_bits(const struct gen_device_info *devinfo)
248708    switch (devinfo->gen) {
248714       if (devinfo->is_haswell) {
248722       if (devinfo->is_g4x) {
248743 VERTEX_ELEMENT_STATE_EdgeFlagEnable_start(const struct gen_device_info *devinfo)
248745    switch (devinfo->gen) {
248751       if (devinfo->is_haswell) {
248759       if (devinfo->is_g4x) {
248786 VERTEX_ELEMENT_STATE_SourceElementFormat_bits(const struct gen_device_info *devinfo)
248788    switch (devinfo->gen) {
248794       if (devinfo->is_haswell) {
248802       if (devinfo->is_g4x) {
248826 VERTEX_ELEMENT_STATE_SourceElementFormat_start(const struct gen_device_info *devinfo)
248828    switch (devinfo->gen) {
248834       if (devinfo->is_haswell) {
248842       if (devinfo->is_g4x) {
248869 VERTEX_ELEMENT_STATE_SourceElementOffset_bits(const struct gen_device_info *devinfo)
248871    switch (devinfo->gen) {
248877       if (devinfo->is_haswell) {
248885       if (devinfo->is_g4x) {
248909 VERTEX_ELEMENT_STATE_SourceElementOffset_start(const struct gen_device_info *devinfo)
248911    switch (devinfo->gen) {
248917       if (devinfo->is_haswell) {
248925       if (devinfo->is_g4x) {
248952 VERTEX_ELEMENT_STATE_Valid_bits(const struct gen_device_info *devinfo)
248954    switch (devinfo->gen) {
248960       if (devinfo->is_haswell) {
248968       if (devinfo->is_g4x) {
248992 VERTEX_ELEMENT_STATE_Valid_start(const struct gen_device_info *devinfo)
248994    switch (devinfo->gen) {
249000       if (devinfo->is_haswell) {
249008       if (devinfo->is_g4x) {
249035 VERTEX_ELEMENT_STATE_VertexBufferIndex_bits(const struct gen_device_info *devinfo)
249037    switch (devinfo->gen) {
249043       if (devinfo->is_haswell) {
249051       if (devinfo->is_g4x) {
249075 VERTEX_ELEMENT_STATE_VertexBufferIndex_start(const struct gen_device_info *devinfo)
249077    switch (devinfo->gen) {
249083       if (devinfo->is_haswell) {
249091       if (devinfo->is_g4x) {
249114 VS_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
249116    switch (devinfo->gen) {
249122       if (devinfo->is_haswell) {
249130       if (devinfo->is_g4x) {
249153 VS_INVOCATION_COUNT_VSInvocationCountReport_bits(const struct gen_device_info *devinfo)
249155    switch (devinfo->gen) {
249161       if (devinfo->is_haswell) {
249169       if (devinfo->is_g4x) {
249189 VS_INVOCATION_COUNT_VSInvocationCountReport_start(const struct gen_device_info *devinfo)
249191    switch (devinfo->gen) {
249197       if (devinfo->is_haswell) {
249205       if (devinfo->is_g4x) {
249225 VS_STATE_length(const struct gen_device_info *devinfo)
249227    switch (devinfo->gen) {
249233       if (devinfo->is_haswell) {
249241       if (devinfo->is_g4x) {
249261 VS_STATE_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
249263    switch (devinfo->gen) {
249269       if (devinfo->is_haswell) {
249277       if (devinfo->is_g4x) {
249294 VS_STATE_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
249296    switch (devinfo->gen) {
249302       if (devinfo->is_haswell) {
249310       if (devinfo->is_g4x) {
249330 VS_STATE_ConstantURBEntryReadLength_bits(const struct gen_device_info *devinfo)
249332    switch (devinfo->gen) {
249338       if (devinfo->is_haswell) {
249346       if (devinfo->is_g4x) {
249363 VS_STATE_ConstantURBEntryReadLength_start(const struct gen_device_info *devinfo)
249365    switch (devinfo->gen) {
249371       if (devinfo->is_haswell) {
249379       if (devinfo->is_g4x) {
249399 VS_STATE_ConstantURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
249401    switch (devinfo->gen) {
249407       if (devinfo->is_haswell) {
249415       if (devinfo->is_g4x) {
249432 VS_STATE_ConstantURBEntryReadOffset_start(const struct gen_device_info *devinfo)
249434    switch (devinfo->gen) {
249440       if (devinfo->is_haswell) {
249448       if (devinfo->is_g4x) {
249468 VS_STATE_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
249470    switch (devinfo->gen) {
249476       if (devinfo->is_haswell) {
249484       if (devinfo->is_g4x) {
249501 VS_STATE_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
249503    switch (devinfo->gen) {
249509       if (devinfo->is_haswell) {
249517       if (devinfo->is_g4x) {
249537 VS_STATE_Enable_bits(const struct gen_device_info *devinfo)
249539    switch (devinfo->gen) {
249545       if (devinfo->is_haswell) {
249553       if (devinfo->is_g4x) {
249570 VS_STATE_Enable_start(const struct gen_device_info *devinfo)
249572    switch (devinfo->gen) {
249578       if (devinfo->is_haswell) {
249586       if (devinfo->is_g4x) {
249606 VS_STATE_FloatingPointMode_bits(const struct gen_device_info *devinfo)
249608    switch (devinfo->gen) {
249614       if (devinfo->is_haswell) {
249622       if (devinfo->is_g4x) {
249639 VS_STATE_FloatingPointMode_start(const struct gen_device_info *devinfo)
249641    switch (devinfo->gen) {
249647       if (devinfo->is_haswell) {
249655       if (devinfo->is_g4x) {
249675 VS_STATE_GRFRegisterCount_bits(const struct gen_device_info *devinfo)
249677    switch (devinfo->gen) {
249683       if (devinfo->is_haswell) {
249691       if (devinfo->is_g4x) {
249708 VS_STATE_GRFRegisterCount_start(const struct gen_device_info *devinfo)
249710    switch (devinfo->gen) {
249716       if (devinfo->is_haswell) {
249724       if (devinfo->is_g4x) {
249744 VS_STATE_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
249746    switch (devinfo->gen) {
249752       if (devinfo->is_haswell) {
249760       if (devinfo->is_g4x) {
249777 VS_STATE_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
249779    switch (devinfo->gen) {
249785       if (devinfo->is_haswell) {
249793       if (devinfo->is_g4x) {
249813 VS_STATE_KernelStartPointer_bits(const struct gen_device_info *devinfo)
249815    switch (devinfo->gen) {
249821       if (devinfo->is_haswell) {
249829       if (devinfo->is_g4x) {
249846 VS_STATE_KernelStartPointer_start(const struct gen_device_info *devinfo)
249848    switch (devinfo->gen) {
249854       if (devinfo->is_haswell) {
249862       if (devinfo->is_g4x) {
249882 VS_STATE_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
249884    switch (devinfo->gen) {
249890       if (devinfo->is_haswell) {
249898       if (devinfo->is_g4x) {
249915 VS_STATE_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
249917    switch (devinfo->gen) {
249923       if (devinfo->is_haswell) {
249931       if (devinfo->is_g4x) {
249951 VS_STATE_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
249953    switch (devinfo->gen) {
249959       if (devinfo->is_haswell) {
249967       if (devinfo->is_g4x) {
249984 VS_STATE_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
249986    switch (devinfo->gen) {
249992       if (devinfo->is_haswell) {
250000       if (devinfo->is_g4x) {
250020 VS_STATE_NumberofURBEntries_bits(const struct gen_device_info *devinfo)
250022    switch (devinfo->gen) {
250028       if (devinfo->is_haswell) {
250036       if (devinfo->is_g4x) {
250053 VS_STATE_NumberofURBEntries_start(const struct gen_device_info *devinfo)
250055    switch (devinfo->gen) {
250061       if (devinfo->is_haswell) {
250069       if (devinfo->is_g4x) {
250089 VS_STATE_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
250091    switch (devinfo->gen) {
250097       if (devinfo->is_haswell) {
250105       if (devinfo->is_g4x) {
250122 VS_STATE_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
250124    switch (devinfo->gen) {
250130       if (devinfo->is_haswell) {
250138       if (devinfo->is_g4x) {
250158 VS_STATE_SamplerCount_bits(const struct gen_device_info *devinfo)
250160    switch (devinfo->gen) {
250166       if (devinfo->is_haswell) {
250174       if (devinfo->is_g4x) {
250191 VS_STATE_SamplerCount_start(const struct gen_device_info *devinfo)
250193    switch (devinfo->gen) {
250199       if (devinfo->is_haswell) {
250207       if (devinfo->is_g4x) {
250227 VS_STATE_SamplerStatePointer_bits(const struct gen_device_info *devinfo)
250229    switch (devinfo->gen) {
250235       if (devinfo->is_haswell) {
250243       if (devinfo->is_g4x) {
250260 VS_STATE_SamplerStatePointer_start(const struct gen_device_info *devinfo)
250262    switch (devinfo->gen) {
250268       if (devinfo->is_haswell) {
250276       if (devinfo->is_g4x) {
250296 VS_STATE_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
250298    switch (devinfo->gen) {
250304       if (devinfo->is_haswell) {
250312       if (devinfo->is_g4x) {
250329 VS_STATE_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
250331    switch (devinfo->gen) {
250337       if (devinfo->is_haswell) {
250345       if (devinfo->is_g4x) {
250365 VS_STATE_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
250367    switch (devinfo->gen) {
250373       if (devinfo->is_haswell) {
250381       if (devinfo->is_g4x) {
250398 VS_STATE_SingleProgramFlow_start(const struct gen_device_info *devinfo)
250400    switch (devinfo->gen) {
250406       if (devinfo->is_haswell) {
250414       if (devinfo->is_g4x) {
250434 VS_STATE_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
250436    switch (devinfo->gen) {
250442       if (devinfo->is_haswell) {
250450       if (devinfo->is_g4x) {
250467 VS_STATE_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
250469    switch (devinfo->gen) {
250475       if (devinfo->is_haswell) {
250483       if (devinfo->is_g4x) {
250503 VS_STATE_StatisticsEnable_bits(const struct gen_device_info *devinfo)
250505    switch (devinfo->gen) {
250511       if (devinfo->is_haswell) {
250519       if (devinfo->is_g4x) {
250536 VS_STATE_StatisticsEnable_start(const struct gen_device_info *devinfo)
250538    switch (devinfo->gen) {
250544       if (devinfo->is_haswell) {
250552       if (devinfo->is_g4x) {
250572 VS_STATE_ThreadPriority_bits(const struct gen_device_info *devinfo)
250574    switch (devinfo->gen) {
250580       if (devinfo->is_haswell) {
250588       if (devinfo->is_g4x) {
250605 VS_STATE_ThreadPriority_start(const struct gen_device_info *devinfo)
250607    switch (devinfo->gen) {
250613       if (devinfo->is_haswell) {
250621       if (devinfo->is_g4x) {
250641 VS_STATE_URBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
250643    switch (devinfo->gen) {
250649       if (devinfo->is_haswell) {
250657       if (devinfo->is_g4x) {
250674 VS_STATE_URBEntryAllocationSize_start(const struct gen_device_info *devinfo)
250676    switch (devinfo->gen) {
250682       if (devinfo->is_haswell) {
250690       if (devinfo->is_g4x) {
250710 VS_STATE_VertexCacheDisable_bits(const struct gen_device_info *devinfo)
250712    switch (devinfo->gen) {
250718       if (devinfo->is_haswell) {
250726       if (devinfo->is_g4x) {
250743 VS_STATE_VertexCacheDisable_start(const struct gen_device_info *devinfo)
250745    switch (devinfo->gen) {
250751       if (devinfo->is_haswell) {
250759       if (devinfo->is_g4x) {
250779 VS_STATE_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
250781    switch (devinfo->gen) {
250787       if (devinfo->is_haswell) {
250795       if (devinfo->is_g4x) {
250812 VS_STATE_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
250814    switch (devinfo->gen) {
250820       if (devinfo->is_haswell) {
250828       if (devinfo->is_g4x) {
250848 VS_STATE_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
250850    switch (devinfo->gen) {
250856       if (devinfo->is_haswell) {
250864       if (devinfo->is_g4x) {
250881 VS_STATE_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
250883    switch (devinfo->gen) {
250889       if (devinfo->is_haswell) {
250897       if (devinfo->is_g4x) {
250917 WM_STATE_length(const struct gen_device_info *devinfo)
250919    switch (devinfo->gen) {
250925       if (devinfo->is_haswell) {
250933       if (devinfo->is_g4x) {
250953 WM_STATE_16PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
250955    switch (devinfo->gen) {
250961       if (devinfo->is_haswell) {
250969       if (devinfo->is_g4x) {
250986 WM_STATE_16PixelDispatchEnable_start(const struct gen_device_info *devinfo)
250988    switch (devinfo->gen) {
250994       if (devinfo->is_haswell) {
251002       if (devinfo->is_g4x) {
251022 WM_STATE_32PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
251024    switch (devinfo->gen) {
251030       if (devinfo->is_haswell) {
251038       if (devinfo->is_g4x) {
251055 WM_STATE_32PixelDispatchEnable_start(const struct gen_device_info *devinfo)
251057    switch (devinfo->gen) {
251063       if (devinfo->is_haswell) {
251071       if (devinfo->is_g4x) {
251091 WM_STATE_8PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
251093    switch (devinfo->gen) {
251099       if (devinfo->is_haswell) {
251107       if (devinfo->is_g4x) {
251124 WM_STATE_8PixelDispatchEnable_start(const struct gen_device_info *devinfo)
251126    switch (devinfo->gen) {
251132       if (devinfo->is_haswell) {
251140       if (devinfo->is_g4x) {
251160 WM_STATE_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
251162    switch (devinfo->gen) {
251168       if (devinfo->is_haswell) {
251176       if (devinfo->is_g4x) {
251193 WM_STATE_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
251195    switch (devinfo->gen) {
251201       if (devinfo->is_haswell) {
251209       if (devinfo->is_g4x) {
251229 WM_STATE_ConstantURBEntryReadLength_bits(const struct gen_device_info *devinfo)
251231    switch (devinfo->gen) {
251237       if (devinfo->is_haswell) {
251245       if (devinfo->is_g4x) {
251262 WM_STATE_ConstantURBEntryReadLength_start(const struct gen_device_info *devinfo)
251264    switch (devinfo->gen) {
251270       if (devinfo->is_haswell) {
251278       if (devinfo->is_g4x) {
251298 WM_STATE_ConstantURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
251300    switch (devinfo->gen) {
251306       if (devinfo->is_haswell) {
251314       if (devinfo->is_g4x) {
251331 WM_STATE_ConstantURBEntryReadOffset_start(const struct gen_device_info *devinfo)
251333    switch (devinfo->gen) {
251339       if (devinfo->is_haswell) {
251347       if (devinfo->is_g4x) {
251366 WM_STATE_Contiguous32PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
251368    switch (devinfo->gen) {
251374       if (devinfo->is_haswell) {
251382       if (devinfo->is_g4x) {
251398 WM_STATE_Contiguous32PixelDispatchEnable_start(const struct gen_device_info *devinfo)
251400    switch (devinfo->gen) {
251406       if (devinfo->is_haswell) {
251414       if (devinfo->is_g4x) {
251433 WM_STATE_Contiguous64PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
251435    switch (devinfo->gen) {
251441       if (devinfo->is_haswell) {
251449       if (devinfo->is_g4x) {
251465 WM_STATE_Contiguous64PixelDispatchEnable_start(const struct gen_device_info *devinfo)
251467    switch (devinfo->gen) {
251473       if (devinfo->is_haswell) {
251481       if (devinfo->is_g4x) {
251499 WM_STATE_DepthBufferClear_bits(const struct gen_device_info *devinfo)
251501    switch (devinfo->gen) {
251507       if (devinfo->is_haswell) {
251515       if (devinfo->is_g4x) {
251530 WM_STATE_DepthBufferClear_start(const struct gen_device_info *devinfo)
251532    switch (devinfo->gen) {
251538       if (devinfo->is_haswell) {
251546       if (devinfo->is_g4x) {
251564 WM_STATE_DepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
251566    switch (devinfo->gen) {
251572       if (devinfo->is_haswell) {
251580       if (devinfo->is_g4x) {
251595 WM_STATE_DepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
251597    switch (devinfo->gen) {
251603       if (devinfo->is_haswell) {
251611       if (devinfo->is_g4x) {
251631 WM_STATE_DepthCoefficientURBReadOffset_bits(const struct gen_device_info *devinfo)
251633    switch (devinfo->gen) {
251639       if (devinfo->is_haswell) {
251647       if (devinfo->is_g4x) {
251664 WM_STATE_DepthCoefficientURBReadOffset_start(const struct gen_device_info *devinfo)
251666    switch (devinfo->gen) {
251672       if (devinfo->is_haswell) {
251680       if (devinfo->is_g4x) {
251700 WM_STATE_DispatchGRFStartRegisterForConstantSetupData0_bits(const struct gen_device_info *devinfo)
251702    switch (devinfo->gen) {
251708       if (devinfo->is_haswell) {
251716       if (devinfo->is_g4x) {
251733 WM_STATE_DispatchGRFStartRegisterForConstantSetupData0_start(const struct gen_device_info *devinfo)
251735    switch (devinfo->gen) {
251741       if (devinfo->is_haswell) {
251749       if (devinfo->is_g4x) {
251769 WM_STATE_EarlyDepthTestEnable_bits(const struct gen_device_info *devinfo)
251771    switch (devinfo->gen) {
251777       if (devinfo->is_haswell) {
251785       if (devinfo->is_g4x) {
251802 WM_STATE_EarlyDepthTestEnable_start(const struct gen_device_info *devinfo)
251804    switch (devinfo->gen) {
251810       if (devinfo->is_haswell) {
251818       if (devinfo->is_g4x) {
251836 WM_STATE_FastSpanCoverageEnable_bits(const struct gen_device_info *devinfo)
251838    switch (devinfo->gen) {
251844       if (devinfo->is_haswell) {
251852       if (devinfo->is_g4x) {
251867 WM_STATE_FastSpanCoverageEnable_start(const struct gen_device_info *devinfo)
251869    switch (devinfo->gen) {
251875       if (devinfo->is_haswell) {
251883       if (devinfo->is_g4x) {
251903 WM_STATE_FloatingPointMode_bits(const struct gen_device_info *devinfo)
251905    switch (devinfo->gen) {
251911       if (devinfo->is_haswell) {
251919       if (devinfo->is_g4x) {
251936 WM_STATE_FloatingPointMode_start(const struct gen_device_info *devinfo)
251938    switch (devinfo->gen) {
251944       if (devinfo->is_haswell) {
251952       if (devinfo->is_g4x) {
251972 WM_STATE_GRFRegisterCount0_bits(const struct gen_device_info *devinfo)
251974    switch (devinfo->gen) {
251980       if (devinfo->is_haswell) {
251988       if (devinfo->is_g4x) {
252005 WM_STATE_GRFRegisterCount0_start(const struct gen_device_info *devinfo)
252007    switch (devinfo->gen) {
252013       if (devinfo->is_haswell) {
252021       if (devinfo->is_g4x) {
252039 WM_STATE_GRFRegisterCount1_bits(const struct gen_device_info *devinfo)
252041    switch (devinfo->gen) {
252047       if (devinfo->is_haswell) {
252055       if (devinfo->is_g4x) {
252070 WM_STATE_GRFRegisterCount1_start(const struct gen_device_info *devinfo)
252072    switch (devinfo->gen) {
252078       if (devinfo->is_haswell) {
252086       if (devinfo->is_g4x) {
252104 WM_STATE_GRFRegisterCount2_bits(const struct gen_device_info *devinfo)
252106    switch (devinfo->gen) {
252112       if (devinfo->is_haswell) {
252120       if (devinfo->is_g4x) {
252135 WM_STATE_GRFRegisterCount2_start(const struct gen_device_info *devinfo)
252137    switch (devinfo->gen) {
252143       if (devinfo->is_haswell) {
252151       if (devinfo->is_g4x) {
252169 WM_STATE_GRFRegisterCount3_bits(const struct gen_device_info *devinfo)
252171    switch (devinfo->gen) {
252177       if (devinfo->is_haswell) {
252185       if (devinfo->is_g4x) {
252200 WM_STATE_GRFRegisterCount3_start(const struct gen_device_info *devinfo)
252202    switch (devinfo->gen) {
252208       if (devinfo->is_haswell) {
252216       if (devinfo->is_g4x) {
252236 WM_STATE_GlobalDepthOffsetConstant_bits(const struct gen_device_info *devinfo)
252238    switch (devinfo->gen) {
252244       if (devinfo->is_haswell) {
252252       if (devinfo->is_g4x) {
252269 WM_STATE_GlobalDepthOffsetConstant_start(const struct gen_device_info *devinfo)
252271    switch (devinfo->gen) {
252277       if (devinfo->is_haswell) {
252285       if (devinfo->is_g4x) {
252305 WM_STATE_GlobalDepthOffsetEnable_bits(const struct gen_device_info *devinfo)
252307    switch (devinfo->gen) {
252313       if (devinfo->is_haswell) {
252321       if (devinfo->is_g4x) {
252338 WM_STATE_GlobalDepthOffsetEnable_start(const struct gen_device_info *devinfo)
252340    switch (devinfo->gen) {
252346       if (devinfo->is_haswell) {
252354       if (devinfo->is_g4x) {
252374 WM_STATE_GlobalDepthOffsetScale_bits(const struct gen_device_info *devinfo)
252376    switch (devinfo->gen) {
252382       if (devinfo->is_haswell) {
252390       if (devinfo->is_g4x) {
252407 WM_STATE_GlobalDepthOffsetScale_start(const struct gen_device_info *devinfo)
252409    switch (devinfo->gen) {
252415       if (devinfo->is_haswell) {
252423       if (devinfo->is_g4x) {
252441 WM_STATE_HierarchicalDepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
252443    switch (devinfo->gen) {
252449       if (devinfo->is_haswell) {
252457       if (devinfo->is_g4x) {
252472 WM_STATE_HierarchicalDepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
252474    switch (devinfo->gen) {
252480       if (devinfo->is_haswell) {
252488       if (devinfo->is_g4x) {
252508 WM_STATE_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
252510    switch (devinfo->gen) {
252516       if (devinfo->is_haswell) {
252524       if (devinfo->is_g4x) {
252541 WM_STATE_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
252543    switch (devinfo->gen) {
252549       if (devinfo->is_haswell) {
252557       if (devinfo->is_g4x) {
252577 WM_STATE_KernelStartPointer0_bits(const struct gen_device_info *devinfo)
252579    switch (devinfo->gen) {
252585       if (devinfo->is_haswell) {
252593       if (devinfo->is_g4x) {
252610 WM_STATE_KernelStartPointer0_start(const struct gen_device_info *devinfo)
252612    switch (devinfo->gen) {
252618       if (devinfo->is_haswell) {
252626       if (devinfo->is_g4x) {
252644 WM_STATE_KernelStartPointer1_bits(const struct gen_device_info *devinfo)
252646    switch (devinfo->gen) {
252652       if (devinfo->is_haswell) {
252660       if (devinfo->is_g4x) {
252675 WM_STATE_KernelStartPointer1_start(const struct gen_device_info *devinfo)
252677    switch (devinfo->gen) {
252683       if (devinfo->is_haswell) {
252691       if (devinfo->is_g4x) {
252709 WM_STATE_KernelStartPointer2_bits(const struct gen_device_info *devinfo)
252711    switch (devinfo->gen) {
252717       if (devinfo->is_haswell) {
252725       if (devinfo->is_g4x) {
252740 WM_STATE_KernelStartPointer2_start(const struct gen_device_info *devinfo)
252742    switch (devinfo->gen) {
252748       if (devinfo->is_haswell) {
252756       if (devinfo->is_g4x) {
252774 WM_STATE_KernelStartPointer3_bits(const struct gen_device_info *devinfo)
252776    switch (devinfo->gen) {
252782       if (devinfo->is_haswell) {
252790       if (devinfo->is_g4x) {
252805 WM_STATE_KernelStartPointer3_start(const struct gen_device_info *devinfo)
252807    switch (devinfo->gen) {
252813       if (devinfo->is_haswell) {
252821       if (devinfo->is_g4x) {
252841 WM_STATE_LegacyDiamondLineRasterization_bits(const struct gen_device_info *devinfo)
252843    switch (devinfo->gen) {
252849       if (devinfo->is_haswell) {
252857       if (devinfo->is_g4x) {
252874 WM_STATE_LegacyDiamondLineRasterization_start(const struct gen_device_info *devinfo)
252876    switch (devinfo->gen) {
252882       if (devinfo->is_haswell) {
252890       if (devinfo->is_g4x) {
252910 WM_STATE_LegacyGlobalDepthBiasEnable_bits(const struct gen_device_info *devinfo)
252912    switch (devinfo->gen) {
252918       if (devinfo->is_haswell) {
252926       if (devinfo->is_g4x) {
252943 WM_STATE_LegacyGlobalDepthBiasEnable_start(const struct gen_device_info *devinfo)
252945    switch (devinfo->gen) {
252951       if (devinfo->is_haswell) {
252959       if (devinfo->is_g4x) {
252979 WM_STATE_LineAntialiasingRegionWidth_bits(const struct gen_device_info *devinfo)
252981    switch (devinfo->gen) {
252987       if (devinfo->is_haswell) {
252995       if (devinfo->is_g4x) {
253012 WM_STATE_LineAntialiasingRegionWidth_start(const struct gen_device_info *devinfo)
253014    switch (devinfo->gen) {
253020       if (devinfo->is_haswell) {
253028       if (devinfo->is_g4x) {
253048 WM_STATE_LineEndCapAntialiasingRegionWidth_bits(const struct gen_device_info *devinfo)
253050    switch (devinfo->gen) {
253056       if (devinfo->is_haswell) {
253064       if (devinfo->is_g4x) {
253081 WM_STATE_LineEndCapAntialiasingRegionWidth_start(const struct gen_device_info *devinfo)
253083    switch (devinfo->gen) {
253089       if (devinfo->is_haswell) {
253097       if (devinfo->is_g4x) {
253117 WM_STATE_LineStippleEnable_bits(const struct gen_device_info *devinfo)
253119    switch (devinfo->gen) {
253125       if (devinfo->is_haswell) {
253133       if (devinfo->is_g4x) {
253150 WM_STATE_LineStippleEnable_start(const struct gen_device_info *devinfo)
253152    switch (devinfo->gen) {
253158       if (devinfo->is_haswell) {
253166       if (devinfo->is_g4x) {
253186 WM_STATE_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
253188    switch (devinfo->gen) {
253194       if (devinfo->is_haswell) {
253202       if (devinfo->is_g4x) {
253219 WM_STATE_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
253221    switch (devinfo->gen) {
253227       if (devinfo->is_haswell) {
253235       if (devinfo->is_g4x) {
253255 WM_STATE_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
253257    switch (devinfo->gen) {
253263       if (devinfo->is_haswell) {
253271       if (devinfo->is_g4x) {
253288 WM_STATE_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
253290    switch (devinfo->gen) {
253296       if (devinfo->is_haswell) {
253304       if (devinfo->is_g4x) {
253324 WM_STATE_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
253326    switch (devinfo->gen) {
253332       if (devinfo->is_haswell) {
253340       if (devinfo->is_g4x) {
253357 WM_STATE_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
253359    switch (devinfo->gen) {
253365       if (devinfo->is_haswell) {
253373       if (devinfo->is_g4x) {
253393 WM_STATE_PixelShaderComputedDepth_bits(const struct gen_device_info *devinfo)
253395    switch (devinfo->gen) {
253401       if (devinfo->is_haswell) {
253409       if (devinfo->is_g4x) {
253426 WM_STATE_PixelShaderComputedDepth_start(const struct gen_device_info *devinfo)
253428    switch (devinfo->gen) {
253434       if (devinfo->is_haswell) {
253442       if (devinfo->is_g4x) {
253462 WM_STATE_PixelShaderKillsPixel_bits(const struct gen_device_info *devinfo)
253464    switch (devinfo->gen) {
253470       if (devinfo->is_haswell) {
253478       if (devinfo->is_g4x) {
253495 WM_STATE_PixelShaderKillsPixel_start(const struct gen_device_info *devinfo)
253497    switch (devinfo->gen) {
253503       if (devinfo->is_haswell) {
253511       if (devinfo->is_g4x) {
253531 WM_STATE_PixelShaderUsesSourceDepth_bits(const struct gen_device_info *devinfo)
253533    switch (devinfo->gen) {
253539       if (devinfo->is_haswell) {
253547       if (devinfo->is_g4x) {
253564 WM_STATE_PixelShaderUsesSourceDepth_start(const struct gen_device_info *devinfo)
253566    switch (devinfo->gen) {
253572       if (devinfo->is_haswell) {
253580       if (devinfo->is_g4x) {
253600 WM_STATE_PolygonStippleEnable_bits(const struct gen_device_info *devinfo)
253602    switch (devinfo->gen) {
253608       if (devinfo->is_haswell) {
253616       if (devinfo->is_g4x) {
253633 WM_STATE_PolygonStippleEnable_start(const struct gen_device_info *devinfo)
253635    switch (devinfo->gen) {
253641       if (devinfo->is_haswell) {
253649       if (devinfo->is_g4x) {
253669 WM_STATE_SamplerCount_bits(const struct gen_device_info *devinfo)
253671    switch (devinfo->gen) {
253677       if (devinfo->is_haswell) {
253685       if (devinfo->is_g4x) {
253702 WM_STATE_SamplerCount_start(const struct gen_device_info *devinfo)
253704    switch (devinfo->gen) {
253710       if (devinfo->is_haswell) {
253718       if (devinfo->is_g4x) {
253738 WM_STATE_SamplerStatePointer_bits(const struct gen_device_info *devinfo)
253740    switch (devinfo->gen) {
253746       if (devinfo->is_haswell) {
253754       if (devinfo->is_g4x) {
253771 WM_STATE_SamplerStatePointer_start(const struct gen_device_info *devinfo)
253773    switch (devinfo->gen) {
253779       if (devinfo->is_haswell) {
253787       if (devinfo->is_g4x) {
253807 WM_STATE_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
253809    switch (devinfo->gen) {
253815       if (devinfo->is_haswell) {
253823       if (devinfo->is_g4x) {
253840 WM_STATE_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
253842    switch (devinfo->gen) {
253848       if (devinfo->is_haswell) {
253856       if (devinfo->is_g4x) {
253876 WM_STATE_SetupURBEntryReadLength_bits(const struct gen_device_info *devinfo)
253878    switch (devinfo->gen) {
253884       if (devinfo->is_haswell) {
253892       if (devinfo->is_g4x) {
253909 WM_STATE_SetupURBEntryReadLength_start(const struct gen_device_info *devinfo)
253911    switch (devinfo->gen) {
253917       if (devinfo->is_haswell) {
253925       if (devinfo->is_g4x) {
253945 WM_STATE_SetupURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
253947    switch (devinfo->gen) {
253953       if (devinfo->is_haswell) {
253961       if (devinfo->is_g4x) {
253978 WM_STATE_SetupURBEntryReadOffset_start(const struct gen_device_info *devinfo)
253980    switch (devinfo->gen) {
253986       if (devinfo->is_haswell) {
253994       if (devinfo->is_g4x) {
254014 WM_STATE_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
254016    switch (devinfo->gen) {
254022       if (devinfo->is_haswell) {
254030       if (devinfo->is_g4x) {
254047 WM_STATE_SingleProgramFlow_start(const struct gen_device_info *devinfo)
254049    switch (devinfo->gen) {
254055       if (devinfo->is_haswell) {
254063       if (devinfo->is_g4x) {
254083 WM_STATE_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
254085    switch (devinfo->gen) {
254091       if (devinfo->is_haswell) {
254099       if (devinfo->is_g4x) {
254116 WM_STATE_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
254118    switch (devinfo->gen) {
254124       if (devinfo->is_haswell) {
254132       if (devinfo->is_g4x) {
254152 WM_STATE_StatisticsEnable_bits(const struct gen_device_info *devinfo)
254154    switch (devinfo->gen) {
254160       if (devinfo->is_haswell) {
254168       if (devinfo->is_g4x) {
254185 WM_STATE_StatisticsEnable_start(const struct gen_device_info *devinfo)
254187    switch (devinfo->gen) {
254193       if (devinfo->is_haswell) {
254201       if (devinfo->is_g4x) {
254221 WM_STATE_ThreadDispatchEnable_bits(const struct gen_device_info *devinfo)
254223    switch (devinfo->gen) {
254229       if (devinfo->is_haswell) {
254237       if (devinfo->is_g4x) {
254254 WM_STATE_ThreadDispatchEnable_start(const struct gen_device_info *devinfo)
254256    switch (devinfo->gen) {
254262       if (devinfo->is_haswell) {
254270       if (devinfo->is_g4x) {
254290 WM_STATE_ThreadPriority_bits(const struct gen_device_info *devinfo)
254292    switch (devinfo->gen) {
254298       if (devinfo->is_haswell) {
254306       if (devinfo->is_g4x) {
254323 WM_STATE_ThreadPriority_start(const struct gen_device_info *devinfo)
254325    switch (devinfo->gen) {
254331       if (devinfo->is_haswell) {
254339       if (devinfo->is_g4x) {