Lines Matching refs:tiled
20 The basic idea of a tiled image is that the image is first divided into
23 demonstrated with a specific example. Suppose we have a RGBA8888 X-tiled
32 :alt: Example of an X-tiled image
35 instead, Y-tiled. Then the surface is divided into 32x32 pixel tiles each of
123 simply said it was Y-tiled but by Sky Lake there is almost no mention of
124 Y-tiling in connection with stencil buffers and they are always W-tiled. This
162 tiled address:
199 Starting with Sky Lake, we can scan out from Y-tiled buffers.
204 When bit-6 swizzling is enabled, bit 9 is XOR'd in with bit 6 of the tiled
232 the docs are somewhat confused as to whether stencil buffers are W or Y-tiled.
235 requirement that W-tiled buffers have their pitch multiplied by 2. From the
243 interleaved". More accurately, a W-tiled buffer can be viewed as a Y-tiled
244 buffer with each set of 4 W-tiled lines interleaved to form 2 Y-tiled lines. In
292 W-tiling where we have code to do W-tiled encoding and decoding in the shader
294 W-tiled surfaces.
323 Y-tiled pattern becomes u_2 u_1 u_0 v_4 v_3 v_2 v_1 v_0. The Sky Lake PRM