Lines Matching refs:DCC
154 - RADV/ACO - DCC causing garbled output on RX570
922 - radv: Extract DCC format support handling.
958 - radv: Implement initialization of displayable DCC.
959 - radv: Implement displayable DCC retiling.
960 - radv: Add DCC info to the metadata.
961 - radv: Use ac_surface DCC settings for shareable images.
962 - radv: Enable displayable DCC.
963 - radv: Disable displayable DCC for GFX8 properly.
970 - radv: Use correct DCC compressed block size for sampling.
972 - radv: Allow extra planes for DCC.
973 - radv: Enable sharing with DCC with modifiers.
975 - radv: Allow DCC for images with modifiers that are read-only.
977 - radv: Enable DCC for image stores on GFX10.
988 - radv: Support DCC without a fast clear value.
989 - radv: Support DCC without DCC/FCE predicates.
991 - radv: Support DCC modifiers fully.
3540 - amd/addrlib: add back the incorrect original DCC checking
3568 - radeonsi: determine accurately whether the framebuffer state has DCC MSAA
3570 - radeonsi: parallelize CMASK and DCC clears
3580 - radeonsi: fix si_compute_copy_image if DCC decompression happens before a copy
3604 - radeonsi: restructure DCC disablement into a switch
3605 - radeonsi: allow trivial DCC clears for shared textures with DCC constant encode
3606 - radeonsi: implement per-level DCC and CMASK fast clears for gfx10+
3613 - radeonsi: enable DCC fast clears for non-zero mipmap levels and 0/1 clear values
3617 - radeonsi: try to fix DCC coherency issues with DCC decompression
3622 - amd/addrlib: expose DCC address equations to drivers
3625 - ac/surface: limit the number of swizzle modes that can have displayable DCC
3626 - ac,radeonsi: rewrite DCC retiling without the DCC retile map
3627 - radeonsi: fix and enable full DCC with MSAA 2x on gfx9
3628 - radeonsi: implement DCC MSAA 4x/8x fast clear using DCC equations on gfx9
3629 - radeonsi: enable DCC for MSAA 4x and 8x on gfx9
3650 - radeonsi: don't decompress DCC for float formats in si_compute_copy_image
3651 - radeonsi: fix automatic DCC retiling after DCC clear and DCC decompression
3652 - radeonsi: fix automatic DCC retiling after compute image stores
3653 - radeonsi: make the gfx9 DCC MSAA clear shader depend on the number of samples
4831 - radv: fix clearing DCC-compressed e5b9g9r9 images
5150 - radv: skip useless FCE when fast-clearing MSAA images with DCC enabled
5152 - radv: do not declare push constants for DCC decompress on compute
5160 - radv: remove useless DCC disable check for 3D images on GFX10+
5168 - radv: initialize TC-compat CMASK images with the DCC clear code
5189 - radv: do not fixup DCC after compute color resolves if DCC stores enabled
5202 - aco: implement a workaround for the image load DCC hw bug on GFX10.3
5203 - radv: allow DCC for storage images on GFX10.3 with RADV_PERFTEST=dccstores
5205 - radv: init CMASK/FMASK/DCC in parallel
5206 - radv: perform MSAA color decompression for storage images with DCC
5207 - radv: enable DCC stores with MSAA 4x/8x on GFX10+
5208 - radv: simplify a check when enabling DCC for concurrent images
5209 - radv: enable DCC for concurrent images on GFX10
5227 - radv: do not enable DCC for fragment shading rate attachments
5241 - radv: keep DCC compressed for clears on compute with image stores
5251 - radv: check if DCC is enabled when resolving different levels