Lines Matching defs:csio
844 ADDR_COMPUTE_SURFACE_INFO_OUTPUT *csio, struct radeon_surf *surf)
846 surf->surf_alignment_log2 = util_logbase2(csio->baseAlign);
847 surf->u.legacy.pipe_config = csio->pTileInfo->pipeConfig - 1;
851 if (csio->tileMode >= ADDR_TM_2D_TILED_THIN1) {
852 surf->u.legacy.bankw = csio->pTileInfo->bankWidth;
853 surf->u.legacy.bankh = csio->pTileInfo->bankHeight;
854 surf->u.legacy.mtilea = csio->pTileInfo->macroAspectRatio;
855 surf->u.legacy.tile_split = csio->pTileInfo->tileSplitBytes;
856 surf->u.legacy.num_banks = csio->pTileInfo->banks;
857 surf->u.legacy.macro_tile_index = csio->macroModeIndex;
875 AddrBaseSwizzleIn.tileIndex = csio->tileIndex;
876 AddrBaseSwizzleIn.macroModeIndex = csio->macroModeIndex;
877 AddrBaseSwizzleIn.pTileInfo = csio->pTileInfo;
878 AddrBaseSwizzleIn.tileMode = csio->tileMode;