Cross Reference: /xsrc/external/mit/MesaLib/dist/src/amd/common/ac

Lines Matching refs:AddrSurfInfoOut
573                               ADDR_COMPUTE_SURFACE_INFO_OUTPUT *AddrSurfInfoOut,
628    ret = AddrComputeSurfaceInfo(addrlib, AddrSurfInfoIn, AddrSurfInfoOut);
635    surf_level->offset_256B = align64(surf->surf_size, AddrSurfInfoOut->baseAlign) / 256;
636    surf_level->slice_size_dw = AddrSurfInfoOut->sliceSize / 4;
637    surf_level->nblk_x = AddrSurfInfoOut->pitch;
638    surf_level->nblk_y = AddrSurfInfoOut->height;
640    switch (AddrSurfInfoOut->tileMode) {
657       surf->u.legacy.zs.stencil_tiling_index[level] = AddrSurfInfoOut->tileIndex;
659       surf->u.legacy.tiling_index[level] = AddrSurfInfoOut->tileIndex;
663          surf->prt_tile_width = AddrSurfInfoOut->pitchAlign;
664          surf->prt_tile_height = AddrSurfInfoOut->heightAlign;
673    surf->surf_size = (uint64_t)surf_level->offset_256B * 256 + AddrSurfInfoOut->surfSize;
683       AddrDccIn->colorSurfSize = AddrSurfInfoOut->surfSize;
684       AddrDccIn->tileMode = AddrSurfInfoOut->tileMode;
685       AddrDccIn->tileInfo = *AddrSurfInfoOut->pTileInfo;
686       AddrDccIn->tileIndex = AddrSurfInfoOut->tileIndex;
687       AddrDccIn->macroModeIndex = AddrSurfInfoOut->macroModeIndex;
725             AddrDccIn->colorSurfSize = AddrSurfInfoOut->sliceSize;
726             AddrDccIn->tileMode = AddrSurfInfoOut->tileMode;
727             AddrDccIn->tileInfo = *AddrSurfInfoOut->pTileInfo;
728             AddrDccIn->tileIndex = AddrSurfInfoOut->tileIndex;
729             AddrDccIn->macroModeIndex = AddrSurfInfoOut->macroModeIndex;
758       AddrHtileIn->flags.tcCompatible = AddrSurfInfoOut->tcCompatible;
759       AddrHtileIn->pitch = AddrSurfInfoOut->pitch;
760       AddrHtileIn->height = AddrSurfInfoOut->height;
761       AddrHtileIn->numSlices = AddrSurfInfoOut->depth;
764       AddrHtileIn->pTileInfo = AddrSurfInfoOut->pTileInfo;
765       AddrHtileIn->tileIndex = AddrSurfInfoOut->tileIndex;
766       AddrHtileIn->macroModeIndex = AddrSurfInfoOut->macroModeIndex;
965    ADDR_COMPUTE_SURFACE_INFO_OUTPUT AddrSurfInfoOut = {0};
975    AddrSurfInfoOut.size = sizeof(ADDR_COMPUTE_SURFACE_INFO_OUTPUT);
980    AddrSurfInfoOut.pTileInfo = &AddrTileInfoOut;
1157          AddrSurfInfoOut.macroModeIndex = cik_get_macro_tile_index(surf);
1175                                 &AddrSurfInfoOut, &AddrDccIn, &AddrDccOut, &AddrHtileIn,
1183          if (!AddrSurfInfoOut.tcCompatible) {
1190             AddrSurfInfoIn.tileIndex = AddrSurfInfoOut.tileIndex;
1191             stencil_tile_idx = AddrSurfInfoOut.stencilTileIdx;
1196          r = gfx6_surface_settings(addrlib, info, config, &AddrSurfInfoOut, surf);
1214                                 &AddrSurfInfoOut, &AddrDccIn, &AddrDccOut, NULL, NULL);
1228                r = gfx6_surface_settings(addrlib, info, config, &AddrSurfInfoOut, surf);
1234             if (AddrSurfInfoOut.tileMode >= ADDR_TM_2D_TILED_THIN1) {
1235                surf->u.legacy.stencil_tile_split = AddrSurfInfoOut.pTileInfo->tileSplitBytes;
1251       fin.tileMode = AddrSurfInfoOut.tileMode;
1252       fin.pitch = AddrSurfInfoOut.pitch;