Lines Matching refs:gfx9
150 return (!surf->u.gfx9.color.dcc.independent_64B_blocks &&
151 surf->u.gfx9.color.dcc.independent_128B_blocks &&
152 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_128B) ||
154 surf->u.gfx9.color.dcc.independent_64B_blocks &&
155 surf->u.gfx9.color.dcc.independent_128B_blocks &&
156 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B);
185 surf->u.gfx9.color.dcc.independent_64B_blocks = AMD_FMT_MOD_GET(DCC_INDEPENDENT_64B, modifier);
186 surf->u.gfx9.color.dcc.independent_128B_blocks = AMD_FMT_MOD_GET(DCC_INDEPENDENT_128B, modifier);
187 surf->u.gfx9.color.dcc.max_compressed_block_size = AMD_FMT_MOD_GET(DCC_MAX_COMPRESSED_BLOCK, modifier);
1446 return surf->u.gfx9.color.dcc.independent_64B_blocks && !surf->u.gfx9.color.dcc.independent_128B_blocks &&
1447 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B;
1452 return !surf->u.gfx9.color.dcc.independent_64B_blocks && surf->u.gfx9.color.dcc.independent_128B_blocks &&
1453 surf->u.gfx9.color.dcc.max_compressed_block_size <= V_028C78_MAX_BLOCK_SIZE_128B;
1460 return surf->u.gfx9.color.dcc.independent_64B_blocks != surf->u.gfx9.color.dcc.independent_128B_blocks &&
1461 (!surf->u.gfx9.color.dcc.independent_64B_blocks ||
1462 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B) &&
1463 (!surf->u.gfx9.color.dcc.independent_128B_blocks ||
1464 surf->u.gfx9.color.dcc.max_compressed_block_size <= V_028C78_MAX_BLOCK_SIZE_128B);
1471 return surf->u.gfx9.color.dcc.independent_128B_blocks &&
1472 surf->u.gfx9.color.dcc.max_compressed_block_size <= V_028C78_MAX_BLOCK_SIZE_128B;
1536 assert(surf->u.gfx9.color.dcc.independent_64B_blocks &&
1537 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B);
1542 if (info->chip_class == GFX10 && surf->u.gfx9.color.dcc.independent_128B_blocks)
1546 (surf->u.gfx9.color.dcc.independent_64B_blocks &&
1547 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B));
1573 assert(dcc->equation.gfx9.num_bits <= ARRAY_SIZE(equation->u.gfx9.bit));
1575 equation->u.gfx9.num_bits = dcc->equation.gfx9.num_bits;
1576 equation->u.gfx9.num_pipe_bits = dcc->equation.gfx9.numPipeBits;
1577 for (unsigned b = 0; b < ARRAY_SIZE(equation->u.gfx9.bit); b++) {
1578 for (unsigned c = 0; c < ARRAY_SIZE(equation->u.gfx9.bit[b].coord); c++) {
1579 equation->u.gfx9.bit[b].coord[c].dim = dcc->equation.gfx9.bit[b].coord[c].dim;
1580 equation->u.gfx9.bit[b].coord[c].ord = dcc->equation.gfx9.bit[b].coord[c].ord;
1595 assert(cmask->equation.gfx9.num_bits <= ARRAY_SIZE(equation->u.gfx9.bit));
1597 equation->u.gfx9.num_bits = cmask->equation.gfx9.num_bits;
1598 equation->u.gfx9.num_pipe_bits = cmask->equation.gfx9.numPipeBits;
1599 for (unsigned b = 0; b < ARRAY_SIZE(equation->u.gfx9.bit); b++) {
1600 for (unsigned c = 0; c < ARRAY_SIZE(equation->u.gfx9.bit[b].coord); c++) {
1601 equation->u.gfx9.bit[b].coord[c].dim = cmask->equation.gfx9.bit[b].coord[c].dim;
1602 equation->u.gfx9.bit[b].coord[c].ord = cmask->equation.gfx9.bit[b].coord[c].ord;
1653 surf->u.gfx9.prt_level_offset[i] = mip_info[i].macroBlockOffset + mip_info[i].mipTailOffset;
1656 surf->u.gfx9.prt_level_pitch[i] = mip_info[i].pitch;
1658 surf->u.gfx9.prt_level_pitch[i] = out.mipChainPitch;
1663 surf->u.gfx9.zs.stencil_swizzle_mode = in->swizzleMode;
1664 surf->u.gfx9.zs.stencil_epitch =
1667 surf->u.gfx9.zs.stencil_offset = align(surf->surf_size, out.baseAlign);
1668 surf->surf_size = surf->u.gfx9.zs.stencil_offset + out.surfSize;
1672 surf->u.gfx9.swizzle_mode = in->swizzleMode;
1673 surf->u.gfx9.epitch = out.epitchIsHeight ? out.mipChainHeight - 1 : out.mipChainPitch - 1;
1679 surf->u.gfx9.color.fmask_swizzle_mode = surf->u.gfx9.swizzle_mode & ~0x3;
1680 surf->u.gfx9.color.fmask_epitch = surf->u.gfx9.epitch;
1683 surf->u.gfx9.surf_slice_size = out.sliceSize;
1684 surf->u.gfx9.surf_pitch = out.pitch;
1685 surf->u.gfx9.surf_height = out.height;
1690 surf->u.gfx9.swizzle_mode == ADDR_SW_LINEAR) {
1692 surf->u.gfx9.surf_pitch = align(surf->u.gfx9.surf_pitch / surf->blk_w, 256 / surf->bpe);
1693 surf->u.gfx9.epitch =
1694 MAX2(surf->u.gfx9.epitch, surf->u.gfx9.surf_pitch * surf->blk_w - 1);
1700 surf->u.gfx9.surf_slice_size =
1701 MAX2(surf->u.gfx9.surf_slice_size,
1702 surf->u.gfx9.surf_pitch * out.height * surf->bpe * surf->blk_w);
1703 surf->surf_size = surf->u.gfx9.surf_slice_size * in->numSlices;
1708 surf->u.gfx9.offset[i] = mip_info[i].offset;
1709 surf->u.gfx9.pitch[i] = mip_info[i].pitch;
1713 surf->u.gfx9.base_mip_width = mip_info[0].pitch;
1714 surf->u.gfx9.base_mip_height = mip_info[0].height;
1755 surf->u.gfx9.meta_levels[i].offset = meta_mip_info[i].offset;
1756 surf->u.gfx9.meta_levels[i].size = meta_mip_info[i].sliceSize;
1771 ac_copy_htile_equation(info, &hout, &surf->u.gfx9.zs.htile_equation);
1836 surf->u.gfx9.color.dcc.rb_aligned = din.dccKeyFlags.rbAligned;
1837 surf->u.gfx9.color.dcc.pipe_aligned = din.dccKeyFlags.pipeAligned;
1838 surf->u.gfx9.color.dcc_block_width = dout.compressBlkWidth;
1839 surf->u.gfx9.color.dcc_block_height = dout.compressBlkHeight;
1840 surf->u.gfx9.color.dcc_block_depth = dout.compressBlkDepth;
1841 surf->u.gfx9.color.dcc_pitch_max = dout.pitch - 1;
1842 surf->u.gfx9.color.dcc_height = dout.height;
1871 surf->u.gfx9.meta_levels[i].offset = meta_mip_info[i].offset;
1872 surf->u.gfx9.meta_levels[i].size = meta_mip_info[i].sliceSize;
1878 * TODO: Try to do the same thing for gfx9
1892 surf->u.gfx9.color.display_dcc_size = surf->meta_size;
1893 surf->u.gfx9.color.display_dcc_alignment_log2 = surf->meta_alignment_log2;
1894 surf->u.gfx9.color.display_dcc_pitch_max = surf->u.gfx9.color.dcc_pitch_max;
1895 surf->u.gfx9.color.display_dcc_height = surf->u.gfx9.color.dcc_height;
1898 ac_copy_dcc_equation(info, &dout, &surf->u.gfx9.color.dcc_equation);
1911 assert(surf->u.gfx9.color.dcc.pipe_aligned || surf->u.gfx9.color.dcc.rb_aligned);
1917 surf->u.gfx9.color.display_dcc_size = dout.dccRamSize;
1918 surf->u.gfx9.color.display_dcc_alignment_log2 = util_logbase2(dout.dccRamBaseAlign);
1919 surf->u.gfx9.color.display_dcc_pitch_max = dout.pitch - 1;
1920 surf->u.gfx9.color.display_dcc_height = dout.height;
1921 assert(surf->u.gfx9.color.display_dcc_size <= surf->meta_size);
1923 ac_copy_dcc_equation(info, &dout, &surf->u.gfx9.color.display_dcc_equation);
1924 surf->u.gfx9.color.dcc.display_equation_valid = true;
1950 surf->u.gfx9.color.fmask_swizzle_mode = fin.swizzleMode;
1951 surf->u.gfx9.color.fmask_epitch = fout.pitch - 1;
2009 cin.swizzleMode = surf->u.gfx9.color.fmask_swizzle_mode;
2022 surf->u.gfx9.color.cmask_level0.offset = meta_mip_info[0].offset;
2023 surf->u.gfx9.color.cmask_level0.size = meta_mip_info[0].sliceSize;
2025 ac_copy_cmask_equation(info, &cout, &surf->u.gfx9.color.cmask_equation);
2136 surf->u.gfx9.color.dcc.independent_64B_blocks = 1;
2137 surf->u.gfx9.color.dcc.independent_128B_blocks = 0;
2138 surf->u.gfx9.color.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
2140 surf->u.gfx9.color.dcc.independent_64B_blocks = 0;
2141 surf->u.gfx9.color.dcc.independent_128B_blocks = 1;
2142 surf->u.gfx9.color.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_128B;
2167 surf->u.gfx9.color.dcc.independent_64B_blocks = 1;
2168 surf->u.gfx9.color.dcc.independent_128B_blocks = 0;
2169 surf->u.gfx9.color.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
2179 surf->u.gfx9.color.dcc.independent_64B_blocks = 1;
2180 surf->u.gfx9.color.dcc.independent_128B_blocks = 1;
2181 surf->u.gfx9.color.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
2199 AddrSurfInfoIn.swizzleMode = surf->u.gfx9.swizzle_mode;
2222 surf->u.gfx9.resource_type = AddrSurfInfoIn.resourceType;
2230 surf->u.gfx9.surf_offset = 0;
2232 surf->u.gfx9.zs.stencil_offset = 0;
2264 surf->is_linear = surf->u.gfx9.swizzle_mode == ADDR_SW_LINEAR;
2270 r = Addr2IsValidDisplaySwizzleMode(addrlib->handle, surf->u.gfx9.swizzle_mode,
2278 (!is_dcc_supported_by_DCN(info, config, surf, surf->u.gfx9.color.dcc.rb_aligned,
2279 surf->u.gfx9.color.dcc.pipe_aligned) ||
2281 (info->use_display_dcc_with_retile_blit && !surf->u.gfx9.color.dcc.display_equation_valid)))
2293 assert(is_dcc_supported_by_CB(info, surf->u.gfx9.swizzle_mode));
2295 assert(is_dcc_supported_by_DCN(info, config, surf, surf->u.gfx9.color.dcc.rb_aligned,
2296 surf->u.gfx9.color.dcc.pipe_aligned));
2307 is_dcc_supported_by_DCN(info, config, surf, surf->u.gfx9.color.dcc.rb_aligned,
2308 surf->u.gfx9.color.dcc.pipe_aligned)) {
2325 switch (surf->u.gfx9.swizzle_mode) {
2347 /* R = rotated (gfx9), render target (gfx10). */
2357 * in gfx9.
2430 surf->u.gfx9.color.dcc.display_equation_valid) {
2432 surf->display_dcc_offset = align64(surf->total_size, 1 << surf->u.gfx9.color.display_dcc_alignment_log2);
2433 surf->total_size = surf->display_dcc_offset + surf->u.gfx9.color.display_dcc_size;
2518 surf->u.gfx9.swizzle_mode = AMDGPU_TILING_GET(tiling_flags, SWIZZLE_MODE);
2519 surf->u.gfx9.color.dcc.independent_64B_blocks =
2521 surf->u.gfx9.color.dcc.independent_128B_blocks =
2523 surf->u.gfx9.color.dcc.max_compressed_block_size =
2525 surf->u.gfx9.color.display_dcc_pitch_max = AMDGPU_TILING_GET(tiling_flags, DCC_PITCH_MAX);
2528 surf->u.gfx9.swizzle_mode > 0 ? RADEON_SURF_MODE_2D : RADEON_SURF_MODE_LINEAR_ALIGNED;
2565 *tiling_flags |= AMDGPU_TILING_SET(SWIZZLE_MODE, surf->u.gfx9.swizzle_mode);
2567 *tiling_flags |= AMDGPU_TILING_SET(DCC_PITCH_MAX, surf->u.gfx9.color.display_dcc_pitch_max);
2569 AMDGPU_TILING_SET(DCC_INDEPENDENT_64B, surf->u.gfx9.color.dcc.independent_64B_blocks);
2571 AMDGPU_TILING_SET(DCC_INDEPENDENT_128B, surf->u.gfx9.color.dcc.independent_128B_blocks);
2573 surf->u.gfx9.color.dcc.max_compressed_block_size);
2616 offset = surf->u.gfx9.surf_offset;
2667 surf->u.gfx9.color.dcc.pipe_aligned = G_008F24_META_PIPE_ALIGNED(desc[5]);
2668 surf->u.gfx9.color.dcc.rb_aligned = G_008F24_META_RB_ALIGNED(desc[5]);
2671 if (!surf->u.gfx9.color.dcc.pipe_aligned && !surf->u.gfx9.color.dcc.rb_aligned)
2679 surf->u.gfx9.color.dcc.pipe_aligned = G_00A018_META_PIPE_ALIGNED(desc[6]);
2756 if (surf->u.gfx9.swizzle_mode == ADDR_SW_LINEAR)
2759 if (surf->u.gfx9.resource_type == RADEON_RESOURCE_3D)
2763 switch(surf->u.gfx9.swizzle_mode & ~3) {
2794 if (surf->u.gfx9.surf_pitch != pitch && require_equal_pitch)
2800 if (pitch != surf->u.gfx9.surf_pitch) {
2801 unsigned slices = surf->surf_size / surf->u.gfx9.surf_slice_size;
2803 surf->u.gfx9.surf_pitch = pitch;
2804 surf->u.gfx9.epitch = pitch - 1;
2805 surf->u.gfx9.surf_slice_size = (uint64_t)pitch * surf->u.gfx9.surf_height * surf->bpe;
2806 surf->total_size = surf->surf_size = surf->u.gfx9.surf_slice_size * slices;
2809 surf->u.gfx9.surf_offset = offset;
2810 if (surf->u.gfx9.zs.stencil_offset)
2811 surf->u.gfx9.zs.stencil_offset += offset;
2862 return surf->u.gfx9.surf_offset +
2863 layer * surf->u.gfx9.surf_slice_size;
2887 return surf->u.gfx9.surf_pitch * surf->bpe;
2893 surf->u.gfx9.color.display_dcc_pitch_max : surf->u.gfx9.color.dcc_pitch_max);
2895 return surf->u.gfx9.color.dcc_pitch_max + 1;
2909 surf->u.gfx9.color.display_dcc_size : surf->meta_size;
2925 surf->surf_size, surf->u.gfx9.surf_slice_size,
2926 1 << surf->surf_alignment_log2, surf->u.gfx9.swizzle_mode,
2927 surf->u.gfx9.epitch, surf->u.gfx9.surf_pitch,
2935 1 << surf->fmask_alignment_log2, surf->u.gfx9.color.fmask_swizzle_mode,
2936 surf->u.gfx9.color.fmask_epitch);
2956 surf->u.gfx9.color.display_dcc_pitch_max, surf->num_meta_levels);
2961 surf->u.gfx9.zs.stencil_offset,
2962 surf->u.gfx9.zs.stencil_swizzle_mode,
2963 surf->u.gfx9.zs.stencil_epitch);
3086 unsigned numPipeBits = equation->u.gfx9.num_pipe_bits;
3100 unsigned num_bits = equation->u.gfx9.num_bits;
3108 if (equation->u.gfx9.bit[i].coord[c].dim >= 5)
3111 assert(equation->u.gfx9.bit[i].coord[c].ord < 32);
3113 nir_iand(b, nir_ushr_imm(b, coords[equation->u.gfx9.bit[i].coord[c].dim],
3114 equation->u.gfx9.bit[i].coord[c].ord), one);
3125 equation->u.gfx9.bit[last].coord[0].ord),