Lines Matching defs:by
65 by the chip and are present in LLVM. AMD devs however highly recommend avoiding
124 was also confirmed by AMD devs.
170 When this happens, any store performed by a VS is not guaranteed
193 ### VINTRP followed by a read with `v_readfirstlane` or `v_readlane`
196 followed by a read with `v_readfirstlane` or `v_readlane` to fix GPU hangs on GFX6.
202 ### SMEM store followed by a load with the same address
205 by an `s_buffer_store` with the same address. Inserting an `s_nop` between them
207 This is not mentioned by LLVM among the other GFX10 bugs, but LLVM doesn't use
212 Triggered by:
216 Mitigated by:
221 Triggered by:
224 Mitigated by:
253 Triggered by:
255 Confirmed by AMD devs that despite the name, this doesn't only affect v_cmpx.
257 Mitigated by: any VALU instruction except `v_nop`.
261 Triggered by:
264 Mitigated by:
271 Triggered by:
275 Mitigated by: