Cross Reference: /xsrc/external/mit/MesaLib/dist/src/amd/compiler/aco

Lines Matching refs:physReg
69       if (instr->operands[3 + i].physReg() != instr->operands[3].physReg().advance(i * 4))
114       encoding |= !instr->definitions.empty() ? instr->definitions[0].physReg() << 16 : 0;
115       encoding |= instr->operands.size() >= 2 ? instr->operands[1].physReg() << 8 : 0;
116       encoding |= !instr->operands.empty() ? instr->operands[0].physReg() : 0;
139       encoding |= !instr->definitions.empty() && !(instr->definitions[0].physReg() == scc)
140                      ? instr->definitions[0].physReg() << 16
141                   : !instr->operands.empty() && instr->operands[0].physReg() <= 127
142                      ? instr->operands[0].physReg() << 16
154       encoding |= !instr->definitions.empty() ? instr->definitions[0].physReg() << 16 : 0;
156       encoding |= !instr->operands.empty() ? instr->operands[0].physReg() : 0;
163       encoding |= instr->operands.size() == 2 ? instr->operands[1].physReg() << 8 : 0;
164       encoding |= !instr->operands.empty() ? instr->operands[0].physReg() : 0;
189          encoding |= instr->definitions.size() ? instr->definitions[0].physReg() << 15 : 0;
190          encoding |= instr->operands.size() ? (instr->operands[0].physReg() >> 1) << 9 : 0;
193                encoding |= instr->operands[1].physReg().reg();
231          encoding |= (is_load ? instr->definitions[0].physReg() : instr->operands[2].physReg())
235          encoding |= instr->operands[0].physReg() >> 1;
249             offset = op_off1.isConstant() ? op_off1.constantValue() : op_off1.physReg();
256                soffset = op_off1.physReg();
266             soffset = op_off2.physReg();
278       encoding |= (0xFF & instr->definitions[0].physReg()) << 17;
279       encoding |= (0xFF & instr->operands[1].physReg()) << 9;
280       encoding |= instr->operands[0].physReg();
287          encoding |= (0xFF & instr->definitions[0].physReg()) << 17;
290          encoding |= instr->operands[0].physReg();
297       encoding |= (0xFF & instr->operands[1].physReg()) << 9;
298       encoding |= instr->operands[0].physReg();
319          encoding |= (0xFF & instr->definitions[0].physReg());
325          encoding |= instr->operands[0].physReg() << 9;
329             encoding |= instr->operands[2].physReg() << 18;
340          encoding |= (0xFF & instr->definitions[0].physReg()) << 18;
347             encoding |= (0xFF & instr->operands[0].physReg());
366       unsigned reg = !instr->definitions.empty() ? instr->definitions[0].physReg() : 0;
368       reg = instr->operands.size() >= 3 && !(instr->operands[2].physReg() == m0)
369                ? instr->operands[2].physReg()
372       reg = instr->operands.size() >= 2 && !(instr->operands[1].physReg() == m0)
373                ? instr->operands[1].physReg()
376       encoding |= (0xFF & instr->operands[0].physReg());
403       encoding |= instr->operands[2].physReg() << 24;
405       encoding |= (instr->operands[0].physReg() >> 2) << 16;
406       unsigned reg = instr->operands.size() > 3 ? instr->operands[3].physReg()
407                                                 : instr->definitions[0].physReg();
409       encoding |= (0xFF & instr->operands[1].physReg());
436       encoding |= instr->operands[2].physReg() << 24;
439       encoding |= (instr->operands[0].physReg() >> 2) << 16;
440       unsigned reg = instr->operands.size() > 3 ? instr->operands[3].physReg()
441                                                 : instr->definitions[0].physReg();
443       encoding |= (0xFF & instr->operands[1].physReg());
479       encoding = (0xFF & instr->operands[3].physReg()); /* VADDR */
481          encoding |= (0xFF & instr->definitions[0].physReg()) << 8; /* VDATA */
483          encoding |= (0xFF & instr->operands[2].physReg()) << 8; /* VDATA */
485       encoding |= (0x1F & (instr->operands[0].physReg() >> 2)) << 16; /* T# (resource) */
487          encoding |= (0x1F & (instr->operands[1].physReg() >> 2)) << 21; /* sampler */
502             nsa[i / 4] |= (0xFF & instr->operands[4 + i].physReg().reg()) << (i % 4 * 8);
538       encoding = (0xFF & instr->operands[0].physReg());
540          encoding |= (0xFF & instr->definitions[0].physReg()) << 24;
542          encoding |= (0xFF & instr->operands[2].physReg()) << 8;
544          assert(ctx.chip_class >= GFX10 || instr->operands[1].physReg() != 0x7F);
546          encoding |= instr->operands[1].physReg() << 16;
573       encoding = 0xFF & exp.operands[0].physReg();
574       encoding |= (0xFF & exp.operands[1].physReg()) << 8;
575       encoding |= (0xFF & exp.operands[2].physReg()) << 16;
576       encoding |= (0xFF & exp.operands[3].physReg()) << 24;
622             encoding |= instr->definitions[1].physReg() << 8;
623          encoding |= (0xFF & instr->definitions[0].physReg());
629             encoding |= instr->operands[0].physReg() << 0;
630             encoding |= instr->operands[1].physReg() << 9;
634                encoding |= instr->operands[i].physReg() << (i * 9);
659          encoding |= (0xFF & instr->definitions[0].physReg());
663             encoding |= instr->operands[i].physReg() << (i * 9);
688          encoding |= (0xFF) & dpp_op.physReg();
703             if (instr->definitions[0].physReg() != vcc) {
704                encoding |= instr->definitions[0].physReg() << 8;
709             encoding |= sdwa.dst_sel.to_sdwa_sel(instr->definitions[0].physReg().byte()) << 8;
718          encoding |= sdwa.sel[0].to_sdwa_sel(sdwa_op.physReg().byte()) << 16;
724             encoding |= sdwa.sel[1].to_sdwa_sel(instr->operands[1].physReg().byte()) << 24;
730          encoding |= 0xFF & sdwa_op.physReg();
731          encoding |= (sdwa_op.physReg() < 256) << 23;
733             encoding |= (instr->operands[1].physReg() < 256) << 31;
791          } else if ((*it)->definitions.size() && (*it)->definitions[0].physReg() == exec)
871    Definition def_tmp_lo(branch->definitions[0].physReg(), s1);
872    Operand op_tmp_lo(branch->definitions[0].physReg(), s1);
873    Definition def_tmp_hi(branch->definitions[0].physReg().advance(4), s1);
874    Operand op_tmp_hi(branch->definitions[0].physReg().advance(4), s1);
916       bld.sop1(aco_opcode::s_setpc_b64, Operand(branch->definitions[0].physReg(), s2)).instr);