Lines Matching refs:name
5 {"name": "ARRAY_LINEAR_GENERAL", "value": 0},
6 {"name": "ARRAY_LINEAR_ALIGNED", "value": 1},
7 {"name": "ARRAY_1D_TILED_THIN1", "value": 2},
8 {"name": "ARRAY_1D_TILED_THICK", "value": 3},
9 {"name": "ARRAY_2D_TILED_THIN1", "value": 4},
10 {"name": "ARRAY_PRT_TILED_THIN1", "value": 5},
11 {"name": "ARRAY_PRT_2D_TILED_THIN1", "value": 6},
12 {"name": "ARRAY_2D_TILED_THICK", "value": 7},
13 {"name": "ARRAY_2D_TILED_XTHICK", "value": 8},
14 {"name": "ARRAY_PRT_TILED_THICK", "value": 9},
15 {"name": "ARRAY_PRT_2D_TILED_THICK", "value": 10},
16 {"name": "ARRAY_PRT_3D_TILED_THIN1", "value": 11},
17 {"name": "ARRAY_3D_TILED_THIN1", "value": 12},
18 {"name": "ARRAY_3D_TILED_THICK", "value": 13},
19 {"name": "ARRAY_3D_TILED_XTHICK", "value": 14},
20 {"name": "ARRAY_PRT_3D_TILED_THICK", "value": 15}
25 {"name": "BUF_DATA_FORMAT_INVALID", "value": 0},
26 {"name": "BUF_DATA_FORMAT_8", "value": 1},
27 {"name": "BUF_DATA_FORMAT_16", "value": 2},
28 {"name": "BUF_DATA_FORMAT_8_8", "value": 3},
29 {"name": "BUF_DATA_FORMAT_32", "value": 4},
30 {"name": "BUF_DATA_FORMAT_16_16", "value": 5},
31 {"name": "BUF_DATA_FORMAT_10_11_11", "value": 6},
32 {"name": "BUF_DATA_FORMAT_11_11_10", "value": 7},
33 {"name": "BUF_DATA_FORMAT_10_10_10_2", "value": 8},
34 {"name": "BUF_DATA_FORMAT_2_10_10_10", "value": 9},
35 {"name": "BUF_DATA_FORMAT_8_8_8_8", "value": 10},
36 {"name": "BUF_DATA_FORMAT_32_32", "value": 11},
37 {"name": "BUF_DATA_FORMAT_16_16_16_16", "value": 12},
38 {"name": "BUF_DATA_FORMAT_32_32_32", "value": 13},
39 {"name": "BUF_DATA_FORMAT_32_32_32_32", "value": 14},
40 {"name": "BUF_DATA_FORMAT_RESERVED_15", "value": 15}
45 {"name": "BUF_NUM_FORMAT_UNORM", "value": 0},
46 {"name": "BUF_NUM_FORMAT_SNORM", "value": 1},
47 {"name": "BUF_NUM_FORMAT_USCALED", "value": 2},
48 {"name": "BUF_NUM_FORMAT_SSCALED", "value": 3},
49 {"name": "BUF_NUM_FORMAT_UINT", "value": 4},
50 {"name": "BUF_NUM_FORMAT_SINT", "value": 5},
51 {"name": "BUF_NUM_FORMAT_UNORM_UINT", "value": 6},
52 {"name": "BUF_NUM_FORMAT_FLOAT", "value": 7}
57 {"name": "ADDR_SURF_BANK_HEIGHT_1", "value": 0},
58 {"name": "ADDR_SURF_BANK_HEIGHT_2", "value": 1},
59 {"name": "ADDR_SURF_BANK_HEIGHT_4", "value": 2},
60 {"name": "ADDR_SURF_BANK_HEIGHT_8", "value": 3}
65 {"name": "ADDR_SURF_BANK_WIDTH_1", "value": 0},
66 {"name": "ADDR_SURF_BANK_WIDTH_2", "value": 1},
67 {"name": "ADDR_SURF_BANK_WIDTH_4", "value": 2},
68 {"name": "ADDR_SURF_BANK_WIDTH_8", "value": 3}
73 {"name": "BINNING_ALLOWED", "value": 0},
74 {"name": "FORCE_BINNING_ON", "value": 1},
75 {"name": "DISABLE_BINNING_USE_NEW_SC", "value": 2},
76 {"name": "DISABLE_BINNING_USE_LEGACY_SC", "value": 3}
81 {"name": "BLEND_ZERO", "value": 0},
82 {"name": "BLEND_ONE", "value": 1},
83 {"name": "BLEND_SRC_COLOR", "value": 2},
84 {"name": "BLEND_ONE_MINUS_SRC_COLOR", "value": 3},
85 {"name": "BLEND_SRC_ALPHA", "value": 4},
86 {"name": "BLEND_ONE_MINUS_SRC_ALPHA", "value": 5},
87 {"name": "BLEND_DST_ALPHA", "value": 6},
88 {"name": "BLEND_ONE_MINUS_DST_ALPHA", "value": 7},
89 {"name": "BLEND_DST_COLOR", "value": 8},
90 {"name": "BLEND_ONE_MINUS_DST_COLOR", "value": 9},
91 {"name": "BLEND_SRC_ALPHA_SATURATE", "value": 10},
92 {"name": "BLEND_BOTH_SRC_ALPHA", "value": 11},
93 {"name": "BLEND_BOTH_INV_SRC_ALPHA", "value": 12},
94 {"name": "BLEND_CONSTANT_COLOR", "value": 13},
95 {"name": "BLEND_ONE_MINUS_CONSTANT_COLOR", "value": 14},
96 {"name": "BLEND_SRC1_COLOR", "value": 15},
97 {"name": "BLEND_INV_SRC1_COLOR", "value": 16},
98 {"name": "BLEND_SRC1_ALPHA", "value": 17},
99 {"name": "BLEND_INV_SRC1_ALPHA", "value": 18},
100 {"name": "BLEND_CONSTANT_ALPHA", "value": 19},
101 {"name": "BLEND_ONE_MINUS_CONSTANT_ALPHA", "value": 20}
106 {"name": "FORCE_OPT_AUTO", "value": 0},
107 {"name": "FORCE_OPT_DISABLE", "value": 1},
108 {"name": "FORCE_OPT_ENABLE_IF_SRC_A_0", "value": 2},
109 {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_0", "value": 3},
110 {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_0", "value": 4},
111 {"name": "FORCE_OPT_ENABLE_IF_SRC_A_1", "value": 5},
112 {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_1", "value": 6},
113 {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_1", "value": 7}
118 {"name": "CB_DISABLE", "value": 0},
119 {"name": "CB_NORMAL", "value": 1},
120 {"name": "CB_ELIMINATE_FAST_CLEAR", "value": 2},
121 {"name": "CB_RESOLVE", "value": 3},
122 {"name": "CB_DECOMPRESS", "value": 4},
123 {"name": "CB_FMASK_DECOMPRESS", "value": 5},
124 {"name": "CB_DCC_DECOMPRESS", "value": 6}
129 {"name": "CB_PERF_CLEAR_FILTER_SEL_NONCLEAR", "value": 0},
130 {"name": "CB_PERF_CLEAR_FILTER_SEL_CLEAR", "value": 1}
135 {"name": "CB_PERF_OP_FILTER_SEL_WRITE_ONLY", "value": 0},
136 {"name": "CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION", "value": 1},
137 {"name": "CB_PERF_OP_FILTER_SEL_RESOLVE", "value": 2},
138 {"name": "CB_PERF_OP_FILTER_SEL_DECOMPRESS", "value": 3},
139 {"name": "CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS", "value": 4},
140 {"name": "CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR", "value": 5}
145 {"name": "MAX_BLOCK_SIZE_64B", "value": 0},
146 {"name": "MAX_BLOCK_SIZE_128B", "value": 1},
147 {"name": "MAX_BLOCK_SIZE_256B", "value": 2}
152 {"name": "MIN_BLOCK_SIZE_32B", "value": 0},
153 {"name": "MIN_BLOCK_SIZE_64B", "value": 1}
158 {"name": "OUT", "value": 1},
159 {"name": "IN_0", "value": 2},
160 {"name": "IN_1", "value": 4},
161 {"name": "IN_10", "value": 8},
162 {"name": "IN_2", "value": 16},
163 {"name": "IN_20", "value": 32},
164 {"name": "IN_21", "value": 64},
165 {"name": "IN_210", "value": 128},
166 {"name": "IN_3", "value": 256},
167 {"name": "IN_30", "value": 512},
168 {"name": "IN_31", "value": 1024},
169 {"name": "IN_310", "value": 2048},
170 {"name": "IN_32", "value": 4096},
171 {"name": "IN_320", "value": 8192},
172 {"name": "IN_321", "value": 16384},
173 {"name": "IN_3210", "value": 32768}
178 {"name": "CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT", "value": 0},
179 {"name": "CP_PERFMON_ENABLE_MODE_RESERVED_1", "value": 1},
180 {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE", "value": 2},
181 {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE", "value": 3}
186 {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
187 {"name": "CP_PERFMON_STATE_START_COUNTING", "value": 1},
188 {"name": "CP_PERFMON_STATE_STOP_COUNTING", "value": 2},
189 {"name": "CP_PERFMON_STATE_RESERVED_3", "value": 3},
190 {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
191 {"name": "CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
196 {"name": "CMASK_ADDR_TILED", "value": 0},
197 {"name": "CMASK_ADDR_LINEAR", "value": 1},
198 {"name": "CMASK_ADDR_COMPATIBLE", "value": 2}
203 {"name": "COLOR_INVALID", "value": 0},
204 {"name": "COLOR_8", "value": 1},
205 {"name": "COLOR_16", "value": 2},
206 {"name": "COLOR_8_8", "value": 3},
207 {"name": "COLOR_32", "value": 4},
208 {"name": "COLOR_16_16", "value": 5},
209 {"name": "COLOR_10_11_11", "value": 6},
210 {"name": "COLOR_11_11_10", "value": 7},
211 {"name": "COLOR_10_10_10_2", "value": 8},
212 {"name": "COLOR_2_10_10_10", "value": 9},
213 {"name": "COLOR_8_8_8_8", "value": 10},
214 {"name": "COLOR_32_32", "value": 11},
215 {"name": "COLOR_16_16_16_16", "value": 12},
216 {"name": "COLOR_RESERVED_13", "value": 13},
217 {"name": "COLOR_32_32_32_32", "value": 14},
218 {"name": "COLOR_RESERVED_15", "value": 15},
219 {"name": "COLOR_5_6_5", "value": 16},
220 {"name": "COLOR_1_5_5_5", "value": 17},
221 {"name": "COLOR_5_5_5_1", "value": 18},
222 {"name": "COLOR_4_4_4_4", "value": 19},
223 {"name": "COLOR_8_24", "value": 20},
224 {"name": "COLOR_24_8", "value": 21},
225 {"name": "COLOR_X24_8_32_FLOAT", "value": 22},
226 {"name": "COLOR_RESERVED_23", "value": 23},
227 {"name": "COLOR_RESERVED_24", "value": 24},
228 {"name": "COLOR_RESERVED_25", "value": 25},
229 {"name": "COLOR_RESERVED_26", "value": 26},
230 {"name": "COLOR_RESERVED_27", "value": 27},
231 {"name": "COLOR_RESERVED_28", "value": 28},
232 {"name": "COLOR_RESERVED_29", "value": 29},
233 {"name": "COLOR_RESERVED_30", "value": 30},
234 {"name": "COLOR_2_10_10_10_6E4", "value": 31}
239 {"name": "COMB_DST_PLUS_SRC", "value": 0},
240 {"name": "COMB_SRC_MINUS_DST", "value": 1},
241 {"name": "COMB_MIN_DST_SRC", "value": 2},
242 {"name": "COMB_MAX_DST_SRC", "value": 3},
243 {"name": "COMB_DST_MINUS_SRC", "value": 4}
248 {"name": "FRAG_NEVER", "value": 0},
249 {"name": "FRAG_LESS", "value": 1},
250 {"name": "FRAG_EQUAL", "value": 2},
251 {"name": "FRAG_LEQUAL", "value": 3},
252 {"name": "FRAG_GREATER", "value": 4},
253 {"name": "FRAG_NOTEQUAL", "value": 5},
254 {"name": "FRAG_GEQUAL", "value": 6},
255 {"name": "FRAG_ALWAYS", "value": 7}
260 {"name": "EXPORT_ANY_Z", "value": 0},
261 {"name": "EXPORT_LESS_THAN_Z", "value": 1},
262 {"name": "EXPORT_GREATER_THAN_Z", "value": 2},
263 {"name": "EXPORT_RESERVED", "value": 3}
268 {"name": "INPUT_COVERAGE", "value": 0},
269 {"name": "INPUT_INNER_COVERAGE", "value": 1},
270 {"name": "INPUT_DEPTH_COVERAGE", "value": 2},
271 {"name": "RAW", "value": 3}
276 {"name": "AUTO", "value": 0},
277 {"name": "FORCE_ON", "value": 1},
278 {"name": "FORCE_OFF", "value": 2},
279 {"name": "RESERVED", "value": 3}
284 {"name": "FAULT_ZERO", "value": 0},
285 {"name": "FAULT_ONE", "value": 1},
286 {"name": "FAULT_FAIL", "value": 2},
287 {"name": "FAULT_PASS", "value": 3}
292 {"name": "PSLC_AUTO", "value": 0},
293 {"name": "PSLC_ON_HANG_ONLY", "value": 1},
294 {"name": "PSLC_ASAP", "value": 2},
295 {"name": "PSLC_COUNTDOWN", "value": 3}
300 {"name": "INVALID", "value": 1},
301 {"name": "INPUT_DENORMAL", "value": 2},
302 {"name": "DIVIDE_BY_ZERO", "value": 4},
303 {"name": "OVERFLOW", "value": 8},
304 {"name": "UNDERFLOW", "value": 16},
305 {"name": "INEXACT", "value": 32},
306 {"name": "INT_DIVIDE_BY_ZERO", "value": 64},
307 {"name": "ADDRESS_WATCH", "value": 128},
308 {"name": "MEMORY_VIOLATION", "value": 256}
313 {"name": "FP_32_DENORMS", "value": 48},
314 {"name": "FP_64_DENORMS", "value": 192},
315 {"name": "FP_ALL_DENORMS", "value": 240}
320 {"name": "FORCE_OFF", "value": 0},
321 {"name": "FORCE_ENABLE", "value": 1},
322 {"name": "FORCE_DISABLE", "value": 2},
323 {"name": "FORCE_RESERVED", "value": 3}
328 {"name": "IMG_DATA_FORMAT_INVALID", "value": 0},
329 {"name": "IMG_DATA_FORMAT_8", "value": 1},
330 {"name": "IMG_DATA_FORMAT_16", "value": 2},
331 {"name": "IMG_DATA_FORMAT_8_8", "value": 3},
332 {"name": "IMG_DATA_FORMAT_32", "value": 4},
333 {"name": "IMG_DATA_FORMAT_16_16", "value": 5},
334 {"name": "IMG_DATA_FORMAT_10_11_11", "value": 6},
335 {"name": "IMG_DATA_FORMAT_11_11_10", "value": 7},
336 {"name": "IMG_DATA_FORMAT_10_10_10_2", "value": 8},
337 {"name": "IMG_DATA_FORMAT_2_10_10_10", "value": 9},
338 {"name": "IMG_DATA_FORMAT_8_8_8_8", "value": 10},
339 {"name": "IMG_DATA_FORMAT_32_32", "value": 11},
340 {"name": "IMG_DATA_FORMAT_16_16_16_16", "value": 12},
341 {"name": "IMG_DATA_FORMAT_32_32_32", "value": 13},
342 {"name": "IMG_DATA_FORMAT_32_32_32_32", "value": 14},
343 {"name": "IMG_DATA_FORMAT_RESERVED_15", "value": 15},
344 {"name": "IMG_DATA_FORMAT_5_6_5", "value": 16},
345 {"name": "IMG_DATA_FORMAT_1_5_5_5", "value": 17},
346 {"name": "IMG_DATA_FORMAT_5_5_5_1", "value": 18},
347 {"name": "IMG_DATA_FORMAT_4_4_4_4", "value": 19},
348 {"name": "IMG_DATA_FORMAT_8_24", "value": 20},
349 {"name": "IMG_DATA_FORMAT_24_8", "value": 21},
350 {"name": "IMG_DATA_FORMAT_X24_8_32", "value": 22},
351 {"name": "IMG_DATA_FORMAT_8_AS_8_8_8_8", "value": 23},
352 {"name": "IMG_DATA_FORMAT_ETC2_RGB", "value": 24},
353 {"name": "IMG_DATA_FORMAT_ETC2_RGBA", "value": 25},
354 {"name": "IMG_DATA_FORMAT_ETC2_R", "value": 26},
355 {"name": "IMG_DATA_FORMAT_ETC2_RG", "value": 27},
356 {"name": "IMG_DATA_FORMAT_ETC2_RGBA1", "value": 28},
357 {"name": "IMG_DATA_FORMAT_RESERVED_29", "value": 29},
358 {"name": "IMG_DATA_FORMAT_RESERVED_30", "value": 30},
359 {"name": "IMG_DATA_FORMAT_6E4", "value": 31},
360 {"name": "IMG_DATA_FORMAT_GB_GR", "value": 32},
361 {"name": "IMG_DATA_FORMAT_BG_RG", "value": 33},
362 {"name": "IMG_DATA_FORMAT_5_9_9_9", "value": 34},
363 {"name": "IMG_DATA_FORMAT_BC1", "value": 35},
364 {"name": "IMG_DATA_FORMAT_BC2", "value": 36},
365 {"name": "IMG_DATA_FORMAT_BC3", "value": 37},
366 {"name": "IMG_DATA_FORMAT_BC4", "value": 38},
367 {"name": "IMG_DATA_FORMAT_BC5", "value": 39},
368 {"name": "IMG_DATA_FORMAT_BC6", "value": 40},
369 {"name": "IMG_DATA_FORMAT_BC7", "value": 41},
370 {"name": "IMG_DATA_FORMAT_16_AS_32_32", "value": 42},
371 {"name": "IMG_DATA_FORMAT_16_AS_16_16_16_16", "value": 43},
372 {"name": "IMG_DATA_FORMAT_16_AS_32_32_32_32", "value": 44},
373 {"name": "IMG_DATA_FORMAT_FMASK", "value": 45},
374 {"name": "IMG_DATA_FORMAT_ASTC_2D_LDR", "value": 46},
375 {"name": "IMG_DATA_FORMAT_ASTC_2D_HDR", "value": 47},
376 {"name": "IMG_DATA_FORMAT_ASTC_2D_LDR_SRGB", "value": 48},
377 {"name": "IMG_DATA_FORMAT_ASTC_3D_LDR", "value": 49},
378 {"name": "IMG_DATA_FORMAT_ASTC_3D_HDR", "value": 50},
379 {"name": "IMG_DATA_FORMAT_ASTC_3D_LDR_SRGB", "value": 51},
380 {"name": "IMG_DATA_FORMAT_N_IN_16", "value": 52},
381 {"name": "IMG_DATA_FORMAT_N_IN_16_16", "value": 53},
382 {"name": "IMG_DATA_FORMAT_N_IN_16_16_16_16", "value": 54},
383 {"name": "IMG_DATA_FORMAT_N_IN_16_AS_16_16_16_16", "value": 55},
384 {"name": "IMG_DATA_FORMAT_RESERVED_56", "value": 56},
385 {"name": "IMG_DATA_FORMAT_4_4", "value": 57},
386 {"name": "IMG_DATA_FORMAT_6_5_5", "value": 58},
387 {"name": "IMG_DATA_FORMAT_RESERVED_59", "value": 59},
388 {"name": "IMG_DATA_FORMAT_RESERVED_60", "value": 60},
389 {"name": "IMG_DATA_FORMAT_8_AS_32", "value": 61},
390 {"name": "IMG_DATA_FORMAT_8_AS_32_32", "value": 62},
391 {"name": "IMG_DATA_FORMAT_32_AS_32_32_32_32", "value": 63}
396 {"name": "IMG_DATA_FORMAT_S8_16", "value": 59},
397 {"name": "IMG_DATA_FORMAT_S8_32", "value": 60}
402 {"name": "IMG_NUM_FORMAT_UNORM", "value": 0},
403 {"name": "IMG_NUM_FORMAT_SNORM", "value": 1},
404 {"name": "IMG_NUM_FORMAT_USCALED", "value": 2},
405 {"name": "IMG_NUM_FORMAT_SSCALED", "value": 3},
406 {"name": "IMG_NUM_FORMAT_UINT", "value": 4},
407 {"name": "IMG_NUM_FORMAT_SINT", "value": 5},
408 {"name": "IMG_NUM_FORMAT_UNORM_UINT", "value": 6},
409 {"name": "IMG_NUM_FORMAT_FLOAT", "value": 7},
410 {"name": "IMG_NUM_FORMAT_RESERVED_8", "value": 8},
411 {"name": "IMG_NUM_FORMAT_SRGB", "value": 9},
412 {"name": "IMG_NUM_FORMAT_RESERVED_10", "value": 10},
413 {"name": "IMG_NUM_FORMAT_RESERVED_11", "value": 11},
414 {"name": "IMG_NUM_FORMAT_RESERVED_12", "value": 12},
415 {"name": "IMG_NUM_FORMAT_RESERVED_13", "value": 13},
416 {"name": "IMG_NUM_FORMAT_RESERVED_14", "value": 14},
417 {"name": "IMG_NUM_FORMAT_RESERVED_15", "value": 15}
422 {"name": "IMG_NUM_FORMAT_FMASK_8_2_1", "value": 0},
423 {"name": "IMG_NUM_FORMAT_FMASK_8_4_1", "value": 1},
424 {"name": "IMG_NUM_FORMAT_FMASK_8_8_1", "value": 2},
425 {"name": "IMG_NUM_FORMAT_FMASK_8_2_2", "value": 3},
426 {"name": "IMG_NUM_FORMAT_FMASK_8_4_2", "value": 4},
427 {"name": "IMG_NUM_FORMAT_FMASK_8_4_4", "value": 5},
428 {"name": "IMG_NUM_FORMAT_FMASK_16_16_1", "value": 6},
429 {"name": "IMG_NUM_FORMAT_FMASK_16_8_2", "value": 7},
430 {"name": "IMG_NUM_FORMAT_FMASK_32_16_2", "value": 8},
431 {"name": "IMG_NUM_FORMAT_FMASK_32_8_4", "value": 9},
432 {"name": "IMG_NUM_FORMAT_FMASK_32_8_8", "value": 10},
433 {"name": "IMG_NUM_FORMAT_FMASK_64_16_4", "value": 11},
434 {"name": "IMG_NUM_FORMAT_FMASK_64_16_8", "value": 12},
435 {"name": "IMG_NUM_FORMAT_FMASK_RESERVED_13", "value": 13},
436 {"name": "IMG_NUM_FORMAT_FMASK_RESERVED_14", "value": 14},
437 {"name": "IMG_NUM_FORMAT_FMASK_RESERVED_15", "value": 15}
442 {"name": "ADDR_SURF_MACRO_ASPECT_1", "value": 0},
443 {"name": "ADDR_SURF_MACRO_ASPECT_2", "value": 1},
444 {"name": "ADDR_SURF_MACRO_ASPECT_4", "value": 2},
445 {"name": "ADDR_SURF_MACRO_ASPECT_8", "value": 3}
450 {"name": "ADDR_SURF_DISPLAY_MICRO_TILING", "value": 0},
451 {"name": "ADDR_SURF_THIN_MICRO_TILING", "value": 1},
452 {"name": "ADDR_SURF_DEPTH_MICRO_TILING", "value": 2},
453 {"name": "ADDR_SURF_ROTATED_MICRO_TILING", "value": 3},
454 {"name": "ADDR_SURF_THICK_MICRO_TILING", "value": 4}
459 {"name": "ADDR_SURF_2_BANK", "value": 0},
460 {"name": "ADDR_SURF_4_BANK", "value": 1},
461 {"name": "ADDR_SURF_8_BANK", "value": 2},
462 {"name": "ADDR_SURF_16_BANK", "value": 3}
467 {"name": "X_DRAW_POINTS", "value": 0},
468 {"name": "X_DRAW_LINES", "value": 1},
469 {"name": "X_DRAW_TRIANGLES", "value": 2}
474 {"name": "X_DISABLE_POLY_MODE", "value": 0},
475 {"name": "X_DUAL_MODE", "value": 1}
480 {"name": "X_TRUNCATE", "value": 0},
481 {"name": "X_ROUND", "value": 1},
482 {"name": "X_ROUND_TO_EVEN", "value": 2},
483 {"name": "X_ROUND_TO_ODD", "value": 3}
488 {"name": "ADDR_SURF_P2", "value": 0},
489 {"name": "ADDR_SURF_P2_RESERVED0", "value": 1},
490 {"name": "ADDR_SURF_P2_RESERVED1", "value": 2},
491 {"name": "ADDR_SURF_P2_RESERVED2", "value": 3},
492 {"name": "ADDR_SURF_P4_8x16", "value": 4},
493 {"name": "ADDR_SURF_P4_16x16", "value": 5},
494 {"name": "ADDR_SURF_P4_16x32", "value": 6},
495 {"name": "ADDR_SURF_P4_32x32", "value": 7},
496 {"name": "ADDR_SURF_P8_16x16_8x16", "value": 8},
497 {"name": "ADDR_SURF_P8_16x32_8x16", "value": 9},
498 {"name": "ADDR_SURF_P8_32x32_8x16", "value": 10},
499 {"name": "ADDR_SURF_P8_16x32_16x16", "value": 11},
500 {"name": "ADDR_SURF_P8_32x32_16x16", "value": 12},
501 {"name": "ADDR_SURF_P8_32x32_16x32", "value": 13},
502 {"name": "ADDR_SURF_P8_32x64_32x32", "value": 14},
503 {"name": "ADDR_SURF_P8_RESERVED0", "value": 15},
504 {"name": "ADDR_SURF_P16_32x32_8x16", "value": 16},
505 {"name": "ADDR_SURF_P16_32x32_16x16", "value": 17}
510 {"name": "RASTER_CONFIG_PKR_MAP_0", "value": 0},
511 {"name": "RASTER_CONFIG_PKR_MAP_1", "value": 1},
512 {"name": "RASTER_CONFIG_PKR_MAP_2", "value": 2},
513 {"name": "RASTER_CONFIG_PKR_MAP_3", "value": 3}
518 {"name": "RASTER_CONFIG_PKR_XSEL_0", "value": 0},
519 {"name": "RASTER_CONFIG_PKR_XSEL_1", "value": 1},
520 {"name": "RASTER_CONFIG_PKR_XSEL_2", "value": 2},
521 {"name": "RASTER_CONFIG_PKR_XSEL_3", "value": 3}
526 {"name": "RASTER_CONFIG_PKR_XSEL2_0", "value": 0},
527 {"name": "RASTER_CONFIG_PKR_XSEL2_1", "value": 1},
528 {"name": "RASTER_CONFIG_PKR_XSEL2_2", "value": 2},
529 {"name": "RASTER_CONFIG_PKR_XSEL2_3", "value": 3}
534 {"name": "RASTER_CONFIG_PKR_YSEL_0", "value": 0},
535 {"name": "RASTER_CONFIG_PKR_YSEL_1", "value": 1},
536 {"name": "RASTER_CONFIG_PKR_YSEL_2", "value": 2},
537 {"name": "RASTER_CONFIG_PKR_YSEL_3", "value": 3}
542 {"name": "X_16_8_FIXED_POINT_1_16TH", "value": 0},
543 {"name": "X_16_8_FIXED_POINT_1_8TH", "value": 1},
544 {"name": "X_16_8_FIXED_POINT_1_4TH", "value": 2},
545 {"name": "X_16_8_FIXED_POINT_1_2", "value": 3},
546 {"name": "X_16_8_FIXED_POINT_1", "value": 4},
547 {"name": "X_16_8_FIXED_POINT_1_256TH", "value": 5},
548 {"name": "X_14_10_FIXED_POINT_1_1024TH", "value": 6},
549 {"name": "X_12_12_FIXED_POINT_1_4096TH", "value": 7}
554 {"name": "ROP3_CLEAR", "value": 0},
555 {"name": "X_0X05", "value": 5},
556 {"name": "X_0X0A", "value": 10},
557 {"name": "X_0X0F", "value": 15},
558 {"name": "ROP3_NOR", "value": 17},
559 {"name": "ROP3_AND_INVERTED", "value": 34},
560 {"name": "ROP3_COPY_INVERTED", "value": 51},
561 {"name": "ROP3_AND_REVERSE", "value": 68},
562 {"name": "X_0X50", "value": 80},
563 {"name": "ROP3_INVERT", "value": 85},
564 {"name": "X_0X5A", "value": 90},
565 {"name": "X_0X5F", "value": 95},
566 {"name": "ROP3_XOR", "value": 102},
567 {"name": "ROP3_NAND", "value": 119},
568 {"name": "ROP3_AND", "value": 136},
569 {"name": "ROP3_EQUIVALENT", "value": 153},
570 {"name": "X_0XA0", "value": 160},
571 {"name": "X_0XA5", "value": 165},
572 {"name": "ROP3_NO_OP", "value": 170},
573 {"name": "X_0XAF", "value": 175},
574 {"name": "ROP3_OR_INVERTED", "value": 187},
575 {"name": "ROP3_COPY", "value": 204},
576 {"name": "ROP3_OR_REVERSE", "value": 221},
577 {"name": "ROP3_OR", "value": 238},
578 {"name": "X_0XF0", "value": 240},
579 {"name": "X_0XF5", "value": 245},
580 {"name": "X_0XFA", "value": 250},
581 {"name": "ROP3_SET", "value": 255}
586 {"name": "RASTER_CONFIG_RB_MAP_0", "value": 0},
587 {"name": "RASTER_CONFIG_RB_MAP_1", "value": 1},
588 {"name": "RASTER_CONFIG_RB_MAP_2", "value": 2},
589 {"name": "RASTER_CONFIG_RB_MAP_3", "value": 3}
594 {"name": "RASTER_CONFIG_RB_XSEL_0", "value": 0},
595 {"name": "RASTER_CONFIG_RB_XSEL_1", "value": 1}
600 {"name": "RASTER_CONFIG_RB_XSEL2_0", "value": 0},
601 {"name": "RASTER_CONFIG_RB_XSEL2_1", "value": 1},
602 {"name": "RASTER_CONFIG_RB_XSEL2_2", "value": 2},
603 {"name": "RASTER_CONFIG_RB_XSEL2_3", "value": 3}
608 {"name": "RASTER_CONFIG_RB_YSEL_0", "value": 0},
609 {"name": "RASTER_CONFIG_RB_YSEL_1", "value": 1}
614 {"name": "SPI_PNT_SPRITE_SEL_0", "value": 0},
615 {"name": "SPI_PNT_SPRITE_SEL_1", "value": 1},
616 {"name": "SPI_PNT_SPRITE_SEL_S", "value": 2},
617 {"name": "SPI_PNT_SPRITE_SEL_T", "value": 3},
618 {"name": "SPI_PNT_SPRITE_SEL_NONE", "value": 4}
623 {"name": "SPI_SHADER_ZERO", "value": 0},
624 {"name": "SPI_SHADER_32_R", "value": 1},
625 {"name": "SPI_SHADER_32_GR", "value": 2},
626 {"name": "SPI_SHADER_32_AR", "value": 3},
627 {"name": "SPI_SHADER_FP16_ABGR", "value": 4},
628 {"name": "SPI_SHADER_UNORM16_ABGR", "value": 5},
629 {"name": "SPI_SHADER_SNORM16_ABGR", "value": 6},
630 {"name": "SPI_SHADER_UINT16_ABGR", "value": 7},
631 {"name": "SPI_SHADER_SINT16_ABGR", "value": 8},
632 {"name": "SPI_SHADER_32_ABGR", "value": 9}
637 {"name": "SPI_SHADER_NONE", "value": 0},
638 {"name": "SPI_SHADER_1COMP", "value": 1},
639 {"name": "SPI_SHADER_2COMP", "value": 2},
640 {"name": "SPI_SHADER_4COMPRESS", "value": 3},
641 {"name": "SPI_SHADER_4COMP", "value": 4}
646 {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
647 {"name": "STRM_PERFMON_STATE_START_COUNTING", "value": 1},
648 {"name": "STRM_PERFMON_STATE_STOP_COUNTING", "value": 2},
649 {"name": "STRM_PERFMON_STATE_RESERVED_3", "value": 3},
650 {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
651 {"name": "STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
656 {"name": "SQ_IMG_FILTER_MODE_BLEND", "value": 0},
657 {"name": "SQ_IMG_FILTER_MODE_MIN", "value": 1},
658 {"name": "SQ_IMG_FILTER_MODE_MAX", "value": 2}
663 {"name": "BC_SWIZZLE_XYZW", "value": 0},
664 {"name": "BC_SWIZZLE_XWYZ", "value": 1},
665 {"name": "BC_SWIZZLE_WZYX", "value": 2},
666 {"name": "BC_SWIZZLE_WXYZ", "value": 3},
667 {"name": "BC_SWIZZLE_ZYXW", "value": 4},
668 {"name": "BC_SWIZZLE_YXWZ", "value": 5}
673 {"name": "SQ_RSRC_BUF", "value": 0},
674 {"name": "SQ_RSRC_BUF_RSVD_1", "value": 1},
675 {"name": "SQ_RSRC_BUF_RSVD_2", "value": 2},
676 {"name": "SQ_RSRC_BUF_RSVD_3", "value": 3}
681 {"name": "SQ_RSRC_IMG_RSVD_0", "value": 0},
682 {"name": "SQ_RSRC_IMG_RSVD_1", "value": 1},
683 {"name": "SQ_RSRC_IMG_RSVD_2", "value": 2},
684 {"name": "SQ_RSRC_IMG_RSVD_3", "value": 3},
685 {"name": "SQ_RSRC_IMG_RSVD_4", "value": 4},
686 {"name": "SQ_RSRC_IMG_RSVD_5", "value": 5},
687 {"name": "SQ_RSRC_IMG_RSVD_6", "value": 6},
688 {"name": "SQ_RSRC_IMG_RSVD_7", "value": 7},
689 {"name": "SQ_RSRC_IMG_1D", "value": 8},
690 {"name": "SQ_RSRC_IMG_2D", "value": 9},
691 {"name": "SQ_RSRC_IMG_3D", "value": 10},
692 {"name": "SQ_RSRC_IMG_CUBE", "value": 11},
693 {"name": "SQ_RSRC_IMG_1D_ARRAY", "value": 12},
694 {"name": "SQ_RSRC_IMG_2D_ARRAY", "value": 13},
695 {"name": "SQ_RSRC_IMG_2D_MSAA", "value": 14},
696 {"name": "SQ_RSRC_IMG_2D_MSAA_ARRAY", "value": 15}
701 {"name": "SQ_SEL_0", "value": 0},
702 {"name": "SQ_SEL_1", "value": 1},
703 {"name": "SQ_SEL_RESERVED_0", "value": 2},
704 {"name": "SQ_SEL_RESERVED_1", "value": 3},
705 {"name": "SQ_SEL_X", "value": 4},
706 {"name": "SQ_SEL_Y", "value": 5},
707 {"name": "SQ_SEL_Z", "value": 6},
708 {"name": "SQ_SEL_W", "value": 7}
713 {"name": "SQ_TEX_BORDER_COLOR_TRANS_BLACK", "value": 0},
714 {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_BLACK", "value": 1},
715 {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_WHITE", "value": 2},
716 {"name": "SQ_TEX_BORDER_COLOR_REGISTER", "value": 3}
721 {"name": "SQ_TEX_WRAP", "value": 0},
722 {"name": "SQ_TEX_MIRROR", "value": 1},
723 {"name": "SQ_TEX_CLAMP_LAST_TEXEL", "value": 2},
724 {"name": "SQ_TEX_MIRROR_ONCE_LAST_TEXEL", "value": 3},
725 {"name": "SQ_TEX_CLAMP_HALF_BORDER", "value": 4},
726 {"name": "SQ_TEX_MIRROR_ONCE_HALF_BORDER", "value": 5},
727 {"name": "SQ_TEX_CLAMP_BORDER", "value": 6},
728 {"name": "SQ_TEX_MIRROR_ONCE_BORDER", "value": 7}
733 {"name": "SQ_TEX_DEPTH_COMPARE_NEVER", "value": 0},
734 {"name": "SQ_TEX_DEPTH_COMPARE_LESS", "value": 1},
735 {"name": "SQ_TEX_DEPTH_COMPARE_EQUAL", "value": 2},
736 {"name": "SQ_TEX_DEPTH_COMPARE_LESSEQUAL", "value": 3},
737 {"name": "SQ_TEX_DEPTH_COMPARE_GREATER", "value": 4},
738 {"name": "SQ_TEX_DEPTH_COMPARE_NOTEQUAL", "value": 5},
739 {"name": "SQ_TEX_DEPTH_COMPARE_GREATEREQUAL", "value": 6},
740 {"name": "SQ_TEX_DEPTH_COMPARE_ALWAYS", "value": 7}
745 {"name": "SQ_TEX_MIP_FILTER_NONE", "value": 0},
746 {"name": "SQ_TEX_MIP_FILTER_POINT", "value": 1},
747 {"name": "SQ_TEX_MIP_FILTER_LINEAR", "value": 2},
748 {"name": "SQ_TEX_MIP_FILTER_POINT_ANISO_ADJ", "value": 3}
753 {"name": "SQ_TEX_XY_FILTER_POINT", "value": 0},
754 {"name": "SQ_TEX_XY_FILTER_BILINEAR", "value": 1},
755 {"name": "SQ_TEX_XY_FILTER_ANISO_POINT", "value": 2},
756 {"name": "SQ_TEX_XY_FILTER_ANISO_BILINEAR", "value": 3}
761 {"name": "SQ_TEX_Z_FILTER_NONE", "value": 0},
762 {"name": "SQ_TEX_Z_FILTER_POINT", "value": 1},
763 {"name": "SQ_TEX_Z_FILTER_LINEAR", "value": 2}
768 {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_ALL", "value": 0},
769 {"name": "BLEND_OPT_PRESERVE_ALL_IGNORE_NONE", "value": 1},
770 {"name": "BLEND_OPT_PRESERVE_C1_IGNORE_C0", "value": 2},
771 {"name": "BLEND_OPT_PRESERVE_C0_IGNORE_C1", "value": 3},
772 {"name": "BLEND_OPT_PRESERVE_A1_IGNORE_A0", "value": 4},
773 {"name": "BLEND_OPT_PRESERVE_A0_IGNORE_A1", "value": 5},
774 {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_A0", "value": 6},
775 {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_NONE", "value": 7}
780 {"name": "EXACT", "value": 0},
781 {"name": "11BIT_FORMAT", "value": 1},
782 {"name": "10BIT_FORMAT", "value": 3},
783 {"name": "8BIT_FORMAT", "value": 6},
784 {"name": "6BIT_FORMAT", "value": 11},
785 {"name": "5BIT_FORMAT", "value": 13},
786 {"name": "4BIT_FORMAT", "value": 15}
791 {"name": "SX_RT_EXPORT_NO_CONVERSION", "value": 0},
792 {"name": "SX_RT_EXPORT_32_R", "value": 1},
793 {"name": "SX_RT_EXPORT_32_A", "value": 2},
794 {"name": "SX_RT_EXPORT_10_11_11", "value": 3},
795 {"name": "SX_RT_EXPORT_2_10_10_10", "value": 4},
796 {"name": "SX_RT_EXPORT_8_8_8_8", "value": 5},
797 {"name": "SX_RT_EXPORT_5_6_5", "value": 6},
798 {"name": "SX_RT_EXPORT_1_5_5_5", "value": 7},
799 {"name": "SX_RT_EXPORT_4_4_4_4", "value": 8},
800 {"name": "SX_RT_EXPORT_16_16_GR", "value": 9},
801 {"name": "SX_RT_EXPORT_16_16_AR", "value": 10}
806 {"name": "OPT_COMB_NONE", "value": 0},
807 {"name": "OPT_COMB_ADD", "value": 1},
808 {"name": "OPT_COMB_SUBTRACT", "value": 2},
809 {"name": "OPT_COMB_MIN", "value": 3},
810 {"name": "OPT_COMB_MAX", "value": 4},
811 {"name": "OPT_COMB_REVSUBTRACT", "value": 5},
812 {"name": "OPT_COMB_BLEND_DISABLED", "value": 6},
813 {"name": "OPT_COMB_SAFE_ADD", "value": 7}
818 {"name": "RASTER_CONFIG_SC_MAP_0", "value": 0},
819 {"name": "RASTER_CONFIG_SC_MAP_1", "value": 1},
820 {"name": "RASTER_CONFIG_SC_MAP_2", "value": 2},
821 {"name": "RASTER_CONFIG_SC_MAP_3", "value": 3}
826 {"name": "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE", "value": 0},
827 {"name": "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE", "value": 1},
828 {"name": "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE", "value": 2},
829 {"name": "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE", "value": 3}
834 {"name": "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE", "value": 0},
835 {"name": "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE", "value": 1},
836 {"name": "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE", "value": 2},
837 {"name": "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE", "value": 3}
842 {"name": "RASTER_CONFIG_SE_MAP_0", "value": 0},
843 {"name": "RASTER_CONFIG_SE_MAP_1", "value": 1},
844 {"name": "RASTER_CONFIG_SE_MAP_2", "value": 2},
845 {"name": "RASTER_CONFIG_SE_MAP_3", "value": 3}
850 {"name": "RASTER_CONFIG_SE_PAIR_MAP_0", "value": 0},
851 {"name": "RASTER_CONFIG_SE_PAIR_MAP_1", "value": 1},
852 {"name": "RASTER_CONFIG_SE_PAIR_MAP_2", "value": 2},
853 {"name": "RASTER_CONFIG_SE_PAIR_MAP_3", "value": 3}
858 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE", "value": 0},
859 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE", "value": 1},
860 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE", "value": 2},
861 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE", "value": 3},
862 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_128_WIDE_TILE", "value": 4}
867 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE", "value": 0},
868 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE", "value": 1},
869 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE", "value": 2},
870 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE", "value": 3},
871 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_128_WIDE_TILE", "value": 4}
876 {"name": "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE", "value": 0},
877 {"name": "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE", "value": 1},
878 {"name": "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE", "value": 2},
879 {"name": "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE", "value": 3},
880 {"name": "RASTER_CONFIG_SE_XSEL_128_WIDE_TILE", "value": 4}
885 {"name": "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE", "value": 0},
886 {"name": "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE", "value": 1},
887 {"name": "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE", "value": 2},
888 {"name": "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE", "value": 3},
889 {"name": "RASTER_CONFIG_SE_YSEL_128_WIDE_TILE", "value": 4}
894 {"name": "STENCIL_INVALID", "value": 0},
895 {"name": "STENCIL_8", "value": 1}
900 {"name": "STENCIL_KEEP", "value": 0},
901 {"name": "STENCIL_ZERO", "value": 1},
902 {"name": "STENCIL_ONES", "value": 2},
903 {"name": "STENCIL_REPLACE_TEST", "value": 3},
904 {"name": "STENCIL_REPLACE_OP", "value": 4},
905 {"name": "STENCIL_ADD_CLAMP", "value": 5},
906 {"name": "STENCIL_SUB_CLAMP", "value": 6},
907 {"name": "STENCIL_INVERT", "value": 7},
908 {"name": "STENCIL_ADD_WRAP", "value": 8},
909 {"name": "STENCIL_SUB_WRAP", "value": 9},
910 {"name": "STENCIL_AND", "value": 10},
911 {"name": "STENCIL_OR", "value": 11},
912 {"name": "STENCIL_XOR", "value": 12},
913 {"name": "STENCIL_NAND", "value": 13},
914 {"name": "STENCIL_NOR", "value": 14},
915 {"name": "STENCIL_XNOR", "value": 15}
920 {"name": "ENDIAN_NONE", "value": 0},
921 {"name": "ENDIAN_8IN16", "value": 1},
922 {"name": "ENDIAN_8IN32", "value": 2},
923 {"name": "ENDIAN_8IN64", "value": 3}
928 {"name": "NUMBER_UNORM", "value": 0},
929 {"name": "NUMBER_SNORM", "value": 1},
930 {"name": "NUMBER_USCALED", "value": 2},
931 {"name": "NUMBER_SSCALED", "value": 3},
932 {"name": "NUMBER_UINT", "value": 4},
933 {"name": "NUMBER_SINT", "value": 5},
934 {"name": "NUMBER_SRGB", "value": 6},
935 {"name": "NUMBER_FLOAT", "value": 7}
940 {"name": "SWAP_STD", "value": 0},
941 {"name": "SWAP_ALT", "value": 1},
942 {"name": "SWAP_STD_REV", "value": 2},
943 {"name": "SWAP_ALT_REV", "value": 3}
948 {"name": "ADDR_SURF_TILE_SPLIT_64B", "value": 0},
949 {"name": "ADDR_SURF_TILE_SPLIT_128B", "value": 1},
950 {"name": "ADDR_SURF_TILE_SPLIT_256B", "value": 2},
951 {"name": "ADDR_SURF_TILE_SPLIT_512B", "value": 3},
952 {"name": "ADDR_SURF_TILE_SPLIT_1KB", "value": 4},
953 {"name": "ADDR_SURF_TILE_SPLIT_2KB", "value": 5},
954 {"name": "ADDR_SURF_TILE_SPLIT_4KB", "value": 6}
959 {"name": "NO_DIST", "value": 0},
960 {"name": "PATCHES", "value": 1},
961 {"name": "DONUTS", "value": 2},
962 {"name": "TRAPEZOIDS", "value": 3}
967 {"name": "DI_MAJOR_MODE_0", "value": 0},
968 {"name": "DI_MAJOR_MODE_1", "value": 1}
973 {"name": "DI_PT_NONE", "value": 0},
974 {"name": "DI_PT_POINTLIST", "value": 1},
975 {"name": "DI_PT_LINELIST", "value": 2},
976 {"name": "DI_PT_LINESTRIP", "value": 3},
977 {"name": "DI_PT_TRILIST", "value": 4},
978 {"name": "DI_PT_TRIFAN", "value": 5},
979 {"name": "DI_PT_TRISTRIP", "value": 6},
980 {"name": "DI_PT_2D_RECTANGLE", "value": 7},
981 {"name": "DI_PT_UNUSED_1", "value": 8},
982 {"name": "DI_PT_PATCH", "value": 9},
983 {"name": "DI_PT_LINELIST_ADJ", "value": 10},
984 {"name": "DI_PT_LINESTRIP_ADJ", "value": 11},
985 {"name": "DI_PT_TRILIST_ADJ", "value": 12},
986 {"name": "DI_PT_TRISTRIP_ADJ", "value": 13},
987 {"name": "DI_PT_UNUSED_3", "value": 14},
988 {"name": "DI_PT_UNUSED_4", "value": 15},
989 {"name": "DI_PT_TRI_WITH_WFLAGS", "value": 16},
990 {"name": "DI_PT_RECTLIST", "value": 17},
991 {"name": "DI_PT_LINELOOP", "value": 18},
992 {"name": "DI_PT_QUADLIST", "value": 19},
993 {"name": "DI_PT_QUADSTRIP", "value": 20},
994 {"name": "DI_PT_POLYGON", "value": 21}
999 {"name": "DI_SRC_SEL_DMA", "value": 0},
1000 {"name": "DI_SRC_SEL_IMMEDIATE", "value": 1},
1001 {"name": "DI_SRC_SEL_AUTO_INDEX", "value": 2},
1002 {"name": "DI_SRC_SEL_RESERVED", "value": 3}
1007 {"name": "VGT_DMA_BUF_MEM", "value": 0},
1008 {"name": "VGT_DMA_BUF_RING", "value": 1},
1009 {"name": "VGT_DMA_BUF_SETUP", "value": 2},
1010 {"name": "VGT_DMA_PTR_UPDATE", "value": 3}
1015 {"name": "VGT_DMA_SWAP_NONE", "value": 0},
1016 {"name": "VGT_DMA_SWAP_16_BIT", "value": 1},
1017 {"name": "VGT_DMA_SWAP_32_BIT", "value": 2},
1018 {"name": "VGT_DMA_SWAP_WORD", "value": 3}
1023 {"name": "Reserved_0x00", "value": 0},
1024 {"name": "SAMPLE_STREAMOUTSTATS1", "value": 1},
1025 {"name": "SAMPLE_STREAMOUTSTATS2", "value": 2},
1026 {"name": "SAMPLE_STREAMOUTSTATS3", "value": 3},
1027 {"name": "CACHE_FLUSH_TS", "value": 4},
1028 {"name": "CONTEXT_DONE", "value": 5},
1029 {"name": "CACHE_FLUSH", "value": 6},
1030 {"name": "CS_PARTIAL_FLUSH", "value": 7},
1031 {"name": "VGT_STREAMOUT_SYNC", "value": 8},
1032 {"name": "Reserved_0x09", "value": 9},
1033 {"name": "VGT_STREAMOUT_RESET", "value": 10},
1034 {"name": "END_OF_PIPE_INCR_DE", "value": 11},
1035 {"name": "END_OF_PIPE_IB_END", "value": 12},
1036 {"name": "RST_PIX_CNT", "value": 13},
1037 {"name": "BREAK_BATCH", "value": 14},
1038 {"name": "VS_PARTIAL_FLUSH", "value": 15},
1039 {"name": "PS_PARTIAL_FLUSH", "value": 16},
1040 {"name": "FLUSH_HS_OUTPUT", "value": 17},
1041 {"name": "FLUSH_DFSM", "value": 18},
1042 {"name": "RESET_TO_LOWEST_VGT", "value": 19},
1043 {"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20},
1044 {"name": "ZPASS_DONE", "value": 21},
1045 {"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22},
1046 {"name": "PERFCOUNTER_START", "value": 23},
1047 {"name": "PERFCOUNTER_STOP", "value": 24},
1048 {"name": "PIPELINESTAT_START", "value": 25},
1049 {"name": "PIPELINESTAT_STOP", "value": 26},
1050 {"name": "PERFCOUNTER_SAMPLE", "value": 27},
1051 {"name": "Available_0x1c", "value": 28},
1052 {"name": "Available_0x1d", "value": 29},
1053 {"name": "SAMPLE_PIPELINESTAT", "value": 30},
1054 {"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31},
1055 {"name": "SAMPLE_STREAMOUTSTATS", "value": 32},
1056 {"name": "RESET_VTX_CNT", "value": 33},
1057 {"name": "BLOCK_CONTEXT_DONE", "value": 34},
1058 {"name": "CS_CONTEXT_DONE", "value": 35},
1059 {"name": "VGT_FLUSH", "value": 36},
1060 {"name": "TGID_ROLLOVER", "value": 37},
1061 {"name": "SQ_NON_EVENT", "value": 38},
1062 {"name": "SC_SEND_DB_VPZ", "value": 39},
1063 {"name": "BOTTOM_OF_PIPE_TS", "value": 40},
1064 {"name": "FLUSH_SX_TS", "value": 41},
1065 {"name": "DB_CACHE_FLUSH_AND_INV", "value": 42},
1066 {"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43},
1067 {"name": "FLUSH_AND_INV_DB_META", "value": 44},
1068 {"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45},
1069 {"name": "FLUSH_AND_INV_CB_META", "value": 46},
1070 {"name": "CS_DONE", "value": 47},
1071 {"name": "PS_DONE", "value": 48},
1072 {"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49},
1073 {"name": "SX_CB_RAT_ACK_REQUEST", "value": 50},
1074 {"name": "THREAD_TRACE_START", "value": 51},
1075 {"name": "THREAD_TRACE_STOP", "value": 52},
1076 {"name": "THREAD_TRACE_MARKER", "value": 53},
1077 {"name": "THREAD_TRACE_FLUSH", "value": 54},
1078 {"name": "THREAD_TRACE_FINISH", "value": 55},
1079 {"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56},
1080 {"name": "PIXEL_PIPE_STAT_DUMP", "value": 57},
1081 {"name": "PIXEL_PIPE_STAT_RESET", "value": 58},
1082 {"name": "CONTEXT_SUSPEND", "value": 59},
1083 {"name": "OFFCHIP_HS_DEALLOC", "value": 60},
1084 {"name": "ENABLE_NGG_PIPELINE", "value": 61},
1085 {"name": "ENABLE_LEGACY_PIPELINE", "value": 62},
1086 {"name": "Reserved_0x3f", "value": 63}
1091 {"name": "GS_CUT_1024", "value": 0},
1092 {"name": "GS_CUT_512", "value": 1},
1093 {"name": "GS_CUT_256", "value": 2},
1094 {"name": "GS_CUT_128", "value": 3}
1099 {"name": "GS_OFF", "value": 0},
1100 {"name": "GS_SCENARIO_A", "value": 1},
1101 {"name": "GS_SCENARIO_B", "value": 2},
1102 {"name": "GS_SCENARIO_G", "value": 3},
1103 {"name": "GS_SCENARIO_C", "value": 4},
1104 {"name": "SPRITE_EN", "value": 5}
1109 {"name": "POINTLIST", "value": 0},
1110 {"name": "LINESTRIP", "value": 1},
1111 {"name": "TRISTRIP", "value": 2},
1112 {"name": "RECTLIST", "value": 3}
1117 {"name": "X_8K_DWORDS", "value": 0},
1118 {"name": "X_4K_DWORDS", "value": 1},
1119 {"name": "X_2K_DWORDS", "value": 2},
1120 {"name": "X_1K_DWORDS", "value": 3}
1125 {"name": "VGT_INDEX_16", "value": 0},
1126 {"name": "VGT_INDEX_32", "value": 1},
1127 {"name": "VGT_INDEX_8", "value": 2}
1132 {"name": "VGT_POLICY_LRU", "value": 0},
1133 {"name": "VGT_POLICY_STREAM", "value": 1}
1138 {"name": "ES_STAGE_OFF", "value": 0},
1139 {"name": "ES_STAGE_DS", "value": 1},
1140 {"name": "ES_STAGE_REAL", "value": 2},
1141 {"name": "RESERVED_ES", "value": 3}
1146 {"name": "GS_STAGE_OFF", "value": 0},
1147 {"name": "GS_STAGE_ON", "value": 1}
1152 {"name": "HS_STAGE_OFF", "value": 0},
1153 {"name": "HS_STAGE_ON", "value": 1}
1158 {"name": "LS_STAGE_OFF", "value": 0},
1159 {"name": "LS_STAGE_ON", "value": 1},
1160 {"name": "CS_STAGE_ON", "value": 2},
1161 {"name": "RESERVED_LS", "value": 3}
1166 {"name": "VS_STAGE_REAL", "value": 0},
1167 {"name": "VS_STAGE_DS", "value": 1},
1168 {"name": "VS_STAGE_COPY_SHADER", "value": 2},
1169 {"name": "RESERVED_VS", "value": 3}
1174 {"name": "PART_INTEGER", "value": 0},
1175 {"name": "PART_POW2", "value": 1},
1176 {"name": "PART_FRAC_ODD", "value": 2},
1177 {"name": "PART_FRAC_EVEN", "value": 3}
1182 {"name": "OUTPUT_POINT", "value": 0},
1183 {"name": "OUTPUT_LINE", "value": 1},
1184 {"name": "OUTPUT_TRIANGLE_CW", "value": 2},
1185 {"name": "OUTPUT_TRIANGLE_CCW", "value": 3}
1190 {"name": "TESS_ISOLINE", "value": 0},
1191 {"name": "TESS_TRIANGLE", "value": 1},
1192 {"name": "TESS_QUAD", "value": 2}
1197 {"name": "Z_INVALID", "value": 0},
1198 {"name": "Z_16", "value": 1},
1199 {"name": "Z_24", "value": 2},
1200 {"name": "Z_32_FLOAT", "value": 3}
1205 {"name": "FORCE_SUMM_OFF", "value": 0},
1206 {"name": "FORCE_SUMM_MINZ", "value": 1},
1207 {"name": "FORCE_SUMM_MAXZ", "value": 2},
1208 {"name": "FORCE_SUMM_BOTH", "value": 3}
1213 {"name": "LATE_Z", "value": 0},
1214 {"name": "EARLY_Z_THEN_LATE_Z", "value": 1},
1215 {"name": "RE_Z", "value": 2},
1216 {"name": "EARLY_Z_THEN_RE_Z", "value": 3}
1224 "name": "SQ_WAVE_MODE",
1230 "name": "SQ_WAVE_STATUS",
1236 "name": "SQ_WAVE_TRAPSTS",
1242 "name": "SQ_WAVE_HW_ID",
1248 "name": "SQ_WAVE_GPR_ALLOC",
1254 "name": "SQ_WAVE_LDS_ALLOC",
1260 "name": "SQ_WAVE_IB_STS",
1266 "name": "SQ_WAVE_PC_LO"
1271 "name": "SQ_WAVE_PC_HI",
1277 "name": "SQ_WAVE_INST_DW0"
1282 "name": "SQ_WAVE_INST_DW1"
1287 "name": "SQ_WAVE_IB_DBG0",
1293 "name": "SQ_WAVE_IB_DBG1",
1299 "name": "SQ_WAVE_FLUSH_IB"
1304 "name": "SQ_WAVE_TTMP0"
1309 "name": "SQ_WAVE_TTMP1"
1314 "name": "SQ_WAVE_TTMP2"
1319 "name": "SQ_WAVE_TTMP3"
1324 "name": "SQ_WAVE_TTMP4"
1329 "name": "SQ_WAVE_TTMP5"
1334 "name": "SQ_WAVE_TTMP6"
1339 "name": "SQ_WAVE_TTMP7"
1344 "name": "SQ_WAVE_TTMP8"
1349 "name": "SQ_WAVE_TTMP9"
1354 "name": "SQ_WAVE_TTMP10"
1359 "name": "SQ_WAVE_TTMP11"
1364 "name": "SQ_WAVE_TTMP12"
1369 "name": "SQ_WAVE_TTMP13"
1374 "name": "SQ_WAVE_TTMP14"
1379 "name": "SQ_WAVE_TTMP15"
1384 "name": "SQ_WAVE_M0"
1389 "name": "SQ_WAVE_EXEC_LO"
1394 "name": "SQ_WAVE_EXEC_HI"
1399 "name": "GRBM_STATUS2",
1405 "name": "GRBM_STATUS",
1411 "name": "GRBM_STATUS_SE0",
1417 "name": "GRBM_STATUS_SE1",
1423 "name": "GRBM_STATUS_SE2",
1429 "name": "GRBM_STATUS_SE3",
1435 "name": "CP_CPC_STATUS",
1441 "name": "CP_CPC_BUSY_STAT",
1447 "name": "CP_CPC_STALLED_STAT1",
1453 "name": "CP_CPF_STATUS",
1459 "name": "CP_CPF_BUSY_STAT",
1465 "name": "CP_CPF_STALLED_STAT1",
1471 "name": "CP_CPC_GRBM_FREE_COUNT",
1477 "name": "CP_CPC_SCRATCH_INDEX",
1483 "name": "CP_CPC_SCRATCH_DATA"
1488 "name": "CP_CPF_GRBM_FREE_COUNT",
1494 "name": "CP_CPC_HALT_HYST_COUNT",
1500 "name": "SQ_BUF_RSRC_WORD0"
1505 "name": "SQ_BUF_RSRC_WORD1",
1511 "name": "SQ_BUF_RSRC_WORD2"
1516 "name": "SQ_BUF_RSRC_WORD3",
1522 "name": "SQ_IMG_RSRC_WORD0"
1527 "name": "SQ_IMG_RSRC_WORD1",
1533 "name": "SQ_IMG_RSRC_WORD2",
1539 "name": "SQ_IMG_RSRC_WORD3",
1545 "name": "SQ_IMG_RSRC_WORD4",
1551 "name": "SQ_IMG_RSRC_WORD5",
1557 "name": "SQ_IMG_RSRC_WORD6",
1563 "name": "SQ_IMG_RSRC_WORD7"
1568 "name": "SQ_IMG_SAMP_WORD0",
1574 "name": "SQ_IMG_SAMP_WORD1",
1580 "name": "SQ_IMG_SAMP_WORD2",
1586 "name": "SQ_IMG_SAMP_WORD3",
1592 "name": "GB_ADDR_CONFIG",
1598 "name": "GB_TILE_MODE0",
1604 "name": "GB_TILE_MODE1",
1610 "name": "GB_TILE_MODE2",
1616 "name": "GB_TILE_MODE3",
1622 "name": "GB_TILE_MODE4",
1628 "name": "GB_TILE_MODE5",
1634 "name": "GB_TILE_MODE6",
1640 "name": "GB_TILE_MODE7",
1646 "name": "GB_TILE_MODE8",
1652 "name": "GB_TILE_MODE9",
1658 "name": "GB_TILE_MODE10",
1664 "name": "GB_TILE_MODE11",
1670 "name": "GB_TILE_MODE12",
1676 "name": "GB_TILE_MODE13",
1682 "name": "GB_TILE_MODE14",
1688 "name": "GB_TILE_MODE15",
1694 "name": "GB_TILE_MODE16",
1700 "name": "GB_TILE_MODE17",
1706 "name": "GB_TILE_MODE18",
1712 "name": "GB_TILE_MODE19",
1718 "name": "GB_TILE_MODE20",
1724 "name": "GB_TILE_MODE21",
1730 "name": "GB_TILE_MODE22",
1736 "name": "GB_TILE_MODE23",
1742 "name": "GB_TILE_MODE24",
1748 "name": "GB_TILE_MODE25",
1754 "name": "GB_TILE_MODE26",
1760 "name": "GB_TILE_MODE27",
1766 "name": "GB_TILE_MODE28",
1772 "name": "GB_TILE_MODE29",
1778 "name": "GB_TILE_MODE30",
1784 "name": "GB_TILE_MODE31",
1790 "name": "GB_MACROTILE_MODE0",
1796 "name": "GB_MACROTILE_MODE1",
1802 "name": "GB_MACROTILE_MODE2",
1808 "name": "GB_MACROTILE_MODE3",
1814 "name": "GB_MACROTILE_MODE4",
1820 "name": "GB_MACROTILE_MODE5",
1826 "name": "GB_MACROTILE_MODE6",
1832 "name": "GB_MACROTILE_MODE7",
1838 "name": "GB_MACROTILE_MODE8",
1844 "name": "GB_MACROTILE_MODE9",
1850 "name": "GB_MACROTILE_MODE10",
1856 "name": "GB_MACROTILE_MODE11",
1862 "name": "GB_MACROTILE_MODE12",
1868 "name": "GB_MACROTILE_MODE13",
1874 "name": "GB_MACROTILE_MODE14",
1880 "name": "GB_MACROTILE_MODE15",
1886 "name": "SPI_SHADER_PGM_RSRC3_PS",
1892 "name": "SPI_SHADER_PGM_LO_PS"
1897 "name": "SPI_SHADER_PGM_HI_PS",
1903 "name": "SPI_SHADER_PGM_RSRC1_PS",
1909 "name": "SPI_SHADER_PGM_RSRC2_PS",
1915 "name": "SPI_SHADER_USER_DATA_PS_0"
1920 "name": "SPI_SHADER_USER_DATA_PS_1"
1925 "name": "SPI_SHADER_USER_DATA_PS_2"
1930 "name": "SPI_SHADER_USER_DATA_PS_3"
1935 "name": "SPI_SHADER_USER_DATA_PS_4"
1940 "name": "SPI_SHADER_USER_DATA_PS_5"
1945 "name": "SPI_SHADER_USER_DATA_PS_6"
1950 "name": "SPI_SHADER_USER_DATA_PS_7"
1955 "name": "SPI_SHADER_USER_DATA_PS_8"
1960 "name": "SPI_SHADER_USER_DATA_PS_9"
1965 "name": "SPI_SHADER_USER_DATA_PS_10"
1970 "name": "SPI_SHADER_USER_DATA_PS_11"
1975 "name": "SPI_SHADER_USER_DATA_PS_12"
1980 "name": "SPI_SHADER_USER_DATA_PS_13"
1985 "name": "SPI_SHADER_USER_DATA_PS_14"
1990 "name": "SPI_SHADER_USER_DATA_PS_15"
1995 "name": "SPI_SHADER_USER_DATA_PS_16"
2000 "name": "SPI_SHADER_USER_DATA_PS_17"
2005 "name": "SPI_SHADER_USER_DATA_PS_18"
2010 "name": "SPI_SHADER_USER_DATA_PS_19"
2015 "name": "SPI_SHADER_USER_DATA_PS_20"
2020 "name": "SPI_SHADER_USER_DATA_PS_21"
2025 "name": "SPI_SHADER_USER_DATA_PS_22"
2030 "name": "SPI_SHADER_USER_DATA_PS_23"
2035 "name": "SPI_SHADER_USER_DATA_PS_24"
2040 "name": "SPI_SHADER_USER_DATA_PS_25"
2045 "name": "SPI_SHADER_USER_DATA_PS_26"
2050 "name": "SPI_SHADER_USER_DATA_PS_27"
2055 "name": "SPI_SHADER_USER_DATA_PS_28"
2060 "name": "SPI_SHADER_USER_DATA_PS_29"
2065 "name": "SPI_SHADER_USER_DATA_PS_30"
2070 "name": "SPI_SHADER_USER_DATA_PS_31"
2075 "name": "SPI_SHADER_PGM_RSRC3_VS",
2081 "name": "SPI_SHADER_LATE_ALLOC_VS",
2087 "name": "SPI_SHADER_PGM_LO_VS"
2092 "name": "SPI_SHADER_PGM_HI_VS",
2098 "name": "SPI_SHADER_PGM_RSRC1_VS",
2104 "name": "SPI_SHADER_PGM_RSRC2_VS",
2110 "name": "SPI_SHADER_USER_DATA_VS_0"
2115 "name": "SPI_SHADER_USER_DATA_VS_1"
2120 "name": "SPI_SHADER_USER_DATA_VS_2"
2125 "name": "SPI_SHADER_USER_DATA_VS_3"
2130 "name": "SPI_SHADER_USER_DATA_VS_4"
2135 "name": "SPI_SHADER_USER_DATA_VS_5"
2140 "name": "SPI_SHADER_USER_DATA_VS_6"
2145 "name": "SPI_SHADER_USER_DATA_VS_7"
2150 "name": "SPI_SHADER_USER_DATA_VS_8"
2155 "name": "SPI_SHADER_USER_DATA_VS_9"
2160 "name": "SPI_SHADER_USER_DATA_VS_10"
2165 "name": "SPI_SHADER_USER_DATA_VS_11"
2170 "name": "SPI_SHADER_USER_DATA_VS_12"
2175 "name": "SPI_SHADER_USER_DATA_VS_13"
2180 "name": "SPI_SHADER_USER_DATA_VS_14"
2185 "name": "SPI_SHADER_USER_DATA_VS_15"
2190 "name": "SPI_SHADER_USER_DATA_VS_16"
2195 "name": "SPI_SHADER_USER_DATA_VS_17"
2200 "name": "SPI_SHADER_USER_DATA_VS_18"
2205 "name": "SPI_SHADER_USER_DATA_VS_19"
2210 "name": "SPI_SHADER_USER_DATA_VS_20"
2215 "name": "SPI_SHADER_USER_DATA_VS_21"
2220 "name": "SPI_SHADER_USER_DATA_VS_22"
2225 "name": "SPI_SHADER_USER_DATA_VS_23"
2230 "name": "SPI_SHADER_USER_DATA_VS_24"
2235 "name": "SPI_SHADER_USER_DATA_VS_25"
2240 "name": "SPI_SHADER_USER_DATA_VS_26"
2245 "name": "SPI_SHADER_USER_DATA_VS_27"
2250 "name": "SPI_SHADER_USER_DATA_VS_28"
2255 "name": "SPI_SHADER_USER_DATA_VS_29"
2260 "name": "SPI_SHADER_USER_DATA_VS_30"
2265 "name": "SPI_SHADER_USER_DATA_VS_31"
2270 "name": "SPI_SHADER_PGM_RSRC2_GS_VS",
2276 "name": "SPI_SHADER_PGM_RSRC4_GS",
2282 "name": "SPI_SHADER_USER_DATA_ADDR_LO_GS"
2287 "name": "SPI_SHADER_USER_DATA_ADDR_HI_GS"
2292 "name": "SPI_SHADER_PGM_LO_ES"
2297 "name": "SPI_SHADER_PGM_HI_ES",
2303 "name": "SPI_SHADER_PGM_RSRC3_GS",
2309 "name": "SPI_SHADER_PGM_LO_GS"
2314 "name": "SPI_SHADER_PGM_HI_GS",
2320 "name": "SPI_SHADER_PGM_RSRC1_GS",
2326 "name": "SPI_SHADER_PGM_RSRC2_GS",
2332 "name": "SPI_SHADER_USER_DATA_ES_0"
2337 "name": "SPI_SHADER_USER_DATA_ES_1"
2342 "name": "SPI_SHADER_USER_DATA_ES_2"
2347 "name": "SPI_SHADER_USER_DATA_ES_3"
2352 "name": "SPI_SHADER_USER_DATA_ES_4"
2357 "name": "SPI_SHADER_USER_DATA_ES_5"
2362 "name": "SPI_SHADER_USER_DATA_ES_6"
2367 "name": "SPI_SHADER_USER_DATA_ES_7"
2372 "name": "SPI_SHADER_USER_DATA_ES_8"
2377 "name": "SPI_SHADER_USER_DATA_ES_9"
2382 "name": "SPI_SHADER_USER_DATA_ES_10"
2387 "name": "SPI_SHADER_USER_DATA_ES_11"
2392 "name": "SPI_SHADER_USER_DATA_ES_12"
2397 "name": "SPI_SHADER_USER_DATA_ES_13"
2402 "name": "SPI_SHADER_USER_DATA_ES_14"
2407 "name": "SPI_SHADER_USER_DATA_ES_15"
2412 "name": "SPI_SHADER_USER_DATA_ES_16"
2417 "name": "SPI_SHADER_USER_DATA_ES_17"
2422 "name": "SPI_SHADER_USER_DATA_ES_18"
2427 "name": "SPI_SHADER_USER_DATA_ES_19"
2432 "name": "SPI_SHADER_USER_DATA_ES_20"
2437 "name": "SPI_SHADER_USER_DATA_ES_21"
2442 "name": "SPI_SHADER_USER_DATA_ES_22"
2447 "name": "SPI_SHADER_USER_DATA_ES_23"
2452 "name": "SPI_SHADER_USER_DATA_ES_24"
2457 "name": "SPI_SHADER_USER_DATA_ES_25"
2462 "name": "SPI_SHADER_USER_DATA_ES_26"
2467 "name": "SPI_SHADER_USER_DATA_ES_27"
2472 "name": "SPI_SHADER_USER_DATA_ES_28"
2477 "name": "SPI_SHADER_USER_DATA_ES_29"
2482 "name": "SPI_SHADER_USER_DATA_ES_30"
2487 "name": "SPI_SHADER_USER_DATA_ES_31"
2492 "name": "SPI_SHADER_PGM_RSRC4_HS",
2498 "name": "SPI_SHADER_USER_DATA_ADDR_LO_HS"
2503 "name": "SPI_SHADER_USER_DATA_ADDR_HI_HS"
2508 "name": "SPI_SHADER_PGM_LO_LS"
2513 "name": "SPI_SHADER_PGM_HI_LS",
2519 "name": "SPI_SHADER_PGM_RSRC3_HS",
2525 "name": "SPI_SHADER_PGM_LO_HS"
2530 "name": "SPI_SHADER_PGM_HI_HS",
2536 "name": "SPI_SHADER_PGM_RSRC1_HS",
2542 "name": "SPI_SHADER_PGM_RSRC2_HS",
2548 "name": "SPI_SHADER_USER_DATA_LS_0"
2553 "name": "SPI_SHADER_USER_DATA_LS_1"
2558 "name": "SPI_SHADER_USER_DATA_LS_2"
2563 "name": "SPI_SHADER_USER_DATA_LS_3"
2568 "name": "SPI_SHADER_USER_DATA_LS_4"
2573 "name": "SPI_SHADER_USER_DATA_LS_5"
2578 "name": "SPI_SHADER_USER_DATA_LS_6"
2583 "name": "SPI_SHADER_USER_DATA_LS_7"
2588 "name": "SPI_SHADER_USER_DATA_LS_8"
2593 "name": "SPI_SHADER_USER_DATA_LS_9"
2598 "name": "SPI_SHADER_USER_DATA_LS_10"
2603 "name": "SPI_SHADER_USER_DATA_LS_11"
2608 "name": "SPI_SHADER_USER_DATA_LS_12"
2613 "name": "SPI_SHADER_USER_DATA_LS_13"
2618 "name": "SPI_SHADER_USER_DATA_LS_14"
2623 "name": "SPI_SHADER_USER_DATA_LS_15"
2628 "name": "SPI_SHADER_USER_DATA_LS_16"
2633 "name": "SPI_SHADER_USER_DATA_LS_17"
2638 "name": "SPI_SHADER_USER_DATA_LS_18"
2643 "name": "SPI_SHADER_USER_DATA_LS_19"
2648 "name": "SPI_SHADER_USER_DATA_LS_20"
2653 "name": "SPI_SHADER_USER_DATA_LS_21"
2658 "name": "SPI_SHADER_USER_DATA_LS_22"
2663 "name": "SPI_SHADER_USER_DATA_LS_23"
2668 "name": "SPI_SHADER_USER_DATA_LS_24"
2673 "name": "SPI_SHADER_USER_DATA_LS_25"
2678 "name": "SPI_SHADER_USER_DATA_LS_26"
2683 "name": "SPI_SHADER_USER_DATA_LS_27"
2688 "name": "SPI_SHADER_USER_DATA_LS_28"
2693 "name": "SPI_SHADER_USER_DATA_LS_29"
2698 "name": "SPI_SHADER_USER_DATA_LS_30"
2703 "name": "SPI_SHADER_USER_DATA_LS_31"
2708 "name": "SPI_SHADER_USER_DATA_COMMON_0"
2713 "name": "SPI_SHADER_USER_DATA_COMMON_1"
2718 "name": "SPI_SHADER_USER_DATA_COMMON_2"
2723 "name": "SPI_SHADER_USER_DATA_COMMON_3"
2728 "name": "SPI_SHADER_USER_DATA_COMMON_4"
2733 "name": "SPI_SHADER_USER_DATA_COMMON_5"
2738 "name": "SPI_SHADER_USER_DATA_COMMON_6"
2743 "name": "SPI_SHADER_USER_DATA_COMMON_7"
2748 "name": "SPI_SHADER_USER_DATA_COMMON_8"
2753 "name": "SPI_SHADER_USER_DATA_COMMON_9"
2758 "name": "SPI_SHADER_USER_DATA_COMMON_10"
2763 "name": "SPI_SHADER_USER_DATA_COMMON_11"
2768 "name": "SPI_SHADER_USER_DATA_COMMON_12"
2773 "name": "SPI_SHADER_USER_DATA_COMMON_13"
2778 "name": "SPI_SHADER_USER_DATA_COMMON_14"
2783 "name": "SPI_SHADER_USER_DATA_COMMON_15"
2788 "name": "SPI_SHADER_USER_DATA_COMMON_16"
2793 "name": "SPI_SHADER_USER_DATA_COMMON_17"
2798 "name": "SPI_SHADER_USER_DATA_COMMON_18"
2803 "name": "SPI_SHADER_USER_DATA_COMMON_19"
2808 "name": "SPI_SHADER_USER_DATA_COMMON_20"
2813 "name": "SPI_SHADER_USER_DATA_COMMON_21"
2818 "name": "SPI_SHADER_USER_DATA_COMMON_22"
2823 "name": "SPI_SHADER_USER_DATA_COMMON_23"
2828 "name": "SPI_SHADER_USER_DATA_COMMON_24"
2833 "name": "SPI_SHADER_USER_DATA_COMMON_25"
2838 "name": "SPI_SHADER_USER_DATA_COMMON_26"
2843 "name": "SPI_SHADER_USER_DATA_COMMON_27"
2848 "name": "SPI_SHADER_USER_DATA_COMMON_28"
2853 "name": "SPI_SHADER_USER_DATA_COMMON_29"
2858 "name": "SPI_SHADER_USER_DATA_COMMON_30"
2863 "name": "SPI_SHADER_USER_DATA_COMMON_31"
2868 "name": "COMPUTE_DISPATCH_INITIATOR",
2874 "name": "COMPUTE_DIM_X"
2879 "name": "COMPUTE_DIM_Y"
2884 "name": "COMPUTE_DIM_Z"
2889 "name": "COMPUTE_START_X"
2894 "name": "COMPUTE_START_Y"
2899 "name": "COMPUTE_START_Z"
2904 "name": "COMPUTE_NUM_THREAD_X",
2910 "name": "COMPUTE_NUM_THREAD_Y",
2916 "name": "COMPUTE_NUM_THREAD_Z",
2922 "name": "COMPUTE_PIPELINESTAT_ENABLE",
2928 "name": "COMPUTE_PERFCOUNT_ENABLE",
2934 "name": "COMPUTE_PGM_LO"
2939 "name": "COMPUTE_PGM_HI",
2945 "name": "COMPUTE_DISPATCH_PKT_ADDR_LO"
2950 "name": "COMPUTE_DISPATCH_PKT_ADDR_HI",
2956 "name": "COMPUTE_DISPATCH_SCRATCH_BASE_LO"
2961 "name": "COMPUTE_DISPATCH_SCRATCH_BASE_HI",
2967 "name": "COMPUTE_PGM_RSRC1",
2973 "name": "COMPUTE_PGM_RSRC2",
2979 "name": "COMPUTE_VMID",
2985 "name": "COMPUTE_RESOURCE_LIMITS",
2991 "name": "COMPUTE_STATIC_THREAD_MGMT_SE0",
2997 "name": "COMPUTE_STATIC_THREAD_MGMT_SE1",
3003 "name": "COMPUTE_TMPRING_SIZE",
3009 "name": "COMPUTE_STATIC_THREAD_MGMT_SE2",
3015 "name": "COMPUTE_STATIC_THREAD_MGMT_SE3",
3021 "name": "COMPUTE_RESTART_X"
3026 "name": "COMPUTE_RESTART_Y"
3031 "name": "COMPUTE_RESTART_Z"
3036 "name": "COMPUTE_THREAD_TRACE_ENABLE",
3042 "name": "COMPUTE_MISC_RESERVED",
3048 "name": "COMPUTE_DISPATCH_ID"
3053 "name": "COMPUTE_THREADGROUP_ID"
3058 "name": "COMPUTE_RELAUNCH",
3064 "name": "COMPUTE_WAVE_RESTORE_ADDR_LO"
3069 "name": "COMPUTE_WAVE_RESTORE_ADDR_HI",
3075 "name": "COMPUTE_SHADER_CHKSUM"
3080 "name": "COMPUTE_USER_DATA_0"
3085 "name": "COMPUTE_USER_DATA_1"
3090 "name": "COMPUTE_USER_DATA_2"
3095 "name": "COMPUTE_USER_DATA_3"
3100 "name": "COMPUTE_USER_DATA_4"
3105 "name": "COMPUTE_USER_DATA_5"
3110 "name": "COMPUTE_USER_DATA_6"
3115 "name": "COMPUTE_USER_DATA_7"
3120 "name": "COMPUTE_USER_DATA_8"
3125 "name": "COMPUTE_USER_DATA_9"
3130 "name": "COMPUTE_USER_DATA_10"
3135 "name": "COMPUTE_USER_DATA_11"
3140 "name": "COMPUTE_USER_DATA_12"
3145 "name": "COMPUTE_USER_DATA_13"
3150 "name": "COMPUTE_USER_DATA_14"
3155 "name": "COMPUTE_USER_DATA_15"
3160 "name": "COMPUTE_DISPATCH_END"
3165 "name": "COMPUTE_NOWHERE"
3170 "name": "DB_RENDER_CONTROL",
3176 "name": "DB_COUNT_CONTROL",
3182 "name": "DB_DEPTH_VIEW",
3188 "name": "DB_RENDER_OVERRIDE",
3194 "name": "DB_RENDER_OVERRIDE2",
3200 "name": "DB_HTILE_DATA_BASE"
3205 "name": "DB_HTILE_DATA_BASE_HI",
3211 "name": "DB_DEPTH_SIZE",
3217 "name": "DB_DEPTH_BOUNDS_MIN"
3222 "name": "DB_DEPTH_BOUNDS_MAX"
3227 "name": "DB_STENCIL_CLEAR",
3233 "name": "DB_DEPTH_CLEAR"
3238 "name": "PA_SC_SCREEN_SCISSOR_TL",
3244 "name": "PA_SC_SCREEN_SCISSOR_BR",
3250 "name": "DB_Z_INFO",
3256 "name": "DB_STENCIL_INFO",
3262 "name": "DB_Z_READ_BASE"
3267 "name": "DB_Z_READ_BASE_HI",
3273 "name": "DB_STENCIL_READ_BASE"
3278 "name": "DB_STENCIL_READ_BASE_HI",
3284 "name": "DB_Z_WRITE_BASE"
3289 "name": "DB_Z_WRITE_BASE_HI",
3295 "name": "DB_STENCIL_WRITE_BASE"
3300 "name": "DB_STENCIL_WRITE_BASE_HI",
3306 "name": "DB_DFSM_CONTROL",
3312 "name": "DB_Z_INFO2",
3318 "name": "DB_STENCIL_INFO2",
3324 "name": "TA_BC_BASE_ADDR"
3329 "name": "TA_BC_BASE_ADDR_HI",
3335 "name": "COHER_DEST_BASE_HI_0",
3341 "name": "COHER_DEST_BASE_HI_1",
3347 "name": "COHER_DEST_BASE_HI_2",
3353 "name": "COHER_DEST_BASE_HI_3",
3359 "name": "COHER_DEST_BASE_2"
3364 "name": "COHER_DEST_BASE_3"
3369 "name": "PA_SC_WINDOW_OFFSET",
3375 "name": "PA_SC_WINDOW_SCISSOR_TL",
3381 "name": "PA_SC_WINDOW_SCISSOR_BR",
3387 "name": "PA_SC_CLIPRECT_RULE",
3393 "name": "PA_SC_CLIPRECT_0_TL",
3399 "name": "PA_SC_CLIPRECT_0_BR",
3405 "name": "PA_SC_CLIPRECT_1_TL",
3411 "name": "PA_SC_CLIPRECT_1_BR",
3417 "name": "PA_SC_CLIPRECT_2_TL",
3423 "name": "PA_SC_CLIPRECT_2_BR",
3429 "name": "PA_SC_CLIPRECT_3_TL",
3435 "name": "PA_SC_CLIPRECT_3_BR",
3441 "name": "PA_SC_EDGERULE",
3447 "name": "PA_SU_HARDWARE_SCREEN_OFFSET",
3453 "name": "CB_TARGET_MASK",
3459 "name": "CB_SHADER_MASK",
3465 "name": "PA_SC_GENERIC_SCISSOR_TL",
3471 "name": "PA_SC_GENERIC_SCISSOR_BR",
3477 "name": "COHER_DEST_BASE_0"
3482 "name": "COHER_DEST_BASE_1"
3487 "name": "PA_SC_VPORT_SCISSOR_0_TL",
3493 "name": "PA_SC_VPORT_SCISSOR_0_BR",
3499 "name": "PA_SC_VPORT_SCISSOR_1_TL",
3505 "name": "PA_SC_VPORT_SCISSOR_1_BR",
3511 "name": "PA_SC_VPORT_SCISSOR_2_TL",
3517 "name": "PA_SC_VPORT_SCISSOR_2_BR",
3523 "name": "PA_SC_VPORT_SCISSOR_3_TL",
3529 "name": "PA_SC_VPORT_SCISSOR_3_BR",
3535 "name": "PA_SC_VPORT_SCISSOR_4_TL",
3541 "name": "PA_SC_VPORT_SCISSOR_4_BR",
3547 "name": "PA_SC_VPORT_SCISSOR_5_TL",
3553 "name": "PA_SC_VPORT_SCISSOR_5_BR",
3559 "name": "PA_SC_VPORT_SCISSOR_6_TL",
3565 "name": "PA_SC_VPORT_SCISSOR_6_BR",
3571 "name": "PA_SC_VPORT_SCISSOR_7_TL",
3577 "name": "PA_SC_VPORT_SCISSOR_7_BR",
3583 "name": "PA_SC_VPORT_SCISSOR_8_TL",
3589 "name": "PA_SC_VPORT_SCISSOR_8_BR",
3595 "name": "PA_SC_VPORT_SCISSOR_9_TL",
3601 "name": "PA_SC_VPORT_SCISSOR_9_BR",
3607 "name": "PA_SC_VPORT_SCISSOR_10_TL",
3613 "name": "PA_SC_VPORT_SCISSOR_10_BR",
3619 "name": "PA_SC_VPORT_SCISSOR_11_TL",
3625 "name": "PA_SC_VPORT_SCISSOR_11_BR",
3631 "name": "PA_SC_VPORT_SCISSOR_12_TL",
3637 "name": "PA_SC_VPORT_SCISSOR_12_BR",
3643 "name": "PA_SC_VPORT_SCISSOR_13_TL",
3649 "name": "PA_SC_VPORT_SCISSOR_13_BR",
3655 "name": "PA_SC_VPORT_SCISSOR_14_TL",
3661 "name": "PA_SC_VPORT_SCISSOR_14_BR",
3667 "name": "PA_SC_VPORT_SCISSOR_15_TL",
3673 "name": "PA_SC_VPORT_SCISSOR_15_BR",
3679 "name": "PA_SC_VPORT_ZMIN_0"
3684 "name": "PA_SC_VPORT_ZMAX_0"
3689 "name": "PA_SC_VPORT_ZMIN_1"
3694 "name": "PA_SC_VPORT_ZMAX_1"
3699 "name": "PA_SC_VPORT_ZMIN_2"
3704 "name": "PA_SC_VPORT_ZMAX_2"
3709 "name": "PA_SC_VPORT_ZMIN_3"
3714 "name": "PA_SC_VPORT_ZMAX_3"
3719 "name": "PA_SC_VPORT_ZMIN_4"
3724 "name": "PA_SC_VPORT_ZMAX_4"
3729 "name": "PA_SC_VPORT_ZMIN_5"
3734 "name": "PA_SC_VPORT_ZMAX_5"
3739 "name": "PA_SC_VPORT_ZMIN_6"
3744 "name": "PA_SC_VPORT_ZMAX_6"
3749 "name": "PA_SC_VPORT_ZMIN_7"
3754 "name": "PA_SC_VPORT_ZMAX_7"
3759 "name": "PA_SC_VPORT_ZMIN_8"
3764 "name": "PA_SC_VPORT_ZMAX_8"
3769 "name": "PA_SC_VPORT_ZMIN_9"
3774 "name": "PA_SC_VPORT_ZMAX_9"
3779 "name": "PA_SC_VPORT_ZMIN_10"
3784 "name": "PA_SC_VPORT_ZMAX_10"
3789 "name": "PA_SC_VPORT_ZMIN_11"
3794 "name": "PA_SC_VPORT_ZMAX_11"
3799 "name": "PA_SC_VPORT_ZMIN_12"
3804 "name": "PA_SC_VPORT_ZMAX_12"
3809 "name": "PA_SC_VPORT_ZMIN_13"
3814 "name": "PA_SC_VPORT_ZMAX_13"
3819 "name": "PA_SC_VPORT_ZMIN_14"
3824 "name": "PA_SC_VPORT_ZMAX_14"
3829 "name": "PA_SC_VPORT_ZMIN_15"
3834 "name": "PA_SC_VPORT_ZMAX_15"
3839 "name": "PA_SC_RASTER_CONFIG",
3845 "name": "PA_SC_RASTER_CONFIG_1",
3851 "name": "PA_SC_SCREEN_EXTENT_CONTROL",
3857 "name": "PA_SC_TILE_STEERING_OVERRIDE",
3863 "name": "CP_PERFMON_CNTX_CNTL",
3869 "name": "CP_PIPEID",
3875 "name": "CP_VMID",
3881 "name": "PA_SC_RIGHT_VERT_GRID",
3887 "name": "PA_SC_LEFT_VERT_GRID",
3893 "name": "PA_SC_HORIZ_GRID",
3899 "name": "VGT_MULTI_PRIM_IB_RESET_INDX"
3904 "name": "CB_BLEND_RED"
3909 "name": "CB_BLEND_GREEN"
3914 "name": "CB_BLEND_BLUE"
3919 "name": "CB_BLEND_ALPHA"
3924 "name": "CB_DCC_CONTROL",
3930 "name": "DB_STENCIL_CONTROL",
3936 "name": "DB_STENCILREFMASK",
3942 "name": "DB_STENCILREFMASK_BF",
3948 "name": "PA_CL_VPORT_XSCALE"
3953 "name": "PA_CL_VPORT_XOFFSET"
3958 "name": "PA_CL_VPORT_YSCALE"
3963 "name": "PA_CL_VPORT_YOFFSET"
3968 "name": "PA_CL_VPORT_ZSCALE"
3973 "name": "PA_CL_VPORT_ZOFFSET"
3978 "name": "PA_CL_VPORT_XSCALE_1"
3983 "name": "PA_CL_VPORT_XOFFSET_1"
3988 "name": "PA_CL_VPORT_YSCALE_1"
3993 "name": "PA_CL_VPORT_YOFFSET_1"
3998 "name": "PA_CL_VPORT_ZSCALE_1"
4003 "name": "PA_CL_VPORT_ZOFFSET_1"
4008 "name": "PA_CL_VPORT_XSCALE_2"
4013 "name": "PA_CL_VPORT_XOFFSET_2"
4018 "name": "PA_CL_VPORT_YSCALE_2"
4023 "name": "PA_CL_VPORT_YOFFSET_2"
4028 "name": "PA_CL_VPORT_ZSCALE_2"
4033 "name": "PA_CL_VPORT_ZOFFSET_2"
4038 "name": "PA_CL_VPORT_XSCALE_3"
4043 "name": "PA_CL_VPORT_XOFFSET_3"
4048 "name": "PA_CL_VPORT_YSCALE_3"
4053 "name": "PA_CL_VPORT_YOFFSET_3"
4058 "name": "PA_CL_VPORT_ZSCALE_3"
4063 "name": "PA_CL_VPORT_ZOFFSET_3"
4068 "name": "PA_CL_VPORT_XSCALE_4"
4073 "name": "PA_CL_VPORT_XOFFSET_4"
4078 "name": "PA_CL_VPORT_YSCALE_4"
4083 "name": "PA_CL_VPORT_YOFFSET_4"
4088 "name": "PA_CL_VPORT_ZSCALE_4"
4093 "name": "PA_CL_VPORT_ZOFFSET_4"
4098 "name": "PA_CL_VPORT_XSCALE_5"
4103 "name": "PA_CL_VPORT_XOFFSET_5"
4108 "name": "PA_CL_VPORT_YSCALE_5"
4113 "name": "PA_CL_VPORT_YOFFSET_5"
4118 "name": "PA_CL_VPORT_ZSCALE_5"
4123 "name": "PA_CL_VPORT_ZOFFSET_5"
4128 "name": "PA_CL_VPORT_XSCALE_6"
4133 "name": "PA_CL_VPORT_XOFFSET_6"
4138 "name": "PA_CL_VPORT_YSCALE_6"
4143 "name": "PA_CL_VPORT_YOFFSET_6"
4148 "name": "PA_CL_VPORT_ZSCALE_6"
4153 "name": "PA_CL_VPORT_ZOFFSET_6"
4158 "name": "PA_CL_VPORT_XSCALE_7"
4163 "name": "PA_CL_VPORT_XOFFSET_7"
4168 "name": "PA_CL_VPORT_YSCALE_7"
4173 "name": "PA_CL_VPORT_YOFFSET_7"
4178 "name": "PA_CL_VPORT_ZSCALE_7"
4183 "name": "PA_CL_VPORT_ZOFFSET_7"
4188 "name": "PA_CL_VPORT_XSCALE_8"
4193 "name": "PA_CL_VPORT_XOFFSET_8"
4198 "name": "PA_CL_VPORT_YSCALE_8"
4203 "name": "PA_CL_VPORT_YOFFSET_8"
4208 "name": "PA_CL_VPORT_ZSCALE_8"
4213 "name": "PA_CL_VPORT_ZOFFSET_8"
4218 "name": "PA_CL_VPORT_XSCALE_9"
4223 "name": "PA_CL_VPORT_XOFFSET_9"
4228 "name": "PA_CL_VPORT_YSCALE_9"
4233 "name": "PA_CL_VPORT_YOFFSET_9"
4238 "name": "PA_CL_VPORT_ZSCALE_9"
4243 "name": "PA_CL_VPORT_ZOFFSET_9"
4248 "name": "PA_CL_VPORT_XSCALE_10"
4253 "name": "PA_CL_VPORT_XOFFSET_10"
4258 "name": "PA_CL_VPORT_YSCALE_10"
4263 "name": "PA_CL_VPORT_YOFFSET_10"
4268 "name": "PA_CL_VPORT_ZSCALE_10"
4273 "name": "PA_CL_VPORT_ZOFFSET_10"
4278 "name": "PA_CL_VPORT_XSCALE_11"
4283 "name": "PA_CL_VPORT_XOFFSET_11"
4288 "name": "PA_CL_VPORT_YSCALE_11"
4293 "name": "PA_CL_VPORT_YOFFSET_11"
4298 "name": "PA_CL_VPORT_ZSCALE_11"
4303 "name": "PA_CL_VPORT_ZOFFSET_11"
4308 "name": "PA_CL_VPORT_XSCALE_12"
4313 "name": "PA_CL_VPORT_XOFFSET_12"
4318 "name": "PA_CL_VPORT_YSCALE_12"
4323 "name": "PA_CL_VPORT_YOFFSET_12"
4328 "name": "PA_CL_VPORT_ZSCALE_12"
4333 "name": "PA_CL_VPORT_ZOFFSET_12"
4338 "name": "PA_CL_VPORT_XSCALE_13"
4343 "name": "PA_CL_VPORT_XOFFSET_13"
4348 "name": "PA_CL_VPORT_YSCALE_13"
4353 "name": "PA_CL_VPORT_YOFFSET_13"
4358 "name": "PA_CL_VPORT_ZSCALE_13"
4363 "name": "PA_CL_VPORT_ZOFFSET_13"
4368 "name": "PA_CL_VPORT_XSCALE_14"
4373 "name": "PA_CL_VPORT_XOFFSET_14"
4378 "name": "PA_CL_VPORT_YSCALE_14"
4383 "name": "PA_CL_VPORT_YOFFSET_14"
4388 "name": "PA_CL_VPORT_ZSCALE_14"
4393 "name": "PA_CL_VPORT_ZOFFSET_14"
4398 "name": "PA_CL_VPORT_XSCALE_15"
4403 "name": "PA_CL_VPORT_XOFFSET_15"
4408 "name": "PA_CL_VPORT_YSCALE_15"
4413 "name": "PA_CL_VPORT_YOFFSET_15"
4418 "name": "PA_CL_VPORT_ZSCALE_15"
4423 "name": "PA_CL_VPORT_ZOFFSET_15"
4428 "name": "PA_CL_UCP_0_X"
4433 "name": "PA_CL_UCP_0_Y"
4438 "name": "PA_CL_UCP_0_Z"
4443 "name": "PA_CL_UCP_0_W"
4448 "name": "PA_CL_UCP_1_X"
4453 "name": "PA_CL_UCP_1_Y"
4458 "name": "PA_CL_UCP_1_Z"
4463 "name": "PA_CL_UCP_1_W"
4468 "name": "PA_CL_UCP_2_X"
4473 "name": "PA_CL_UCP_2_Y"
4478 "name": "PA_CL_UCP_2_Z"
4483 "name": "PA_CL_UCP_2_W"
4488 "name": "PA_CL_UCP_3_X"
4493 "name": "PA_CL_UCP_3_Y"
4498 "name": "PA_CL_UCP_3_Z"
4503 "name": "PA_CL_UCP_3_W"
4508 "name": "PA_CL_UCP_4_X"
4513 "name": "PA_CL_UCP_4_Y"
4518 "name": "PA_CL_UCP_4_Z"
4523 "name": "PA_CL_UCP_4_W"
4528 "name": "PA_CL_UCP_5_X"
4533 "name": "PA_CL_UCP_5_Y"
4538 "name": "PA_CL_UCP_5_Z"
4543 "name": "PA_CL_UCP_5_W"
4548 "name": "PA_CL_PROG_NEAR_CLIP_Z"
4553 "name": "SPI_PS_INPUT_CNTL_0",
4559 "name": "SPI_PS_INPUT_CNTL_1",
4565 "name": "SPI_PS_INPUT_CNTL_2",
4571 "name": "SPI_PS_INPUT_CNTL_3",
4577 "name": "SPI_PS_INPUT_CNTL_4",
4583 "name": "SPI_PS_INPUT_CNTL_5",
4589 "name": "SPI_PS_INPUT_CNTL_6",
4595 "name": "SPI_PS_INPUT_CNTL_7",
4601 "name": "SPI_PS_INPUT_CNTL_8",
4607 "name": "SPI_PS_INPUT_CNTL_9",
4613 "name": "SPI_PS_INPUT_CNTL_10",
4619 "name": "SPI_PS_INPUT_CNTL_11",
4625 "name": "SPI_PS_INPUT_CNTL_12",
4631 "name": "SPI_PS_INPUT_CNTL_13",
4637 "name": "SPI_PS_INPUT_CNTL_14",
4643 "name": "SPI_PS_INPUT_CNTL_15",
4649 "name": "SPI_PS_INPUT_CNTL_16",
4655 "name": "SPI_PS_INPUT_CNTL_17",
4661 "name": "SPI_PS_INPUT_CNTL_18",
4667 "name": "SPI_PS_INPUT_CNTL_19",
4673 "name": "SPI_PS_INPUT_CNTL_20",
4679 "name": "SPI_PS_INPUT_CNTL_21",
4685 "name": "SPI_PS_INPUT_CNTL_22",
4691 "name": "SPI_PS_INPUT_CNTL_23",
4697 "name": "SPI_PS_INPUT_CNTL_24",
4703 "name": "SPI_PS_INPUT_CNTL_25",
4709 "name": "SPI_PS_INPUT_CNTL_26",
4715 "name": "SPI_PS_INPUT_CNTL_27",
4721 "name": "SPI_PS_INPUT_CNTL_28",
4727 "name": "SPI_PS_INPUT_CNTL_29",
4733 "name": "SPI_PS_INPUT_CNTL_30",
4739 "name": "SPI_PS_INPUT_CNTL_31",
4745 "name": "SPI_VS_OUT_CONFIG",
4751 "name": "SPI_PS_INPUT_ENA",
4757 "name": "SPI_PS_INPUT_ADDR",
4763 "name": "SPI_INTERP_CONTROL_0",
4769 "name": "SPI_PS_IN_CONTROL",
4775 "name": "SPI_BARYC_CNTL",
4781 "name": "SPI_TMPRING_SIZE",
4787 "name": "SPI_SHADER_POS_FORMAT",
4793 "name": "SPI_SHADER_Z_FORMAT",
4799 "name": "SPI_SHADER_COL_FORMAT",
4805 "name": "SX_PS_DOWNCONVERT",
4811 "name": "SX_BLEND_OPT_EPSILON",
4817 "name": "SX_BLEND_OPT_CONTROL",
4823 "name": "SX_MRT0_BLEND_OPT",
4829 "name": "SX_MRT1_BLEND_OPT",
4835 "name": "SX_MRT2_BLEND_OPT",
4841 "name": "SX_MRT3_BLEND_OPT",
4847 "name": "SX_MRT4_BLEND_OPT",
4853 "name": "SX_MRT5_BLEND_OPT",
4859 "name": "SX_MRT6_BLEND_OPT",
4865 "name": "SX_MRT7_BLEND_OPT",
4871 "name": "CB_BLEND0_CONTROL",
4877 "name": "CB_BLEND1_CONTROL",
4883 "name": "CB_BLEND2_CONTROL",
4889 "name": "CB_BLEND3_CONTROL",
4895 "name": "CB_BLEND4_CONTROL",
4901 "name": "CB_BLEND5_CONTROL",
4907 "name": "CB_BLEND6_CONTROL",
4913 "name": "CB_BLEND7_CONTROL",
4919 "name": "CB_MRT0_EPITCH",
4925 "name": "CB_MRT1_EPITCH",
4931 "name": "CB_MRT2_EPITCH",
4937 "name": "CB_MRT3_EPITCH",
4943 "name": "CB_MRT4_EPITCH",
4949 "name": "CB_MRT5_EPITCH",
4955 "name": "CB_MRT6_EPITCH",
4961 "name": "CB_MRT7_EPITCH",
4967 "name": "CS_COPY_STATE",
4973 "name": "GFX_COPY_STATE",
4979 "name": "PA_CL_POINT_X_RAD"
4984 "name": "PA_CL_POINT_Y_RAD"
4989 "name": "PA_CL_POINT_SIZE"
4994 "name": "PA_CL_POINT_CULL_RAD"
4999 "name": "VGT_DMA_BASE_HI",
5005 "name": "VGT_DMA_BASE"
5010 "name": "VGT_DRAW_INITIATOR",
5016 "name": "VGT_IMMED_DATA"
5021 "name": "VGT_EVENT_ADDRESS_REG",
5027 "name": "DB_DEPTH_CONTROL",
5033 "name": "DB_EQAA",
5039 "name": "CB_COLOR_CONTROL",
5045 "name": "DB_SHADER_CONTROL",
5051 "name": "PA_CL_CLIP_CNTL",
5057 "name": "PA_SU_SC_MODE_CNTL",
5063 "name": "PA_CL_VTE_CNTL",
5069 "name": "PA_CL_VS_OUT_CNTL",
5075 "name": "PA_CL_NANINF_CNTL",
5081 "name": "PA_SU_LINE_STIPPLE_CNTL",
5087 "name": "PA_SU_LINE_STIPPLE_SCALE"
5092 "name": "PA_SU_PRIM_FILTER_CNTL",
5098 "name": "PA_SU_SMALL_PRIM_FILTER_CNTL",
5104 "name": "PA_CL_OBJPRIM_ID_CNTL",
5110 "name": "PA_CL_NGG_CNTL",
5116 "name": "PA_SU_OVER_RASTERIZATION_CNTL",
5122 "name": "PA_STEREO_CNTL",
5128 "name": "PA_SU_POINT_SIZE",
5134 "name": "PA_SU_POINT_MINMAX",
5140 "name": "PA_SU_LINE_CNTL",
5146 "name": "PA_SC_LINE_STIPPLE",
5152 "name": "VGT_OUTPUT_PATH_CNTL",
5158 "name": "VGT_HOS_CNTL",
5164 "name": "VGT_HOS_MAX_TESS_LEVEL"
5169 "name": "VGT_HOS_MIN_TESS_LEVEL"
5174 "name": "VGT_HOS_REUSE_DEPTH",
5180 "name": "VGT_GROUP_PRIM_TYPE",
5186 "name": "VGT_GROUP_FIRST_DECR",
5192 "name": "VGT_GROUP_DECR",
5198 "name": "VGT_GROUP_VECT_0_CNTL",
5204 "name": "VGT_GROUP_VECT_1_CNTL",
5210 "name": "VGT_GROUP_VECT_0_FMT_CNTL",
5216 "name": "VGT_GROUP_VECT_1_FMT_CNTL",
5222 "name": "VGT_GS_MODE",
5228 "name": "VGT_GS_ONCHIP_CNTL",
5234 "name": "PA_SC_MODE_CNTL_0",
5240 "name": "PA_SC_MODE_CNTL_1",
5246 "name": "VGT_ENHANCE"
5251 "name": "VGT_GS_PER_ES",
5257 "name": "VGT_ES_PER_GS",
5263 "name": "VGT_GS_PER_VS",
5269 "name": "VGT_GSVS_RING_OFFSET_1",
5275 "name": "VGT_GSVS_RING_OFFSET_2",
5281 "name": "VGT_GSVS_RING_OFFSET_3",
5287 "name": "VGT_GS_OUT_PRIM_TYPE",
5293 "name": "IA_ENHANCE"
5298 "name": "VGT_DMA_SIZE"
5303 "name": "VGT_DMA_MAX_SIZE"
5308 "name": "VGT_DMA_INDEX_TYPE",
5314 "name": "WD_ENHANCE"
5319 "name": "VGT_PRIMITIVEID_EN",
5325 "name": "VGT_DMA_NUM_INSTANCES"
5330 "name": "VGT_PRIMITIVEID_RESET"
5335 "name": "VGT_EVENT_INITIATOR",
5341 "name": "VGT_GS_MAX_PRIMS_PER_SUBGROUP",
5347 "name": "VGT_DRAW_PAYLOAD_CNTL",
5353 "name": "VGT_INSTANCE_STEP_RATE_0"
5358 "name": "VGT_INSTANCE_STEP_RATE_1"
5363 "name": "VGT_ESGS_RING_ITEMSIZE",
5369 "name": "VGT_GSVS_RING_ITEMSIZE",
5375 "name": "VGT_REUSE_OFF",
5381 "name": "VGT_VTX_CNT_EN",
5387 "name": "DB_HTILE_SURFACE",
5393 "name": "DB_SRESULTS_COMPARE_STATE0",
5399 "name": "DB_SRESULTS_COMPARE_STATE1",
5405 "name": "DB_PRELOAD_CONTROL",
5411 "name": "VGT_STRMOUT_BUFFER_SIZE_0"
5416 "name": "VGT_STRMOUT_VTX_STRIDE_0",
5422 "name": "VGT_STRMOUT_BUFFER_OFFSET_0"
5427 "name": "VGT_STRMOUT_BUFFER_SIZE_1"
5432 "name": "VGT_STRMOUT_VTX_STRIDE_1",
5438 "name": "VGT_STRMOUT_BUFFER_OFFSET_1"
5443 "name": "VGT_STRMOUT_BUFFER_SIZE_2"
5448 "name": "VGT_STRMOUT_VTX_STRIDE_2",
5454 "name": "VGT_STRMOUT_BUFFER_OFFSET_2"
5459 "name": "VGT_STRMOUT_BUFFER_SIZE_3"
5464 "name": "VGT_STRMOUT_VTX_STRIDE_3",
5470 "name": "VGT_STRMOUT_BUFFER_OFFSET_3"
5475 "name": "VGT_STRMOUT_DRAW_OPAQUE_OFFSET"
5480 "name": "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE"
5485 "name": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE",
5491 "name": "VGT_GS_MAX_VERT_OUT",
5497 "name": "VGT_TESS_DISTRIBUTION",
5503 "name": "VGT_SHADER_STAGES_EN",
5509 "name": "VGT_LS_HS_CONFIG",
5515 "name": "VGT_GS_VERT_ITEMSIZE",
5521 "name": "VGT_GS_VERT_ITEMSIZE_1",
5527 "name": "VGT_GS_VERT_ITEMSIZE_2",
5533 "name": "VGT_GS_VERT_ITEMSIZE_3",
5539 "name": "VGT_TF_PARAM",
5545 "name": "DB_ALPHA_TO_MASK",
5551 "name": "VGT_DISPATCH_DRAW_INDEX"
5556 "name": "PA_SU_POLY_OFFSET_DB_FMT_CNTL",
5562 "name": "PA_SU_POLY_OFFSET_CLAMP"
5567 "name": "PA_SU_POLY_OFFSET_FRONT_SCALE"
5572 "name": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5577 "name": "PA_SU_POLY_OFFSET_BACK_SCALE"
5582 "name": "PA_SU_POLY_OFFSET_BACK_OFFSET"
5587 "name": "VGT_GS_INSTANCE_CNT",
5593 "name": "VGT_STRMOUT_CONFIG",
5599 "name": "VGT_STRMOUT_BUFFER_CONFIG",
5605 "name": "VGT_DMA_EVENT_INITIATOR",
5611 "name": "PA_SC_CENTROID_PRIORITY_0",
5617 "name": "PA_SC_CENTROID_PRIORITY_1",
5623 "name": "PA_SC_LINE_CNTL",
5629 "name": "PA_SC_AA_CONFIG",
5635 "name": "PA_SU_VTX_CNTL",
5641 "name": "PA_CL_GB_VERT_CLIP_ADJ"
5646 "name": "PA_CL_GB_VERT_DISC_ADJ"
5651 "name": "PA_CL_GB_HORZ_CLIP_ADJ"
5656 "name": "PA_CL_GB_HORZ_DISC_ADJ"
5661 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0",
5667 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1",
5673 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2",
5679 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3",
5685 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0",
5691 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1",
5697 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2",
5703 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3",
5709 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0",
5715 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1",
5721 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2",
5727 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3",
5733 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0",
5739 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1",
5745 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2",
5751 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3",
5757 "name": "PA_SC_AA_MASK_X0Y0_X1Y0",
5763 "name": "PA_SC_AA_MASK_X0Y1_X1Y1",
5769 "name": "PA_SC_SHADER_CONTROL",
5775 "name": "PA_SC_BINNER_CNTL_0",
5781 "name": "PA_SC_BINNER_CNTL_1",
5787 "name": "PA_SC_CONSERVATIVE_RASTERIZATION_CNTL",
5793 "name": "PA_SC_NGG_MODE_CNTL",
5799 "name": "VGT_VERTEX_REUSE_BLOCK_CNTL",
5805 "name": "VGT_OUT_DEALLOC_CNTL",
5811 "name": "CB_COLOR0_BASE"
5816 "name": "CB_COLOR0_BASE_EXT",
5822 "name": "CB_COLOR0_ATTRIB2",
5828 "name": "CB_COLOR0_VIEW",
5834 "name": "CB_COLOR0_INFO",
5840 "name": "CB_COLOR0_ATTRIB",
5846 "name": "CB_COLOR0_DCC_CONTROL",
5852 "name": "CB_COLOR0_CMASK"
5857 "name": "CB_COLOR0_CMASK_BASE_EXT",
5863 "name": "CB_COLOR0_FMASK"
5868 "name": "CB_COLOR0_FMASK_BASE_EXT",
5874 "name": "CB_COLOR0_CLEAR_WORD0"
5879 "name": "CB_COLOR0_CLEAR_WORD1"
5884 "name": "CB_COLOR0_DCC_BASE"
5889 "name": "CB_COLOR0_DCC_BASE_EXT",
5895 "name": "CB_COLOR1_BASE"
5900 "name": "CB_COLOR1_BASE_EXT",
5906 "name": "CB_COLOR1_ATTRIB2",
5912 "name": "CB_COLOR1_VIEW",
5918 "name": "CB_COLOR1_INFO",
5924 "name": "CB_COLOR1_ATTRIB",
5930 "name": "CB_COLOR1_DCC_CONTROL",
5936 "name": "CB_COLOR1_CMASK"
5941 "name": "CB_COLOR1_CMASK_BASE_EXT",
5947 "name": "CB_COLOR1_FMASK"
5952 "name": "CB_COLOR1_FMASK_BASE_EXT",
5958 "name": "CB_COLOR1_CLEAR_WORD0"
5963 "name": "CB_COLOR1_CLEAR_WORD1"
5968 "name": "CB_COLOR1_DCC_BASE"
5973 "name": "CB_COLOR1_DCC_BASE_EXT",
5979 "name": "CB_COLOR2_BASE"
5984 "name": "CB_COLOR2_BASE_EXT",
5990 "name": "CB_COLOR2_ATTRIB2",
5996 "name": "CB_COLOR2_VIEW",
6002 "name": "CB_COLOR2_INFO",
6008 "name": "CB_COLOR2_ATTRIB",
6014 "name": "CB_COLOR2_DCC_CONTROL",
6020 "name": "CB_COLOR2_CMASK"
6025 "name": "CB_COLOR2_CMASK_BASE_EXT",
6031 "name": "CB_COLOR2_FMASK"
6036 "name": "CB_COLOR2_FMASK_BASE_EXT",
6042 "name": "CB_COLOR2_CLEAR_WORD0"
6047 "name": "CB_COLOR2_CLEAR_WORD1"
6052 "name": "CB_COLOR2_DCC_BASE"
6057 "name": "CB_COLOR2_DCC_BASE_EXT",
6063 "name": "CB_COLOR3_BASE"
6068 "name": "CB_COLOR3_BASE_EXT",
6074 "name": "CB_COLOR3_ATTRIB2",
6080 "name": "CB_COLOR3_VIEW",
6086 "name": "CB_COLOR3_INFO",
6092 "name": "CB_COLOR3_ATTRIB",
6098 "name": "CB_COLOR3_DCC_CONTROL",
6104 "name": "CB_COLOR3_CMASK"
6109 "name": "CB_COLOR3_CMASK_BASE_EXT",
6115 "name": "CB_COLOR3_FMASK"
6120 "name": "CB_COLOR3_FMASK_BASE_EXT",
6126 "name": "CB_COLOR3_CLEAR_WORD0"
6131 "name": "CB_COLOR3_CLEAR_WORD1"
6136 "name": "CB_COLOR3_DCC_BASE"
6141 "name": "CB_COLOR3_DCC_BASE_EXT",
6147 "name": "CB_COLOR4_BASE"
6152 "name": "CB_COLOR4_BASE_EXT",
6158 "name": "CB_COLOR4_ATTRIB2",
6164 "name": "CB_COLOR4_VIEW",
6170 "name": "CB_COLOR4_INFO",
6176 "name": "CB_COLOR4_ATTRIB",
6182 "name": "CB_COLOR4_DCC_CONTROL",
6188 "name": "CB_COLOR4_CMASK"
6193 "name": "CB_COLOR4_CMASK_BASE_EXT",
6199 "name": "CB_COLOR4_FMASK"
6204 "name": "CB_COLOR4_FMASK_BASE_EXT",
6210 "name": "CB_COLOR4_CLEAR_WORD0"
6215 "name": "CB_COLOR4_CLEAR_WORD1"
6220 "name": "CB_COLOR4_DCC_BASE"
6225 "name": "CB_COLOR4_DCC_BASE_EXT",
6231 "name": "CB_COLOR5_BASE"
6236 "name": "CB_COLOR5_BASE_EXT",
6242 "name": "CB_COLOR5_ATTRIB2",
6248 "name": "CB_COLOR5_VIEW",
6254 "name": "CB_COLOR5_INFO",
6260 "name": "CB_COLOR5_ATTRIB",
6266 "name": "CB_COLOR5_DCC_CONTROL",
6272 "name": "CB_COLOR5_CMASK"
6277 "name": "CB_COLOR5_CMASK_BASE_EXT",
6283 "name": "CB_COLOR5_FMASK"
6288 "name": "CB_COLOR5_FMASK_BASE_EXT",
6294 "name": "CB_COLOR5_CLEAR_WORD0"
6299 "name": "CB_COLOR5_CLEAR_WORD1"
6304 "name": "CB_COLOR5_DCC_BASE"
6309 "name": "CB_COLOR5_DCC_BASE_EXT",
6315 "name": "CB_COLOR6_BASE"
6320 "name": "CB_COLOR6_BASE_EXT",
6326 "name": "CB_COLOR6_ATTRIB2",
6332 "name": "CB_COLOR6_VIEW",
6338 "name": "CB_COLOR6_INFO",
6344 "name": "CB_COLOR6_ATTRIB",
6350 "name": "CB_COLOR6_DCC_CONTROL",
6356 "name": "CB_COLOR6_CMASK"
6361 "name": "CB_COLOR6_CMASK_BASE_EXT",
6367 "name": "CB_COLOR6_FMASK"
6372 "name": "CB_COLOR6_FMASK_BASE_EXT",
6378 "name": "CB_COLOR6_CLEAR_WORD0"
6383 "name": "CB_COLOR6_CLEAR_WORD1"
6388 "name": "CB_COLOR6_DCC_BASE"
6393 "name": "CB_COLOR6_DCC_BASE_EXT",
6399 "name": "CB_COLOR7_BASE"
6404 "name": "CB_COLOR7_BASE_EXT",
6410 "name": "CB_COLOR7_ATTRIB2",
6416 "name": "CB_COLOR7_VIEW",
6422 "name": "CB_COLOR7_INFO",
6428 "name": "CB_COLOR7_ATTRIB",
6434 "name": "CB_COLOR7_DCC_CONTROL",
6440 "name": "CB_COLOR7_CMASK"
6445 "name": "CB_COLOR7_CMASK_BASE_EXT",
6451 "name": "CB_COLOR7_FMASK"
6456 "name": "CB_COLOR7_FMASK_BASE_EXT",
6462 "name": "CB_COLOR7_CLEAR_WORD0"
6467 "name": "CB_COLOR7_CLEAR_WORD1"
6472 "name": "CB_COLOR7_DCC_BASE"
6477 "name": "CB_COLOR7_DCC_BASE_EXT",
6483 "name": "CP_EOP_DONE_ADDR_LO",
6489 "name": "CP_EOP_DONE_ADDR_HI",
6495 "name": "CP_EOP_DONE_DATA_LO"
6500 "name": "CP_EOP_DONE_DATA_HI"
6505 "name": "CP_EOP_LAST_FENCE_LO"
6510 "name": "CP_EOP_LAST_FENCE_HI"
6515 "name": "CP_STREAM_OUT_ADDR_LO",
6521 "name": "CP_STREAM_OUT_ADDR_HI",
6527 "name": "CP_NUM_PRIM_WRITTEN_COUNT0_LO"
6532 "name": "CP_NUM_PRIM_WRITTEN_COUNT0_HI"
6537 "name": "CP_NUM_PRIM_NEEDED_COUNT0_LO"
6542 "name": "CP_NUM_PRIM_NEEDED_COUNT0_HI"
6547 "name": "CP_NUM_PRIM_WRITTEN_COUNT1_LO"
6552 "name": "CP_NUM_PRIM_WRITTEN_COUNT1_HI"
6557 "name": "CP_NUM_PRIM_NEEDED_COUNT1_LO"
6562 "name": "CP_NUM_PRIM_NEEDED_COUNT1_HI"
6567 "name": "CP_NUM_PRIM_WRITTEN_COUNT2_LO"
6572 "name": "CP_NUM_PRIM_WRITTEN_COUNT2_HI"
6577 "name": "CP_NUM_PRIM_NEEDED_COUNT2_LO"
6582 "name": "CP_NUM_PRIM_NEEDED_COUNT2_HI"
6587 "name": "CP_NUM_PRIM_WRITTEN_COUNT3_LO"
6592 "name": "CP_NUM_PRIM_WRITTEN_COUNT3_HI"
6597 "name": "CP_NUM_PRIM_NEEDED_COUNT3_LO"
6602 "name": "CP_NUM_PRIM_NEEDED_COUNT3_HI"
6607 "name": "CP_PIPE_STATS_ADDR_LO",
6613 "name": "CP_PIPE_STATS_ADDR_HI",
6619 "name": "CP_VGT_IAVERT_COUNT_LO"
6624 "name": "CP_VGT_IAVERT_COUNT_HI"
6629 "name": "CP_VGT_IAPRIM_COUNT_LO"
6634 "name": "CP_VGT_IAPRIM_COUNT_HI"
6639 "name": "CP_VGT_GSPRIM_COUNT_LO"
6644 "name": "CP_VGT_GSPRIM_COUNT_HI"
6649 "name": "CP_VGT_VSINVOC_COUNT_LO"
6654 "name": "CP_VGT_VSINVOC_COUNT_HI"
6659 "name": "CP_VGT_GSINVOC_COUNT_LO"
6664 "name": "CP_VGT_GSINVOC_COUNT_HI"
6669 "name": "CP_VGT_HSINVOC_COUNT_LO"
6674 "name": "CP_VGT_HSINVOC_COUNT_HI"
6679 "name": "CP_VGT_DSINVOC_COUNT_LO"
6684 "name": "CP_VGT_DSINVOC_COUNT_HI"
6689 "name": "CP_PA_CINVOC_COUNT_LO"
6694 "name": "CP_PA_CINVOC_COUNT_HI"
6699 "name": "CP_PA_CPRIM_COUNT_LO"
6704 "name": "CP_PA_CPRIM_COUNT_HI"
6709 "name": "CP_SC_PSINVOC_COUNT0_LO"
6714 "name": "CP_SC_PSINVOC_COUNT0_HI"
6719 "name": "CP_SC_PSINVOC_COUNT1_LO"
6724 "name": "CP_SC_PSINVOC_COUNT1_HI"
6729 "name": "CP_VGT_CSINVOC_COUNT_LO"
6734 "name": "CP_VGT_CSINVOC_COUNT_HI"
6739 "name": "CP_PIPE_STATS_CONTROL",
6745 "name": "CP_STREAM_OUT_CONTROL",
6751 "name": "CP_STRMOUT_CNTL",
6757 "name": "SCRATCH_REG0"
6762 "name": "SCRATCH_REG1"
6767 "name": "SCRATCH_REG2"
6772 "name": "SCRATCH_REG3"
6777 "name": "SCRATCH_REG4"
6782 "name": "SCRATCH_REG5"
6787 "name": "SCRATCH_REG6"
6792 "name": "SCRATCH_REG7"
6797 "name": "CP_APPEND_DATA_HI"
6802 "name": "CP_APPEND_LAST_CS_FENCE_HI"
6807 "name": "CP_APPEND_LAST_PS_FENCE_HI"
6812 "name": "SCRATCH_UMSK",
6818 "name": "SCRATCH_ADDR"
6823 "name": "CP_PFP_ATOMIC_PREOP_LO"
6828 "name": "CP_PFP_ATOMIC_PREOP_HI"
6833 "name": "CP_PFP_GDS_ATOMIC0_PREOP_LO"
6838 "name": "CP_PFP_GDS_ATOMIC0_PREOP_HI"
6843 "name": "CP_PFP_GDS_ATOMIC1_PREOP_LO"
6848 "name": "CP_PFP_GDS_ATOMIC1_PREOP_HI"
6853 "name": "CP_APPEND_ADDR_LO",
6859 "name": "CP_APPEND_ADDR_HI",
6865 "name": "CP_APPEND_DATA_LO"
6870 "name": "CP_APPEND_LAST_CS_FENCE_LO"
6875 "name": "CP_APPEND_LAST_PS_FENCE_LO"
6880 "name": "CP_ATOMIC_PREOP_LO"
6885 "name": "CP_ATOMIC_PREOP_HI"
6890 "name": "CP_GDS_ATOMIC0_PREOP_LO"
6895 "name": "CP_GDS_ATOMIC0_PREOP_HI"
6900 "name": "CP_GDS_ATOMIC1_PREOP_LO"
6905 "name": "CP_GDS_ATOMIC1_PREOP_HI"
6910 "name": "CP_ME_MC_WADDR_LO",
6916 "name": "CP_ME_MC_WADDR_HI",
6922 "name": "CP_ME_MC_WDATA_LO"
6927 "name": "CP_ME_MC_WDATA_HI"
6932 "name": "CP_ME_MC_RADDR_LO",
6938 "name": "CP_ME_MC_RADDR_HI",
6944 "name": "CP_SEM_WAIT_TIMER"
6949 "name": "CP_SIG_SEM_ADDR_LO",
6955 "name": "CP_SIG_SEM_ADDR_HI",
6961 "name": "CP_WAIT_REG_MEM_TIMEOUT"
6966 "name": "CP_WAIT_SEM_ADDR_LO",
6972 "name": "CP_WAIT_SEM_ADDR_HI",
6978 "name": "CP_DMA_PFP_CONTROL",
6984 "name": "CP_DMA_ME_CONTROL",
6990 "name": "CP_COHER_BASE_HI",
6996 "name": "CP_COHER_START_DELAY",
7002 "name": "CP_COHER_CNTL",
7008 "name": "CP_COHER_SIZE"
7013 "name": "CP_COHER_BASE"
7018 "name": "CP_COHER_STATUS",
7024 "name": "CP_DMA_ME_SRC_ADDR"
7029 "name": "CP_DMA_ME_SRC_ADDR_HI",
7035 "name": "CP_DMA_ME_DST_ADDR"
7040 "name": "CP_DMA_ME_DST_ADDR_HI",
7046 "name": "CP_DMA_ME_COMMAND",
7052 "name": "CP_DMA_PFP_SRC_ADDR"
7057 "name": "CP_DMA_PFP_SRC_ADDR_HI",
7063 "name": "CP_DMA_PFP_DST_ADDR"
7068 "name": "CP_DMA_PFP_DST_ADDR_HI",
7074 "name": "CP_DMA_PFP_COMMAND",
7080 "name": "CP_DMA_CNTL",
7086 "name": "CP_DMA_READ_TAGS",
7092 "name": "CP_COHER_SIZE_HI",
7098 "name": "CP_PFP_IB_CONTROL",
7104 "name": "CP_PFP_LOAD_CONTROL",
7110 "name": "CP_SCRATCH_INDEX",
7116 "name": "CP_SCRATCH_DATA"
7121 "name": "CP_RB_OFFSET",
7127 "name": "CP_IB1_OFFSET",
7133 "name": "CP_IB2_OFFSET",
7139 "name": "CP_IB1_PREAMBLE_BEGIN",
7145 "name": "CP_IB1_PREAMBLE_END",
7151 "name": "CP_IB2_PREAMBLE_BEGIN",
7157 "name": "CP_IB2_PREAMBLE_END",
7163 "name": "CP_CE_IB1_OFFSET",
7169 "name": "CP_CE_IB2_OFFSET",
7175 "name": "CP_CE_COUNTER"
7180 "name": "CP_CE_RB_OFFSET",
7186 "name": "CP_CE_INIT_CMD_BUFSZ",
7192 "name": "CP_CE_IB1_CMD_BUFSZ",
7198 "name": "CP_CE_IB2_CMD_BUFSZ",
7204 "name": "CP_IB1_CMD_BUFSZ",
7210 "name": "CP_IB2_CMD_BUFSZ",
7216 "name": "CP_ST_CMD_BUFSZ",
7222 "name": "CP_CE_INIT_BASE_LO",
7228 "name": "CP_CE_INIT_BASE_HI",
7234 "name": "CP_CE_INIT_BUFSZ",
7240 "name": "CP_CE_IB1_BASE_LO",
7246 "name": "CP_CE_IB1_BASE_HI",
7252 "name": "CP_CE_IB1_BUFSZ",
7258 "name": "CP_CE_IB2_BASE_LO",
7264 "name": "CP_CE_IB2_BASE_HI",
7270 "name": "CP_CE_IB2_BUFSZ",
7276 "name": "CP_IB1_BASE_LO",
7282 "name": "CP_IB1_BASE_HI",
7288 "name": "CP_IB1_BUFSZ",
7294 "name": "CP_IB2_BASE_LO",
7300 "name": "CP_IB2_BASE_HI",
7306 "name": "CP_IB2_BUFSZ",
7312 "name": "CP_ST_BASE_LO",
7318 "name": "CP_ST_BASE_HI",
7324 "name": "CP_ST_BUFSZ",
7330 "name": "CP_EOP_DONE_EVENT_CNTL",
7336 "name": "CP_EOP_DONE_DATA_CNTL",
7342 "name": "CP_EOP_DONE_CNTX_ID"
7347 "name": "CP_PFP_COMPLETION_STATUS",
7353 "name": "CP_CE_COMPLETION_STATUS",
7359 "name": "CP_PRED_NOT_VISIBLE",
7365 "name": "CP_PFP_METADATA_BASE_ADDR"
7370 "name": "CP_PFP_METADATA_BASE_ADDR_HI",
7376 "name": "CP_CE_METADATA_BASE_ADDR"
7381 "name": "CP_CE_METADATA_BASE_ADDR_HI",
7387 "name": "CP_DRAW_INDX_INDR_ADDR"
7392 "name": "CP_DRAW_INDX_INDR_ADDR_HI",
7398 "name": "CP_DISPATCH_INDR_ADDR"
7403 "name": "CP_DISPATCH_INDR_ADDR_HI",
7409 "name": "CP_INDEX_BASE_ADDR"
7414 "name": "CP_INDEX_BASE_ADDR_HI",
7420 "name": "CP_INDEX_TYPE",
7426 "name": "CP_GDS_BKUP_ADDR"
7431 "name": "CP_GDS_BKUP_ADDR_HI",
7437 "name": "CP_SAMPLE_STATUS",
7443 "name": "CP_ME_COHER_CNTL",
7449 "name": "CP_ME_COHER_SIZE"
7454 "name": "CP_ME_COHER_SIZE_HI",
7460 "name": "CP_ME_COHER_BASE"
7465 "name": "CP_ME_COHER_BASE_HI",
7471 "name": "CP_ME_COHER_STATUS",
7477 "name": "RLC_GPM_PERF_COUNT_0",
7483 "name": "RLC_GPM_PERF_COUNT_1",
7489 "name": "GRBM_GFX_INDEX",
7495 "name": "VGT_GSVS_RING_SIZE"
7500 "name": "VGT_PRIMITIVE_TYPE",
7506 "name": "VGT_INDEX_TYPE",
7512 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_0"
7517 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_1"
7522 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_2"
7527 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_3"
7532 "name": "VGT_MAX_VTX_INDX"
7537 "name": "VGT_MIN_VTX_INDX"
7542 "name": "VGT_INDX_OFFSET"
7547 "name": "VGT_MULTI_PRIM_IB_RESET_EN",
7553 "name": "VGT_NUM_INDICES"
7558 "name": "VGT_NUM_INSTANCES"
7563 "name": "VGT_TF_RING_SIZE",
7569 "name": "VGT_HS_OFFCHIP_PARAM",
7575 "name": "VGT_TF_MEMORY_BASE"
7580 "name": "VGT_TF_MEMORY_BASE_HI",
7586 "name": "WD_POS_BUF_BASE"
7591 "name": "WD_POS_BUF_BASE_HI",
7597 "name": "WD_CNTL_SB_BUF_BASE"
7602 "name": "WD_CNTL_SB_BUF_BASE_HI",
7608 "name": "WD_INDEX_BUF_BASE"
7613 "name": "WD_INDEX_BUF_BASE_HI",
7619 "name": "IA_MULTI_VGT_PARAM",
7625 "name": "VGT_INSTANCE_BASE_ID"
7630 "name": "PA_SU_LINE_STIPPLE_VALUE",
7636 "name": "PA_SC_LINE_STIPPLE_STATE",
7642 "name": "PA_SC_SCREEN_EXTENT_MIN_0",
7648 "name": "PA_SC_SCREEN_EXTENT_MAX_0",
7654 "name": "PA_SC_SCREEN_EXTENT_MIN_1",
7660 "name": "PA_SC_SCREEN_EXTENT_MAX_1",
7666 "name": "PA_SC_P3D_TRAP_SCREEN_HV_EN",
7672 "name": "PA_SC_P3D_TRAP_SCREEN_H",
7678 "name": "PA_SC_P3D_TRAP_SCREEN_V",
7684 "name": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE",
7690 "name": "PA_SC_P3D_TRAP_SCREEN_COUNT",
7696 "name": "PA_SC_HP3D_TRAP_SCREEN_HV_EN",
7702 "name": "PA_SC_HP3D_TRAP_SCREEN_H",
7708 "name": "PA_SC_HP3D_TRAP_SCREEN_V",
7714 "name": "PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE",
7720 "name": "PA_SC_HP3D_TRAP_SCREEN_COUNT",
7726 "name": "PA_SC_TRAP_SCREEN_HV_EN",
7732 "name": "PA_SC_TRAP_SCREEN_H",
7738 "name": "PA_SC_TRAP_SCREEN_V",
7744 "name": "PA_SC_TRAP_SCREEN_OCCURRENCE",
7750 "name": "PA_SC_TRAP_SCREEN_COUNT",
7756 "name": "PA_STATE_STEREO_X"
7761 "name": "SQ_THREAD_TRACE_BASE"
7766 "name": "SQ_THREAD_TRACE_SIZE",
7772 "name": "SQ_THREAD_TRACE_MASK",
7778 "name": "SQ_THREAD_TRACE_TOKEN_MASK",
7784 "name": "SQ_THREAD_TRACE_PERF_MASK",
7790 "name": "SQ_THREAD_TRACE_CTRL",
7796 "name": "SQ_THREAD_TRACE_MODE",
7802 "name": "SQ_THREAD_TRACE_BASE2",
7808 "name": "SQ_THREAD_TRACE_TOKEN_MASK2"
7813 "name": "SQ_THREAD_TRACE_WPTR",
7819 "name": "SQ_THREAD_TRACE_STATUS",
7825 "name": "SQ_THREAD_TRACE_HIWATER",
7831 "name": "SQ_THREAD_TRACE_CNTR"
7836 "name": "SQ_THREAD_TRACE_USERDATA_0"
7841 "name": "SQ_THREAD_TRACE_USERDATA_1"
7846 "name": "SQ_THREAD_TRACE_USERDATA_2"
7851 "name": "SQ_THREAD_TRACE_USERDATA_3"
7856 "name": "SQC_CACHES",
7862 "name": "SQC_WRITEBACK",
7868 "name": "TA_CS_BC_BASE_ADDR"
7873 "name": "TA_CS_BC_BASE_ADDR_HI",
7879 "name": "DB_OCCLUSION_COUNT0_LOW"
7884 "name": "DB_OCCLUSION_COUNT0_HI",
7890 "name": "DB_OCCLUSION_COUNT1_LOW"
7895 "name": "DB_OCCLUSION_COUNT1_HI",
7901 "name": "DB_OCCLUSION_COUNT2_LOW"
7906 "name": "DB_OCCLUSION_COUNT2_HI",
7912 "name": "DB_OCCLUSION_COUNT3_LOW"
7917 "name": "DB_OCCLUSION_COUNT3_HI",
7923 "name": "DB_ZPASS_COUNT_LOW"
7928 "name": "DB_ZPASS_COUNT_HI",
7934 "name": "GDS_RD_ADDR"
7939 "name": "GDS_RD_DATA"
7944 "name": "GDS_RD_BURST_ADDR"
7949 "name": "GDS_RD_BURST_COUNT"
7954 "name": "GDS_RD_BURST_DATA"
7959 "name": "GDS_WR_ADDR"
7964 "name": "GDS_WR_DATA"
7969 "name": "GDS_WR_BURST_ADDR"
7974 "name": "GDS_WR_BURST_DATA"
7979 "name": "GDS_WRITE_COMPLETE"
7984 "name": "GDS_ATOM_CNTL",
7990 "name": "GDS_ATOM_COMPLETE",
7996 "name": "GDS_ATOM_BASE",
8002 "name": "GDS_ATOM_SIZE",
8008 "name": "GDS_ATOM_OFFSET0",
8014 "name": "GDS_ATOM_OFFSET1",
8020 "name": "GDS_ATOM_DST"
8025 "name": "GDS_ATOM_OP",
8031 "name": "GDS_ATOM_SRC0"
8036 "name": "GDS_ATOM_SRC0_U"
8041 "name": "GDS_ATOM_SRC1"
8046 "name": "GDS_ATOM_SRC1_U"
8051 "name": "GDS_ATOM_READ0"
8056 "name": "GDS_ATOM_READ0_U"
8061 "name": "GDS_ATOM_READ1"
8066 "name": "GDS_ATOM_READ1_U"
8071 "name": "GDS_GWS_RESOURCE_CNTL",
8077 "name": "GDS_GWS_RESOURCE",
8083 "name": "GDS_GWS_RESOURCE_CNT",
8089 "name": "GDS_OA_CNTL",
8095 "name": "GDS_OA_COUNTER"
8100 "name": "GDS_OA_ADDRESS",
8106 "name": "GDS_OA_INCDEC",
8112 "name": "GDS_OA_RING_SIZE"
8117 "name": "SPI_CONFIG_CNTL",
8123 "name": "SPI_CONFIG_CNTL_1",
8129 "name": "SPI_CONFIG_CNTL_2",
8135 "name": "SPI_WAVE_LIMIT_CNTL",
8141 "name": "CPG_PERFCOUNTER1_LO"
8146 "name": "CPG_PERFCOUNTER1_HI"
8151 "name": "CPG_PERFCOUNTER0_LO"
8156 "name": "CPG_PERFCOUNTER0_HI"
8161 "name": "CPC_PERFCOUNTER1_LO"
8166 "name": "CPC_PERFCOUNTER1_HI"
8171 "name": "CPC_PERFCOUNTER0_LO"
8176 "name": "CPC_PERFCOUNTER0_HI"
8181 "name": "CPF_PERFCOUNTER1_LO"
8186 "name": "CPF_PERFCOUNTER1_HI"
8191 "name": "CPF_PERFCOUNTER0_LO"
8196 "name": "CPF_PERFCOUNTER0_HI"
8201 "name": "CPF_LATENCY_STATS_DATA"
8206 "name": "CPG_LATENCY_STATS_DATA"
8211 "name": "CPC_LATENCY_STATS_DATA"
8216 "name": "GRBM_PERFCOUNTER0_LO"
8221 "name": "GRBM_PERFCOUNTER0_HI"
8226 "name": "GRBM_PERFCOUNTER1_LO"
8231 "name": "GRBM_PERFCOUNTER1_HI"
8236 "name": "GRBM_SE0_PERFCOUNTER_LO"
8241 "name": "GRBM_SE0_PERFCOUNTER_HI"
8246 "name": "GRBM_SE1_PERFCOUNTER_LO"
8251 "name": "GRBM_SE1_PERFCOUNTER_HI"
8256 "name": "GRBM_SE2_PERFCOUNTER_LO"
8261 "name": "GRBM_SE2_PERFCOUNTER_HI"
8266 "name": "GRBM_SE3_PERFCOUNTER_LO"
8271 "name": "GRBM_SE3_PERFCOUNTER_HI"
8276 "name": "WD_PERFCOUNTER0_LO"
8281 "name": "WD_PERFCOUNTER0_HI"
8286 "name": "WD_PERFCOUNTER1_LO"
8291 "name": "WD_PERFCOUNTER1_HI"
8296 "name": "WD_PERFCOUNTER2_LO"
8301 "name": "WD_PERFCOUNTER2_HI"
8306 "name": "WD_PERFCOUNTER3_LO"
8311 "name": "WD_PERFCOUNTER3_HI"
8316 "name": "IA_PERFCOUNTER0_LO"
8321 "name": "IA_PERFCOUNTER0_HI"
8326 "name": "IA_PERFCOUNTER1_LO"
8331 "name": "IA_PERFCOUNTER1_HI"
8336 "name": "IA_PERFCOUNTER2_LO"
8341 "name": "IA_PERFCOUNTER2_HI"
8346 "name": "IA_PERFCOUNTER3_LO"
8351 "name": "IA_PERFCOUNTER3_HI"
8356 "name": "VGT_PERFCOUNTER0_LO"
8361 "name": "VGT_PERFCOUNTER0_HI"
8366 "name": "VGT_PERFCOUNTER1_LO"
8371 "name": "VGT_PERFCOUNTER1_HI"
8376 "name": "VGT_PERFCOUNTER2_LO"
8381 "name": "VGT_PERFCOUNTER2_HI"
8386 "name": "VGT_PERFCOUNTER3_LO"
8391 "name": "VGT_PERFCOUNTER3_HI"
8396 "name": "PA_SU_PERFCOUNTER0_LO"
8401 "name": "PA_SU_PERFCOUNTER0_HI",
8407 "name": "PA_SU_PERFCOUNTER1_LO"
8412 "name": "PA_SU_PERFCOUNTER1_HI",
8418 "name": "PA_SU_PERFCOUNTER2_LO"
8423 "name": "PA_SU_PERFCOUNTER2_HI",
8429 "name": "PA_SU_PERFCOUNTER3_LO"
8434 "name": "PA_SU_PERFCOUNTER3_HI",
8440 "name": "PA_SC_PERFCOUNTER0_LO"
8445 "name": "PA_SC_PERFCOUNTER0_HI"
8450 "name": "PA_SC_PERFCOUNTER1_LO"
8455 "name": "PA_SC_PERFCOUNTER1_HI"
8460 "name": "PA_SC_PERFCOUNTER2_LO"
8465 "name": "PA_SC_PERFCOUNTER2_HI"
8470 "name": "PA_SC_PERFCOUNTER3_LO"
8475 "name": "PA_SC_PERFCOUNTER3_HI"
8480 "name": "PA_SC_PERFCOUNTER4_LO"
8485 "name": "PA_SC_PERFCOUNTER4_HI"
8490 "name": "PA_SC_PERFCOUNTER5_LO"
8495 "name": "PA_SC_PERFCOUNTER5_HI"
8500 "name": "PA_SC_PERFCOUNTER6_LO"
8505 "name": "PA_SC_PERFCOUNTER6_HI"
8510 "name": "PA_SC_PERFCOUNTER7_LO"
8515 "name": "PA_SC_PERFCOUNTER7_HI"
8520 "name": "SPI_PERFCOUNTER0_HI"
8525 "name": "SPI_PERFCOUNTER0_LO"
8530 "name": "SPI_PERFCOUNTER1_HI"
8535 "name": "SPI_PERFCOUNTER1_LO"
8540 "name": "SPI_PERFCOUNTER2_HI"
8545 "name": "SPI_PERFCOUNTER2_LO"
8550 "name": "SPI_PERFCOUNTER3_HI"
8555 "name": "SPI_PERFCOUNTER3_LO"
8560 "name": "SPI_PERFCOUNTER4_HI"
8565 "name": "SPI_PERFCOUNTER4_LO"
8570 "name": "SPI_PERFCOUNTER5_HI"
8575 "name": "SPI_PERFCOUNTER5_LO"
8580 "name": "SQ_PERFCOUNTER0_LO"
8585 "name": "SQ_PERFCOUNTER0_HI"
8590 "name": "SQ_PERFCOUNTER1_LO"
8595 "name": "SQ_PERFCOUNTER1_HI"
8600 "name": "SQ_PERFCOUNTER2_LO"
8605 "name": "SQ_PERFCOUNTER2_HI"
8610 "name": "SQ_PERFCOUNTER3_LO"
8615 "name": "SQ_PERFCOUNTER3_HI"
8620 "name": "SQ_PERFCOUNTER4_LO"
8625 "name": "SQ_PERFCOUNTER4_HI"
8630 "name": "SQ_PERFCOUNTER5_LO"
8635 "name": "SQ_PERFCOUNTER5_HI"
8640 "name": "SQ_PERFCOUNTER6_LO"
8645 "name": "SQ_PERFCOUNTER6_HI"
8650 "name": "SQ_PERFCOUNTER7_LO"
8655 "name": "SQ_PERFCOUNTER7_HI"
8660 "name": "SQ_PERFCOUNTER8_LO"
8665 "name": "SQ_PERFCOUNTER8_HI"
8670 "name": "SQ_PERFCOUNTER9_LO"
8675 "name": "SQ_PERFCOUNTER9_HI"
8680 "name": "SQ_PERFCOUNTER10_LO"
8685 "name": "SQ_PERFCOUNTER10_HI"
8690 "name": "SQ_PERFCOUNTER11_LO"
8695 "name": "SQ_PERFCOUNTER11_HI"
8700 "name": "SQ_PERFCOUNTER12_LO"
8705 "name": "SQ_PERFCOUNTER12_HI"
8710 "name": "SQ_PERFCOUNTER13_LO"
8715 "name": "SQ_PERFCOUNTER13_HI"
8720 "name": "SQ_PERFCOUNTER14_LO"
8725 "name": "SQ_PERFCOUNTER14_HI"
8730 "name": "SQ_PERFCOUNTER15_LO"
8735 "name": "SQ_PERFCOUNTER15_HI"
8740 "name": "SX_PERFCOUNTER0_LO"
8745 "name": "SX_PERFCOUNTER0_HI"
8750 "name": "SX_PERFCOUNTER1_LO"
8755 "name": "SX_PERFCOUNTER1_HI"
8760 "name": "SX_PERFCOUNTER2_LO"
8765 "name": "SX_PERFCOUNTER2_HI"
8770 "name": "SX_PERFCOUNTER3_LO"
8775 "name": "SX_PERFCOUNTER3_HI"
8780 "name": "GDS_PERFCOUNTER0_LO"
8785 "name": "GDS_PERFCOUNTER0_HI"
8790 "name": "GDS_PERFCOUNTER1_LO"
8795 "name": "GDS_PERFCOUNTER1_HI"
8800 "name": "GDS_PERFCOUNTER2_LO"
8805 "name": "GDS_PERFCOUNTER2_HI"
8810 "name": "GDS_PERFCOUNTER3_LO"
8815 "name": "GDS_PERFCOUNTER3_HI"
8820 "name": "TA_PERFCOUNTER0_LO"
8825 "name": "TA_PERFCOUNTER0_HI"
8830 "name": "TA_PERFCOUNTER1_LO"
8835 "name": "TA_PERFCOUNTER1_HI"
8840 "name": "TD_PERFCOUNTER0_LO"
8845 "name": "TD_PERFCOUNTER0_HI"
8850 "name": "TD_PERFCOUNTER1_LO"
8855 "name": "TD_PERFCOUNTER1_HI"
8860 "name": "TCP_PERFCOUNTER0_LO"
8865 "name": "TCP_PERFCOUNTER0_HI"
8870 "name": "TCP_PERFCOUNTER1_LO"
8875 "name": "TCP_PERFCOUNTER1_HI"
8880 "name": "TCP_PERFCOUNTER2_LO"
8885 "name": "TCP_PERFCOUNTER2_HI"
8890 "name": "TCP_PERFCOUNTER3_LO"
8895 "name": "TCP_PERFCOUNTER3_HI"
8900 "name": "TCC_PERFCOUNTER0_LO"
8905 "name": "TCC_PERFCOUNTER0_HI"
8910 "name": "TCC_PERFCOUNTER1_LO"
8915 "name": "TCC_PERFCOUNTER1_HI"
8920 "name": "TCC_PERFCOUNTER2_LO"
8925 "name": "TCC_PERFCOUNTER2_HI"
8930 "name": "TCC_PERFCOUNTER3_LO"
8935 "name": "TCC_PERFCOUNTER3_HI"
8940 "name": "TCA_PERFCOUNTER0_LO"
8945 "name": "TCA_PERFCOUNTER0_HI"
8950 "name": "TCA_PERFCOUNTER1_LO"
8955 "name": "TCA_PERFCOUNTER1_HI"
8960 "name": "TCA_PERFCOUNTER2_LO"
8965 "name": "TCA_PERFCOUNTER2_HI"
8970 "name": "TCA_PERFCOUNTER3_LO"
8975 "name": "TCA_PERFCOUNTER3_HI"
8980 "name": "CB_PERFCOUNTER0_LO"
8985 "name": "CB_PERFCOUNTER0_HI"
8990 "name": "CB_PERFCOUNTER1_LO"
8995 "name": "CB_PERFCOUNTER1_HI"
9000 "name": "CB_PERFCOUNTER2_LO"
9005 "name": "CB_PERFCOUNTER2_HI"
9010 "name": "CB_PERFCOUNTER3_LO"
9015 "name": "CB_PERFCOUNTER3_HI"
9020 "name": "DB_PERFCOUNTER0_LO"
9025 "name": "DB_PERFCOUNTER0_HI"
9030 "name": "DB_PERFCOUNTER1_LO"
9035 "name": "DB_PERFCOUNTER1_HI"
9040 "name": "DB_PERFCOUNTER2_LO"
9045 "name": "DB_PERFCOUNTER2_HI"
9050 "name": "DB_PERFCOUNTER3_LO"
9055 "name": "DB_PERFCOUNTER3_HI"
9060 "name": "RLC_PERFCOUNTER0_LO"
9065 "name": "RLC_PERFCOUNTER0_HI"
9070 "name": "RLC_PERFCOUNTER1_LO"
9075 "name": "RLC_PERFCOUNTER1_HI"
9080 "name": "RMI_PERFCOUNTER0_LO"
9085 "name": "RMI_PERFCOUNTER0_HI"
9090 "name": "RMI_PERFCOUNTER1_LO"
9095 "name": "RMI_PERFCOUNTER1_HI"
9100 "name": "RMI_PERFCOUNTER2_LO"
9105 "name": "RMI_PERFCOUNTER2_HI"
9110 "name": "RMI_PERFCOUNTER3_LO"
9115 "name": "RMI_PERFCOUNTER3_HI"
9120 "name": "ATC_L2_PERFCOUNTER_LO"
9125 "name": "ATC_L2_PERFCOUNTER_HI",
9131 "name": "MC_VM_L2_PERFCOUNTER_LO"
9136 "name": "MC_VM_L2_PERFCOUNTER_HI",
9142 "name": "CPG_PERFCOUNTER1_SELECT",
9148 "name": "CPG_PERFCOUNTER0_SELECT1",
9154 "name": "CPG_PERFCOUNTER0_SELECT",
9160 "name": "CPC_PERFCOUNTER1_SELECT",
9166 "name": "CPC_PERFCOUNTER0_SELECT1",
9172 "name": "CPF_PERFCOUNTER1_SELECT",
9178 "name": "CPF_PERFCOUNTER0_SELECT1",
9184 "name": "CPF_PERFCOUNTER0_SELECT",
9190 "name": "CP_PERFMON_CNTL",
9196 "name": "CPC_PERFCOUNTER0_SELECT",
9202 "name": "CPF_TC_PERF_COUNTER_WINDOW_SELECT",
9208 "name": "CPG_TC_PERF_COUNTER_WINDOW_SELECT",
9214 "name": "CPF_LATENCY_STATS_SELECT",
9220 "name": "CPG_LATENCY_STATS_SELECT",
9226 "name": "CPC_LATENCY_STATS_SELECT",
9232 "name": "CP_DRAW_OBJECT"
9237 "name": "CP_DRAW_OBJECT_COUNTER",
9243 "name": "CP_DRAW_WINDOW_MASK_HI"
9248 "name": "CP_DRAW_WINDOW_HI"
9253 "name": "CP_DRAW_WINDOW_LO",
9259 "name": "CP_DRAW_WINDOW_CNTL",
9265 "name": "GRBM_PERFCOUNTER0_SELECT",
9271 "name": "GRBM_PERFCOUNTER1_SELECT",
9277 "name": "GRBM_SE0_PERFCOUNTER_SELECT",
9283 "name": "GRBM_SE1_PERFCOUNTER_SELECT",
9289 "name": "GRBM_SE2_PERFCOUNTER_SELECT",
9295 "name": "GRBM_SE3_PERFCOUNTER_SELECT",
9301 "name": "WD_PERFCOUNTER0_SELECT",
9307 "name": "WD_PERFCOUNTER1_SELECT",
9313 "name": "WD_PERFCOUNTER2_SELECT",
9319 "name": "WD_PERFCOUNTER3_SELECT",
9325 "name": "IA_PERFCOUNTER0_SELECT",
9331 "name": "IA_PERFCOUNTER1_SELECT",
9337 "name": "IA_PERFCOUNTER2_SELECT",
9343 "name": "IA_PERFCOUNTER3_SELECT",
9349 "name": "IA_PERFCOUNTER0_SELECT1",
9355 "name": "VGT_PERFCOUNTER0_SELECT",
9361 "name": "VGT_PERFCOUNTER1_SELECT",
9367 "name": "VGT_PERFCOUNTER2_SELECT",
9373 "name": "VGT_PERFCOUNTER3_SELECT",
9379 "name": "VGT_PERFCOUNTER0_SELECT1",
9385 "name": "VGT_PERFCOUNTER1_SELECT1",
9391 "name": "VGT_PERFCOUNTER_SEID_MASK",
9397 "name": "PA_SU_PERFCOUNTER0_SELECT",
9403 "name": "PA_SU_PERFCOUNTER0_SELECT1",
9409 "name": "PA_SU_PERFCOUNTER1_SELECT",
9415 "name": "PA_SU_PERFCOUNTER1_SELECT1",
9421 "name": "PA_SU_PERFCOUNTER2_SELECT",
9427 "name": "PA_SU_PERFCOUNTER3_SELECT",
9433 "name": "PA_SC_PERFCOUNTER0_SELECT",
9439 "name": "PA_SC_PERFCOUNTER0_SELECT1",
9445 "name": "PA_SC_PERFCOUNTER1_SELECT",
9451 "name": "PA_SC_PERFCOUNTER2_SELECT",
9457 "name": "PA_SC_PERFCOUNTER3_SELECT",
9463 "name": "PA_SC_PERFCOUNTER4_SELECT",
9469 "name": "PA_SC_PERFCOUNTER5_SELECT",
9475 "name": "PA_SC_PERFCOUNTER6_SELECT",
9481 "name": "PA_SC_PERFCOUNTER7_SELECT",
9487 "name": "SPI_PERFCOUNTER0_SELECT",
9493 "name": "SPI_PERFCOUNTER1_SELECT",
9499 "name": "SPI_PERFCOUNTER2_SELECT",
9505 "name": "SPI_PERFCOUNTER3_SELECT",
9511 "name": "SPI_PERFCOUNTER0_SELECT1",
9517 "name": "SPI_PERFCOUNTER1_SELECT1",
9523 "name": "SPI_PERFCOUNTER2_SELECT1",
9529 "name": "SPI_PERFCOUNTER3_SELECT1",
9535 "name": "SPI_PERFCOUNTER4_SELECT",
9541 "name": "SPI_PERFCOUNTER5_SELECT",
9547 "name": "SPI_PERFCOUNTER_BINS",
9553 "name": "SQ_PERFCOUNTER0_SELECT",
9559 "name": "SQ_PERFCOUNTER1_SELECT",
9565 "name": "SQ_PERFCOUNTER2_SELECT",
9571 "name": "SQ_PERFCOUNTER3_SELECT",
9577 "name": "SQ_PERFCOUNTER4_SELECT",
9583 "name": "SQ_PERFCOUNTER5_SELECT",
9589 "name": "SQ_PERFCOUNTER6_SELECT",
9595 "name": "SQ_PERFCOUNTER7_SELECT",
9601 "name": "SQ_PERFCOUNTER8_SELECT",
9607 "name": "SQ_PERFCOUNTER9_SELECT",
9613 "name": "SQ_PERFCOUNTER10_SELECT",
9619 "name": "SQ_PERFCOUNTER11_SELECT",
9625 "name": "SQ_PERFCOUNTER12_SELECT",
9631 "name": "SQ_PERFCOUNTER13_SELECT",
9637 "name": "SQ_PERFCOUNTER14_SELECT",
9643 "name": "SQ_PERFCOUNTER15_SELECT",
9649 "name": "SQ_PERFCOUNTER_CTRL",
9655 "name": "SQ_PERFCOUNTER_MASK",
9661 "name": "SQ_PERFCOUNTER_CTRL2",
9667 "name": "SX_PERFCOUNTER0_SELECT",
9673 "name": "SX_PERFCOUNTER1_SELECT",
9679 "name": "SX_PERFCOUNTER2_SELECT",
9685 "name": "SX_PERFCOUNTER3_SELECT",
9691 "name": "SX_PERFCOUNTER0_SELECT1",
9697 "name": "SX_PERFCOUNTER1_SELECT1",
9703 "name": "GDS_PERFCOUNTER0_SELECT",
9709 "name": "GDS_PERFCOUNTER1_SELECT",
9715 "name": "GDS_PERFCOUNTER2_SELECT",
9721 "name": "GDS_PERFCOUNTER3_SELECT",
9727 "name": "GDS_PERFCOUNTER0_SELECT1",
9733 "name": "TA_PERFCOUNTER0_SELECT",
9739 "name": "TA_PERFCOUNTER0_SELECT1",
9745 "name": "TA_PERFCOUNTER1_SELECT",
9751 "name": "TD_PERFCOUNTER0_SELECT",
9757 "name": "TD_PERFCOUNTER0_SELECT1",
9763 "name": "TD_PERFCOUNTER1_SELECT",
9769 "name": "TCP_PERFCOUNTER0_SELECT",
9775 "name": "TCP_PERFCOUNTER0_SELECT1",
9781 "name": "TCP_PERFCOUNTER1_SELECT",
9787 "name": "TCP_PERFCOUNTER1_SELECT1",
9793 "name": "TCP_PERFCOUNTER2_SELECT",
9799 "name": "TCP_PERFCOUNTER3_SELECT",
9805 "name": "TCC_PERFCOUNTER0_SELECT",
9811 "name": "TCC_PERFCOUNTER0_SELECT1",
9817 "name": "TCC_PERFCOUNTER1_SELECT",
9823 "name": "TCC_PERFCOUNTER1_SELECT1",
9829 "name": "TCC_PERFCOUNTER2_SELECT",
9835 "name": "TCC_PERFCOUNTER3_SELECT",
9841 "name": "TCA_PERFCOUNTER0_SELECT",
9847 "name": "TCA_PERFCOUNTER0_SELECT1",
9853 "name": "TCA_PERFCOUNTER1_SELECT",
9859 "name": "TCA_PERFCOUNTER1_SELECT1",
9865 "name": "TCA_PERFCOUNTER2_SELECT",
9871 "name": "TCA_PERFCOUNTER3_SELECT",
9877 "name": "CB_PERFCOUNTER_FILTER",
9883 "name": "CB_PERFCOUNTER0_SELECT",
9889 "name": "CB_PERFCOUNTER0_SELECT1",
9895 "name": "CB_PERFCOUNTER1_SELECT",
9901 "name": "CB_PERFCOUNTER2_SELECT",
9907 "name": "CB_PERFCOUNTER3_SELECT",
9913 "name": "DB_PERFCOUNTER0_SELECT",
9919 "name": "DB_PERFCOUNTER0_SELECT1",
9925 "name": "DB_PERFCOUNTER1_SELECT",
9931 "name": "DB_PERFCOUNTER1_SELECT1",
9937 "name": "DB_PERFCOUNTER2_SELECT",
9943 "name": "DB_PERFCOUNTER3_SELECT",
9949 "name": "RLC_SPM_PERFMON_CNTL",
9955 "name": "RLC_SPM_PERFMON_RING_BASE_LO"
9960 "name": "RLC_SPM_PERFMON_RING_BASE_HI",
9966 "name": "RLC_SPM_PERFMON_RING_SIZE"
9971 "name": "RLC_SPM_PERFMON_SEGMENT_SIZE",
9977 "name": "RLC_SPM_SE_MUXSEL_ADDR"
9982 "name": "RLC_SPM_SE_MUXSEL_DATA"
9987 "name": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY",
9993 "name": "RLC_SPM_CPC_PERFMON_SAMPLE_DELAY",
9999 "name": "RLC_SPM_CPF_PERFMON_SAMPLE_DELAY",
10005 "name": "RLC_SPM_CB_PERFMON_SAMPLE_DELAY",
10011 "name": "RLC_SPM_DB_PERFMON_SAMPLE_DELAY",
10017 "name": "RLC_SPM_PA_PERFMON_SAMPLE_DELAY",
10023 "name": "RLC_SPM_GDS_PERFMON_SAMPLE_DELAY",
10029 "name": "RLC_SPM_IA_PERFMON_SAMPLE_DELAY",
10035 "name": "RLC_SPM_SC_PERFMON_SAMPLE_DELAY",
10041 "name": "RLC_SPM_TCC_PERFMON_SAMPLE_DELAY",
10047 "name": "RLC_SPM_TCA_PERFMON_SAMPLE_DELAY",
10053 "name": "RLC_SPM_TCP_PERFMON_SAMPLE_DELAY",
10059 "name": "RLC_SPM_TA_PERFMON_SAMPLE_DELAY",
10065 "name": "RLC_SPM_TD_PERFMON_SAMPLE_DELAY",
10071 "name": "RLC_SPM_VGT_PERFMON_SAMPLE_DELAY",
10077 "name": "RLC_SPM_SPI_PERFMON_SAMPLE_DELAY",
10083 "name": "RLC_SPM_SQG_PERFMON_SAMPLE_DELAY",
10089 "name": "RLC_SPM_SX_PERFMON_SAMPLE_DELAY",
10095 "name": "RLC_SPM_GLOBAL_MUXSEL_ADDR"
10100 "name": "RLC_SPM_GLOBAL_MUXSEL_DATA"
10105 "name": "RLC_SPM_RING_RDPTR"
10110 "name": "RLC_SPM_SEGMENT_THRESHOLD"
10115 "name": "RLC_SPM_RMI_PERFMON_SAMPLE_DELAY",
10121 "name": "RLC_SPM_PERFMON_SAMPLE_DELAY_MAX",
10127 "name": "RLC_PERFMON_CLK_CNTL_UCODE",
10133 "name": "RLC_PERFMON_CLK_CNTL",
10139 "name": "RLC_PERFMON_CNTL",
10145 "name": "RLC_PERFCOUNTER0_SELECT",
10151 "name": "RLC_PERFCOUNTER1_SELECT",
10157 "name": "RLC_GPU_IOV_PERF_CNT_CNTL",
10163 "name": "RLC_GPU_IOV_PERF_CNT_WR_ADDR",
10169 "name": "RLC_GPU_IOV_PERF_CNT_WR_DATA",
10175 "name": "RLC_GPU_IOV_PERF_CNT_RD_ADDR",
10181 "name": "RLC_GPU_IOV_PERF_CNT_RD_DATA",
10187 "name": "RMI_PERFCOUNTER0_SELECT",
10193 "name": "RMI_PERFCOUNTER0_SELECT1",
10199 "name": "RMI_PERFCOUNTER1_SELECT",
10205 "name": "RMI_PERFCOUNTER2_SELECT",
10211 "name": "RMI_PERFCOUNTER2_SELECT1",
10217 "name": "RMI_PERFCOUNTER3_SELECT",
10223 "name": "RMI_PERF_COUNTER_CNTL",
10229 "name": "ATC_L2_PERFCOUNTER0_CFG",
10235 "name": "ATC_L2_PERFCOUNTER1_CFG",
10241 "name": "ATC_L2_PERFCOUNTER_RSLT_CNTL",
10247 "name": "MC_VM_L2_PERFCOUNTER0_CFG",
10253 "name": "MC_VM_L2_PERFCOUNTER1_CFG",
10259 "name": "MC_VM_L2_PERFCOUNTER2_CFG",
10265 "name": "MC_VM_L2_PERFCOUNTER3_CFG",
10271 "name": "MC_VM_L2_PERFCOUNTER4_CFG",
10277 "name": "MC_VM_L2_PERFCOUNTER5_CFG",
10283 "name": "MC_VM_L2_PERFCOUNTER6_CFG",
10289 "name": "MC_VM_L2_PERFCOUNTER7_CFG",
10295 "name": "MC_VM_L2_PERFCOUNTER_RSLT_CNTL",
10302 {"bits": [0, 7], "name": "PERF_SEL"},
10303 {"bits": [8, 15], "name": "PERF_SEL_END"},
10304 {"bits": [24, 27], "name": "PERF_MODE"},
10305 {"bits": [28, 28], "name": "ENABLE"},
10306 {"bits": [29, 29], "name": "CLEAR"}
10311 {"bits": [0, 15], "name": "COUNTER_HI"},
10312 {"bits": [16, 31], "name": "COMPARE_VALUE"}
10317 {"bits": [0, 3], "name": "PERF_COUNTER_SELECT"},
10318 {"bits": [8, 15], "name": "START_TRIGGER"},
10319 {"bits": [16, 23], "name": "STOP_TRIGGER"},
10320 {"bits": [24, 24], "name": "ENABLE_ANY"},
10321 {"bits": [25, 25], "name": "CLEAR_ALL"},
10322 {"bits": [26, 26], "name": "STOP_ALL_ON_SATURATE"}
10327 {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"},
10328 {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"},
10329 {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"},
10330 {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"},
10331 {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"},
10332 {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"},
10333 {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"},
10334 {"bits": [30, 30], "name": "ENABLE"},
10335 {"bits": [31, 31], "name": "DISABLE_ROP3"}
10340 {"bits": [0, 10], "name": "MIP0_DEPTH"},
10341 {"bits": [11, 11], "name": "META_LINEAR"},
10342 {"bits": [12, 14], "name": "NUM_SAMPLES"},
10343 {"bits": [15, 16], "name": "NUM_FRAGMENTS"},
10344 {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"},
10345 {"bits": [18, 22], "name": "COLOR_SW_MODE"},
10346 {"bits": [23, 27], "name": "FMASK_SW_MODE"},
10347 {"bits": [28, 29], "name": "RESOURCE_TYPE"},
10348 {"bits": [30, 30], "name": "RB_ALIGNED"},
10349 {"bits": [31, 31], "name": "PIPE_ALIGNED"}
10354 {"bits": [0, 13], "name": "MIP0_HEIGHT"},
10355 {"bits": [14, 27], "name": "MIP0_WIDTH"},
10356 {"bits": [28, 31], "name": "MAX_MIP"}
10361 {"bits": [0, 7], "name": "BASE_256B"}
10366 {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
10367 {"bits": [1, 1], "name": "KEY_CLEAR_ENABLE"},
10368 {"bits": [2, 3], "enum_ref": "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE", "name": "MAX_UNCOMPRESSED_BLOCK_SIZE"},
10369 {"bits": [4, 4], "enum_ref": "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE", "name": "MIN_COMPRESSED_BLOCK_SIZE"},
10370 {"bits": [5, 6], "name": "MAX_COMPRESSED_BLOCK_SIZE"},
10371 {"bits": [7, 8], "name": "COLOR_TRANSFORM"},
10372 {"bits": [9, 9], "name": "INDEPENDENT_64B_BLOCKS"},
10373 {"bits": [10, 13], "name": "LOSSY_RGB_PRECISION"},
10374 {"bits": [14, 17], "name": "LOSSY_ALPHA_PRECISION"},
10375 {"bits": [18, 18], "name": "DISABLE_CONSTANT_ENCODE_REG"},
10376 {"bits": [19, 19], "name": "ENABLE_CONSTANT_ENCODE_REG_WRITE"}
10381 {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"},
10382 {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"},
10383 {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"},
10384 {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"},
10385 {"bits": [13, 13], "name": "FAST_CLEAR"},
10386 {"bits": [14, 14], "name": "COMPRESSION"},
10387 {"bits": [15, 15], "name": "BLEND_CLAMP"},
10388 {"bits": [16, 16], "name": "BLEND_BYPASS"},
10389 {"bits": [17, 17], "name": "SIMPLE_FLOAT"},
10390 {"bits": [18, 18], "name": "ROUND_MODE"},
10391 {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"},
10392 {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"},
10393 {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"},
10394 {"bits": [27, 27], "name": "FMASK_COMPRESS_1FRAG_ONLY"},
10395 {"bits": [28, 28], "name": "DCC_ENABLE"},
10396 {"bits": [29, 30], "enum_ref": "CmaskAddr", "name": "CMASK_ADDR_TYPE"}
10401 {"bits": [0, 10], "name": "SLICE_START"},
10402 {"bits": [13, 23], "name": "SLICE_MAX"},
10403 {"bits": [24, 27], "name": "MIP_LEVEL"}
10408 {"bits": [0, 0], "name": "DISABLE_DUAL_QUAD"},
10409 {"bits": [3, 3], "name": "DEGAMMA_ENABLE"},
10410 {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"},
10411 {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"}
10416 {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
10417 {"bits": [1, 1], "name": "OVERWRITE_COMBINER_MRT_SHARING_DISABLE"},
10418 {"bits": [2, 6], "name": "OVERWRITE_COMBINER_WATERMARK"},
10419 {"bits": [8, 8], "name": "DISABLE_CONSTANT_ENCODE_AC01"},
10420 {"bits": [9, 9], "name": "DISABLE_CONSTANT_ENCODE_SINGLE"},
10421 {"bits": [10, 10], "name": "DISABLE_CONSTANT_ENCODE_REG"},
10422 {"bits": [12, 12], "name": "DISABLE_ELIMFC_SKIP_OF_AC01"},
10423 {"bits": [13, 13], "name": "DISABLE_ELIMFC_SKIP_OF_SINGLE"},
10424 {"bits": [14, 14], "name": "ENABLE_ELIMFC_SKIP_OF_REG"}
10429 {"bits": [0, 8], "name": "PERF_SEL"},
10430 {"bits": [10, 18], "name": "PERF_SEL1"},
10431 {"bits": [20, 23], "name": "CNTR_MODE"},
10432 {"bits": [24, 27], "name": "PERF_MODE1"},
10433 {"bits": [28, 31], "name": "PERF_MODE"}
10438 {"bits": [0, 8], "name": "PERF_SEL2"},
10439 {"bits": [10, 18], "name": "PERF_SEL3"},
10440 {"bits": [24, 27], "name": "PERF_MODE3"},
10441 {"bits": [28, 31], "name": "PERF_MODE2"}
10446 {"bits": [0, 8], "name": "PERF_SEL"},
10447 {"bits": [28, 31], "name": "PERF_MODE"}
10452 {"bits": [0, 0], "name": "OP_FILTER_ENABLE"},
10453 {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"},
10454 {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"},
10455 {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"},
10456 {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"},
10457 {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"},
10458 {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"},
10459 {"bits": [13, 15], "name": "MRT_FILTER_SEL"},
10460 {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"},
10461 {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"},
10462 {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"},
10463 {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"}
10468 {"bits": [0, 3], "name": "OUTPUT0_ENABLE"},
10469 {"bits": [4, 7], "name": "OUTPUT1_ENABLE"},
10470 {"bits": [8, 11], "name": "OUTPUT2_ENABLE"},
10471 {"bits": [12, 15], "name": "OUTPUT3_ENABLE"},
10472 {"bits": [16, 19], "name": "OUTPUT4_ENABLE"},
10473 {"bits": [20, 23], "name": "OUTPUT5_ENABLE"},
10474 {"bits": [24, 27], "name": "OUTPUT6_ENABLE"},
10475 {"bits": [28, 31], "name": "OUTPUT7_ENABLE"}
10480 {"bits": [0, 3], "name": "TARGET0_ENABLE"},
10481 {"bits": [4, 7], "name": "TARGET1_ENABLE"},
10482 {"bits": [8, 11], "name": "TARGET2_ENABLE"},
10483 {"bits": [12, 15], "name": "TARGET3_ENABLE"},
10484 {"bits": [16, 19], "name": "TARGET4_ENABLE"},
10485 {"bits": [20, 23], "name": "TARGET5_ENABLE"},
10486 {"bits": [24, 27], "name": "TARGET6_ENABLE"},
10487 {"bits": [28, 31], "name": "TARGET7_ENABLE"}
10492 {"bits": [0, 7], "name": "DEST_BASE_HI_256B"}
10497 {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"},
10498 {"bits": [1, 1], "name": "PARTIAL_TG_EN"},
10499 {"bits": [2, 2], "name": "FORCE_START_AT_000"},
10500 {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"},
10501 {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"},
10502 {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"},
10503 {"bits": [6, 6], "name": "ORDER_MODE"},
10504 {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"},
10505 {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"},
10506 {"bits": [12, 12], "name": "RESERVED"},
10507 {"bits": [14, 14], "name": "RESTORE"}
10512 {"bits": [0, 1], "name": "SEND_SEID"},
10513 {"bits": [2, 2], "name": "RESERVED2"},
10514 {"bits": [3, 3], "name": "RESERVED3"},
10515 {"bits": [4, 4], "name": "RESERVED4"},
10516 {"bits": [5, 16], "name": "WAVE_ID_BASE"}
10521 {"bits": [0, 15], "name": "NUM_THREAD_FULL"},
10522 {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"}
10527 {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"}
10532 {"bits": [0, 7], "name": "DATA"}
10537 {"bits": [0, 5], "name": "VGPRS"},
10538 {"bits": [6, 9], "name": "SGPRS"},
10539 {"bits": [10, 11], "name": "PRIORITY"},
10540 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
10541 {"bits": [20, 20], "name": "PRIV"},
10542 {"bits": [21, 21], "name": "DX10_CLAMP"},
10543 {"bits": [22, 22], "name": "DEBUG_MODE"},
10544 {"bits": [23, 23], "name": "IEEE_MODE"},
10545 {"bits": [24, 24], "name": "BULKY"},
10546 {"bits": [25, 25], "name": "CDBG_USER"},
10547 {"bits": [26, 26], "name": "FP16_OVFL"}
10552 {"bits": [0, 0], "name": "SCRATCH_EN"},
10553 {"bits": [1, 5], "name": "USER_SGPR"},
10554 {"bits": [6, 6], "name": "TRAP_PRESENT"},
10555 {"bits": [7, 7], "name": "TGID_X_EN"},
10556 {"bits": [8, 8], "name": "TGID_Y_EN"},
10557 {"bits": [9, 9], "name": "TGID_Z_EN"},
10558 {"bits": [10, 10], "name": "TG_SIZE_EN"},
10559 {"bits": [11, 12], "name": "TIDIG_COMP_CNT"},
10560 {"bits": [13, 14], "name": "EXCP_EN_MSB"},
10561 {"bits": [15, 23], "name": "LDS_SIZE"},
10562 {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
10563 {"bits": [31, 31], "name": "SKIP_USGPR0"}
10568 {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"}
10573 {"bits": [0, 29], "name": "PAYLOAD"},
10574 {"bits": [30, 30], "name": "IS_EVENT"},
10575 {"bits": [31, 31], "name": "IS_STATE"}
10580 {"bits": [0, 9], "name": "WAVES_PER_SH"},
10581 {"bits": [12, 15], "name": "TG_PER_CU"},
10582 {"bits": [16, 21], "name": "LOCK_THRESHOLD"},
10583 {"bits": [22, 22], "name": "SIMD_DEST_CNTL"},
10584 {"bits": [23, 23], "name": "FORCE_SIMD_DIST"},
10585 {"bits": [24, 26], "name": "CU_GROUP_COUNT"},
10586 {"bits": [27, 30], "name": "SIMD_DISABLE"}
10591 {"bits": [0, 15], "name": "SH0_CU_EN"},
10592 {"bits": [16, 31], "name": "SH1_CU_EN"}
10597 {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"}
10602 {"bits": [0, 11], "name": "WAVES"},
10603 {"bits": [12, 24], "name": "WAVESIZE"}
10608 {"bits": [0, 3], "name": "DATA"}
10613 {"bits": [0, 15], "name": "ADDR"}
10618 {"bits": [0, 2], "name": "INDEX"},
10619 {"bits": [30, 30], "name": "CLEAR"},
10620 {"bits": [31, 31], "name": "ENABLE"}
10625 {"bits": [0, 3], "name": "INDEX"},
10626 {"bits": [30, 30], "name": "CLEAR"},
10627 {"bits": [31, 31], "name": "ENABLE"}
10632 {"bits": [0, 2], "name": "INDEX"},
10633 {"bits": [30, 30], "name": "ALWAYS"},
10634 {"bits": [31, 31], "name": "ENABLE"}
10639 {"bits": [0, 4], "name": "INDEX"},
10640 {"bits": [30, 30], "name": "CLEAR"},
10641 {"bits": [31, 31], "name": "ENABLE"}
10646 {"bits": [0, 9], "name": "CNTR_SEL2"},
10647 {"bits": [10, 19], "name": "CNTR_SEL3"},
10648 {"bits": [24, 27], "name": "CNTR_MODE3"},
10649 {"bits": [28, 31], "name": "CNTR_MODE2"}
10654 {"bits": [0, 9], "name": "CNTR_SEL0"},
10655 {"bits": [10, 19], "name": "CNTR_SEL1"},
10656 {"bits": [20, 23], "name": "SPM_MODE"},
10657 {"bits": [24, 27], "name": "CNTR_MODE1"},
10658 {"bits": [28, 31], "name": "CNTR_MODE0"}
10663 {"bits": [0, 4], "name": "INDEX"},
10664 {"bits": [30, 30], "name": "ALWAYS"},
10665 {"bits": [31, 31], "name": "ENABLE"}
10670 {"bits": [0, 15], "name": "MEM_ADDR_HI"},
10671 {"bits": [16, 16], "name": "CS_PS_SEL"},
10672 {"bits": [25, 25], "name": "CACHE_POLICY"},
10673 {"bits": [29, 31], "name": "COMMAND"}
10678 {"bits": [2, 31], "name": "MEM_ADDR_LO"}
10683 {"bits": [0, 15], "name": "IB1_BASE_HI"}
10688 {"bits": [2, 31], "name": "IB1_BASE_LO"}
10693 {"bits": [0, 19], "name": "IB1_BUFSZ"}
10698 {"bits": [0, 19], "name": "IB1_CMD_REQSZ"}
10703 {"bits": [0, 15], "name": "IB2_BASE_HI"}
10708 {"bits": [2, 31], "name": "IB2_BASE_LO"}
10713 {"bits": [0, 19], "name": "IB2_BUFSZ"}
10718 {"bits": [0, 19], "name": "IB2_CMD_REQSZ"}
10723 {"bits": [0, 15], "name": "INIT_BASE_HI"}
10728 {"bits": [5, 31], "name": "INIT_BASE_LO"}
10733 {"bits": [0, 11], "name": "INIT_BUFSZ"}
10738 {"bits": [0, 11], "name": "INIT_CMD_REQSZ"}
10743 {"bits": [0, 7], "name": "COHER_BASE_HI_256B"}
10748 {"bits": [3, 3], "name": "TC_NC_ACTION_ENA"},
10749 {"bits": [4, 4], "name": "TC_WC_ACTION_ENA"},
10750 {"bits": [5, 5], "name": "TC_INV_METADATA_ACTION_ENA"},
10751 {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"},
10752 {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"},
10753 {"bits": [22, 22], "name": "TCL1_ACTION_ENA"},
10754 {"bits": [23, 23], "name": "TC_ACTION_ENA"},
10755 {"bits": [25, 25], "name": "CB_ACTION_ENA"},
10756 {"bits": [26, 26], "name": "DB_ACTION_ENA"},
10757 {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"},
10758 {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"},
10759 {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"},
10760 {"bits": [30, 30], "name": "SH_KCACHE_WB_ACTION_ENA"}
10765 {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"}
10770 {"bits": [0, 5], "name": "START_DELAY_COUNT"}
10775 {"bits": [24, 25], "name": "MEID"},
10776 {"bits": [31, 31], "name": "STATUS"}
10781 {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"},
10782 {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"},
10783 {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"},
10784 {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"},
10785 {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"},
10786 {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"},
10787 {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"},
10788 {"bits": [7, 7], "name": "MEC1_TC_BUSY"},
10789 {"bits": [8, 8], "name": "MEC1_DMA_BUSY"},
10790 {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"},
10791 {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"},
10792 {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"},
10793 {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"},
10794 {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"},
10795 {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"},
10796 {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"},
10797 {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"},
10798 {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"},
10799 {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"},
10800 {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"},
10801 {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"},
10802 {"bits": [23, 23], "name": "MEC2_TC_BUSY"},
10803 {"bits": [24, 24], "name": "MEC2_DMA_BUSY"},
10804 {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"},
10805 {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"},
10806 {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"},
10807 {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"},
10808 {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"}
10813 {"bits": [0, 5], "name": "FREE_COUNT"}
10818 {"bits": [0, 3], "name": "COUNT"}
10823 {"bits": [0, 8], "name": "SCRATCH_INDEX"}
10828 {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"},
10829 {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"},
10830 {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"},
10831 {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"},
10832 {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"},
10833 {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"},
10834 {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"},
10835 {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"},
10836 {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"},
10837 {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"},
10838 {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"},
10839 {"bits": [22, 22], "name": "UTCL2IU_WAITING_ON_FREE"},
10840 {"bits": [23, 23], "name": "UTCL2IU_WAITING_ON_TAGS"},
10841 {"bits": [24, 24], "name": "UTCL1_WAITING_ON_TRANS"}
10846 {"bits": [0, 0], "name": "MEC1_BUSY"},
10847 {"bits": [1, 1], "name": "MEC2_BUSY"},
10848 {"bits": [2, 2], "name": "DC0_BUSY"},
10849 {"bits": [3, 3], "name": "DC1_BUSY"},
10850 {"bits": [4, 4], "name": "RCIU1_BUSY"},
10851 {"bits": [5, 5], "name": "RCIU2_BUSY"},
10852 {"bits": [6, 6], "name": "ROQ1_BUSY"},
10853 {"bits": [7, 7], "name": "ROQ2_BUSY"},
10854 {"bits": [10, 10], "name": "TCIU_BUSY"},
10855 {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"},
10856 {"bits": [12, 12], "name": "QU_BUSY"},
10857 {"bits": [13, 13], "name": "UTCL2IU_BUSY"},
10858 {"bits": [14, 14], "name": "SAVE_RESTORE_BUSY"},
10859 {"bits": [29, 29], "name": "CPG_CPC_BUSY"},
10860 {"bits": [30, 30], "name": "CPF_CPC_BUSY"},
10861 {"bits": [31, 31], "name": "CPC_BUSY"}
10866 {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"},
10867 {"bits": [1, 1], "name": "CSF_RING_BUSY"},
10868 {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"},
10869 {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"},
10870 {"bits": [4, 4], "name": "CSF_STATE_BUSY"},
10871 {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"},
10872 {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"},
10873 {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"},
10874 {"bits": [8, 8], "name": "CSF_INPUT_BUSY"},
10875 {"bits": [9, 9], "name": "OUTSTANDING_READ_TAGS"},
10876 {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"},
10877 {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"},
10878 {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"},
10879 {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"},
10880 {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"},
10881 {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"},
10882 {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"},
10883 {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"},
10884 {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"},
10885 {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"},
10886 {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"},
10887 {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"},
10888 {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"},
10889 {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"},
10890 {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"},
10891 {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"},
10892 {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"},
10893 {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"},
10894 {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"},
10895 {"bits": [30, 30], "name": "HQD_PQ_BUSY"},
10896 {"bits": [31, 31], "name": "HQD_IB_BUSY"}
10901 {"bits": [0, 2], "name": "FREE_COUNT"}
10906 {"bits": [0, 0], "name": "RING_FETCHING_DATA"},
10907 {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"},
10908 {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"},
10909 {"bits": [3, 3], "name": "STATE_FETCHING_DATA"},
10910 {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"},
10911 {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"},
10912 {"bits": [7, 7], "name": "UTCL2IU_WAITING_ON_FREE"},
10913 {"bits": [8, 8], "name": "UTCL2IU_WAITING_ON_TAGS"},
10914 {"bits": [9, 9], "name": "GFX_UTCL1_WAITING_ON_TRANS"},
10915 {"bits": [10, 10], "name": "CMP_UTCL1_WAITING_ON_TRANS"},
10916 {"bits": [11, 11], "name": "RCIU_WAITING_ON_FREE"}
10921 {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"},
10922 {"bits": [1, 1], "name": "CSF_BUSY"},
10923 {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"},
10924 {"bits": [5, 5], "name": "ROQ_RING_BUSY"},
10925 {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"},
10926 {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"},
10927 {"bits": [8, 8], "name": "ROQ_STATE_BUSY"},
10928 {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"},
10929 {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"},
10930 {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"},
10931 {"bits": [12, 12], "name": "SEMAPHORE_BUSY"},
10932 {"bits": [13, 13], "name": "INTERRUPT_BUSY"},
10933 {"bits": [14, 14], "name": "TCIU_BUSY"},
10934 {"bits": [15, 15], "name": "HQD_BUSY"},
10935 {"bits": [16, 16], "name": "PRT_BUSY"},
10936 {"bits": [17, 17], "name": "UTCL2IU_BUSY"},
10937 {"bits": [26, 26], "name": "CPF_GFX_BUSY"},
10938 {"bits": [27, 27], "name": "CPF_CMP_BUSY"},
10939 {"bits": [28, 29], "name": "GRBM_CPF_STAT_BUSY"},
10940 {"bits": [30, 30], "name": "CPC_CPF_BUSY"},
10941 {"bits": [31, 31], "name": "CPF_BUSY"}
10946 {"bits": [0, 0], "name": "UTCL1_FAULT_CONTROL"},
10947 {"bits": [4, 5], "name": "MIN_AVAILSZ"},
10948 {"bits": [16, 19], "name": "BUFFER_DEPTH"},
10949 {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"},
10950 {"bits": [29, 29], "name": "PIO_FIFO_FULL"},
10951 {"bits": [30, 31], "name": "PIO_COUNT"}
10956 {"bits": [0, 25], "name": "BYTE_COUNT"},
10957 {"bits": [26, 26], "name": "SAS"},
10958 {"bits": [27, 27], "name": "DAS"},
10959 {"bits": [28, 28], "name": "SAIC"},
10960 {"bits": [29, 29], "name": "DAIC"},
10961 {"bits": [30, 30], "name": "RAW_WAIT"},
10962 {"bits": [31, 31], "name": "DIS_WC"}
10967 {"bits": [0, 15], "name": "DST_ADDR_HI"}
10972 {"bits": [0, 15], "name": "SRC_ADDR_HI"}
10977 {"bits": [10, 10], "name": "MEMLOG_CLEAR"},
10978 {"bits": [13, 13], "name": "SRC_CACHE_POLICY"},
10979 {"bits": [20, 21], "name": "DST_SELECT"},
10980 {"bits": [25, 25], "name": "DST_CACHE_POLICY"},
10981 {"bits": [29, 30], "name": "SRC_SELECT"}
10986 {"bits": [0, 25], "name": "DMA_READ_TAG"},
10987 {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"}
10992 {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"},
10993 {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"},
10994 {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"},
10995 {"bits": [8, 8], "name": "MODE"}
11000 {"bits": [0, 15], "name": "MIN"},
11001 {"bits": [16, 31], "name": "MAX"}
11006 {"bits": [0, 15], "name": "ADDR_HI"}
11011 {"bits": [2, 31], "name": "ADDR_LO"}
11016 {"bits": [16, 17], "name": "DST_SEL"},
11017 {"bits": [24, 26], "name": "INT_SEL"},
11018 {"bits": [29, 31], "name": "DATA_SEL"}
11023 {"bits": [0, 6], "name": "WBINV_TC_OP"},
11024 {"bits": [12, 17], "name": "WBINV_ACTION_ENA"},
11025 {"bits": [25, 25], "name": "CACHE_POLICY"},
11026 {"bits": [28, 28], "name": "EXECUTE"}
11031 {"bits": [0, 19], "name": "IB1_OFFSET"}
11036 {"bits": [0, 19], "name": "IB1_PREAMBLE_BEGIN"}
11041 {"bits": [0, 19], "name": "IB1_PREAMBLE_END"}
11046 {"bits": [0, 19], "name": "IB2_OFFSET"}
11051 {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"}
11056 {"bits": [0, 19], "name": "IB2_PREAMBLE_END"}
11061 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}
11066 {"bits": [0, 0], "name": "DEST_BASE_0_ENA"},
11067 {"bits": [1, 1], "name": "DEST_BASE_1_ENA"},
11068 {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"},
11069 {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"},
11070 {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"},
11071 {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"},
11072 {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"},
11073 {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"},
11074 {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"},
11075 {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"},
11076 {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"},
11077 {"bits": [19, 19], "name": "DEST_BASE_2_ENA"},
11078 {"bits": [21, 21], "name": "DEST_BASE_3_ENA"}
11083 {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"},
11084 {"bits": [31, 31], "name": "STATUS"}
11089 {"bits": [0, 15], "name": "ME_MC_RADDR_HI"},
11090 {"bits": [22, 22], "name": "CACHE_POLICY"}
11095 {"bits": [2, 31], "name": "ME_MC_RADDR_LO"}
11100 {"bits": [0, 15], "name": "ME_MC_WADDR_HI"},
11101 {"bits": [22, 22], "name": "CACHE_POLICY"}
11106 {"bits": [2, 31], "name": "ME_MC_WADDR_LO"}
11111 {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
11112 {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"},
11113 {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"},
11114 {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
11119 {"bits": [31, 31], "name": "PERFMON_ENABLE"}
11124 {"bits": [0, 1], "name": "STATUS"}
11129 {"bits": [0, 7], "name": "IB_EN"}
11134 {"bits": [0, 0], "name": "CONFIG_REG_EN"},
11135 {"bits": [1, 1], "name": "CNTX_REG_EN"},
11136 {"bits": [16, 16], "name": "SH_GFX_REG_EN"},
11137 {"bits": [24, 24], "name": "SH_CS_REG_EN"}
11142 {"bits": [0, 1], "name": "PIPE_ID"}
11147 {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"}
11152 {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"}
11157 {"bits": [25, 25], "name": "CACHE_POLICY"}
11162 {"bits": [0, 0], "name": "NOT_VISIBLE"}
11167 {"bits": [0, 19], "name": "RB_OFFSET"}
11172 {"bits": [0, 0], "name": "Z_PASS_ACITVE"},
11173 {"bits": [1, 1], "name": "STREAMOUT_ACTIVE"},
11174 {"bits": [2, 2], "name": "PIPELINE_ACTIVE"},
11175 {"bits": [3, 3], "name": "STIPPLE_ACTIVE"},
11176 {"bits": [4, 4], "name": "VGT_BUFFERS_ACTIVE"},
11177 {"bits": [5, 5], "name": "SCREEN_EXT_ACTIVE"},
11178 {"bits": [6, 6], "name": "DRAW_INDIRECT_ACTIVE"},
11179 {"bits": [7, 7], "name": "DISP_INDIRECT_ACTIVE"}
11184 {"bits": [0, 7], "name": "SCRATCH_INDEX"}
11189 {"bits": [0, 15], "name": "SEM_ADDR_HI"},
11190 {"bits": [16, 16], "name": "SEM_USE_MAILBOX"},
11191 {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"},
11192 {"bits": [24, 25], "name": "SEM_CLIENT_CODE"},
11193 {"bits": [29, 31], "name": "SEM_SELECT"}
11198 {"bits": [0, 1], "name": "SEM_ADDR_SWAP"},
11199 {"bits": [3, 31], "name": "SEM_ADDR_LO"}
11204 {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"}
11209 {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"}
11214 {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"}
11219 {"bits": [0, 15], "name": "ST_BASE_HI"}
11224 {"bits": [2, 31], "name": "ST_BASE_LO"}
11229 {"bits": [0, 19], "name": "ST_BUFSZ"}
11234 {"bits": [0, 19], "name": "ST_CMD_REQSZ"}
11239 {"bits": [0, 3], "name": "VMID"}
11244 {"bits": [0, 2], "name": "SRC_STATE_ID"}
11249 {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"},
11250 {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"},
11251 {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"},
11252 {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"},
11253 {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"},
11254 {"bits": [16, 16], "name": "OFFSET_ROUND"}
11259 {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"},
11260 {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"},
11261 {"bits": [4, 6], "name": "SAMPLE_RATE"},
11262 {"bits": [8, 11], "name": "ZPASS_ENABLE"},
11263 {"bits": [12, 15], "name": "ZFAIL_ENABLE"},
11264 {"bits": [16, 19], "name": "SFAIL_ENABLE"},
11265 {"bits": [20, 23], "name": "DBFAIL_ENABLE"},
11266 {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"},
11267 {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"}
11272 {"bits": [0, 0], "name": "STENCIL_ENABLE"},
11273 {"bits": [1, 1], "name": "Z_ENABLE"},
11274 {"bits": [2, 2], "name": "Z_WRITE_ENABLE"},
11275 {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"},
11276 {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"},
11277 {"bits": [7, 7], "name": "BACKFACE_ENABLE"},
11278 {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"},
11279 {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"},
11280 {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"},
11281 {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"}
11286 {"bits": [0, 13], "name": "X_MAX"},
11287 {"bits": [16, 29], "name": "Y_MAX"}
11292 {"bits": [0, 10], "name": "SLICE_START"},
11293 {"bits": [13, 23], "name": "SLICE_MAX"},
11294 {"bits": [24, 24], "name": "Z_READ_ONLY"},
11295 {"bits": [25, 25], "name": "STENCIL_READ_ONLY"},
11296 {"bits": [26, 29], "name": "MIPID"}
11301 {"bits": [0, 1], "enum_ref": "DB_DFSM_CONTROL__PUNCHOUT_MODE", "name": "PUNCHOUT_MODE"},
11302 {"bits": [2, 2], "name": "POPS_DRAIN_PS_ON_OVERLAP"},
11303 {"bits": [3, 3], "name": "DISALLOW_OVERFLOW"}
11308 {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"},
11309 {"bits": [4, 6], "name": "PS_ITER_SAMPLES"},
11310 {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"},
11311 {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"},
11312 {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"},
11313 {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"},
11314 {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"},
11315 {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"},
11316 {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"},
11317 {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"},
11318 {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"},
11319 {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"}
11324 {"bits": [0, 7], "name": "BASE_HI"}
11329 {"bits": [1, 1], "name": "FULL_CACHE"},
11330 {"bits": [2, 2], "name": "HTILE_USES_PRELOAD_WIN"},
11331 {"bits": [3, 3], "name": "PRELOAD"},
11332 {"bits": [4, 9], "name": "PREFETCH_WIDTH"},
11333 {"bits": [10, 15], "name": "PREFETCH_HEIGHT"},
11334 {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"},
11335 {"bits": [18, 18], "name": "PIPE_ALIGNED"},
11336 {"bits": [19, 19], "name": "RB_ALIGNED"}
11341 {"bits": [0, 30], "name": "COUNT_HI"}
11346 {"bits": [0, 7], "name": "START_X"},
11347 {"bits": [8, 15], "name": "START_Y"},
11348 {"bits": [16, 23], "name": "MAX_X"},
11349 {"bits": [24, 31], "name": "MAX_Y"}
11354 {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"},
11355 {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"},
11356 {"bits": [2, 2], "name": "DEPTH_COPY"},
11357 {"bits": [3, 3], "name": "STENCIL_COPY"},
11358 {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"},
11359 {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"},
11360 {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"},
11361 {"bits": [7, 7], "name": "COPY_CENTROID"},
11362 {"bits": [8, 11], "name": "COPY_SAMPLE"},
11363 {"bits": [12, 12], "name": "DECOMPRESS_ENABLE"}
11368 {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"},
11369 {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"},
11370 {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"},
11371 {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"},
11372 {"bits": [7, 7], "name": "FAST_Z_DISABLE"},
11373 {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"},
11374 {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"},
11375 {"bits": [10, 10], "name": "FORCE_COLOR_KILL"},
11376 {"bits": [11, 11], "name": "FORCE_Z_READ"},
11377 {"bits": [12, 12], "name": "FORCE_STENCIL_READ"},
11378 {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"},
11379 {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"},
11380 {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"},
11381 {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"},
11382 {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"},
11383 {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"},
11384 {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"},
11385 {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"},
11386 {"bits": [27, 27], "name": "FORCE_Z_DIRTY"},
11387 {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"},
11388 {"bits": [29, 29], "name": "FORCE_Z_VALID"},
11389 {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"},
11390 {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"}
11395 {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"},
11396 {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"},
11397 {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"},
11398 {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"},
11399 {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"},
11400 {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"},
11401 {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"},
11402 {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"},
11403 {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"},
11404 {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"},
11405 {"bits": [15, 17], "name": "HIS_SFUNC_FF"},
11406 {"bits": [18, 20], "name": "HIS_SFUNC_BF"},
11407 {"bits": [21, 21], "name": "PRESERVE_ZRANGE"},
11408 {"bits": [22, 22], "name": "PRESERVE_SRESULTS"},
11409 {"bits": [23, 23], "name": "DISABLE_FAST_PASS"},
11410 {"bits": [25, 25], "name": "ALLOW_PARTIAL_RES_HIER_KILL"}
11415 {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"},
11416 {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"},
11417 {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"},
11418 {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"},
11419 {"bits": [6, 6], "name": "KILL_ENABLE"},
11420 {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"},
11421 {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"},
11422 {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"},
11423 {"bits": [10, 10], "name": "EXEC_ON_NOOP"},
11424 {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"},
11425 {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"},
11426 {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"},
11427 {"bits": [15, 15], "name": "DUAL_QUAD_DISABLE"},
11428 {"bits": [16, 16], "name": "PRIMITIVE_ORDERED_PIXEL_SHADER"},
11429 {"bits": [17, 17], "name": "EXEC_IF_OVERLAPPED"},
11430 {"bits": [20, 22], "name": "POPS_OVERLAP_NUM_SAMPLES"}
11435 {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"},
11436 {"bits": [4, 11], "name": "COMPAREVALUE0"},
11437 {"bits": [12, 19], "name": "COMPAREMASK0"},
11438 {"bits": [24, 24], "name": "ENABLE0"}
11443 {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"},
11444 {"bits": [4, 11], "name": "COMPAREVALUE1"},
11445 {"bits": [12, 19], "name": "COMPAREMASK1"},
11446 {"bits": [24, 24], "name": "ENABLE1"}
11451 {"bits": [0, 7], "name": "STENCILTESTVAL"},
11452 {"bits": [8, 15], "name": "STENCILMASK"},
11453 {"bits": [16, 23], "name": "STENCILWRITEMASK"},
11454 {"bits": [24, 31], "name": "STENCILOPVAL"}
11459 {"bits": [0, 7], "name": "STENCILTESTVAL_BF"},
11460 {"bits": [8, 15], "name": "STENCILMASK_BF"},
11461 {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"},
11462 {"bits": [24, 31], "name": "STENCILOPVAL_BF"}
11467 {"bits": [0, 7], "name": "CLEAR"}
11472 {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"},
11473 {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"},
11474 {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"},
11475 {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"},
11476 {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"},
11477 {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"}
11482 {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"},
11483 {"bits": [4, 8], "name": "SW_MODE"},
11484 {"bits": [12, 12], "name": "PARTIALLY_RESIDENT"},
11485 {"bits": [13, 14], "enum_ref": "DbPRTFaultBehavior", "name": "FAULT_BEHAVIOR"},
11486 {"bits": [15, 15], "name": "ITERATE_FLUSH"},
11487 {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
11488 {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"},
11489 {"bits": [30, 30], "name": "CLEAR_DISALLOWED"}
11494 {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"},
11495 {"bits": [2, 3], "name": "NUM_SAMPLES"},
11496 {"bits": [4, 8], "name": "SW_MODE"},
11497 {"bits": [12, 12], "name": "PARTIALLY_RESIDENT"},
11498 {"bits": [13, 14], "enum_ref": "DbPRTFaultBehavior", "name": "FAULT_BEHAVIOR"},
11499 {"bits": [15, 15], "name": "ITERATE_FLUSH"},
11500 {"bits": [16, 19], "name": "MAXMIP"},
11501 {"bits": [23, 26], "name": "DECOMPRESS_ON_N_ZPLANES"},
11502 {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
11503 {"bits": [28, 28], "name": "READ_SIZE"},
11504 {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"},
11505 {"bits": [30, 30], "name": "CLEAR_DISALLOWED"},
11506 {"bits": [31, 31], "name": "ZRANGE_PRECISION"}
11511 {"bits": [0, 15], "name": "EPITCH"}
11516 {"bits": [0, 2], "name": "NUM_PIPES"},
11517 {"bits": [3, 5], "name": "PIPE_INTERLEAVE_SIZE"},
11518 {"bits": [6, 7], "name": "MAX_COMPRESSED_FRAGS"},
11519 {"bits": [8, 10], "name": "BANK_INTERLEAVE_SIZE"},
11520 {"bits": [12, 14], "enum_ref": "NumBanks", "name": "NUM_BANKS"},
11521 {"bits": [16, 18], "name": "SHADER_ENGINE_TILE_SIZE"},
11522 {"bits": [19, 20], "name": "NUM_SHADER_ENGINES"},
11523 {"bits": [21, 23], "name": "NUM_GPUS"},
11524 {"bits": [24, 25], "name": "MULTI_GPU_TILE_SIZE"},
11525 {"bits": [26, 27], "name": "NUM_RB_PER_SE"},
11526 {"bits": [28, 29], "name": "ROW_SIZE"},
11527 {"bits": [30, 30], "name": "NUM_LOWER_PIPES"},
11528 {"bits": [31, 31], "name": "SE_ENABLE"}
11533 {"bits": [0, 1], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
11534 {"bits": [2, 3], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
11535 {"bits": [4, 5], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
11536 {"bits": [6, 7], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
11541 {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
11542 {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
11543 {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
11544 {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"},
11545 {"bits": [25, 26], "name": "SAMPLE_SPLIT"}
11550 {"bits": [0, 15], "name": "BASE"},
11551 {"bits": [16, 31], "name": "UNUSED"}
11556 {"bits": [0, 5], "name": "AINC"},
11557 {"bits": [6, 7], "name": "UNUSED1"},
11558 {"bits": [8, 9], "name": "DMODE"},
11559 {"bits": [10, 31], "name": "UNUSED2"}
11564 {"bits": [0, 0], "name": "COMPLETE"},
11565 {"bits": [1, 31], "name": "UNUSED"}
11570 {"bits": [0, 7], "name": "OFFSET0"},
11571 {"bits": [8, 31], "name": "UNUSED"}
11576 {"bits": [0, 7], "name": "OFFSET1"},
11577 {"bits": [8, 31], "name": "UNUSED"}
11582 {"bits": [0, 7], "name": "OP"},
11583 {"bits": [8, 31], "name": "UNUSED"}
11588 {"bits": [0, 15], "name": "SIZE"},
11589 {"bits": [16, 31], "name": "UNUSED"}
11594 {"bits": [0, 0], "name": "FLAG"},
11595 {"bits": [1, 12], "name": "COUNTER"},
11596 {"bits": [13, 13], "name": "TYPE"},
11597 {"bits": [14, 14], "name": "DED"},
11598 {"bits": [15, 15], "name": "RELEASE_ALL"},
11599 {"bits": [16, 27], "name": "HEAD_QUEUE"},
11600 {"bits": [28, 28], "name": "HEAD_VALID"},
11601 {"bits": [29, 29], "name": "HEAD_FLAG"},
11602 {"bits": [30, 30], "name": "HALTED"},
11603 {"bits": [31, 31], "name": "UNUSED1"}
11608 {"bits": [0, 15], "name": "RESOURCE_CNT"},
11609 {"bits": [16, 31], "name": "UNUSED"}
11614 {"bits": [0, 5], "name": "INDEX"},
11615 {"bits": [6, 31], "name": "UNUSED"}
11620 {"bits": [0, 15], "name": "DS_ADDRESS"},
11621 {"bits": [16, 19], "name": "CRAWLER"},
11622 {"bits": [20, 21], "name": "CRAWLER_TYPE"},
11623 {"bits": [22, 29], "name": "UNUSED"},
11624 {"bits": [30, 30], "name": "NO_ALLOC"},
11625 {"bits": [31, 31], "name": "ENABLE"}
11630 {"bits": [0, 3], "name": "INDEX"},
11631 {"bits": [4, 31], "name": "UNUSED"}
11636 {"bits": [0, 30], "name": "VALUE"},
11637 {"bits": [31, 31], "name": "INCDEC"}
11642 {"bits": [0, 7], "name": "INSTANCE_INDEX"},
11643 {"bits": [8, 15], "name": "SH_INDEX"},
11644 {"bits": [16, 23], "name": "SE_INDEX"},
11645 {"bits": [29, 29], "name": "SH_BROADCAST_WRITES"},
11646 {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"},
11647 {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"}
11652 {"bits": [0, 5], "name": "PERF_SEL"},
11653 {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
11654 {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
11655 {"bits": [12, 12], "name": "VGT_BUSY_USER_DEFINED_MASK"},
11656 {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"},
11657 {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"},
11658 {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"},
11659 {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"},
11660 {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"},
11661 {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"},
11662 {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"},
11663 {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"},
11664 {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"},
11665 {"bits": [23, 23], "name": "IA_BUSY_USER_DEFINED_MASK"},
11666 {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"},
11667 {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"},
11668 {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"},
11669 {"bits": [27, 27], "name": "TC_BUSY_USER_DEFINED_MASK"},
11670 {"bits": [28, 28], "name": "WD_BUSY_USER_DEFINED_MASK"},
11671 {"bits": [29, 29], "name": "UTCL2_BUSY_USER_DEFINED_MASK"},
11672 {"bits": [30, 30], "name": "EA_BUSY_USER_DEFINED_MASK"},
11673 {"bits": [31, 31], "name": "RMI_BUSY_USER_DEFINED_MASK"}
11678 {"bits": [0, 5], "name": "PERF_SEL"},
11679 {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
11680 {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
11681 {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"},
11682 {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"},
11683 {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"},
11684 {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"},
11685 {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"},
11686 {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"},
11687 {"bits": [19, 19], "name": "VGT_BUSY_USER_DEFINED_MASK"},
11688 {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"},
11689 {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"},
11690 {"bits": [22, 22], "name": "RMI_BUSY_USER_DEFINED_MASK"}
11695 {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"},
11696 {"bits": [5, 5], "name": "RSMU_RQ_PENDING"},
11697 {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"},
11698 {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"},
11699 {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"},
11700 {"bits": [12, 12], "name": "DB_CLEAN"},
11701 {"bits": [13, 13], "name": "CB_CLEAN"},
11702 {"bits": [14, 14], "name": "TA_BUSY"},
11703 {"bits": [15, 15], "name": "GDS_BUSY"},
11704 {"bits": [16, 16], "name": "WD_BUSY_NO_DMA"},
11705 {"bits": [17, 17], "name": "VGT_BUSY"},
11706 {"bits": [18, 18], "name": "IA_BUSY_NO_DMA"},
11707 {"bits": [19, 19], "name": "IA_BUSY"},
11708 {"bits": [20, 20], "name": "SX_BUSY"},
11709 {"bits": [21, 21], "name": "WD_BUSY"},
11710 {"bits": [22, 22], "name": "SPI_BUSY"},
11711 {"bits": [23, 23], "name": "BCI_BUSY"},
11712 {"bits": [24, 24], "name": "SC_BUSY"},
11713 {"bits": [25, 25], "name": "PA_BUSY"},
11714 {"bits": [26, 26], "name": "DB_BUSY"},
11715 {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"},
11716 {"bits": [29, 29], "name": "CP_BUSY"},
11717 {"bits": [30, 30], "name": "CB_BUSY"},
11718 {"bits": [31, 31], "name": "GUI_ACTIVE"}
11723 {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"},
11724 {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"},
11725 {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"},
11726 {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"},
11727 {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"},
11728 {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"},
11729 {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"},
11730 {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"},
11731 {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"},
11732 {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"},
11733 {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"},
11734 {"bits": [14, 14], "name": "RLC_RQ_PENDING"},
11735 {"bits": [15, 15], "name": "UTCL2_BUSY"},
11736 {"bits": [16, 16], "name": "EA_BUSY"},
11737 {"bits": [17, 17], "name": "RMI_BUSY"},
11738 {"bits": [18, 18], "name": "UTCL2_RQ_PENDING"},
11739 {"bits": [19, 19], "name": "CPF_RQ_PENDING"},
11740 {"bits": [20, 20], "name": "EA_LINK_BUSY"},
11741 {"bits": [24, 24], "name": "RLC_BUSY"},
11742 {"bits": [25, 25], "name": "TC_BUSY"},
11743 {"bits": [26, 26], "name": "TCC_CC_RESIDENT"},
11744 {"bits": [28, 28], "name": "CPF_BUSY"},
11745 {"bits": [29, 29], "name": "CPC_BUSY"},
11746 {"bits": [30, 30], "name": "CPG_BUSY"},
11747 {"bits": [31, 31], "name": "CPAXI_BUSY"}
11752 {"bits": [1, 1], "name": "DB_CLEAN"},
11753 {"bits": [2, 2], "name": "CB_CLEAN"},
11754 {"bits": [21, 21], "name": "RMI_BUSY"},
11755 {"bits": [22, 22], "name": "BCI_BUSY"},
11756 {"bits": [23, 23], "name": "VGT_BUSY"},
11757 {"bits": [24, 24], "name": "PA_BUSY"},
11758 {"bits": [25, 25], "name": "TA_BUSY"},
11759 {"bits": [26, 26], "name": "SX_BUSY"},
11760 {"bits": [27, 27], "name": "SPI_BUSY"},
11761 {"bits": [29, 29], "name": "SC_BUSY"},
11762 {"bits": [30, 30], "name": "DB_BUSY"},
11763 {"bits": [31, 31], "name": "CB_BUSY"}
11768 {"bits": [0, 15], "name": "PRIMGROUP_SIZE"},
11769 {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"},
11770 {"bits": [17, 17], "name": "SWITCH_ON_EOP"},
11771 {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"},
11772 {"bits": [19, 19], "name": "SWITCH_ON_EOI"},
11773 {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"},
11774 {"bits": [21, 21], "name": "EN_INST_OPT_BASIC"},
11775 {"bits": [22, 22], "name": "EN_INST_OPT_ADV"},
11776 {"bits": [23, 23], "name": "HW_USE_ONLY"}
11781 {"bits": [0, 9], "name": "PERF_SEL"},
11782 {"bits": [10, 19], "name": "PERF_SEL1"},
11783 {"bits": [20, 23], "name": "CNTR_MODE"},
11784 {"bits": [24, 27], "name": "PERF_MODE1"},
11785 {"bits": [28, 31], "name": "PERF_MODE"}
11790 {"bits": [0, 9], "name": "PERF_SEL2"},
11791 {"bits": [10, 19], "name": "PERF_SEL3"},
11792 {"bits": [24, 27], "name": "PERF_MODE3"},
11793 {"bits": [28, 31], "name": "PERF_MODE2"}
11798 {"bits": [0, 0], "name": "UCP_ENA_0"},
11799 {"bits": [1, 1], "name": "UCP_ENA_1"},
11800 {"bits": [2, 2], "name": "UCP_ENA_2"},
11801 {"bits": [3, 3], "name": "UCP_ENA_3"},
11802 {"bits": [4, 4], "name": "UCP_ENA_4"},
11803 {"bits": [5, 5], "name": "UCP_ENA_5"},
11804 {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"},
11805 {"bits": [14, 15], "name": "PS_UCP_MODE"},
11806 {"bits": [16, 16], "name": "CLIP_DISABLE"},
11807 {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"},
11808 {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"},
11809 {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"},
11810 {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"},
11811 {"bits": [21, 21], "name": "VTX_KILL_OR"},
11812 {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"},
11813 {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"},
11814 {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"},
11815 {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"},
11816 {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"},
11817 {"bits": [28, 28], "name": "ZCLIP_PROG_NEAR_ENA"}
11822 {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"},
11823 {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"},
11824 {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"},
11825 {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"},
11826 {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"},
11827 {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"},
11828 {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"},
11829 {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"},
11830 {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"},
11831 {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"},
11832 {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"},
11833 {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"},
11834 {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"},
11835 {"bits": [13, 13], "name": "VS_W_INF_RETAIN"},
11836 {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"},
11837 {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"}
11842 {"bits": [0, 0], "name": "VERTEX_REUSE_OFF"},
11843 {"bits": [1, 1], "name": "INDEX_BUF_EDGE_FLAG_ENA"}
11848 {"bits": [0, 0], "name": "OBJ_ID_SEL"},
11849 {"bits": [1, 1], "name": "ADD_PIPED_PRIM_ID"},
11850 {"bits": [2, 2], "name": "EN_32BIT_OBJPRIMID"}
11855 {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"},
11856 {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"},
11857 {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"},
11858 {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"},
11859 {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"},
11860 {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"},
11861 {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"},
11862 {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"},
11863 {"bits": [8, 8], "name": "CULL_DIST_ENA_0"},
11864 {"bits": [9, 9], "name": "CULL_DIST_ENA_1"},
11865 {"bits": [10, 10], "name": "CULL_DIST_ENA_2"},
11866 {"bits": [11, 11], "name": "CULL_DIST_ENA_3"},
11867 {"bits": [12, 12], "name": "CULL_DIST_ENA_4"},
11868 {"bits": [13, 13], "name": "CULL_DIST_ENA_5"},
11869 {"bits": [14, 14], "name": "CULL_DIST_ENA_6"},
11870 {"bits": [15, 15], "name": "CULL_DIST_ENA_7"},
11871 {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"},
11872 {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"},
11873 {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"},
11874 {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"},
11875 {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"},
11876 {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"},
11877 {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"},
11878 {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"},
11879 {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"},
11880 {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"},
11881 {"bits": [26, 26], "name": "USE_VTX_LINE_WIDTH"},
11882 {"bits": [27, 27], "name": "USE_VTX_SHD_OBJPRIM_ID"}
11887 {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"},
11888 {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"},
11889 {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"},
11890 {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"},
11891 {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"},
11892 {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"},
11893 {"bits": [8, 8], "name": "VTX_XY_FMT"},
11894 {"bits": [9, 9], "name": "VTX_Z_FMT"},
11895 {"bits": [10, 10], "name": "VTX_W0_FMT"},
11896 {"bits": [11, 11], "name": "PERFCOUNTER_REF"}
11901 {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"},
11902 {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"},
11903 {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"},
11904 {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"},
11905 {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"},
11906 {"bits": [26, 27], "enum_ref": "CovToShaderSel", "name": "COVERAGE_TO_SHADER_SELECT"}
11911 {"bits": [0, 15], "name": "AA_MASK_X0Y0"},
11912 {"bits": [16, 31], "name": "AA_MASK_X1Y0"}
11917 {"bits": [0, 15], "name": "AA_MASK_X0Y1"},
11918 {"bits": [16, 31], "name": "AA_MASK_X1Y1"}
11923 {"bits": [0, 3], "name": "S0_X"},
11924 {"bits": [4, 7], "name": "S0_Y"},
11925 {"bits": [8, 11], "name": "S1_X"},
11926 {"bits": [12, 15], "name": "S1_Y"},
11927 {"bits": [16, 19], "name": "S2_X"},
11928 {"bits": [20, 23], "name": "S2_Y"},
11929 {"bits": [24, 27], "name": "S3_X"},
11930 {"bits": [28, 31], "name": "S3_Y"}
11935 {"bits": [0, 3], "name": "S4_X"},
11936 {"bits": [4, 7], "name": "S4_Y"},
11937 {"bits": [8, 11], "name": "S5_X"},
11938 {"bits": [12, 15], "name": "S5_Y"},
11939 {"bits": [16, 19], "name": "S6_X"},
11940 {"bits": [20, 23], "name": "S6_Y"},
11941 {"bits": [24, 27], "name": "S7_X"},
11942 {"bits": [28, 31], "name": "S7_Y"}
11947 {"bits": [0, 3], "name": "S8_X"},
11948 {"bits": [4, 7], "name": "S8_Y"},
11949 {"bits": [8, 11], "name": "S9_X"},
11950 {"bits": [12, 15], "name": "S9_Y"},
11951 {"bits": [16, 19], "name": "S10_X"},
11952 {"bits": [20, 23], "name": "S10_Y"},
11953 {"bits": [24, 27], "name": "S11_X"},
11954 {"bits": [28, 31], "name": "S11_Y"}
11959 {"bits": [0, 3], "name": "S12_X"},
11960 {"bits": [4, 7], "name": "S12_Y"},
11961 {"bits": [8, 11], "name": "S13_X"},
11962 {"bits": [12, 15], "name": "S13_Y"},
11963 {"bits": [16, 19], "name": "S14_X"},
11964 {"bits": [20, 23], "name": "S14_Y"},
11965 {"bits": [24, 27], "name": "S15_X"},
11966 {"bits": [28, 31], "name": "S15_Y"}
11971 {"bits": [0, 1], "enum_ref": "BinningMode", "name": "BINNING_MODE"},
11972 {"bits": [2, 2], "name": "BIN_SIZE_X"},
11973 {"bits": [3, 3], "name": "BIN_SIZE_Y"},
11974 {"bits": [4, 6], "name": "BIN_SIZE_X_EXTEND"},
11975 {"bits": [7, 9], "name": "BIN_SIZE_Y_EXTEND"},
11976 {"bits": [10, 12], "name": "CONTEXT_STATES_PER_BIN"},
11977 {"bits": [13, 17], "name": "PERSISTENT_STATES_PER_BIN"},
11978 {"bits": [18, 18], "name": "DISABLE_START_OF_PRIM"},
11979 {"bits": [19, 26], "name": "FPOVS_PER_BATCH"},
11980 {"bits": [27, 27], "name": "OPTIMAL_BIN_SELECTION"},
11981 {"bits": [28, 28], "name": "FLUSH_ON_BINNING_TRANSITION"}
11986 {"bits": [0, 15], "name": "MAX_ALLOC_COUNT"},
11987 {"bits": [16, 31], "name": "MAX_PRIM_PER_BATCH"}
11992 {"bits": [0, 3], "name": "DISTANCE_0"},
11993 {"bits": [4, 7], "name": "DISTANCE_1"},
11994 {"bits": [8, 11], "name": "DISTANCE_2"},
11995 {"bits": [12, 15], "name": "DISTANCE_3"},
11996 {"bits": [16, 19], "name": "DISTANCE_4"},
11997 {"bits": [20, 23], "name": "DISTANCE_5"},
11998 {"bits": [24, 27], "name": "DISTANCE_6"},
11999 {"bits": [28, 31], "name": "DISTANCE_7"}
12004 {"bits": [0, 3], "name": "DISTANCE_8"},
12005 {"bits": [4, 7], "name": "DISTANCE_9"},
12006 {"bits": [8, 11], "name": "DISTANCE_10"},
12007 {"bits": [12, 15], "name": "DISTANCE_11"},
12008 {"bits": [16, 19], "name": "DISTANCE_12"},
12009 {"bits": [20, 23], "name": "DISTANCE_13"},
12010 {"bits": [24, 27], "name": "DISTANCE_14"},
12011 {"bits": [28, 31], "name": "DISTANCE_15"}
12016 {"bits": [0, 14], "name": "TL_X"},
12017 {"bits": [16, 30], "name": "TL_Y"}
12022 {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"}
12027 {"bits": [0, 0], "name": "OVER_RAST_ENABLE"},
12028 {"bits": [1, 4], "name": "OVER_RAST_SAMPLE_SELECT"},
12029 {"bits": [5, 5], "name": "UNDER_RAST_ENABLE"},
12030 {"bits": [6, 9], "name": "UNDER_RAST_SAMPLE_SELECT"},
12031 {"bits": [10, 10], "name": "PBB_UNCERTAINTY_REGION_ENABLE"},
12032 {"bits": [11, 11], "name": "ZMM_TRI_EXTENT"},
12033 {"bits": [12, 12], "name": "ZMM_TRI_OFFSET"},
12034 {"bits": [13, 13], "name": "OVERRIDE_OVER_RAST_INNER_TO_NORMAL"},
12035 {"bits": [14, 14], "name": "OVERRIDE_UNDER_RAST_INNER_TO_NORMAL"},
12036 {"bits": [15, 15], "name": "DEGENERATE_OVERRIDE_INNER_TO_NORMAL_DISABLE"},
12037 {"bits": [16, 17], "name": "UNCERTAINTY_REGION_MODE"},
12038 {"bits": [18, 18], "name": "OUTER_UNCERTAINTY_EDGERULE_OVERRIDE"},
12039 {"bits": [19, 19], "name": "INNER_UNCERTAINTY_EDGERULE_OVERRIDE"},
12040 {"bits": [20, 20], "name": "NULL_SQUAD_AA_MASK_ENABLE"},
12041 {"bits": [21, 21], "name": "COVERAGE_AA_MASK_ENABLE"},
12042 {"bits": [22, 22], "name": "PREZ_AA_MASK_ENABLE"},
12043 {"bits": [23, 23], "name": "POSTZ_AA_MASK_ENABLE"},
12044 {"bits": [24, 24], "name": "CENTROID_SAMPLE_OVERRIDE"}
12049 {"bits": [0, 3], "name": "ER_TRI"},
12050 {"bits": [4, 7], "name": "ER_POINT"},
12051 {"bits": [8, 11], "name": "ER_RECT"},
12052 {"bits": [12, 17], "name": "ER_LINE_LR"},
12053 {"bits": [18, 23], "name": "ER_LINE_RL"},
12054 {"bits": [24, 27], "name": "ER_LINE_TB"},
12055 {"bits": [28, 31], "name": "ER_LINE_BT"}
12060 {"bits": [0, 7], "name": "TOP_QTR"},
12061 {"bits": [8, 15], "name": "TOP_HALF"},
12062 {"bits": [16, 23], "name": "BOT_HALF"},
12063 {"bits": [24, 31], "name": "BOT_QTR"}
12068 {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"},
12069 {"bits": [10, 10], "name": "LAST_PIXEL"},
12070 {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"},
12071 {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"},
12072 {"bits": [13, 13], "name": "EXTRA_DX_DY_PRECISION"}
12077 {"bits": [0, 15], "name": "LINE_PATTERN"},
12078 {"bits": [16, 23], "name": "REPEAT_COUNT"},
12079 {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"},
12080 {"bits": [29, 30], "name": "AUTO_RESET_CNTL"}
12085 {"bits": [0, 3], "name": "CURRENT_PTR"},
12086 {"bits": [8, 15], "name": "CURRENT_COUNT"}
12091 {"bits": [0, 0], "name": "MSAA_ENABLE"},
12092 {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"},
12093 {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"},
12094 {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"},
12095 {"bits": [4, 4], "name": "SCALE_LINE_WIDTH_PAD"},
12096 {"bits": [5, 5], "name": "ALTERNATE_RBS_PER_TILE"},
12097 {"bits": [6, 6], "name": "COARSE_TILE_STARTS_ON_EVEN_RB"}
12102 {"bits": [0, 0], "name": "WALK_SIZE"},
12103 {"bits": [1, 1], "name": "WALK_ALIGNMENT"},
12104 {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"},
12105 {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"},
12106 {"bits": [4, 6], "name": "WALK_FENCE_SIZE"},
12107 {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"},
12108 {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"},
12109 {"bits": [9, 9], "name": "TILE_COVER_DISABLE"},
12110 {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"},
12111 {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"},
12112 {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"},
12113 {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"},
12114 {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"},
12115 {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"},
12116 {"bits": [16, 16], "name": "PS_ITER_SAMPLE"},
12117 {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"},
12118 {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"},
12119 {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"},
12120 {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"},
12121 {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"},
12122 {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"},
12123 {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"},
12124 {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"},
12125 {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"}
12130 {"bits": [0, 10], "name": "MAX_DEALLOCS_IN_WAVE"}
12135 {"bits": [0, 13], "name": "X_COORD"}
12140 {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"},
12141 {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"}
12146 {"bits": [0, 15], "name": "COUNT"}
12151 {"bits": [0, 13], "name": "Y_COORD"}
12156 {"bits": [0, 9], "name": "PERF_SEL"}
12161 {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"},
12162 {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"},
12163 {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"},
12164 {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"},
12165 {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"},
12166 {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"},
12167 {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"},
12168 {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"},
12169 {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"},
12170 {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"},
12171 {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"},
12172 {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"},
12173 {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"},
12174 {"bits": [26, 28], "enum_ref": "SeXsel", "name": "SE_XSEL"},
12175 {"bits": [29, 31], "enum_ref": "SeYsel", "name": "SE_YSEL"}
12180 {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"},
12181 {"bits": [2, 4], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"},
12182 {"bits": [5, 7], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"}
12187 {"bits": [0, 7], "name": "LEFT_QTR"},
12188 {"bits": [8, 15], "name": "LEFT_HALF"},
12189 {"bits": [16, 23], "name": "RIGHT_HALF"},
12190 {"bits": [24, 31], "name": "RIGHT_QTR"}
12195 {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"},
12196 {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"}
12201 {"bits": [0, 15], "name": "X"},
12202 {"bits": [16, 31], "name": "Y"}
12207 {"bits": [0, 15], "name": "BR_X"},
12208 {"bits": [16, 31], "name": "BR_Y"}
12213 {"bits": [0, 15], "name": "TL_X"},
12214 {"bits": [16, 31], "name": "TL_Y"}
12219 {"bits": [0, 1], "name": "REALIGN_DQUADS_AFTER_N_WAVES"},
12220 {"bits": [2, 2], "name": "LOAD_COLLISION_WAVEID"},
12221 {"bits": [3, 3], "name": "LOAD_INTRAWAVE_COLLISION"}
12226 {"bits": [0, 0], "name": "ENABLE"},
12227 {"bits": [1, 2], "name": "NUM_SE"},
12228 {"bits": [5, 6], "name": "NUM_RB_PER_SE"}
12233 {"bits": [0, 15], "name": "WINDOW_X_OFFSET"},
12234 {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"}
12239 {"bits": [0, 14], "name": "BR_X"},
12240 {"bits": [16, 30], "name": "BR_Y"}
12245 {"bits": [0, 14], "name": "TL_X"},
12246 {"bits": [16, 30], "name": "TL_Y"},
12247 {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"}
12252 {"bits": [0, 0], "name": "EN_STEREO"},
12253 {"bits": [1, 4], "name": "STEREO_MODE"},
12254 {"bits": [5, 7], "name": "RT_SLICE_MODE"},
12255 {"bits": [8, 9], "name": "RT_SLICE_OFFSET"},
12256 {"bits": [10, 12], "name": "VP_ID_MODE"},
12257 {"bits": [13, 16], "name": "VP_ID_OFFSET"}
12262 {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"},
12263 {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"}
12268 {"bits": [0, 15], "name": "WIDTH"}
12273 {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"},
12274 {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"},
12275 {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"},
12276 {"bits": [4, 4], "name": "DIAMOND_ADJUST"}
12281 {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"}
12286 {"bits": [0, 0], "name": "DISCARD_0_AREA_TRIANGLES"},
12287 {"bits": [1, 1], "name": "DISCARD_0_AREA_LINES"},
12288 {"bits": [2, 2], "name": "DISCARD_0_AREA_POINTS"},
12289 {"bits": [3, 3], "name": "DISCARD_0_AREA_RECTANGLES"},
12290 {"bits": [4, 4], "name": "USE_PROVOKING_ZW"}
12295 {"bits": [0, 15], "name": "PERFCOUNTER_HI"}
12300 {"bits": [0, 9], "name": "PERF_SEL"},
12301 {"bits": [20, 23], "name": "CNTR_MODE"},
12302 {"bits": [28, 31], "name": "PERF_MODE"}
12307 {"bits": [0, 15], "name": "MIN_SIZE"},
12308 {"bits": [16, 31], "name": "MAX_SIZE"}
12313 {"bits": [0, 15], "name": "HEIGHT"},
12314 {"bits": [16, 31], "name": "WIDTH"}
12319 {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"},
12320 {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"}
12325 {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"},
12326 {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"},
12327 {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"},
12328 {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"},
12329 {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"},
12330 {"bits": [5, 5], "name": "LINE_EXPAND_ENA"},
12331 {"bits": [6, 6], "name": "POINT_EXPAND_ENA"},
12332 {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"},
12333 {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"},
12334 {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"},
12335 {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"}
12340 {"bits": [0, 0], "name": "CULL_FRONT"},
12341 {"bits": [1, 1], "name": "CULL_BACK"},
12342 {"bits": [2, 2], "name": "FACE"},
12343 {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"},
12344 {"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_PTYPE"},
12345 {"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_PTYPE"},
12346 {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"},
12347 {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"},
12348 {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"},
12349 {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"},
12350 {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"},
12351 {"bits": [20, 20], "name": "PERSP_CORR_DIS"},
12352 {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"},
12353 {"bits": [22, 22], "name": "RIGHT_TRIANGLE_ALTERNATE_GRADIENT_REF"},
12354 {"bits": [23, 23], "name": "NEW_QUAD_DECOMPOSITION"}
12359 {"bits": [0, 0], "name": "SMALL_PRIM_FILTER_ENABLE"},
12360 {"bits": [1, 1], "name": "TRIANGLE_FILTER_DISABLE"},
12361 {"bits": [2, 2], "name": "LINE_FILTER_DISABLE"},
12362 {"bits": [3, 3], "name": "POINT_FILTER_DISABLE"},
12363 {"bits": [4, 4], "name": "RECTANGLE_FILTER_DISABLE"},
12364 {"bits": [6, 6], "name": "SC_1XMSAA_COMPATIBLE_DISABLE"}
12369 {"bits": [0, 0], "name": "PIX_CENTER"},
12370 {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"},
12371 {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"}
12376 {"bits": [0, 3], "name": "FEATURE_SEL"},
12377 {"bits": [4, 7], "name": "SE_INDEX"},
12378 {"bits": [8, 11], "name": "SH_INDEX"},
12379 {"bits": [12, 15], "name": "CU_INDEX"},
12380 {"bits": [16, 17], "name": "EVENT_SEL"},
12381 {"bits": [18, 19], "name": "UNUSED"},
12382 {"bits": [20, 20], "name": "ENABLE"},
12383 {"bits": [21, 31], "name": "RESERVED"}
12388 {"bits": [0, 0], "name": "ENABLE"},
12389 {"bits": [1, 1], "name": "MODE_SELECT"},
12390 {"bits": [2, 2], "name": "RESET"},
12391 {"bits": [3, 31], "name": "RESERVED"}
12396 {"bits": [0, 3], "name": "VFID"},
12397 {"bits": [4, 5], "name": "CNT_ID"},
12398 {"bits": [6, 31], "name": "RESERVED"}
12403 {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"}
12408 {"bits": [0, 0], "name": "PERFMON_CLOCK_STATE"}
12413 {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
12414 {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
12419 {"bits": [0, 7], "name": "PERFMON_SAMPLE_DELAY"},
12420 {"bits": [8, 31], "name": "RESERVED"}
12425 {"bits": [0, 11], "name": "RESERVED1"},
12426 {"bits": [12, 13], "name": "PERFMON_RING_MODE"},
12427 {"bits": [14, 15], "name": "RESERVED"},
12428 {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"}
12433 {"bits": [0, 15], "name": "RING_BASE_HI"},
12434 {"bits": [16, 31], "name": "RESERVED"}
12439 {"bits": [0, 7], "name": "PERFMON_MAX_SAMPLE_DELAY"},
12440 {"bits": [8, 31], "name": "RESERVED"}
12445 {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"},
12446 {"bits": [8, 10], "name": "RESERVED1"},
12447 {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"},
12448 {"bits": [16, 20], "name": "SE0_NUM_LINE"},
12449 {"bits": [21, 25], "name": "SE1_NUM_LINE"},
12450 {"bits": [26, 30], "name": "SE2_NUM_LINE"},
12451 {"bits": [31, 31], "name": "RESERVED"}
12456 {"bits": [0, 1], "name": "TRANS_BASED_PERF_EN_SEL"},
12457 {"bits": [2, 3], "name": "EVENT_BASED_PERF_EN_SEL"},
12458 {"bits": [4, 5], "name": "TC_PERF_EN_SEL"},
12459 {"bits": [6, 7], "name": "PERF_EVENT_WINDOW_MASK0"},
12460 {"bits": [8, 9], "name": "PERF_EVENT_WINDOW_MASK1"},
12461 {"bits": [10, 13], "name": "PERF_COUNTER_CID"},
12462 {"bits": [14, 18], "name": "PERF_COUNTER_VMID"},
12463 {"bits": [19, 24], "name": "PERF_COUNTER_BURST_LENGTH_THRESHOLD"},
12464 {"bits": [25, 25], "name": "PERF_SOFT_RESET"},
12465 {"bits": [26, 26], "name": "PERF_CNTR_SPM_SEL"}
12470 {"bits": [0, 7], "name": "OBSOLETE_UMSK"},
12471 {"bits": [16, 17], "name": "OBSOLETE_SWAP"}
12476 {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"},
12477 {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"},
12478 {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"},
12479 {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"},
12480 {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"},
12481 {"bits": [20, 20], "name": "POS_FLOAT_ULC"},
12482 {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"}
12487 {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"},
12488 {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"},
12489 {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"},
12490 {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"},
12491 {"bits": [26, 26], "name": "RSRC_MGMT_RESET"},
12492 {"bits": [27, 27], "name": "TTRACE_STALL_ALL"},
12493 {"bits": [28, 28], "name": "ALLOC_ARB_LRU_ENA"},
12494 {"bits": [29, 29], "name": "EXP_ARB_LRU_ENA"},
12495 {"bits": [30, 31], "name": "PS_PKR_PRIORITY_CNTL"}
12500 {"bits": [0, 3], "name": "VTX_DONE_DELAY"},
12501 {"bits": [4, 4], "name": "INTERP_ONE_PRIM_PER_ROW"},
12502 {"bits": [5, 5], "name": "BATON_RESET_DISABLE"},
12503 {"bits": [6, 6], "name": "PC_LIMIT_ENABLE"},
12504 {"bits": [7, 7], "name": "PC_LIMIT_STRICT"},
12505 {"bits": [8, 8], "name": "CRC_SIMD_ID_WADDR_DISABLE"},
12506 {"bits": [9, 9], "name": "LBPW_CU_CHK_MODE"},
12507 {"bits": [10, 13], "name": "LBPW_CU_CHK_CNT"},
12508 {"bits": [14, 14], "name": "CSC_PWR_SAVE_DISABLE"},
12509 {"bits": [15, 15], "name": "CSG_PWR_SAVE_DISABLE"},
12510 {"bits": [16, 31], "name": "PC_LIMIT_SIZE"}
12515 {"bits": [0, 3], "name": "CONTEXT_SAVE_WAIT_GDS_REQUEST_CYCLE_OVHD"},
12516 {"bits": [4, 7], "name": "CONTEXT_SAVE_WAIT_GDS_GRANT_CYCLE_OVHD"}
12521 {"bits": [0, 0], "name": "FLAT_SHADE_ENA"},
12522 {"bits": [1, 1], "name": "PNT_SPRITE_ENA"},
12523 {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"},
12524 {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"},
12525 {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"},
12526 {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"},
12527 {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"}
12532 {"bits": [0, 7], "name": "PERF_SEL"}
12537 {"bits": [0, 3], "name": "BIN0_MIN"},
12538 {"bits": [4, 7], "name": "BIN0_MAX"},
12539 {"bits": [8, 11], "name": "BIN1_MIN"},
12540 {"bits": [12, 15], "name": "BIN1_MAX"},
12541 {"bits": [16, 19], "name": "BIN2_MIN"},
12542 {"bits": [20, 23], "name": "BIN2_MAX"},
12543 {"bits": [24, 27], "name": "BIN3_MIN"},
12544 {"bits": [28, 31], "name": "BIN3_MAX"}
12549 {"bits": [0, 5], "name": "OFFSET"},
12550 {"bits": [8, 9], "name": "DEFAULT_VAL"},
12551 {"bits": [10, 10], "name": "FLAT_SHADE"},
12552 {"bits": [13, 16], "name": "CYL_WRAP"},
12553 {"bits": [17, 17], "name": "PT_SPRITE_TEX"},
12554 {"bits": [18, 18], "name": "DUP"},
12555 {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
12556 {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
12557 {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
12558 {"bits": [23, 23], "name": "PT_SPRITE_TEX_ATTR1"},
12559 {"bits": [24, 24], "name": "ATTR0_VALID"},
12560 {"bits": [25, 25], "name": "ATTR1_VALID"}
12565 {"bits": [0, 5], "name": "OFFSET"},
12566 {"bits": [8, 9], "name": "DEFAULT_VAL"},
12567 {"bits": [10, 10], "name": "FLAT_SHADE"},
12568 {"bits": [18, 18], "name": "DUP"},
12569 {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
12570 {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
12571 {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
12572 {"bits": [24, 24], "name": "ATTR0_VALID"},
12573 {"bits": [25, 25], "name": "ATTR1_VALID"}
12578 {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"},
12579 {"bits": [1, 1], "name": "PERSP_CENTER_ENA"},
12580 {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"},
12581 {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"},
12582 {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"},
12583 {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"},
12584 {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"},
12585 {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"},
12586 {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"},
12587 {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"},
12588 {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"},
12589 {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"},
12590 {"bits": [12, 12], "name": "FRONT_FACE_ENA"},
12591 {"bits": [13, 13], "name": "ANCILLARY_ENA"},
12592 {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"},
12593 {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"}
12598 {"bits": [0, 5], "name": "NUM_INTERP"},
12599 {"bits": [6, 6], "name": "PARAM_GEN"},
12600 {"bits": [7, 7], "name": "OFFCHIP_PARAM_EN"},
12601 {"bits": [8, 8], "name": "LATE_PC_DEALLOC"},
12602 {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"}
12607 {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"},
12608 {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"},
12609 {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"},
12610 {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"},
12611 {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"},
12612 {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"},
12613 {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"},
12614 {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"}
12619 {"bits": [0, 5], "name": "LIMIT"}
12624 {"bits": [0, 7], "name": "MEM_BASE"}
12629 {"bits": [0, 5], "name": "VGPRS"},
12630 {"bits": [6, 9], "name": "SGPRS"},
12631 {"bits": [10, 11], "name": "PRIORITY"},
12632 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
12633 {"bits": [20, 20], "name": "PRIV"},
12634 {"bits": [21, 21], "name": "DX10_CLAMP"},
12635 {"bits": [22, 22], "name": "DEBUG_MODE"},
12636 {"bits": [23, 23], "name": "IEEE_MODE"},
12637 {"bits": [24, 24], "name": "CU_GROUP_ENABLE"},
12638 {"bits": [28, 28], "name": "CDBG_USER"},
12639 {"bits": [29, 30], "name": "GS_VGPR_COMP_CNT"},
12640 {"bits": [31, 31], "name": "FP16_OVFL"}
12645 {"bits": [0, 5], "name": "VGPRS"},
12646 {"bits": [6, 9], "name": "SGPRS"},
12647 {"bits": [10, 11], "name": "PRIORITY"},
12648 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
12649 {"bits": [20, 20], "name": "PRIV"},
12650 {"bits": [21, 21], "name": "DX10_CLAMP"},
12651 {"bits": [22, 22], "name": "DEBUG_MODE"},
12652 {"bits": [23, 23], "name": "IEEE_MODE"},
12653 {"bits": [27, 27], "name": "CDBG_USER"},
12654 {"bits": [28, 29], "name": "LS_VGPR_COMP_CNT"},
12655 {"bits": [30, 30], "name": "FP16_OVFL"}
12660 {"bits": [0, 5], "name": "VGPRS"},
12661 {"bits": [6, 9], "name": "SGPRS"},
12662 {"bits": [10, 11], "name": "PRIORITY"},
12663 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
12664 {"bits": [20, 20], "name": "PRIV"},
12665 {"bits": [21, 21], "name": "DX10_CLAMP"},
12666 {"bits": [22, 22], "name": "DEBUG_MODE"},
12667 {"bits": [23, 23], "name": "IEEE_MODE"},
12668 {"bits": [24, 24], "name": "CU_GROUP_DISABLE"},
12669 {"bits": [28, 28], "name": "CDBG_USER"},
12670 {"bits": [29, 29], "name": "FP16_OVFL"}
12675 {"bits": [0, 5], "name": "VGPRS"},
12676 {"bits": [6, 9], "name": "SGPRS"},
12677 {"bits": [10, 11], "name": "PRIORITY"},
12678 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
12679 {"bits": [20, 20], "name": "PRIV"},
12680 {"bits": [21, 21], "name": "DX10_CLAMP"},
12681 {"bits": [22, 22], "name": "DEBUG_MODE"},
12682 {"bits": [23, 23], "name": "IEEE_MODE"},
12683 {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
12684 {"bits": [26, 26], "name": "CU_GROUP_ENABLE"},
12685 {"bits": [30, 30], "name": "CDBG_USER"},
12686 {"bits": [31, 31], "name": "FP16_OVFL"}
12691 {"bits": [0, 0], "name": "SCRATCH_EN"},
12692 {"bits": [1, 5], "name": "USER_SGPR"},
12693 {"bits": [6, 6], "name": "TRAP_PRESENT"},
12694 {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
12695 {"bits": [16, 17], "name": "ES_VGPR_COMP_CNT"},
12696 {"bits": [18, 18], "name": "OC_LDS_EN"},
12697 {"bits": [19, 26], "name": "LDS_SIZE"},
12698 {"bits": [27, 27], "name": "SKIP_USGPR0"},
12699 {"bits": [28, 28], "name": "USER_SGPR_MSB"}
12704 {"bits": [0, 0], "name": "SCRATCH_EN"},
12705 {"bits": [1, 5], "name": "USER_SGPR"},
12706 {"bits": [6, 6], "name": "TRAP_PRESENT"},
12707 {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
12708 {"bits": [16, 17], "name": "VGPR_COMP_CNT"},
12709 {"bits": [18, 18], "name": "OC_LDS_EN"},
12710 {"bits": [19, 26], "name": "LDS_SIZE"},
12711 {"bits": [27, 27], "name": "SKIP_USGPR0"},
12712 {"bits": [28, 28], "name": "USER_SGPR_MSB"}
12717 {"bits": [0, 0], "name": "SCRATCH_EN"},
12718 {"bits": [1, 5], "name": "USER_SGPR"},
12719 {"bits": [6, 6], "name": "TRAP_PRESENT"},
12720 {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
12721 {"bits": [16, 24], "name": "LDS_SIZE"},
12722 {"bits": [27, 27], "name": "SKIP_USGPR0"},
12723 {"bits": [28, 28], "name": "USER_SGPR_MSB"}
12728 {"bits": [0, 0], "name": "SCRATCH_EN"},
12729 {"bits": [1, 5], "name": "USER_SGPR"},
12730 {"bits": [6, 6], "name": "TRAP_PRESENT"},
12731 {"bits": [7, 7], "name": "WAVE_CNT_EN"},
12732 {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"},
12733 {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
12734 {"bits": [25, 25], "name": "LOAD_COLLISION_WAVEID"},
12735 {"bits": [26, 26], "name": "LOAD_INTRAWAVE_COLLISION"},
12736 {"bits": [27, 27], "name": "SKIP_USGPR0"},
12737 {"bits": [28, 28], "name": "USER_SGPR_MSB"}
12742 {"bits": [0, 0], "name": "SCRATCH_EN"},
12743 {"bits": [1, 5], "name": "USER_SGPR"},
12744 {"bits": [6, 6], "name": "TRAP_PRESENT"},
12745 {"bits": [7, 7], "name": "OC_LDS_EN"},
12746 {"bits": [8, 8], "name": "SO_BASE0_EN"},
12747 {"bits": [9, 9], "name": "SO_BASE1_EN"},
12748 {"bits": [10, 10], "name": "SO_BASE2_EN"},
12749 {"bits": [11, 11], "name": "SO_BASE3_EN"},
12750 {"bits": [12, 12], "name": "SO_EN"},
12751 {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
12752 {"bits": [22, 22], "name": "PC_BASE_EN"},
12753 {"bits": [24, 24], "name": "DISPATCH_DRAW_EN"},
12754 {"bits": [27, 27], "name": "SKIP_USGPR0"},
12755 {"bits": [28, 28], "name": "USER_SGPR_MSB"}
12760 {"bits": [0, 5], "name": "WAVE_LIMIT"},
12761 {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"},
12762 {"bits": [10, 13], "name": "SIMD_DISABLE"},
12763 {"bits": [16, 31], "name": "CU_EN"}
12768 {"bits": [0, 15], "name": "CU_EN"},
12769 {"bits": [16, 21], "name": "WAVE_LIMIT"},
12770 {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"},
12771 {"bits": [26, 29], "name": "SIMD_DISABLE"}
12776 {"bits": [0, 6], "name": "GROUP_FIFO_DEPTH"},
12777 {"bits": [7, 13], "name": "SPI_SHADER_LATE_ALLOC_GS"}
12782 {"bits": [0, 6], "name": "GROUP_FIFO_DEPTH"}
12787 {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"},
12788 {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"},
12789 {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"},
12790 {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"}
12795 {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"}
12800 {"bits": [1, 5], "name": "VS_EXPORT_COUNT"},
12801 {"bits": [6, 6], "name": "VS_HALF_PACK"}
12806 {"bits": [0, 1], "name": "PS_WAVE_GRAN"},
12807 {"bits": [2, 3], "name": "VS_WAVE_GRAN"},
12808 {"bits": [4, 5], "name": "GS_WAVE_GRAN"},
12809 {"bits": [6, 7], "name": "HS_WAVE_GRAN"}
12814 {"bits": [0, 0], "name": "TARGET_INST"},
12815 {"bits": [1, 1], "name": "TARGET_DATA"},
12816 {"bits": [2, 2], "name": "INVALIDATE"},
12817 {"bits": [3, 3], "name": "WRITEBACK"},
12818 {"bits": [4, 4], "name": "VOL"},
12819 {"bits": [16, 16], "name": "COMPLETE"}
12824 {"bits": [0, 0], "name": "DWB"},
12825 {"bits": [1, 1], "name": "DIRTY"}
12830 {"bits": [0, 15], "name": "BASE_ADDRESS_HI"},
12831 {"bits": [16, 29], "name": "STRIDE"},
12832 {"bits": [30, 30], "name": "CACHE_SWIZZLE"},
12833 {"bits": [31, 31], "name": "SWIZZLE_ENABLE"}
12838 {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
12839 {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
12840 {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
12841 {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
12842 {"bits": [12, 14], "enum_ref": "BUF_NUM_FORMAT", "name": "NUM_FORMAT"},
12843 {"bits": [15, 18], "enum_ref": "BUF_DATA_FORMAT", "name": "DATA_FORMAT"},
12844 {"bits": [19, 19], "name": "USER_VM_ENABLE"},
12845 {"bits": [20, 20], "name": "USER_VM_MODE"},
12846 {"bits": [21, 22], "name": "INDEX_STRIDE"},
12847 {"bits": [23, 23], "name": "ADD_TID_ENABLE"},
12848 {"bits": [27, 27], "name": "NV"},
12849 {"bits": [30, 31], "enum_ref": "SQ_RSRC_BUF_TYPE", "name": "TYPE"}
12854 {"bits": [0, 7], "name": "BASE_ADDRESS_HI"},
12855 {"bits": [8, 19], "name": "MIN_LOD"},
12856 {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT", "name": "DATA_FORMAT"},
12857 {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT_STENCIL", "name": "DATA_FORMAT_STENCIL"},
12858 {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT", "name": "NUM_FORMAT"},
12859 {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT_FMASK", "name": "NUM_FORMAT_FMASK"},
12860 {"bits": [30, 30], "name": "NV"},
12861 {"bits": [31, 31], "name": "META_DIRECT"}
12866 {"bits": [0, 13], "name": "WIDTH"},
12867 {"bits": [14, 27], "name": "HEIGHT"},
12868 {"bits": [28, 30], "name": "PERF_MOD"}
12873 {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
12874 {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
12875 {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
12876 {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
12877 {"bits": [12, 15], "name": "BASE_LEVEL"},
12878 {"bits": [16, 19], "name": "LAST_LEVEL"},
12879 {"bits": [20, 24], "name": "SW_MODE"},
12880 {"bits": [28, 31], "enum_ref": "SQ_RSRC_IMG_TYPE", "name": "TYPE"}
12885 {"bits": [0, 12], "name": "DEPTH"},
12886 {"bits": [13, 28], "name": "PITCH"},
12887 {"bits": [29, 31], "enum_ref": "SQ_IMG_RSRC_WORD4__BC_SWIZZLE", "name": "BC_SWIZZLE"}
12892 {"bits": [0, 12], "name": "BASE_ARRAY"},
12893 {"bits": [13, 16], "name": "ARRAY_PITCH"},
12894 {"bits": [17, 24], "name": "META_DATA_ADDRESS"},
12895 {"bits": [25, 25], "name": "META_LINEAR"},
12896 {"bits": [26, 26], "name": "META_PIPE_ALIGNED"},
12897 {"bits": [27, 27], "name": "META_RB_ALIGNED"},
12898 {"bits": [28, 31], "name": "MAX_MIP"}
12903 {"bits": [0, 11], "name": "MIN_LOD_WARN"},
12904 {"bits": [12, 19], "name": "COUNTER_BANK_ID"},
12905 {"bits": [20, 20], "name": "LOD_HDW_CNT_EN"},
12906 {"bits": [21, 21], "name": "COMPRESSION_EN"},
12907 {"bits": [22, 22], "name": "ALPHA_IS_ON_MSB"},
12908 {"bits": [23, 23], "name": "COLOR_TRANSFORM"},
12909 {"bits": [24, 27], "name": "LOST_ALPHA_BITS"},
12910 {"bits": [28, 31], "name": "LOST_COLOR_BITS"}
12915 {"bits": [0, 2], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_X"},
12916 {"bits": [3, 5], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Y"},
12917 {"bits": [6, 8], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Z"},
12918 {"bits": [9, 11], "name": "MAX_ANISO_RATIO"},
12919 {"bits": [12, 14], "enum_ref": "SQ_TEX_DEPTH_COMPARE", "name": "DEPTH_COMPARE_FUNC"},
12920 {"bits": [15, 15], "name": "FORCE_UNNORMALIZED"},
12921 {"bits": [16, 18], "name": "ANISO_THRESHOLD"},
12922 {"bits": [19, 19], "name": "MC_COORD_TRUNC"},
12923 {"bits": [20, 20], "name": "FORCE_DEGAMMA"},
12924 {"bits": [21, 26], "name": "ANISO_BIAS"},
12925 {"bits": [27, 27], "name": "TRUNC_COORD"},
12926 {"bits": [28, 28], "name": "DISABLE_CUBE_WRAP"},
12927 {"bits": [29, 30], "enum_ref": "SQ_IMG_FILTER_TYPE", "name": "FILTER_MODE"},
12928 {"bits": [31, 31], "name": "COMPAT_MODE"}
12933 {"bits": [0, 11], "name": "MIN_LOD"},
12934 {"bits": [12, 23], "name": "MAX_LOD"},
12935 {"bits": [24, 27], "name": "PERF_MIP"},
12936 {"bits": [28, 31], "name": "PERF_Z"}
12941 {"bits": [0, 13], "name": "LOD_BIAS"},
12942 {"bits": [14, 19], "name": "LOD_BIAS_SEC"},
12943 {"bits": [20, 21], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MAG_FILTER"},
12944 {"bits": [22, 23], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MIN_FILTER"},
12945 {"bits": [24, 25], "enum_ref": "SQ_TEX_Z_FILTER", "name": "Z_FILTER"},
12946 {"bits": [26, 27], "enum_ref": "SQ_TEX_MIP_FILTER", "name": "MIP_FILTER"},
12947 {"bits": [28, 28], "name": "MIP_POINT_PRECLAMP"},
12948 {"bits": [29, 29], "name": "BLEND_ZERO_PRT"},
12949 {"bits": [30, 30], "name": "FILTER_PREC_FIX"},
12950 {"bits": [31, 31], "name": "ANISO_OVERRIDE"}
12955 {"bits": [0, 11], "name": "BORDER_COLOR_PTR"},
12956 {"bits": [12, 12], "name": "SKIP_DEGAMMA"},
12957 {"bits": [30, 31], "enum_ref": "SQ_TEX_BORDER_COLOR", "name": "BORDER_COLOR_TYPE"}
12962 {"bits": [0, 8], "name": "PERF_SEL"},
12963 {"bits": [12, 15], "name": "SQC_BANK_MASK"},
12964 {"bits": [16, 19], "name": "SQC_CLIENT_MASK"},
12965 {"bits": [20, 23], "name": "SPM_MODE"},
12966 {"bits": [24, 27], "name": "SIMD_MASK"},
12967 {"bits": [28, 31], "name": "PERF_MODE"}
12972 {"bits": [0, 0], "name": "PS_EN"},
12973 {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
12974 {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
12975 {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
12976 {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
12977 {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
12978 {"bits": [6, 6], "name": "CS_EN"},
12979 {"bits": [8, 12], "name": "CNTR_RATE"},
12980 {"bits": [13, 13], "name": "DISABLE_FLUSH"}
12985 {"bits": [0, 0], "name": "FORCE_EN"}
12990 {"bits": [0, 3], "name": "ADDR_HI"}
12995 {"bits": [31, 31], "name": "RESET_BUFFER"}
13000 {"bits": [0, 2], "name": "HIWATER"}
13005 {"bits": [0, 4], "name": "CU_SEL"},
13006 {"bits": [5, 5], "name": "SH_SEL"},
13007 {"bits": [7, 7], "name": "REG_STALL_EN"},
13008 {"bits": [8, 11], "name": "SIMD_EN"},
13009 {"bits": [12, 13], "name": "VM_ID_MASK"},
13010 {"bits": [14, 14], "name": "SPI_STALL_EN"},
13011 {"bits": [15, 15], "name": "SQ_STALL_EN"}
13016 {"bits": [0, 2], "name": "MASK_PS"},
13017 {"bits": [3, 5], "name": "MASK_VS"},
13018 {"bits": [6, 8], "name": "MASK_GS"},
13019 {"bits": [9, 11], "name": "MASK_ES"},
13020 {"bits": [12, 14], "name": "MASK_HS"},
13021 {"bits": [15, 17], "name": "MASK_LS"},
13022 {"bits": [18, 20], "name": "MASK_CS"},
13023 {"bits": [21, 22], "name": "MODE"},
13024 {"bits": [23, 24], "name": "CAPTURE_MODE"},
13025 {"bits": [25, 25], "name": "AUTOFLUSH_EN"},
13026 {"bits": [26, 26], "name": "TC_PERF_EN"},
13027 {"bits": [27, 28], "name": "ISSUE_MASK"},
13028 {"bits": [29, 29], "name": "TEST_MODE"},
13029 {"bits": [30, 30], "name": "INTERRUPT_EN"},
13030 {"bits": [31, 31], "name": "WRAP"}
13035 {"bits": [0, 15], "name": "SH0_MASK"},
13036 {"bits": [16, 31], "name": "SH1_MASK"}
13041 {"bits": [0, 21], "name": "SIZE"}
13046 {"bits": [0, 9], "name": "FINISH_PENDING"},
13047 {"bits": [16, 25], "name": "FINISH_DONE"},
13048 {"bits": [28, 28], "name": "UTC_ERROR"},
13049 {"bits": [29, 29], "name": "NEW_BUF"},
13050 {"bits": [30, 30], "name": "BUSY"},
13051 {"bits": [31, 31], "name": "FULL"}
13056 {"bits": [0, 15], "name": "TOKEN_MASK"},
13057 {"bits": [16, 23], "name": "REG_MASK"},
13058 {"bits": [24, 24], "name": "REG_DROP_ON_STALL"}
13063 {"bits": [0, 29], "name": "WPTR"},
13064 {"bits": [30, 31], "name": "READ_OFFSET"}
13069 {"bits": [0, 5], "name": "VGPR_BASE"},
13070 {"bits": [8, 13], "name": "VGPR_SIZE"},
13071 {"bits": [16, 21], "name": "SGPR_BASE"},
13072 {"bits": [24, 27], "name": "SGPR_SIZE"}
13077 {"bits": [0, 3], "name": "WAVE_ID"},
13078 {"bits": [4, 5], "name": "SIMD_ID"},
13079 {"bits": [6, 7], "name": "PIPE_ID"},
13080 {"bits": [8, 11], "name": "CU_ID"},
13081 {"bits": [12, 12], "name": "SH_ID"},
13082 {"bits": [13, 14], "name": "SE_ID"},
13083 {"bits": [16, 19], "name": "TG_ID"},
13084 {"bits": [20, 23], "name": "VM_ID"},
13085 {"bits": [24, 26], "name": "QUEUE_ID"},
13086 {"bits": [27, 29], "name": "STATE_ID"},
13087 {"bits": [30, 31], "name": "ME_ID"}
13092 {"bits": [0, 2], "name": "IBUF_ST"},
13093 {"bits": [3, 3], "name": "PC_INVALID"},
13094 {"bits": [4, 4], "name": "NEED_NEXT_DW"},
13095 {"bits": [5, 7], "name": "NO_PREFETCH_CNT"},
13096 {"bits": [8, 9], "name": "IBUF_RPTR"},
13097 {"bits": [10, 11], "name": "IBUF_WPTR"},
13098 {"bits": [16, 19], "name": "INST_STR_ST"},
13099 {"bits": [24, 25], "name": "ECC_ST"},
13100 {"bits": [26, 26], "name": "IS_HYB"},
13101 {"bits": [27, 28], "name": "HYB_CNT"},
13102 {"bits": [29, 29], "name": "KILL"},
13103 {"bits": [30, 30], "name": "NEED_KILL_IFETCH"},
13104 {"bits": [31, 31], "name": "NO_PREFETCH_CNT_HI"}
13109 {"bits": [0, 0], "name": "IXNACK"},
13110 {"bits": [1, 1], "name": "XNACK"},
13111 {"bits": [2, 2], "name": "TA_NEED_RESET"},
13112 {"bits": [4, 8], "name": "XCNT"},
13113 {"bits": [11, 15], "name": "QCNT"},
13114 {"bits": [18, 22], "name": "RCNT"},
13115 {"bits": [25, 31], "name": "MISC_CNT"}
13120 {"bits": [0, 3], "name": "VM_CNT"},
13121 {"bits": [4, 6], "name": "EXP_CNT"},
13122 {"bits": [8, 11], "name": "LGKM_CNT"},
13123 {"bits": [12, 14], "name": "VALU_CNT"},
13124 {"bits": [15, 15], "name": "FIRST_REPLAY"},
13125 {"bits": [16, 20], "name": "RCNT"},
13126 {"bits": [22, 23], "name": "VM_CNT_HI"}
13131 {"bits": [0, 7], "name": "LDS_BASE"},
13132 {"bits": [12, 20], "name": "LDS_SIZE"}
13137 {"bits": [0, 3], "name": "FP_ROUND"},
13138 {"bits": [4, 7], "name": "FP_DENORM"},
13139 {"bits": [8, 8], "name": "DX10_CLAMP"},
13140 {"bits": [9, 9], "name": "IEEE"},
13141 {"bits": [10, 10], "name": "LOD_CLAMPED"},
13142 {"bits": [11, 11], "name": "DEBUG_EN"},
13143 {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
13144 {"bits": [23, 23], "name": "FP16_OVFL"},
13145 {"bits": [24, 24], "name": "POPS_PACKER0"},
13146 {"bits": [25, 25], "name": "POPS_PACKER1"},
13147 {"bits": [26, 26], "name": "DISABLE_PERF"},
13148 {"bits": [27, 27], "name": "GPR_IDX_EN"},
13149 {"bits": [28, 28], "name": "VSKIP"},
13150 {"bits": [29, 31], "name": "CSP"}
13155 {"bits": [0, 15], "name": "PC_HI"}
13160 {"bits": [0, 0], "name": "SCC"},
13161 {"bits": [1, 2], "name": "SPI_PRIO"},
13162 {"bits": [3, 4], "name": "USER_PRIO"},
13163 {"bits": [5, 5], "name": "PRIV"},
13164 {"bits": [6, 6], "name": "TRAP_EN"},
13165 {"bits": [7, 7], "name": "TTRACE_EN"},
13166 {"bits": [8, 8], "name": "EXPORT_RDY"},
13167 {"bits": [9, 9], "name": "EXECZ"},
13168 {"bits": [10, 10], "name": "VCCZ"},
13169 {"bits": [11, 11], "name": "IN_TG"},
13170 {"bits": [12, 12], "name": "IN_BARRIER"},
13171 {"bits": [13, 13], "name": "HALT"},
13172 {"bits": [14, 14], "name": "TRAP"},
13173 {"bits": [15, 15], "name": "TTRACE_CU_EN"},
13174 {"bits": [16, 16], "name": "VALID"},
13175 {"bits": [17, 17], "name": "ECC_ERR"},
13176 {"bits": [18, 18], "name": "SKIP_EXPORT"},
13177 {"bits": [19, 19], "name": "PERF_EN"},
13178 {"bits": [20, 20], "name": "COND_DBG_USER"},
13179 {"bits": [21, 21], "name": "COND_DBG_SYS"},
13180 {"bits": [22, 22], "name": "ALLOW_REPLAY"},
13181 {"bits": [23, 23], "name": "FATAL_HALT"},
13182 {"bits": [27, 27], "name": "MUST_EXPORT"}
13187 {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"},
13188 {"bits": [10, 10], "name": "SAVECTX"},
13189 {"bits": [11, 11], "name": "ILLEGAL_INST"},
13190 {"bits": [12, 14], "name": "EXCP_HI"},
13191 {"bits": [16, 21], "name": "EXCP_CYCLE"},
13192 {"bits": [28, 28], "name": "XNACK_ERROR"},
13193 {"bits": [29, 31], "name": "DP_RATE"}
13198 {"bits": [0, 0], "name": "MRT0_COLOR_OPT_DISABLE"},
13199 {"bits": [1, 1], "name": "MRT0_ALPHA_OPT_DISABLE"},
13200 {"bits": [4, 4], "name": "MRT1_COLOR_OPT_DISABLE"},
13201 {"bits": [5, 5], "name": "MRT1_ALPHA_OPT_DISABLE"},
13202 {"bits": [8, 8], "name": "MRT2_COLOR_OPT_DISABLE"},
13203 {"bits": [9, 9], "name": "MRT2_ALPHA_OPT_DISABLE"},
13204 {"bits": [12, 12], "name": "MRT3_COLOR_OPT_DISABLE"},
13205 {"bits": [13, 13], "name": "MRT3_ALPHA_OPT_DISABLE"},
13206 {"bits": [16, 16], "name": "MRT4_COLOR_OPT_DISABLE"},
13207 {"bits": [17, 17], "name": "MRT4_ALPHA_OPT_DISABLE"},
13208 {"bits": [20, 20], "name": "MRT5_COLOR_OPT_DISABLE"},
13209 {"bits": [21, 21], "name": "MRT5_ALPHA_OPT_DISABLE"},
13210 {"bits": [24, 24], "name": "MRT6_COLOR_OPT_DISABLE"},
13211 {"bits": [25, 25], "name": "MRT6_ALPHA_OPT_DISABLE"},
13212 {"bits": [28, 28], "name": "MRT7_COLOR_OPT_DISABLE"},
13213 {"bits": [29, 29], "name": "MRT7_ALPHA_OPT_DISABLE"},
13214 {"bits": [31, 31], "name": "PIXEN_ZERO_OPT_DISABLE"}
13219 {"bits": [0, 3], "enum_ref": "SX_BLEND_OPT_EPSILON__MRT0_EPSILON", "name": "MRT0_EPSILON"},
13220 {"bits": [4, 7], "name": "MRT1_EPSILON"},
13221 {"bits": [8, 11], "name": "MRT2_EPSILON"},
13222 {"bits": [12, 15], "name": "MRT3_EPSILON"},
13223 {"bits": [16, 19], "name": "MRT4_EPSILON"},
13224 {"bits": [20, 23], "name": "MRT5_EPSILON"},
13225 {"bits": [24, 27], "name": "MRT6_EPSILON"},
13226 {"bits": [28, 31], "name": "MRT7_EPSILON"}
13231 {"bits": [0, 2], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_SRC_OPT"},
13232 {"bits": [4, 6], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_DST_OPT"},
13233 {"bits": [8, 10], "enum_ref": "SX_OPT_COMB_FCN", "name": "COLOR_COMB_FCN"},
13234 {"bits": [16, 18], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_SRC_OPT"},
13235 {"bits": [20, 22], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_DST_OPT"},
13236 {"bits": [24, 26], "enum_ref": "SX_OPT_COMB_FCN", "name": "ALPHA_COMB_FCN"}
13241 {"bits": [0, 3], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT0"},
13242 {"bits": [4, 7], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT1"},
13243 {"bits": [8, 11], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT2"},
13244 {"bits": [12, 15], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT3"},
13245 {"bits": [16, 19], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT4"},
13246 {"bits": [20, 23], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT5"},
13247 {"bits": [24, 27], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT6"},
13248 {"bits": [28, 31], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT7"}
13253 {"bits": [0, 7], "name": "ADDRESS"}
13258 {"bits": [0, 7], "name": "PERF_SEL"},
13259 {"bits": [10, 17], "name": "PERF_SEL1"},
13260 {"bits": [20, 23], "name": "CNTR_MODE"},
13261 {"bits": [24, 27], "name": "PERF_MODE1"},
13262 {"bits": [28, 31], "name": "PERF_MODE"}
13267 {"bits": [0, 7], "name": "PERF_SEL2"},
13268 {"bits": [10, 17], "name": "PERF_SEL3"},
13269 {"bits": [24, 27], "name": "PERF_MODE3"},
13270 {"bits": [28, 31], "name": "PERF_MODE2"}
13275 {"bits": [0, 7], "name": "PERF_SEL"},
13276 {"bits": [20, 23], "name": "CNTR_MODE"},
13277 {"bits": [28, 31], "name": "PERF_MODE"}
13282 {"bits": [0, 9], "name": "PERF_SEL2"},
13283 {"bits": [10, 19], "name": "PERF_SEL3"},
13284 {"bits": [24, 27], "name": "PERF_MODE2"},
13285 {"bits": [28, 31], "name": "PERF_MODE3"}
13290 {"bits": [0, 15], "name": "BASE_ADDR"}
13295 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},
13296 {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"},
13297 {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"},
13298 {"bits": [6, 6], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
13299 {"bits": [8, 8], "name": "PRIMGEN_EN"},
13300 {"bits": [9, 9], "name": "NOT_EOP"},
13301 {"bits": [10, 10], "name": "REQ_PATH"}
13306 {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"},
13307 {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"},
13308 {"bits": [4, 4], "name": "SPRITE_EN_R6XX"},
13309 {"bits": [5, 5], "name": "NOT_EOP"},
13310 {"bits": [6, 6], "name": "USE_OPAQUE"},
13311 {"bits": [7, 7], "name": "UNROLLED_INST"},
13312 {"bits": [8, 8], "name": "GRBM_SKEW_NO_DEC"},
13313 {"bits": [29, 31], "name": "REG_RT_INDEX"}
13318 {"bits": [0, 0], "name": "OBJPRIM_ID_EN"},
13319 {"bits": [1, 1], "name": "EN_REG_RT_INDEX"},
13320 {"bits": [2, 2], "name": "EN_PIPELINE_PRIMID"},
13321 {"bits": [3, 3], "name": "OBJECT_ID_INST_EN"}
13326 {"bits": [0, 14], "name": "ITEMSIZE"}
13331 {"bits": [0, 10], "name": "ES_PER_GS"}
13336 {"bits": [0, 27], "name": "ADDRESS_LOW"}
13341 {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"},
13342 {"bits": [10, 26], "name": "ADDRESS_HI"},
13343 {"bits": [27, 27], "name": "EXTENDED_EVENT"}
13348 {"bits": [0, 3], "name": "DECR"}
13353 {"bits": [0, 3], "name": "FIRST_DECR"}
13358 {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"},
13359 {"bits": [14, 14], "name": "RETAIN_ORDER"},
13360 {"bits": [15, 15], "name": "RETAIN_QUADS"},
13361 {"bits": [16, 18], "name": "PRIM_ORDER"}
13366 {"bits": [0, 0], "name": "COMP_X_EN"},
13367 {"bits": [1, 1], "name": "COMP_Y_EN"},
13368 {"bits": [2, 2], "name": "COMP_Z_EN"},
13369 {"bits": [3, 3], "name": "COMP_W_EN"},
13370 {"bits": [8, 15], "name": "STRIDE"},
13371 {"bits": [16, 23], "name": "SHIFT"}
13376 {"bits": [0, 3], "name": "X_CONV"},
13377 {"bits": [4, 7], "name": "X_OFFSET"},
13378 {"bits": [8, 11], "name": "Y_CONV"},
13379 {"bits": [12, 15], "name": "Y_OFFSET"},
13380 {"bits": [16, 19], "name": "Z_CONV"},
13381 {"bits": [20, 23], "name": "Z_OFFSET"},
13382 {"bits": [24, 27], "name": "W_CONV"},
13383 {"bits": [28, 31], "name": "W_OFFSET"}
13388 {"bits": [0, 14], "name": "OFFSET"}
13393 {"bits": [0, 0], "name": "ENABLE"},
13394 {"bits": [2, 8], "name": "CNT"}
13399 {"bits": [0, 15], "name": "MAX_PRIMS_PER_SUBGROUP"}
13404 {"bits": [0, 10], "name": "MAX_VERT_OUT"}
13409 {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"},
13410 {"bits": [3, 3], "name": "RESERVED_0"},
13411 {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"},
13412 {"bits": [6, 10], "name": "RESERVED_1"},
13413 {"bits": [11, 11], "name": "GS_C_PACK_EN"},
13414 {"bits": [12, 12], "name": "RESERVED_2"},
13415 {"bits": [13, 13], "name": "ES_PASSTHRU"},
13416 {"bits": [14, 14], "name": "RESERVED_3"},
13417 {"bits": [15, 15], "name": "RESERVED_4"},
13418 {"bits": [16, 16], "name": "RESERVED_5"},
13419 {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"},
13420 {"bits": [18, 18], "name": "SUPPRESS_CUTS"},
13421 {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"},
13422 {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"},
13423 {"bits": [21, 22], "name": "ONCHIP"}
13428 {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"},
13429 {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"},
13430 {"bits": [22, 31], "name": "GS_INST_PRIMS_IN_SUBGRP"}
13435 {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"},
13436 {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"},
13437 {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"},
13438 {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"},
13439 {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"}
13444 {"bits": [0, 10], "name": "GS_PER_ES"}
13449 {"bits": [0, 3], "name": "GS_PER_VS"}
13454 {"bits": [0, 1], "name": "TESS_MODE"}
13459 {"bits": [0, 7], "name": "REUSE_DEPTH"}
13464 {"bits": [0, 8], "name": "OFFCHIP_BUFFERING"},
13465 {"bits": [9, 10], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANULARITY"}
13470 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},
13471 {"bits": [8, 8], "name": "PRIMGEN_EN"}
13476 {"bits": [0, 7], "name": "NUM_PATCHES"},
13477 {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"},
13478 {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"}
13483 {"bits": [0, 0], "name": "RESET_EN"},
13484 {"bits": [1, 1], "name": "MATCH_ALL_BITS"}
13489 {"bits": [0, 2], "name": "PATH_SELECT"}
13494 {"bits": [0, 6], "name": "DEALLOC_DIST"}
13499 {"bits": [0, 7], "name": "PERF_SEID_IGNORE_MASK"}
13504 {"bits": [0, 0], "name": "PRIMITIVEID_EN"},
13505 {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"},
13506 {"bits": [2, 2], "name": "NGG_DISABLE_PROVOK_REUSE"}
13511 {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}
13516 {"bits": [0, 0], "name": "REUSE_OFF"}
13521 {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
13522 {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
13523 {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
13524 {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
13525 {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
13526 {"bits": [9, 9], "name": "DISPATCH_DRAW_EN"},
13527 {"bits": [10, 10], "name": "DIS_DEALLOC_ACCUM_0"},
13528 {"bits": [11, 11], "name": "DIS_DEALLOC_ACCUM_1"},
13529 {"bits": [12, 12], "name": "VS_WAVE_ID_EN"},
13530 {"bits": [13, 13], "name": "PRIMGEN_EN"},
13531 {"bits": [14, 14], "name": "ORDERED_ID_MODE"},
13532 {"bits": [15, 18], "name": "MAX_PRIMGRP_IN_WAVE"},
13533 {"bits": [19, 20], "name": "GS_FAST_LAUNCH"}
13538 {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"},
13539 {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"},
13540 {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"},
13541 {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"}
13546 {"bits": [0, 0], "name": "STREAMOUT_0_EN"},
13547 {"bits": [1, 1], "name": "STREAMOUT_1_EN"},
13548 {"bits": [2, 2], "name": "STREAMOUT_2_EN"},
13549 {"bits": [3, 3], "name": "STREAMOUT_3_EN"},
13550 {"bits": [4, 6], "name": "RAST_STREAM"},
13551 {"bits": [7, 7], "name": "EN_PRIMS_NEEDED_CNT"},
13552 {"bits": [8, 11], "name": "RAST_STREAM_MASK"},
13553 {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"}
13558 {"bits": [0, 8], "name": "VERTEX_STRIDE"}
13563 {"bits": [0, 9], "name": "STRIDE"}
13568 {"bits": [0, 7], "name": "ACCUM_ISOLINE"},
13569 {"bits": [8, 15], "name": "ACCUM_TRI"},
13570 {"bits": [16, 23], "name": "ACCUM_QUAD"},
13571 {"bits": [24, 28], "name": "DONUT_SPLIT"},
13572 {"bits": [29, 31], "name": "TRAP_SPLIT"}
13577 {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"},
13578 {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"},
13579 {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"},
13580 {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"},
13581 {"bits": [9, 9], "name": "DEPRECATED"},
13582 {"bits": [14, 14], "name": "DISABLE_DONUTS"},
13583 {"bits": [15, 15], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
13584 {"bits": [17, 18], "enum_ref": "VGT_DIST_MODE", "name": "DISTRIBUTION_MODE"}
13589 {"bits": [0, 15], "name": "SIZE"}
13594 {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"}
13599 {"bits": [0, 0], "name": "VTX_CNT_EN"}
13604 {"bits": [0, 7], "name": "PERF_SEL"},
13605 {"bits": [28, 31], "name": "PERF_MODE"}