Cross Reference: /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/radv

Lines Matching refs:graphics
147    if (pipeline->graphics.last_vgt_api_stage == MESA_SHADER_NONE)
151       pipeline->shaders[pipeline->graphics.last_vgt_api_stage];
159    if (pipeline->graphics.last_vgt_api_stage == MESA_SHADER_NONE)
165       pipeline->shaders[pipeline->graphics.last_vgt_api_stage];
787    pipeline->graphics.cb_color_control = cb_color_control;
988       pipeline->graphics.disable_out_of_order_rast_for_occlusion = !dsa_order_invariant.pass_set;
1031    struct radv_multisample_state *ms = &pipeline->graphics.ms;
1044        * "Sample shading is enabled for a graphics pipeline:
1047        *   graphics pipeline includes an input variable decorated
1052        *   when creating the graphics pipeline is set to VK_TRUE. In
1144          pipeline->graphics.spi_baryc_cntl |= S_0286E0_POS_FLOAT_LOCATION(2);
1162    struct radv_multisample_state *ms = &pipeline->graphics.ms;
1163    struct radv_vrs_state *vrs = &pipeline->graphics.vrs;
1480    pipeline->graphics.can_use_guardband = radv_prim_can_use_guardband(ia_state->topology);
1484          pipeline->graphics.can_use_guardband = true;
1488          pipeline->graphics.can_use_guardband = true;
1492       pipeline->graphics.can_use_guardband = true;
1495    pipeline->graphics.ia_multi_vgt_param = radv_compute_ia_multi_vgt_param_helpers(pipeline);
1509    pipeline->graphics.needed_dynamic_state = needed_states;
1689       pipeline->graphics.uses_dynamic_stride = true;
1751    pipeline->graphics.pa_su_sc_mode_cntl =
1765       pipeline->graphics.pa_su_sc_mode_cntl |=
1777    pipeline->graphics.pa_cl_clip_cntl =
1784    pipeline->graphics.uses_conservative_overestimate =
1821    pipeline->graphics.db_depth_control = db_depth_control;
2248       pipeline->graphics.esgs_ring_size = CLAMP(esgs_ring_size, min_esgs_ring_size, max_size);
2250    pipeline->graphics.gsvs_ring_size = MIN2(gsvs_ring_size, max_size);
2385    bool uses_xfb = pipeline->graphics.last_vgt_api_stage != -1 &&
2386                    radv_nir_stage_uses_xfb(shaders[pipeline->graphics.last_vgt_api_stage]);
2400             info->stage == pipeline->graphics.last_vgt_api_stage &&
2536    assert(pipeline->graphics.last_vgt_api_stage != MESA_SHADER_NONE);
2537    nir_foreach_shader_out_variable(var, shaders[pipeline->graphics.last_vgt_api_stage])
2748    if (!nir[MESA_SHADER_GEOMETRY] && pipeline->graphics.last_vgt_api_stage != MESA_SHADER_NONE) {
2751       gl_shader_stage es_stage = pipeline->graphics.last_vgt_api_stage;
2868       assert(pipeline->graphics.last_vgt_api_stage != MESA_SHADER_NONE);
2870          if (pipeline->graphics.last_vgt_api_stage == MESA_SHADER_VERTEX) {
2872          } else if (pipeline->graphics.last_vgt_api_stage == MESA_SHADER_TESS_EVAL) {
2875             assert(pipeline->graphics.last_vgt_api_stage == MESA_SHADER_GEOMETRY);
2880          if (pipeline->graphics.last_vgt_api_stage == MESA_SHADER_VERTEX) {
2882          } else if (pipeline->graphics.last_vgt_api_stage == MESA_SHADER_TESS_EVAL) {
2885             assert(pipeline->graphics.last_vgt_api_stage == MESA_SHADER_GEOMETRY);
3357             pipeline->graphics.last_vgt_api_stage = i;
3537          bool lowered_ngg = pipeline_has_ngg && i == pipeline->graphics.last_vgt_api_stage &&
3980    unsigned total_samples = 1u << G_028BE0_MSAA_NUM_SAMPLES(pipeline->graphics.ms.pa_sc_aa_config);
3981    unsigned ps_iter_samples = 1u << G_028804_PS_ITER_SAMPLES(pipeline->graphics.ms.db_eqaa);
4057       1u << G_028BE0_MSAA_NUM_SAMPLES(pipeline->graphics.ms.pa_sc_aa_config);
4162    pipeline->graphics.binning.pa_sc_binner_cntl_0 = pa_sc_binner_cntl_0;
4222       pipeline->graphics.binning.pa_sc_binner_cntl_0 = pa_sc_binner_cntl_0;
4346    const struct radv_multisample_state *ms = &pipeline->graphics.ms;
5086    radeon_set_context_reg(ctx_cs, R_0286E0_SPI_BARYC_CNTL, pipeline->graphics.spi_baryc_cntl);
5468       pipeline->graphics.vtx_base_sgpr = pipeline->user_data_0[MESA_SHADER_VERTEX];
5469       pipeline->graphics.vtx_base_sgpr += loc->sgpr_idx * 4;
5470       pipeline->graphics.vtx_emit_num = loc->num_sgprs;
5471       pipeline->graphics.uses_drawid =
5473       pipeline->graphics.uses_baseinstance =
5488    pipeline->graphics.last_vgt_api_stage = MESA_SHADER_NONE;
5518    pipeline->graphics.spi_baryc_cntl = S_0286E0_FRONT_FACE_ALL_BITS(1);
5561    pipeline->graphics.col_format = blend.spi_shader_col_format;
5562    pipeline->graphics.cb_target_mask = blend.cb_target_mask;
5571       pipeline->graphics.tess_patch_control_points =
5583    pipeline->graphics.is_ngg = radv_pipeline_has_ngg(pipeline);
5584    pipeline->graphics.has_ngg_culling =
5585       pipeline->graphics.is_ngg &&
5586       pipeline->shaders[pipeline->graphics.last_vgt_api_stage]->info.has_ngg_culling;
5768    pipeline->graphics.last_vgt_api_stage = MESA_SHADER_NONE;