Cross Reference: /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/radv

Lines Matching refs:device
39 radv_se_is_disabled(struct radv_device *device, unsigned se)
42    return device->physical_device->rad_info.cu_mask[se][0] == 0;
46 gfx10_get_thread_trace_ctrl(struct radv_device *device, bool enable)
54    if (device->physical_device->rad_info.chip_class == GFX10_3)
61 radv_emit_thread_trace_start(struct radv_device *device, struct radeon_cmdbuf *cs,
64    uint32_t shifted_size = device->thread_trace.buffer_size >> SQTT_BUFFER_ALIGN_SHIFT;
65    struct radeon_info *rad_info = &device->physical_device->rad_info;
69       uint64_t va = radv_buffer_get_va(device->thread_trace.bo);
70       uint64_t data_va = ac_thread_trace_get_data_va(rad_info, &device->thread_trace, va, se);
72       int first_active_cu = ffs(device->physical_device->rad_info.cu_mask[se][0]);
74       if (radv_se_is_disabled(device, se))
82       if (device->physical_device->rad_info.chip_class >= GFX10) {
117                                           gfx10_get_thread_trace_ctrl(device, true));
134          if (device->physical_device->rad_info.chip_class < GFX9) {
153          if (device->physical_device->rad_info.chip_class == GFX9) {
165          if (device->physical_device->rad_info.chip_class == GFX9) {
181        device->physical_device->rad_info.chip_class >= GFX7) {
208 radv_copy_thread_trace_info_regs(struct radv_device *device, struct radeon_cmdbuf *cs,
213    if (device->physical_device->rad_info.chip_class >= GFX10) {
215    } else if (device->physical_device->rad_info.chip_class == GFX9) {
218       assert(device->physical_device->rad_info.chip_class == GFX8);
223    uint64_t va = radv_buffer_get_va(device->thread_trace.bo);
239 radv_emit_thread_trace_stop(struct radv_device *device, struct radeon_cmdbuf *cs,
242    unsigned max_se = device->physical_device->rad_info.max_se;
246        device->physical_device->rad_info.chip_class >= GFX7) {
257       if (radv_se_is_disabled(device, se))
265       if (device->physical_device->rad_info.chip_class >= GFX10) {
279                                           gfx10_get_thread_trace_ctrl(device, false));
305       radv_copy_thread_trace_info_regs(device, cs, se);
315 radv_emit_thread_trace_userdata(const struct radv_device *device, struct radeon_cmdbuf *cs,
323       radeon_check_space(device->ws, cs, 2 + count);
327       if (device->physical_device->rad_info.chip_class >= GFX10)
339 radv_emit_spi_config_cntl(struct radv_device *device, struct radeon_cmdbuf *cs, bool enable)
341    if (device->physical_device->rad_info.chip_class >= GFX9) {
346       if (device->physical_device->rad_info.chip_class >= GFX10)
359 radv_emit_inhibit_clockgating(struct radv_device *device, struct radeon_cmdbuf *cs, bool inhibit)
361    if (device->physical_device->rad_info.chip_class >= GFX10) {
364    } else if (device->physical_device->rad_info.chip_class >= GFX8) {
371 radv_emit_wait_for_idle(struct radv_device *device, struct radeon_cmdbuf *cs, int family)
375       cs, device->physical_device->rad_info.chip_class, NULL, 0,
376       family == RING_COMPUTE && device->physical_device->rad_info.chip_class >= GFX7,
386 radv_thread_trace_init_bo(struct radv_device *device)
388    unsigned max_se = device->physical_device->rad_info.max_se;
389    struct radeon_winsys *ws = device->ws;
396    device->thread_trace.buffer_size =
397       align64(device->thread_trace.buffer_size, 1u << SQTT_BUFFER_ALIGN_SHIFT);
401    size += device->thread_trace.buffer_size * (uint64_t)max_se;
408    device->thread_trace.bo = bo;
412    result = ws->buffer_make_resident(ws, device->thread_trace.bo, true);
416    device->thread_trace.ptr = ws->buffer_map(device->thread_trace.bo);
417    if (!device->thread_trace.ptr)
424 radv_thread_trace_finish_bo(struct radv_device *device)
426    struct radeon_winsys *ws = device->ws;
428    if (unlikely(device->thread_trace.bo)) {
429       ws->buffer_make_resident(ws, device->thread_trace.bo, false);
430       ws->buffer_destroy(ws, device->thread_trace.bo);
435 radv_thread_trace_init(struct radv_device *device)
437    struct ac_thread_trace_data *thread_trace_data = &device->thread_trace;
440    device->thread_trace.buffer_size =
442    device->thread_trace.start_frame = radv_get_int_debug_option("RADV_THREAD_TRACE", -1);
446       device->thread_trace.trigger_file = strdup(trigger_file);
448    if (!radv_thread_trace_init_bo(device))
464 radv_thread_trace_finish(struct radv_device *device)
466    struct ac_thread_trace_data *thread_trace_data = &device->thread_trace;
467    struct radeon_winsys *ws = device->ws;
469    radv_thread_trace_finish_bo(device);
472       if (device->thread_trace.start_cs[i])
473          ws->cs_destroy(device->thread_trace.start_cs[i]);
474       if (device->thread_trace.stop_cs[i])
475          ws->cs_destroy(device->thread_trace.stop_cs[i]);
489 radv_thread_trace_resize_bo(struct radv_device *device)
492    radv_thread_trace_finish_bo(device);
495    device->thread_trace.buffer_size *= 2;
500            device->thread_trace.buffer_size / 1024);
503    return radv_thread_trace_init_bo(device);
509    struct radv_device *device = queue->device;
511    struct radeon_winsys *ws = device->ws;
516    if (device->thread_trace.start_cs[family]) {
517       ws->cs_destroy(device->thread_trace.start_cs[family]);
518       device->thread_trace.start_cs[family] = NULL;
537    radv_cs_add_buffer(ws, cs, device->thread_trace.bo);
540    radv_emit_wait_for_idle(device, cs, family);
543    radv_emit_inhibit_clockgating(device, cs, true);
546    radv_emit_spi_config_cntl(device, cs, true);
549    radv_emit_thread_trace_start(device, cs, family);
557    device->thread_trace.start_cs[family] = cs;
565    struct radv_device *device = queue->device;
567    struct radeon_winsys *ws = device->ws;
572    if (queue->device->thread_trace.stop_cs[family]) {
573       ws->cs_destroy(device->thread_trace.stop_cs[family]);
574       device->thread_trace.stop_cs[family] = NULL;
593    radv_cs_add_buffer(ws, cs, device->thread_trace.bo);
596    radv_emit_wait_for_idle(device, cs, family);
599    radv_emit_thread_trace_stop(device, cs, family);
602    radv_emit_spi_config_cntl(device, cs, false);
605    radv_emit_inhibit_clockgating(device, cs, false);
613    device->thread_trace.stop_cs[family] = cs;
621    struct radv_device *device = queue->device;
622    struct radeon_info *rad_info = &device->physical_device->rad_info;
624    void *thread_trace_ptr = device->thread_trace.ptr;
630       uint64_t data_offset = ac_thread_trace_get_data_offset(rad_info, &device->thread_trace, se);
635       int first_active_cu = ffs(device->physical_device->rad_info.cu_mask[se][0]);
637       if (radv_se_is_disabled(device, se))
640       if (!ac_is_thread_trace_complete(&device->physical_device->rad_info, &device->thread_trace,
642          if (!radv_thread_trace_resize_bo(device)) {
655       thread_trace_se.compute_unit = device->physical_device->rad_info.chip_class >= GFX10
663    thread_trace->data = &device->thread_trace;