Lines Matching refs:regs
64 bi_assign_slot_read(bi_registers *regs, bi_index src)
72 if (regs->slot[i] == src.value && regs->enabled[i])
76 if (regs->slot[2] == src.value && regs->slot23.slot2 == BIFROST_OP_READ)
82 if (!regs->enabled[i]) {
83 regs->slot[i] = src.value;
84 regs->enabled[i] = true;
89 if (!regs->slot23.slot3) {
90 regs->slot[2] = src.value;
91 regs->slot23.slot2 = BIFROST_OP_READ;
95 bi_print_slots(regs, stderr);
113 bi_assign_slot_read(&now->regs, (now->fma)->src[src]);
118 bi_assign_slot_read(&now->regs, (now->add)->src[src]);
130 now->regs.slot[3] = idx.value;
131 now->regs.slot23.slot3 = BIFROST_OP_WRITE;
139 if (now->regs.slot23.slot3) {
141 assert(!now->regs.slot23.slot2);
142 now->regs.slot[2] = idx.value;
143 now->regs.slot23.slot2 = BIFROST_OP_WRITE;
145 now->regs.slot[3] = idx.value;
146 now->regs.slot23.slot3 = BIFROST_OP_WRITE;
147 now->regs.slot23.slot3_fma = true;
152 return now->regs;
173 bi_pack_registers(bi_registers regs)
175 enum bifrost_reg_mode mode = bi_pack_register_mode(regs);
185 if (regs.first_instruction) {
198 if (!(regs.slot23.slot2 && regs.slot23.slot3))
206 if (regs.enabled[1]) {
208 assert(regs.slot[1] > regs.slot[0]);
209 assert(regs.enabled[0]);
212 if (regs.slot[0] > 31) {
213 regs.slot[0] = 63 - regs.slot[0];
214 regs.slot[1] = 63 - regs.slot[1];
217 assert(regs.slot[0] <= 31);
218 assert(regs.slot[1] <= 63);
221 s.reg1 = regs.slot[1];
222 s.reg0 = regs.slot[0];
228 if (regs.enabled[0]) {
230 s.reg1 |= (regs.slot[0] >> 5);
233 s.reg0 = (regs.slot[0] & 0b11111);
242 assert(regs.slot[3] == regs.slot[2] || !(regs.slot23.slot2 && regs.slot23.slot3));
244 if (regs.slot23.slot2)
245 regs.slot[3] = regs.slot[2];
247 regs.slot[2] = regs.slot[3];
248 } else if (!regs.first_instruction) {
250 assert(regs.slot[2] != regs.slot[3]);
253 s.reg2 = regs.slot[2];
254 s.reg3 = regs.slot[3];
255 s.fau_idx = regs.fau_idx;
265 bi_flip_slots(bi_registers *regs)
267 if (regs->enabled[0] && regs->enabled[1] && regs->slot[1] < regs->slot[0]) {
268 unsigned temp = regs->slot[0];
269 regs->slot[0] = regs->slot[1];
270 regs->slot[1] = temp;
276 bi_get_src_slot(bi_registers *regs, unsigned reg)
278 if (regs->slot[0] == reg && regs->enabled[0])
280 else if (regs->slot[1] == reg && regs->enabled[1])
282 else if (regs->slot[2] == reg && regs->slot23.slot2 == BIFROST_OP_READ)
289 bi_get_src_new(bi_instr *ins, bi_registers *regs, unsigned s)
297 return bi_get_src_slot(regs, src.value);
312 tuple->regs.fau_idx = tuple->fau_idx;
313 tuple->regs.first_instruction = first_tuple;
315 bi_flip_slots(&tuple->regs);
320 uint64_t reg = bi_pack_registers(tuple->regs);
322 bi_get_src_new(tuple->fma, &tuple->regs, 0),
323 bi_get_src_new(tuple->fma, &tuple->regs, 1),
324 bi_get_src_new(tuple->fma, &tuple->regs, 2),
325 bi_get_src_new(tuple->fma, &tuple->regs, 3));
328 bi_get_src_new(tuple->add, &tuple->regs, sr_read + 0),
329 bi_get_src_new(tuple->add, &tuple->regs, sr_read + 1),
330 bi_get_src_new(tuple->add, &tuple->regs, sr_read + 2),
704 unsigned loc = tuple->regs.fau_idx - BIR_FAU_BLEND_0;