Lines Matching refs:dw

54    uint32_t dw;
132 return ((union __intel_value) { .f = (v) }).dw;
199 uint32_t * restrict dw = (uint32_t * restrict) dst;
201 dw[0] =
206 dw[1] = 0;
219 uint32_t * restrict dw = (uint32_t * restrict) dst;
221 GFX_BINDLESS_SHADER_RECORD_pack(data, &dw[0], &values->General);
223 dw[2] = 0;
225 dw[3] = 0;
227 dw[4] = 0;
229 dw[5] = 0;
231 dw[6] = 0;
233 dw[7] = 0;
247 uint32_t * restrict dw = (uint32_t * restrict) dst;
249 GFX_BINDLESS_SHADER_RECORD_pack(data, &dw[0], &values->ClosestHit);
251 GFX_BINDLESS_SHADER_RECORD_pack(data, &dw[2], &values->AnyHit);
253 dw[4] = 0;
255 dw[5] = 0;
257 dw[6] = 0;
259 dw[7] = 0;
273 uint32_t * restrict dw = (uint32_t * restrict) dst;
275 GFX_BINDLESS_SHADER_RECORD_pack(data, &dw[0], &values->ClosestHit);
277 GFX_BINDLESS_SHADER_RECORD_pack(data, &dw[2], &values->Intersection);
279 dw[4] = 0;
281 dw[5] = 0;
283 dw[6] = 0;
285 dw[7] = 0;
299 uint32_t * restrict dw = (uint32_t * restrict) dst;
304 __gen_address(data, &dw[0], values->BaseAddress, v0, 0, 47);
305 dw[0] = v0_address;
306 dw[1] = (v0_address >> 32) | (v0 >> 32);
333 uint32_t * restrict dw = (uint32_t * restrict) dst;
336 __gen_address(data, &dw[0], values->MemBaseAddress, 0, 0, 63);
337 dw[0] = v0_address;
338 dw[1] = v0_address >> 32;
340 GFX_BINDLESS_SHADER_RECORD_pack(data, &dw[2], &values->CallStackHandler);
342 dw[4] =
345 dw[5] =
348 dw[6] =
351 dw[7] =
354 GFX_RT_SHADER_TABLE_pack(data, &dw[8], &values->HitGroupTable);
356 GFX_RT_SHADER_TABLE_pack(data, &dw[10], &values->MissGroupTable);
358 dw[12] =
361 dw[13] =
364 dw[14] =
367 dw[15] =
370 GFX_RT_SHADER_TABLE_pack(data, &dw[16], &values->CallableGroupTable);
373 __gen_address(data, &dw[18], values->ResumeShaderTable, 0, 0, 63);
374 dw[18] = v18_address;
375 dw[19] = v18_address >> 32;
390 uint32_t * restrict dw = (uint32_t * restrict) dst;
392 dw[0] =
395 dw[1] =
398 dw[2] =
414 uint32_t * restrict dw = (uint32_t * restrict) dst;
418 dw[0] = v0;
419 dw[1] = v0 >> 32;
421 GFX_RT_BVH_VEC3_pack(data, &dw[2], &values->BoundsMin);
423 GFX_RT_BVH_VEC3_pack(data, &dw[5], &values->BoundsMax);
425 dw[8] = 0;
427 dw[9] = 0;
429 dw[10] = 0;
431 dw[11] = 0;
433 dw[12] = 0;
435 dw[13] = 0;
437 dw[14] = 0;
439 dw[15] = 0;
472 uint32_t * restrict dw = (uint32_t * restrict) dst;
474 GFX_RT_BVH_VEC3_pack(data, &dw[0], &values->Origin);
476 dw[3] =
479 dw[4] =
484 dw[5] =
494 dw[6] =
508 dw[7] =
514 dw[8] =
520 dw[9] =
526 dw[10] =
532 dw[11] =
538 dw[12] =
544 dw[13] =
550 dw[14] =
556 dw[15] =
581 uint32_t * restrict dw = (uint32_t * restrict) dst;
583 dw[0] =
587 dw[1] =
610 uint32_t * restrict dw = (uint32_t * restrict) dst;
612 GFX_RT_BVH_PRIMITIVE_LEAF_DESCRIPTOR_pack(data, &dw[0], &values->LeafDescriptor);
614 dw[2] =
617 dw[3] =
624 GFX_RT_BVH_VEC3_pack(data, &dw[4], &values->QuadVertex[0]);
626 GFX_RT_BVH_VEC3_pack(data, &dw[7], &values->QuadVertex[1]);
628 GFX_RT_BVH_VEC3_pack(data, &dw[10], &values->QuadVertex[2]);
630 GFX_RT_BVH_VEC3_pack(data, &dw[13], &values->QuadVertex[3]);
683 uint32_t * restrict dw = (uint32_t * restrict) dst;
685 dw[0] =
689 dw[1] =
697 __gen_address(data, &dw[2], values->StartNodeAddress, v2, 0, 47);
698 dw[2] = v2_address;
699 dw[3] = (v2_address >> 32) | (v2 >> 32);
701 dw[4] =
704 dw[5] =
707 dw[6] =
710 dw[7] =
713 dw[8] =
716 dw[9] =
719 dw[10] =
722 dw[11] =
725 dw[12] =
728 dw[13] =
731 dw[14] =
734 dw[15] =
738 __gen_address(data, &dw[16], values->BVHAddress, 0, 0, 47);
739 dw[16] = v16_address;
740 dw[17] = v16_address >> 32;
742 dw[18] =
745 dw[19] =
748 dw[20] =
751 dw[21] =
754 dw[22] =
757 dw[23] =
760 dw[24] =
763 dw[25] =
766 dw[26] =
769 dw[27] =
772 dw[28] =
775 dw[29] =
778 dw[30] =
781 dw[31] =
798 uint32_t * restrict dw = (uint32_t * restrict) dst;
800 GFX_RT_BVH_PRIMITIVE_LEAF_DESCRIPTOR_pack(data, &dw[0], &values->LeafDescriptor);
802 dw[2] =
806 dw[3] =
809 dw[4] =
812 dw[5] =
815 dw[6] =
818 dw[7] =
821 dw[8] =
824 dw[9] =
827 dw[10] =
830 dw[11] =
833 dw[12] =
836 dw[13] =
839 dw[14] =
842 dw[15] =