Cross Reference: /xsrc/external/mit/MesaLib/src/panfrost/bifrost/bi

Lines Matching defs:lane0
475     unsigned lane0 = lane0_table[I->src[0].swizzle];
476     assert(lane0 < 2);
477     return 0x700d10 | (src0 << 0) | (lane0 << 3);
859     unsigned lane0 = lane0_table[I->src[0].swizzle];
860     assert(lane0 < 2);
865     return 0x70d000 | (src0 << 0) | (src1 << 3) | (lane0 << 6) | (abs0 << 7) | (neg0 << 8);
1419     unsigned lane0 = lane0_table[I->src[0].swizzle];
1420     assert(lane0 < 2);
1425     return 0x70f000 | (src0 << 0) | (src1 << 3) | (lane0 << 6) | (lane1 << 7);
1433     unsigned lane0 = lane0_table[I->src[0].swizzle];
1434     assert(lane0 < 2);
1447     return 0x710000 | (src0 << 0) | (src1 << 3) | (src2 << 6) | (src3 << 9) | (lane0 << 12) | (lane1 << 13) | (lane2 << 14) | (lane3 << 15);
1743     unsigned lane0 = lane0_table[I->src[0].swizzle];
1744     assert(lane0 < 2);
1745     return 0x700cc0 | (src0 << 0) | (lane0 << 4);
1753     unsigned lane0 = lane0_table[I->src[0].swizzle];
1754     assert(lane0 < 4);
1755     return 0x700b40 | (src0 << 0) | (lane0 << 4);
1807     unsigned lane0 = lane0_table[I->src[0].swizzle];
1808     assert(lane0 < 2);
1809     return 0x700cc8 | (src0 << 0) | (lane0 << 4);
1817     unsigned lane0 = lane0_table[I->src[0].swizzle];
1818     assert(lane0 < 4);
1819     return 0x700b48 | (src0 << 0) | (lane0 << 4);
2273     unsigned lane0 = lane0_table[I->src[0].swizzle];
2274     assert(lane0 < 2);
2276     if (lane0 == 0) derived_9 = 0;
2277     else if (lane0 == 1) derived_9 = 1;
2281     if (lane0 == 1) derived_3 = 0;
2282     else if (lane0 == 0) derived_3 = 1;
2598     unsigned lane0 = lane0_table[I->src[0].swizzle];
2599     assert(lane0 < 2);
2600     return 0x3cd10 | (src0 << 0) | (lane0 << 3);
2610     unsigned lane0 = lane0_table[I->src[0].swizzle];
2611     assert(lane0 < 2);
2620         return 0x3c500 | (src0 << 0) | (lane0 << 7) | (derived_4 << 4);
2622         return 0x3cc40 | (src0 << 0) | (lane0 << 5);
2635     unsigned lane0 = lane0_table[I->src[0].swizzle];
2636     assert(lane0 < 2);
2645         return 0x3c508 | (src0 << 0) | (lane0 << 7) | (derived_4 << 4);
2647         return 0x3cc48 | (src0 << 0) | (lane0 << 5);
3110     unsigned lane0 = lane0_table[I->src[0].swizzle];
3111     assert(lane0 < 2);
3112     return 0x67c40 | (src0 << 0) | (lane0 << 3);
3142     unsigned lane0 = lane0_table[I->src[0].swizzle];
3143     assert(lane0 < 2);
3155         return 0x67400 | (src0 << 0) | (src1 << 3) | (lane0 << 7) | (derived_6 << 6) | (derived_8 << 8);
3162         return 0x67600 | (src0 << 0) | (src1 << 3) | (lane0 << 7) | (derived_8 << 8);
3190     unsigned lane0 = lane0_table[I->src[0].swizzle];
3191     assert(lane0 < 2);
3192     return 0x67080 | (src0 << 0) | (neg0 << 3) | (abs0 << 4) | (divzero << 5) | (lane0 << 8);
3378     unsigned lane0 = lane0_table[I->src[0].swizzle];
3379     assert(lane0 < 2);
3380     return 0x67280 | (src0 << 0) | (neg0 << 3) | (abs0 << 4) | (divzero << 5) | (lane0 << 8);
5062     unsigned lane0 = lane0_table[I->src[0].swizzle];
5063     assert(lane0 < 2);
5068     return 0x75300 | (src0 << 0) | (src1 << 3) | (lane0 << 6) | (lane1 << 7);
5143     unsigned lane0 = lane0_table[I->src[0].swizzle];
5144     assert(lane0 < 2);
5145     return 0x3cce0 | (src0 << 0) | (lane0 << 4);
5153     unsigned lane0 = lane0_table[I->src[0].swizzle];
5154     assert(lane0 < 2);
5155     return 0x3ccc0 | (src0 << 0) | (lane0 << 4);
5184     unsigned lane0 = lane0_table[I->src[0].swizzle];
5185     assert(lane0 < 4);
5186     return 0x3cb80 | (src0 << 0) | (lane0 << 4);
5194     unsigned lane0 = lane0_table[I->src[0].swizzle];
5195     assert(lane0 < 4);
5196     return 0x3cb40 | (src0 << 0) | (lane0 << 4);
5409     unsigned lane0 = lane0_table[I->src[0].swizzle];
5410     assert(lane0 < 2);
5411     return 0x3cce8 | (src0 << 0) | (lane0 << 4);
5419     unsigned lane0 = lane0_table[I->src[0].swizzle];
5420     assert(lane0 < 2);
5421     return 0x3ccc8 | (src0 << 0) | (lane0 << 4);
5450     unsigned lane0 = lane0_table[I->src[0].swizzle];
5451     assert(lane0 < 4);
5452     return 0x3cb88 | (src0 << 0) | (lane0 << 4);
5460     unsigned lane0 = lane0_table[I->src[0].swizzle];
5461     assert(lane0 < 4);
5462     return 0x3cb48 | (src0 << 0) | (lane0 << 4);