Lines Matching refs:__u32
188 __u32 handle;
189 __u32 _pad;
206 __u32 operation;
208 __u32 list_handle;
210 __u32 bo_number;
212 __u32 bo_info_size;
219 __u32 bo_handle;
221 __u32 bo_priority;
226 __u32 list_handle;
227 __u32 _pad;
286 __u32 op;
288 __u32 flags;
289 __u32 ctx_id;
296 __u32 ctx_id;
297 __u32 _pad;
304 __u32 hangs;
306 __u32 reset_status;
310 __u32 flags;
311 __u32 _pad;
326 __u32 op;
327 __u32 flags;
346 __u32 op;
347 __u32 fd;
350 __u32 ctx_id;
371 __u32 flags;
373 __u32 handle;
432 __u32 handle;
434 __u32 op;
440 __u32 data_size_bytes;
441 __u32 data[64];
447 __u32 handle;
448 __u32 _pad;
463 __u32 handle;
465 __u32 flags;
472 __u32 status;
474 __u32 domain;
490 __u32 ip_type;
491 __u32 ip_instance;
492 __u32 ring;
493 __u32 ctx_id;
507 __u32 ctx_id;
508 __u32 ip_type;
509 __u32 ip_instance;
510 __u32 ring;
517 __u32 fence_count;
518 __u32 wait_all;
523 __u32 status;
524 __u32 first_signaled;
538 __u32 handle;
540 __u32 op;
581 __u32 handle;
582 __u32 _pad;
584 __u32 operation;
586 __u32 flags;
625 __u32 chunk_id;
626 __u32 length_dw;
632 __u32 ctx_id;
634 __u32 bo_list_handle;
635 __u32 num_chunks;
636 __u32 flags;
679 __u32 _pad;
681 __u32 flags;
685 __u32 ib_bytes;
687 __u32 ip_type;
689 __u32 ip_instance;
691 __u32 ring;
695 __u32 ip_type;
696 __u32 ip_instance;
697 __u32 ring;
698 __u32 ctx_id;
703 __u32 handle;
704 __u32 offset;
708 __u32 handle;
712 __u32 handle;
713 __u32 flags;
724 __u32 what;
725 __u32 pad;
728 __u32 handle;
942 __u32 fw_type;
947 __u32 ip_instance;
952 __u32 index;
953 __u32 _pad;
962 __u32 return_size;
964 __u32 query;
968 __u32 id;
969 __u32 _pad;
974 __u32 type;
979 __u32 ip_instance;
983 __u32 dword_offset;
985 __u32 count;
986 __u32 instance;
988 __u32 flags;
994 __u32 type;
995 __u32 offset;
999 __u32 type;
1003 __u32 type;
1010 __u32 gds_gfx_partition_size;
1012 __u32 compute_partition_size;
1014 __u32 gds_total_size;
1016 __u32 gws_per_gfx_partition;
1018 __u32 gws_per_compute_partition;
1020 __u32 oa_per_gfx_partition;
1022 __u32 oa_per_compute_partition;
1023 __u32 _pad;
1061 __u32 ver;
1062 __u32 feature;
1068 __u32 version;
1069 __u32 pad;
1090 __u32 device_id;
1092 __u32 chip_rev;
1093 __u32 external_rev;
1095 __u32 pci_rev;
1096 __u32 family;
1097 __u32 num_shader_engines;
1098 __u32 num_shader_arrays_per_engine;
1100 __u32 gpu_counter_freq;
1104 __u32 cu_active_number;
1106 __u32 cu_ao_mask;
1107 __u32 cu_bitmap[4][4];
1109 __u32 enabled_rb_pipes_mask;
1110 __u32 num_rb_pipes;
1111 __u32 num_hw_gfx_contexts;
1113 __u32 pcie_gen;
1120 __u32 virtual_address_alignment;
1122 __u32 pte_fragment_size;
1123 __u32 gart_page_size;
1125 __u32 ce_ram_size;
1127 __u32 vram_type;
1129 __u32 vram_bit_width;
1131 __u32 vce_harvest_config;
1133 __u32 gc_double_offchip_lds_buf;
1142 __u32 prim_buf_size;
1143 __u32 pos_buf_size;
1144 __u32 cntl_sb_buf_size;
1145 __u32 param_buf_size;
1147 __u32 wave_front_size;
1149 __u32 num_shader_visible_vgprs;
1151 __u32 num_cu_per_sh;
1153 __u32 num_tcc_blocks;
1155 __u32 gs_vgt_table_depth;
1157 __u32 gs_prim_buffer_depth;
1159 __u32 max_gs_waves_per_vgt;
1161 __u32 pcie_num_lanes;
1163 __u32 cu_ao_bitmap[4][4];
1169 __u32 pa_sc_tile_steering_override;
1175 __u32 tcp_cache_size; /* AKA GL0, VMEM cache */
1176 __u32 num_sqc_per_wgp;
1177 __u32 sqc_data_cache_size; /* AKA SMEM cache */
1178 __u32 sqc_inst_cache_size;
1179 __u32 gl1c_cache_size;
1180 __u32 gl2c_cache_size;
1183 __u32 enabled_rb_pipes_mask_hi;
1185 __u32 shadow_size;
1187 __u32 shadow_alignment;
1189 __u32 csa_size;
1191 __u32 csa_alignment;
1196 __u32 hw_ip_version_major;
1197 __u32 hw_ip_version_minor;
1201 __u32 ib_start_alignment;
1203 __u32 ib_size_alignment;
1205 __u32 available_rings;
1207 __u32 ip_discovery_version;
1212 __u32 uvd_max_handles;
1214 __u32 uvd_used_handles;
1221 __u32 sclk;
1223 __u32 mclk;
1225 __u32 eclk;
1226 __u32 pad;
1231 __u32 num_valid_entries;
1232 __u32 pad;
1247 __u32 valid;
1248 __u32 max_width;
1249 __u32 max_height;
1250 __u32 max_pixels_per_frame;
1251 __u32 max_level;
1252 __u32 pad;
1269 __u32 status;
1270 __u32 vmhub;