Lines Matching defs:ibs_request

247 	struct amdgpu_cs_request ibs_request;
295 memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
296 ibs_request.ip_type = ip_type;
297 ibs_request.ring = 0;
298 ibs_request.number_of_ibs = 1;
299 ibs_request.ibs = &ib_info;
300 ibs_request.resources = bo_list;
301 ibs_request.fence_info.handle = NULL;
303 r = amdgpu_cs_submit(context_handle, 0,&ibs_request, 1);
313 fence_status.fence = ibs_request.seq_no;
338 struct amdgpu_cs_request ibs_request;
391 memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
392 ibs_request.ip_type = AMDGPU_HW_IP_DMA;
393 ibs_request.ring = ring_id;
394 ibs_request.number_of_ibs = 1;
395 ibs_request.ibs = &ib_info;
396 ibs_request.resources = bo_list;
397 ibs_request.fence_info.handle = NULL;
400 r = amdgpu_cs_submit(context_handle, 0,&ibs_request, 1);
410 fence_status.fence = ibs_request.seq_no;
435 struct amdgpu_cs_request ibs_request;
472 memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
473 ibs_request.ip_type = AMDGPU_HW_IP_GFX;
474 ibs_request.ring = 0;
475 ibs_request.number_of_ibs = 1;
476 ibs_request.ibs = &ib_info;
477 ibs_request.resources = bo_list;
478 ibs_request.fence_info.handle = NULL;
480 r = amdgpu_cs_submit(context_handle, 0,&ibs_request, 1);
489 fence_status.fence = ibs_request.seq_no;
554 struct amdgpu_cs_request ibs_request;
646 memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
647 ibs_request.ip_type = AMDGPU_HW_IP_DMA;
648 ibs_request.ring = 0;
649 ibs_request.number_of_ibs = 1;
650 ibs_request.ibs = &ib_info;
651 ibs_request.resources = bo_list;
652 ibs_request.fence_info.handle = NULL;
654 r = amdgpu_cs_submit(context_handle, 0, &ibs_request, 1);
662 fence_status.fence = ibs_request.seq_no;